JPH0216596A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To make a half-tone display without making a signal circuit complex by generating an effective voltage required for half-tones by voltage amplitude modulation wherein the amplitude of a signal voltage is varied in a period of plural frames and time modulation wherein the on time of signal data is varied. CONSTITUTION:This device consists of a display part 1 where a thin film transistor(TFT) 3 and liquid crystal 2 are laminated, a signal circuit 6 which generates a signal voltage Vd, a scanning circuit 7 which generates a scanning signal Vg, a frame memory 8 for storing half-tone image data, a data modulating circuit 9 which imposes amplitude and time modulation upon the half-tone image data inputted from outside the device according to the half-tones and outputs the result, and a control circuit 10 which controls the whole device. An external system 11 composed of a microcomputer, etc., is connected to the device. Consequently, a signal circuit can be composed of a digital circuit and simplified.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a liquid crystal display device, and particularly to a liquid crystal display device suitable for displaying halftones.

[Conventional technology]

A conventional example of a liquid crystal active matrix display device in which liquid crystal is driven through thin film transistors is disclosed in Japanese Patent Laid-Open No. 61-12929.
It has the configuration shown in Figure 4. The signal circuit includes a shift register 103, a latch circuit 104, and a binary switch group 10.
It consists of 5. this house.

Each switch in the binary switch group 105 has two contacts, and selects either the voltage Vd or the ground potential according to the data value set in the latch circuit 104 via the shift register 103, and outputs the signal voltage. Output as . This signal voltage is applied to the drain of thin film transistor 107.

On the other hand, the scanning circuit also includes a shift register 100 and a latch circuit 1.
01. and a switch group 102, and a voltage V+ is output from the switch group according to the data of the latch circuit 101.
, V- is applied to the gate of the thin film transistor as a scanning voltage. This scanning voltage is applied sequentially to each line (one row of liquid crystals in the horizontal direction) on the screen.

The liquid crystal 108 is connected to the thin film transistor 10 by the scanning voltage.
7 is turned on, it emits light with a brightness that corresponds to the level of the signal voltage, and the image is displayed on the liquid crystal panel 106 by emitting light for each line.

The conventional device described above displays 200 million images, but
In order to display halftones as well, it is necessary to apply a plurality of voltage levels from a signal circuit depending on the brightness of each halftone.

[Problem to be solved by the invention]

When trying to generate multiple voltage levels as signal voltages for halftone display, the conventional configuration requires an analog switching circuit, which makes the signal circuit configuration complicated, making the circuit smaller and cheaper. It becomes difficult to Furthermore, when a panel is constructed in which a signal circuit and a display section are integrated, there are problems with circuit reliability and yield.

An object of the present invention is to provide a liquid crystal display device that can display halftones without complicating the signal circuit.

[Means to solve the problem]

The above purpose focuses on the fact that the brightness of a liquid crystal depends on the effective voltage rather than the instantaneous value of the voltage, and uses voltage amplitude modulation to vary the amplitude of the signal voltage over a period of multiple frames, and the on-time of the signal data. This is achieved by generating the effective voltage required for the halftone by time modulation that varies the voltage.

[Effect]

A time-modulated display signal is generated for the same pixel and input to a signal circuit, and the signal circuit further generates a voltage based on the display signal. As a result, an effective voltage corresponding to the halftone indicated by the display signal is applied to one pixel. Further, the signal circuit that performs time modulation and amplitude modulation of the signal voltage is simple and does not become complicated.

〔Example〕

An embodiment of a liquid crystal display device according to the present invention is shown in FIG. The device includes a display section 1 in which a thin film transistor 3 and a liquid crystal 2 are laminated, a signal circuit 6 that generates a signal voltage Vd, a scanning circuit 7 that generates a scanning signal Vg, a frame memory 8 that stores halftone image data, and an external device. The halftone image data input from the
It consists of a data modulation circuit 9 that time-modulates and outputs data, and a control circuit 10 that controls the entire device.

An external system 11 composed of a microcomputer or the like is connected to this device.

FIG. 2 shows the electro-optical characteristics of the liquid crystal 2. FIG.

In order to achieve halftone display, the brightness Bt is adjusted as shown in the figure.
To display halftones at equal intervals with eBo-87, the applied voltage VLC (effective voltage) can be set as Vo~■7. Here, the applied voltage is the voltage applied to the liquid crystal 2. It is voltage.

FIG. 3 shows a method of driving the display unit 1, and for the sake of simplicity, shows the configuration when driving a liquid crystal Pt-pg of a 3×3 matrix panel.

Figure 4 shows a time chart of scanning voltages Vgl to Vg3 and signal voltages Vdl to Vd3 when liquid crystals PI+P3p P5* P6t P9 are turned on and other liquid crystals are turned off in this configuration. As shown,
The scanning voltages Vgl to Vg3 are sequentially set to a high voltage Vgh to turn on the thin film transistor 3 line by line (in the configuration shown in FIG. 3, one frame consists of three lines). On the other hand, the signal voltages vd1 to vd3 are Vc±V sig when the liquid crystal is on.

Set it to Vc in the off state. As a result, for example, the voltage of Vc+Vsig or Vc-Vsig is applied to the liquid crystal P4 through the thin film transistor 2 and turns on, and the voltage of Vc+Vsig or Vc−Vsig is applied to the liquid crystal P4 through the thin film transistor 2.
voltage is applied to turn it off. In this way, to turn the liquid crystal on, a voltage whose polarity is reversed every frame is applied to the liquid crystal via the thin film transistor 2, and to turn the liquid crystal off, a constant voltage is applied regardless of the frame. The signal voltage Vd and the scanning voltage Vg may be determined so as to be applied.

FIG. 5 shows details of each voltage waveform in FIG. 4, taking as an example the operating voltage Vgl and signal voltage Vd3 for driving the liquid crystal P3. A potential difference between the source voltage Vs3 of the thin film transistor 3 and the voltage Vc on the opposite side of the liquid crystal 2;
The length of time the liquid crystal is turned on gives the effective voltage.

In the above example of FIG. 4, two frames are set as one unit, and the signal waveform is such that the average value of the signal voltage Vd is zero. The reason why this average value is set to zero is that if DC voltage continues to be applied to the liquid crystal 2, its characteristics will rapidly deteriorate, but this does not have to be every two frames. For example, as shown in FIG. 6, one unit is four frames, and the voltages Vd-Vc are sequentially changed to Vl, V2, . . . from the first frame. -Vl, -V2 may be set.

Furthermore, in the examples of the driving methods shown in FIGS. 4 to 6 above, the DC component is eliminated using 2 frames or 4 frames as one unit, and the time width and amplitude are changed. Voltage Vd in the above unit n (n≧1)
This is repeated for a unit of time to form one cycle, and in the next cycle, a different amplitude and time width is applied. There is also a method.

Next, a specific example of a signal voltage for performing halftone display using the liquid crystal driving method according to the present invention described in 1 or more will be shown.
Figures 7(a) and 7(b) both show the drain voltage (= Vd
-Vc) amplitude Vsigte has two levels, V1 and O, and three gradations are expressed in one cycle of four frames (n = 2). In gradation 1, the amplitude of the first and third frames is vl, and the amplitude of the second and fourth frames is -v1. Gradation 2
is the first. The amplitudes of the second frame are Vl and -Vl, respectively, and the amplitudes of the third and fourth frames in the second half are O. For 0 gradation 3, the amplitude is O in all frames. Although FIGS. 7(a) and 7(b) are the same up to the above, the time widths of drain voltage application in each frame are different depending on Ta and Tb, respectively. Different gradations can be expressed by varying the time width of the code.

Figure 8 shows 4 frames with 6 frames (n=3) in one cycle.
In this example, the waveform in each frame is shown in Figure 7 (
This is the same as in case a). In this way, even at the second level,
By increasing the number of frames in one cycle, more gradations can be expressed, and by making the time width of the signal variable, even more gradations can be obtained.

Next, FIG. 9 shows a drain voltage waveform diagram when the level of the drain voltage is set to the number of divisions of 3.1 cycles, n = 2.The amplitudes are VcfVl, Vc:! :V2. and Vc
Either of these, waveforms of gradations 1 to 6 are obtained.

Figure 10 shows that the number of levels is 4.1 cycles for 4 frames (
This figure shows an example of the drain voltage waveform when n = 2), and nine types of waveforms with gradations 1 to 9 are obtained. By increasing the number of levels in this way and, although not illustrated here, by making the length of one cycle and the time width of the signal variable, more gradations can be displayed.

Note that flicker appears on the liquid crystal screen when the signal voltage changes drastically. In order to reduce this flicker, for example, as shown in FIG. 11, the polarity of the signal voltage Vd may be inverted every three frames.

Examples of signal voltages for displaying halftones in the device of the present invention have been shown above with reference to FIGS. 7 to 11. Below is a more specific example of the configuration of a liquid crystal display device to realize this. Explain. FIG. 12 shows the overall configuration of a liquid crystal display device for performing halftone display shown in FIG. 8, in which the display section 1, voltage selection circuit 21,
It is composed of a line memory 12, a latch circuit 13, a data selection switch 15, 19, a frame memory 16, 17, 18, a data conversion circuit 9, a control circuit 20, and a scanning circuit 14.

The latch circuit 13 converts the display signal DATA into a clock signal C.
The signal is taken in in synchronization with KI and converted into a parallel signal, and the line memory 12 holds the display signal of one line only for the display period. The voltage selection circuit 21 selects Vc+V1 . Vc-Vl and v
One of the voltages c (three values taken by Vd in FIG. 8) is selected and output.

That is, as shown in FIG. 13, the signal Si and the alternating current signal AL
As shown in the figure, three voltages Vc are applied depending on “0” and “1” of
fV1. Outputs one of Vc.

The operation of the scanning circuit 14 is shown in FIG. It operates using the frame start signal FST as a synchronization signal and further uses the line start signal LST as a clock signal. This results in
Generates scanning voltages Vgl to Vgn.

Since FIG. 15 shows a method of reading image data signals stored in the frame memories 16 to 18, this operation corresponds to the driving method of FIG. 8 in which six frames are one cycle. That is, the address signal ADH from the control circuit 20 causes the frame memories 16 to 16 to
The data selection switch 15 selects the frame memory 16 in the period of frame 1.2, selects the frame memory 17 in the period of frame 3.4, and then selects the frame memory 17 in the period of frame 3.4. The frame memory 18 is selected in a period of .6. The data selection switch 15 is
This operation is repeated with the selection operation for frames 1 to 6 as one cycle.

FIG. 16 shows an example of the correspondence between the display signals of the display section 1 and the frame memories 16 to 18. Each of the frame memories 16 to 18 has the same number of bits as the number of pixels of the display unit 1, and the addresses in the X direction are 1 to M, and the addresses in the X direction are 1 to N. M and N are equal to the number of horizontal pixels and the number of vertical pixels of the display section 1. The same address as this frame memory is given to the pixels of the display 1, and gradations 1 to 4 are sequentially displayed in each pixel 22 where y=1 and x=1 to 4 as shown in Figure 16 (a). . However, in the same figure (i)
is the meaning of gradation i. To display this, the -th line (y
When the scanning circuit 14 selects the scanning line of =1), the display signals 81 to S4 among the outputs of the line memory 12 may be as shown in FIG. 16(c). This makes this signal the 13th
This is because if applied to the figure, signals of gradations 1 to 4 shown in FIG. 8 can be obtained at desired pixels.

In order to provide the display signals 81 to S4, the contents of x=1 to 4 (y=1) of the frame memories 16 to 18 are changed as shown in FIG.
You can do as in b). That is, in FIG. 16(C), while the frame memory 16 is selected, 81 to S4 in FIG. 16(c) are "1", 1", '1", and "0", respectively, so x=1 ~It's in number 4. The same applies to frame memories 17 and 18. The data conversion circuit 9 decodes the display data D input from the outside and converts it into the image data shown in FIG. 16(b).
Write in 8.

FIG. 17 shows another specific configuration example of the apparatus of the present invention, which displays the nine gradations shown in FIG. 10. The frame memories 26 and 27 are alternately selected and read by the data selection switch 29, and the read display signal DAT
A is input to the voltage selection circuit via the latch circuit 24 and line memory 25. The latch circuit 24 and line memory 25 hold display signals in units of 2 bits.

The voltage selection circuit 23 corresponds to each level in FIG.
Vc, Vc:th:V 1 , VcthV 2 , Vc
The voltage of fV3 is selected and output as shown in FIG. 18(a) according to the 2-bit display signal from the line memory and the AC signal AL. A circuit example of the voltage selection circuit 23 for performing such an operation is shown in FIG. 18(b). The decoder 4 is configured to provide the switch group 43 with a signal that turns on one of the corresponding switches 43a to 43f to obtain the output shown in FIG. 18(a) in response to the input signal SxHAL.
2, the data selection switch 29 is configured as the first
As shown in FIG. 9, the frame memory 26 is selected in the first half of one cycle, and the frame memory 27 is selected in the second half.

FIG. 20 shows an example of the correspondence between the display signals of the display unit 1 and the frame memories 26 and 27. Screen horizontally M
x N pixels vertically, the frame memories 26, 27 are provided with 2 bits (2", 21) corresponding to one address for each pixel, and therefore each frame memory 26, 27 has the number of pixels MXN of the screen. 2MN bits as shown in FIG. 20(a).

With this device, any one pixel has gradations 1 to 9 in Figure 10.
When displaying one of the frame memories 26.
The contents of 27 are shown in FIG. 20(b).

For example, when the gradation is 4, the corresponding bits in the frame memory 26 are (1, 1), and the corresponding bits in the frame memory 27 are (0,
, 0) Therefore, in frames 1 and 2 in which the frame memory 26 is selected (FIG. 19), as is clear from FIG. 18(a), the output Vc + V1 .
Vc-Vl becomes the signal voltage Vd, and the frame memory 27
In frame 3.4 where is selected, the output Vc, Vc for 5=(0,0) becomes the signal voltage Vd. This corresponds to the signal waveform of gradation 4 in FIG. Therefore, the data conversion circuit 28 converts the external input data D according to its gradation as shown in FIG. .

FIG. 21 shows an example of the pixel allocation and bit allocation of the frame memories 26 and 27 in the case of a color display device with the device configuration shown in FIG. 17. A color display section 34 is provided in place of the display section 1 in FIG. 17,
This is made up of color filters of the same color arranged horizontally. One pixel consists of three colors, R (red), G (green), and B (blue), with M pixels in the horizontal direction and N pixels in the vertical direction. The frame memories 25, 36 also replace the frame memories 26, 27 of FIG. 17, and these are shown in FIG. 20(a).
It has three times the number of bits as the frame memory 26.27 shown in . Vertical address y of each frame memory 35.36=
l, 4.7..., R data, y=2.5,8...
. . . G data is written to y=3.6.9 . . . B data is written. By using these display section 34 and frame memories 35 and 36, color display can be performed with the configuration shown in FIG. 17, and the number of colors is 9' (=729).

FIG. 22 shows another configuration example of a frame memory for realizing the color display described in FIG. 21.

The frame memory 37 is composed of memories 37a to 37f, and the number of bits of each memory is M bits in the horizontal direction and N bits in the vertical direction, which is equal to the number of one pixel.

This is the part that replaces the frame memories 26 and 27 in FIG. Frame memories 37a and 37b each store a 2°, 21 bit portion of R data. 2 others 1
Similarly, data for each color of G and B is stored as a set. Data selection switches 38 to 4o are frame memories 37a to 37f.
is selected, and each frame memory of R, G, and B is selected using the data selection switch 41 in synchronization with the scanning timing. This configuration also allows display of 93 colors.

In the configuration for color display shown in FIG. 21 or 22, when scanning one color, for example R, the value of R on that scanning line is read out from the frame memory as a signal Si, and the Voltage selection circuit 2 from signal AL
3, the corresponding signal voltage is selected and applied to the liquid crystal. In this configuration, the same voltage (for example, Vc+v1) is selected and outputted as the signal Si for any color. In order to adjust the color tone to deal with variations in color filters, it is necessary to adjust this output Vd according to the color. For this purpose, the voltage Vc±Vi(i
It is desirable to be able to variably set the values of = 1 to 3) to different values.
The switches 46a to 46f therein are operated in synchronization with the scanning signal, and the voltages set separately for each color are taken out as Vc, Vcj=Vi (i=1 to 3), and these are shown in FIG. What is necessary is to input it to the voltage selection circuit 23 of.

This completes the explanation of the specific example of the display device shown in FIG. 17 and subsequent figures that implements the driving method shown in FIG. 10. In addition.

In the above embodiments, a display combining a thin film transistor and a liquid crystal was described, but other three-terminal elements and two-terminal switch elements such as MIM may also be used. Although the polarity of the voltage is assumed to be reversed, the polarity may be reversed for each scanning line, and the method of polarity reversal is not particularly limited. It is clear that the present invention can also be applied to halftone display on panels.

〔Effect of the invention〕

According to the present invention, since the signal circuit can be configured with a digital circuit, the circuit can be simplified, and the device can be made smaller and lower in price. Further, the reliability of the circuit is improved, and in particular, the yield of a circuit in which a signal circuit and a display section are integrated is improved.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an embodiment of the display device of the present invention, FIG. 2 is a diagram of optical characteristics of a liquid crystal, and FIGS. 3 to 6 are explanatory diagrams of a liquid crystal driving method in the embodiment of FIG. Figures 7 to 11
The figure shows an example of a drive waveform for displaying multiple gradations, and FIGS. 12 to 16 are diagrams for explaining a specific configuration example of a display device using the drive waveform of FIG. 8 and its operation. 17 to 20 are diagrams for explaining a specific configuration example and its operation of a display device using the drive waveform shown in FIG. 10, and FIGS. 21 to 23 are diagrams showing the configuration of FIG. 17. FIG. 24 is a diagram showing an example of the configuration of a display, a frame memory, and a signal power source when performing color display in a conventional display device. 1...Display section, 2...Liquid crystal, 3...Thin film transistor, 6...Signal circuit, 7.14...Scanning circuit, 8°16-18.26.27 River frame memory,
9.28°°° data conversion circuit, 10.20... control circuit, 12.25.°° line memory, 13
．． 24...Latch circuit, 21.23...Voltage selection circuit. Shima 1 figure

Claims (1)

[Claims] 1. A display unit in which a light emitting circuit using a liquid crystal light emitting element is provided corresponding to each element on the screen, and a plurality of gradations in which values corresponding to each pixel of an input signal are predetermined. a conversion means for detecting whether the gradation corresponds to the corresponding gradation and converting it into a code consisting of a plurality of partial codes representing the corresponding gradation; a frame memory that stores the same partial code of the code corresponding to the frame memory, a latch that sequentially reads and holds each piece of data in the frame memory one line at a time by raster scanning, and each part held in the latch. a signal generating means for generating a pulsed signal voltage having an amplitude and time width corresponding to the value of a binary alternating signal given separately from the code; and a scanning means for raster scanning the light emitting circuit of the display section. and control means having a function of controlling the signal voltage from the signal generating means to be applied to the light emitting circuit scanned by the means, and the alternating current signal is read by one of the frame memories. This is a signal that takes the first value while being read out, and takes the second value when the same frame memory is subsequently read out, and the signal voltage is set to the above value for any partial code. A liquid crystal characterized in that the alternating current signal has opposite polarity when it takes the first value and when it takes the second value, and the average value at both times is zero. display device. 2. Each of the frame memories is successively read twice by raster scanning, and the values of the alternating current signals at the first and second readings are used as the first and second readings.
2. The liquid crystal display device according to claim 1, wherein the liquid crystal display device has a value of . 3. The partial code is n bits, and the signal voltage generating means extracts 2n predetermined voltages according to the partial code, and generates a voltage whose polarity is determined according to the value of the alternating current signal. The liquid crystal display device according to claim 1, wherein the liquid crystal display device outputs the signal voltage as the signal voltage. 4. When the light emitting circuit has pixels corresponding to each color of R, G, and B for color display, each of the code, partial code, and frame memory is provided for each color, and the code is sequentially read for each color. 2. The apparatus according to claim 1, wherein the reading of the corresponding frame memory is performed by a latch, the signal voltage generation means generates a signal voltage for displaying gradations of each color, and the scanning means scans pixels corresponding to each color. LCD display device.