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JPH01298742A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH01298742A
JPH01298742A JP12840188A JP12840188A JPH01298742A JP H01298742 A JPH01298742 A JP H01298742A JP 12840188 A JP12840188 A JP 12840188A JP 12840188 A JP12840188 A JP 12840188A JP H01298742 A JPH01298742 A JP H01298742A
Authority
JP
Japan
Prior art keywords
copper
wiring
electrode wiring
oxygen
impurity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12840188A
Other languages
Japanese (ja)
Inventor
Masatoshi Tsuneoka
正年 恒岡
Takafumi Tokunaga
徳永 尚文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12840188A priority Critical patent/JPH01298742A/en
Publication of JPH01298742A publication Critical patent/JPH01298742A/en
Pending legal-status Critical Current

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To precipitate as an oxide an impurity diffused or mixed into copper electrode wiring to a grain boundary to prevent the resistance of the copper electrode wiring from increasing, by compounding electrode wiring formed on the integrated circuit forming surface of a semiconductor pellet from an oxygen-containing copper material. CONSTITUTION:After forming copper wiring 3a-3c, the atoms of an impurity such as phosphorus or boron included in an insulating film 5 diffuse into said copper wiring 3a-3c during heat treatment such as annealing. The atmos of an impurity such as phosphorus or boron diffused into the copper wiring 3a-3c join to oxygen contained in said wiring and are precipitated as an oxide to a grain boundary because the absolute value of the oxide generating free energy of the atoms is larger than that of copper. This reduces the spatial irregularity of the crystal lattice and prevents the electrons from scattering thus preventing the increase of the resistance of the copper wiring 3a-3c.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置に関し、特に、銅(Cu)系材料
を使用した電極配線の抵抗値の増大防止に適用して有効
な技術に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor device, and in particular, to a technique that is effective when applied to prevent an increase in resistance value of electrode wiring using a copper (Cu)-based material. It is.

〔従来の技術〕[Conventional technology]

半導体装置においては、近年、その低抵抗性と耐マイグ
レーション性の観点から、銅を材料とした電極配線が注
目されている。
In semiconductor devices, electrode wiring made of copper has recently attracted attention from the viewpoint of its low resistance and migration resistance.

電極配線材料に銅を使用した半導体装置については、第
47回(1986)秋季応用物理学会講演予稿集、30
p −N−12、P513 に記載があり、銅系電極配
線の下面に窒化チタン(’r+N)を形成することによ
って、銅原子のシリコン(Si)基板への拡散を阻止す
る技術が説明されている。
Regarding semiconductor devices using copper as electrode wiring material, see Proceedings of the 47th (1986) Autumn Conference of the Japan Society of Applied Physics, 30.
p-N-12, P513 describes a technique to prevent copper atoms from diffusing into a silicon (Si) substrate by forming titanium nitride ('r+N) on the lower surface of copper-based electrode wiring. There is.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

ところが、上記従来技術においては、銅系電極配線に不
純物が拡散・混入し固溶すると、次のような問題がある
ことを本発明者は見出した。
However, in the above-mentioned conventional technology, the present inventors have found that when impurities are diffused and mixed into the copper-based electrode wiring and form a solid solution, the following problem occurs.

すなわち、一般に、金属の抵抗値は、異種の原子が固溶
すると急激に増加してしまう問題である。
That is, in general, the resistance value of a metal rapidly increases when different types of atoms are dissolved in solid solution.

例えば、集積回路の絶縁膜材料には、電極配線の下地段
差の平坦化や、ナ) IJウムイオン(Na゛)、カリ
ウムイオン(K゛)等の可動イオンのゲッタリングなど
の観点から、PSG膜、BPSG膜、リン(P)を含ん
だSOG膜、などが使用されている。
For example, PSG film is used as an insulating film material for integrated circuits, from the viewpoint of flattening the underlying step of electrode wiring and gettering of mobile ions such as Na) IJium ions (Na) and potassium ions (K). , BPSG film, SOG film containing phosphorus (P), etc. are used.

これら絶縁材料におけるリン、ホウ素(B)等の不純物
原子は、ウェハプロセス(あるいは、チツブプロセス)
の所定の熱処理中に銅系電極配線に拡散・固溶し、その
抵抗値を大幅に増加させてしまう。なお、この影響は、
周期律表において、溶媒・溶質金属の族番号の差の2乗
に比例する(Lindの法則)。
Impurity atoms such as phosphorus and boron (B) in these insulating materials are removed by wafer process (or chip process).
During the prescribed heat treatment, it diffuses into the copper-based electrode wiring and forms a solid solution, significantly increasing its resistance value. Furthermore, this effect is
In the periodic table, it is proportional to the square of the difference between the group numbers of the solvent and solute metal (Lind's law).

これは、銅と不純物原子とが固溶体を形成する場合、銅
の結晶格子のところどころにリン、ホウ素などの異種の
原子が混在し、結晶半径が異なってしまうために、結晶
格子の空間的不規則性が増大し、電子が移動する際に散
乱してしまうためと想定され、銅系電極配線において信
号速度を遅延させ、かつ発熱作用を増加させてしまう。
This is because when copper and impurity atoms form a solid solution, different types of atoms such as phosphorus and boron coexist here and there in the copper crystal lattice, resulting in different crystal radii, resulting in spatial irregularities in the crystal lattice. It is assumed that this is because the electrons become scattered when they move, delaying the signal speed and increasing the heat generation effect in the copper-based electrode wiring.

本発明は上記問題点に着目してなされたものであり、そ
の目的は、銅系電極配線の抵抗値の増大を防止すること
にある。
The present invention has been made in view of the above-mentioned problems, and its purpose is to prevent an increase in the resistance value of copper-based electrode wiring.

本発明の前記ならびにその他の目的と新規な特徴は、明
細書の記載および添付図面から明らかになるであろう。
The above and other objects and novel features of the present invention will become apparent from the description and accompanying drawings.

〔課題を解決するための手段〕 本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、次の通りである。
[Means for Solving the Problems] A brief overview of typical inventions disclosed in this application is as follows.

すなわち、酸素を添加した銅系材料を集積回路の電極配
線材料に用いた半導体装置である。
That is, this is a semiconductor device in which a copper-based material to which oxygen is added is used as an electrode wiring material of an integrated circuit.

〔作用〕[Effect]

上記した手段によれば、酸化物生成自由エネルギの絶対
値が銅よりも大きいホウ素、リン等の不純物原子が、例
えば所定のアニール中に銅系電極配線に拡散・混入する
と、銅系電極配線における酸素(0゜)と結合して結晶
粒界に酸化物として析出されるため、結晶格子の空間的
不規則性が防止される。
According to the above-mentioned means, if impurity atoms such as boron and phosphorus, whose absolute value of oxide formation free energy is larger than that of copper, diffuse and mix into the copper-based electrode wiring during a predetermined annealing, the copper-based electrode wiring Since it combines with oxygen (0°) and is precipitated as an oxide at grain boundaries, spatial irregularities in the crystal lattice are prevented.

〔実施例〕〔Example〕

第1図は本発明の一実施例である半導体装置の概略部分
断面図、第2図は酸素の固溶された銅系電極配線におけ
る不純物と電気伝導率の関係を示す図、第3図は無酸素
銅系電極配線おける不純物と電気伝導率の関係を示す図
である。
FIG. 1 is a schematic partial cross-sectional view of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a diagram showing the relationship between impurities and electrical conductivity in copper-based electrode wiring in which oxygen is dissolved as a solid solution, and FIG. FIG. 3 is a diagram showing the relationship between impurities and electrical conductivity in oxygen-free copper electrode wiring.

第1図に示すシリコン単結晶からなる基板1の活性素子
領域には、図示しないバイポーラトランジスタ、抵抗等
の所定の素子が形成されている。
Predetermined elements such as bipolar transistors and resistors (not shown) are formed in the active element region of a substrate 1 made of single crystal silicon shown in FIG.

二酸化ケイ素(S 10x )からなる絶縁膜2の上面
には、上記素子を結線して所定の回路を構成する銅系配
線3a、3bがパターン形成されており、この銅系配線
3a、3bには、例えば、0.03重1%の酸素が固溶
されている。
On the upper surface of the insulating film 2 made of silicon dioxide (S 10 For example, 0.03% by weight of oxygen is dissolved in solid solution.

上記銅系配線3a、3bは、例えば、銅と酸素との合金
ターゲットを使用したスパッタリング法にニリ、絶縁膜
2の上面に酸素の固溶された銅薄膜を堆積させ、これを
エツチングでパターン形成グしたものである。
The copper-based wirings 3a and 3b are formed, for example, by sputtering using an alloy target of copper and oxygen, depositing a copper thin film containing oxygen as a solid solution on the upper surface of the insulating film 2, and forming a pattern by etching. This is what I searched for.

ところで、酸素を多量に添加した銅系電極配線を、例え
ば、還元性雰囲気中でアニールした場合、雰囲気中に含
まれる水素が銅系電極配線に拡散し、結晶粒界にH20
の気孔を多lに発生し、銅系電極配線を脆化させてしま
うため、これを考慮すると銅系配線3a、3bへの酸素
の添加量は、特に限定するわけではないが、例えば、O
,OO1重t%〜0.1重1%が良い。
By the way, when a copper-based electrode wiring to which a large amount of oxygen has been added is annealed, for example, in a reducing atmosphere, hydrogen contained in the atmosphere diffuses into the copper-based electrode wiring, causing H20 to form at grain boundaries.
This generates a large number of pores and makes the copper-based electrode wiring brittle. Considering this, the amount of oxygen added to the copper-based wirings 3a and 3b is not particularly limited.
, OO 1% by weight to 0.1% by weight is good.

次に、銅系配線3a、3bを被覆する絶臘膜4の上面に
は、BPSG等からなる絶縁ff5が形成されている。
Next, an insulating film ff5 made of BPSG or the like is formed on the upper surface of the solid film 4 covering the copper-based wirings 3a and 3b.

絶縁膜5の上面にパターン形成された銅系配線3cは、
前記銅系配線3a、3bと同様、0.03重量%の酸素
が固溶されており、絶縁膜4および絶縁膜5の一部分に
開孔形成されたスルーホール6により、銅系配線3Cと
上記銅系配線3bとの電気的な接続がなされている。
The copper-based wiring 3c patterned on the upper surface of the insulating film 5 is
Similar to the copper-based wirings 3a and 3b, 0.03% by weight of oxygen is dissolved in solid solution, and through holes 6 formed in a portion of the insulating film 4 and the insulating film 5 connect the copper-based wiring 3C and the above. Electrical connection is made with copper-based wiring 3b.

銅系配線3Cの上層には、BPSG等からなる保護膜7
が形成され、銅系配線3Cが外界から保護されている。
A protective film 7 made of BPSG or the like is provided on the upper layer of the copper-based wiring 3C.
is formed, and the copper-based wiring 3C is protected from the outside world.

次に、本実施例の作用を説明する。Next, the operation of this embodiment will be explained.

銅系配線38〜3Cの形成後、アニール等の熱処理中に
、例えば、絶縁膜5に含まれるリン、ホウ素等の不純物
原子が、銅系配線38〜3Cに拡散する。
After the copper-based interconnects 38 to 3C are formed, impurity atoms such as phosphorus and boron contained in the insulating film 5 are diffused into the copper-based interconnects 38 to 3C during heat treatment such as annealing.

本実施例の銅系配線3a〜3Cの場合、拡散したリン、
ホウ素などの不純物原子は、銅よりも酸化物生成自由エ
ネルギの絶対値が大きいため、濁系配線3a〜3Cに添
加されている酸素と結合して酸化物として結晶粒界に析
出される。
In the case of the copper-based wirings 3a to 3C of this embodiment, diffused phosphorus,
Since impurity atoms such as boron have a larger absolute value of oxide formation free energy than copper, they combine with oxygen added to the turbid interconnections 3a to 3C and are precipitated as oxides at grain boundaries.

このため銅系配線3a〜3cにおいては、結晶格子の空
間的不規則性が低減し、電子の散乱が防止されるため、
その抵抗値の増大が防止される。
Therefore, in the copper-based wirings 3a to 3c, the spatial irregularity of the crystal lattice is reduced and scattering of electrons is prevented.
An increase in the resistance value is prevented.

例えば、酸素を含まない銅系電極配線中にリンが0.0
2重1%固溶すると、銅系電極配線の電気電導率は、1
3%(=Δσl )低下する(第3図)。
For example, 0.0% phosphorus is present in copper-based electrode wiring that does not contain oxygen.
When a double 1% solid solution is used, the electrical conductivity of the copper-based electrode wiring is 1
It decreases by 3% (=Δσl) (Fig. 3).

しかし、断面積、長さ等の条件を同一にした銅系電極配
線に0.03重盪%の酸素を添加した場合、第2図に示
すように、その電気電導率を0,6%(=Δσ2)低下
に止めることができる。なお、この電気電導率の0.6
%の低下には、酸素の添加によるものも含まれている。
However, when 0.03% oxygen is added to copper-based electrode wiring with the same conditions such as cross-sectional area and length, the electrical conductivity decreases to 0.6% ( =Δσ2) can be stopped from decreasing. Note that this electrical conductivity is 0.6
The % decrease also includes that due to the addition of oxygen.

したがって本実施例によれば、銅系配線3a〜3Cは銅
本来の抵抗値とほぼ等しくなり、配線遅延が防止される
ため、高速性に優れた半導体装置が得られる。
Therefore, according to this embodiment, the resistance values of the copper-based interconnects 3a to 3C are approximately equal to the original resistance of copper, and interconnect delays are prevented, so that a semiconductor device with excellent high-speed performance can be obtained.

また、配線抵抗が増加しないため、発熱作用の増加も防
止される。
Further, since the wiring resistance does not increase, an increase in heat generation is also prevented.

しかも、銅系電極配線は耐マイグレーション性に優れて
いるため、信頼性の高い半導体装置が得られる。
Moreover, since the copper-based electrode wiring has excellent migration resistance, a highly reliable semiconductor device can be obtained.

以上、本発明者によってなされた発明を実施例に基づき
具体的に説明したが、本発明は前記実施例に限定される
ものではなく、その要旨を逸脱しない範囲で種々変更可
能であることはいうまでもない。
As above, the invention made by the present inventor has been specifically explained based on Examples, but it should be noted that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Not even.

例えば、実施例では、銅系電極配線に不純物原子として
ホウ素、リンが拡散・混入した場合について説明したが
、これに限定されるものではなく、種々変更可能であり
、例えば、シリコン、クロム(Cr)、%リブデン(M
O)、スズ(Sn)、鉄(Fe)、アンチモン(Sb)
等の酸化物生成自由エネルギの絶対値が銅よりも大きい
原子が銅系配線に拡散・混入した場合でも同じ効果が得
られる。
For example, in the embodiment, a case has been described in which boron and phosphorus are diffused and mixed as impurity atoms into the copper-based electrode wiring, but the invention is not limited to this, and various changes can be made. For example, silicon, chromium (Cr ), % liveden (M
O), tin (Sn), iron (Fe), antimony (Sb)
The same effect can be obtained even when atoms whose absolute value of oxide formation free energy is larger than that of copper are diffused and mixed into the copper-based wiring.

また、本発明の技術は、他のPGM材料を使用した絶縁
膜、あるいは絶縁膜以外からの不純物原子の拡散につい
ても有効であると想定される。
It is also assumed that the technique of the present invention is effective for the diffusion of impurity atoms from insulating films using other PGM materials or from other than insulating films.

また、実施例では、銅系電極配線を形成する方法として
、銅と酸素との合金ターゲットを使用したスパッタリン
グ法を述べたが、これに限定されず、種々変更可能であ
り、例えば、銅をターゲットとして、真空容器内に酸素
をわずかに入れて、この酸素とターゲットからスパック
された銅とを反応させ、基板上に銅と酸素とから構成さ
れる薄膜を形成し、銅系電極配線をパターン形成しても
よい。
In addition, in the embodiment, a sputtering method using an alloy target of copper and oxygen was described as a method for forming copper-based electrode wiring, but the method is not limited to this, and various modifications are possible. In this process, a small amount of oxygen is introduced into a vacuum container, and this oxygen reacts with the spucked copper from the target to form a thin film composed of copper and oxygen on the substrate, forming a pattern of copper-based electrode wiring. You may.

また、例えば、基板上に銅薄膜を形成した後、イオンブ
レーティング法により、酸素を打ち込むことで、銅系電
極配線に酸素を添加してもよい。
Further, for example, oxygen may be added to the copper-based electrode wiring by forming a copper thin film on the substrate and then implanting oxygen using an ion-blating method.

〔発明の効果〕〔Effect of the invention〕

本願において開示される発明のうち代表的なものによっ
て得られる効果を簡単に説明すれば、下記の通りである
A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

すなわち、半導体ペレットの実情回路形成面に形成され
た電I配線を酸素の添加された銅系材料で構成すること
により、銅系電極配線に拡散・混入してきた不純物が酸
化物として結晶粒界に析出されるため、銅系電極配線の
抵抗値の増大が防止される。
In other words, by composing the electric I wiring formed on the actual circuit forming surface of the semiconductor pellet with a copper-based material doped with oxygen, impurities that have diffused and mixed into the copper-based electrode wiring are absorbed into the grain boundaries as oxides. Since it is deposited, an increase in the resistance value of the copper-based electrode wiring is prevented.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例である半導体装置の概略部分
断面図、 第2図は酸素の固溶された銅系電極配線における不純物
と電気伝導率の関係を示す図、第3図は無酸素銅系電極
配線おける不純物と電気伝導率の関係を示す図である。 1・・・基板、2・・・絶縁膜、3a、3b。 3C・・・銅系配線、4・・・絶縁膜、5・・絶縁膜、
6・・・スルーホール、7・・・保護膜。 3a〜3cm銅采配標 0.0001    0001     0DI O,
020,10不純物〔wt〜〕 第3図 不純物[wtX]
FIG. 1 is a schematic partial cross-sectional view of a semiconductor device that is an embodiment of the present invention, FIG. 2 is a diagram showing the relationship between impurities and electrical conductivity in copper-based electrode wiring in which oxygen is dissolved as a solid solution, and FIG. FIG. 3 is a diagram showing the relationship between impurities and electrical conductivity in oxygen-free copper electrode wiring. DESCRIPTION OF SYMBOLS 1... Substrate, 2... Insulating film, 3a, 3b. 3C...Copper-based wiring, 4...Insulating film, 5...Insulating film,
6...Through hole, 7...Protective film. 3a~3cm copper clasp 0.0001 0001 0DI O,
020,10 Impurity [wt~] Figure 3 Impurity [wtX]

Claims (1)

【特許請求の範囲】 1、半導体ペレットの集積回路形成面に形成された電極
配線が銅系材料よりなり、この銅系材料の中に酸素が添
加されていることを特徴とする半導体装置。 2、前記酸素の添加量が0.001〜0.1重量%であ
ることを特徴とする請求項1記載の半導体装置。
[Scope of Claims] 1. A semiconductor device characterized in that the electrode wiring formed on the integrated circuit forming surface of the semiconductor pellet is made of a copper-based material, and oxygen is added to the copper-based material. 2. The semiconductor device according to claim 1, wherein the amount of oxygen added is 0.001 to 0.1% by weight.
JP12840188A 1988-05-27 1988-05-27 Semiconductor device Pending JPH01298742A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12840188A JPH01298742A (en) 1988-05-27 1988-05-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12840188A JPH01298742A (en) 1988-05-27 1988-05-27 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH01298742A true JPH01298742A (en) 1989-12-01

Family

ID=14983882

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12840188A Pending JPH01298742A (en) 1988-05-27 1988-05-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH01298742A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4325706A1 (en) * 1992-07-31 1994-02-10 Toshiba Kawasaki Kk Mfg. electrode or wiring layer on semiconductor device - forming metal oxide film and reducing to produce wiring layer e.g. of copper or silver
JP2009169268A (en) * 2008-01-18 2009-07-30 Mitsubishi Materials Corp Wire and electrode of excellent adhesiveness for liquid crystal display

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4325706A1 (en) * 1992-07-31 1994-02-10 Toshiba Kawasaki Kk Mfg. electrode or wiring layer on semiconductor device - forming metal oxide film and reducing to produce wiring layer e.g. of copper or silver
US5424246A (en) * 1992-07-31 1995-06-13 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor metal wiring layer by reduction of metal oxide
DE4325706C2 (en) * 1992-07-31 2002-08-29 Toshiba Kawasaki Kk Method for producing a semiconductor device
JP2009169268A (en) * 2008-01-18 2009-07-30 Mitsubishi Materials Corp Wire and electrode of excellent adhesiveness for liquid crystal display

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