JPH01138467A - Voltage comparison device - Google Patents
Voltage comparison deviceInfo
- Publication number
- JPH01138467A JPH01138467A JP62296862A JP29686287A JPH01138467A JP H01138467 A JPH01138467 A JP H01138467A JP 62296862 A JP62296862 A JP 62296862A JP 29686287 A JP29686287 A JP 29686287A JP H01138467 A JPH01138467 A JP H01138467A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- transistor
- current
- resistance
- vin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 230000007423 decrease Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 101100428764 Drosophila melanogaster vret gene Proteins 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
Landscapes
- Measurement Of Current Or Voltage (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明はヒステリシス回路内蔵の電圧比較器に係り、
特に電源電圧検出に適した電圧比較器に関するものであ
る。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a voltage comparator with a built-in hysteresis circuit.
In particular, the present invention relates to a voltage comparator suitable for detecting power supply voltage.
第2図は従来の電圧比較器の構成を示す回路図で’Ql
”Q4はダーリントン入力形の差動増幅器シス電圧発生
回路を構成するトランジスタと抵抗Vrefは基準電圧
%R1とR2とは比較用電圧発生用の抵抗、I、、I、
、1.は定電流源である。Figure 2 is a circuit diagram showing the configuration of a conventional voltage comparator.
``Q4 is a Darlington input type differential amplifier transistor that constitutes a cis voltage generation circuit, and a resistor Vref is a reference voltage.R1 and R2 are resistors for comparison voltage generation, I, ,I,
, 1. is a constant current source.
次に動作について説明する。Next, the operation will be explained.
電源電圧が高い場合、電圧比較器の六方電圧IN n
VIN > Vref
に設定されているとする。電源電圧’tvccとすると
。When the power supply voltage is high, it is assumed that the hexagonal voltage of the voltage comparator is set to IN n VIN > Vref. Assuming that the power supply voltage is 'tvcc.
となる。VINンVrefであるので、Ql−Q4がO
N。becomes. Since VIN is Vref, Ql-Q4 is O.
N.
Q2がON、Q、がOFF状態である。従って、 Q?
はOFFとなる。Q2 is ON and Q is OFF. Therefore, Q?
becomes OFF.
次に電源電圧Vccが減少し、六方電圧YENも減少し
、VIN < Vref iCなると4 Q、 @ Q
4がON%Q2がOFF、Q8が0NiCなる(Z)テ
&Q、もONとなる。Next, the power supply voltage Vcc decreases, the hexagonal voltage YEN also decreases, and when VIN < Vref iC, 4 Q, @ Q
4 is ON%Q2 is OFF and Q8 is 0NiC (Z)Te&Q is also ON.
Q、がONとなると、抵抗R8ヲショートさせるので。When Q is turned on, it shorts out resistor R8.
入力電圧VINは
R1) ・・・(2)
VIN −Vc・(IコゴF
となり、ヒステリシス幅ΔVは、(11式−(2)式よ
り、となる。結局、比較電圧ばΔVだけのヒステリシス
電圧を持ち、電源電圧vCCが減少する時の比較電圧と
、電源電圧Vccが増加する時の比較電圧とはΔVだけ
異なり、検出電圧はヒステリシス特性を持つ0
〔発明が解決しよりとする問題点〕
従来のヒステリシス電圧内蔵゛亀圧比較器は以上のよう
に構成されているので、微少なヒステリシス電圧を発生
させることができないという問題点かあつ九。つまり、
トランジスタQ、がON状態になった場合、トランジス
タの飽和電圧Vaatが残り、このVsatば10〜3
0 mVとばらつくので、数10mVのヒステリシス電
圧全精度よく発生させることができなかった。The input voltage VIN is R1) (2) VIN - Vc (IcogoF), and the hysteresis width ΔV is (from equation 11 - equation (2)).In the end, the comparison voltage is a hysteresis voltage of only ΔV. The comparison voltage when the power supply voltage VCC decreases and the comparison voltage when the power supply voltage VCC increases differ by ΔV, and the detected voltage has a hysteresis characteristic. [Problems that the invention aims to solve] Since the conventional voltage comparator with a built-in hysteresis voltage is configured as described above, the problem is that it cannot generate a minute hysteresis voltage.In other words,
When the transistor Q is turned on, the saturation voltage Vaat of the transistor remains, and this Vsat is 10 to 3
Since the voltage varies to 0 mV, it was not possible to generate a hysteresis voltage of several tens of mV with high accuracy.
この発明のヒステリシス電圧内蔵電圧比較器は。The voltage comparator with a built-in hysteresis voltage according to the present invention has a built-in hysteresis voltage.
上記のような問題点を解消するtめになされたもので、
微少なヒステリシス電圧を非常に高精度に発生すること
ができる電圧比較器を得ることを目的とする。This was done to solve the problems mentioned above.
The purpose of this invention is to obtain a voltage comparator that can generate a minute hysteresis voltage with very high accuracy.
この発明に係る電圧比較器ri、それを構成するダーリ
ントン入力差動増幅器の一方の入力回路中に組み込んだ
抵抗に流れる電流を被比較電圧が基準電圧ニジ大きいか
小さいかによって、所定量異る値になるようにしたもの
である。In the voltage comparator ri according to the present invention, the current flowing through the resistor incorporated in one input circuit of the Darlington input differential amplifier constituting the voltage comparator ri is set to a value that differs by a predetermined amount depending on whether the voltage to be compared is larger or smaller than the reference voltage. It was designed so that
この発明における電圧比較器は、ダーリントン入力差動
増幅器に内蔵された抵抗に流す電流を切り換えることに
より、安定なヒステリシス電圧を発生させる。The voltage comparator in this invention generates a stable hysteresis voltage by switching the current flowing through the resistor built into the Darlington input differential amplifier.
以下、この発明の一実施例を図について説明する。第1
図において、Q+ −Q2.QB−Q4はダーリントン
入力の差動増幅器を構成するトランジスタ、Q、。An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, Q+ -Q2. QB-Q4 is a transistor Q that constitutes a Darlington input differential amplifier.
Q6け定電流負荷回路を構成するトランジスタ、Qlは
トランジスタQ2とともにON状態になりヒステリシス
に圧発生用の電流?切シ換える之めのトランジスターQ
g、Qsはカレントミラーを構成するトランジスタ、R
8,R,dヒステリシス電圧発生用の抵抗、R,、R2
は比較用入力端子設定抵抗、 I、、12.I。The transistor Ql, which constitutes the Q6 constant current load circuit, is turned on together with the transistor Q2, and a current for generating pressure is generated due to hysteresis. Transistor Q for switching
g, Qs are transistors forming a current mirror, R
8, R, d Resistance for hysteresis voltage generation, R,, R2
is the comparison input terminal setting resistance, I, ,12. I.
I4は定電流源である。I4 is a constant current source.
まず、電源電圧が高い場合、VIN > Vrefとな
るようにR,、R2にて入力電圧VIN k設定する。First, when the power supply voltage is high, the input voltage VINk is set using R and R2 so that VIN>Vref.
まt。Yes.
It ”工8 ’ R8””4に設定する。この時、Q
、、Q4がON、 Q2がON、Q8がOFFで、 Q
?はON状態になるので、Qg、Qsからなるカレント
ミラーは動作せず、Q、はOFFであるので、R4には
工、のみが流れる。It is set to "4".At this time, Q
,, Q4 is ON, Q2 is ON, Q8 is OFF, Q
? Since is in the ON state, the current mirror consisting of Qg and Qs does not operate, and since Q is OFF, only the current flows into R4.
次VC、電源電圧が低下し、YES < Vrefにな
ると、Q、、Q4UQNの1.Q2がOFF’、Qsが
ONで、Q?はOFFとなる。その結果、Q8がONと
なシ、力VントミラーのQ、もONとなるので、Q9に
はI4 なる電流が流れる。ここで% RBとR4と
の電圧降下VRとVR,と全見ると、
VIN > Vret cvと@、 VR,−I、−
R,−I、−R4苫VR4・・・(3)
¥IN< Vref c2)とき、 VR,−I、−
R,%(I −I )−R−VR4・(4)となり
、VR4の電圧が変化する。Next, when the VC and power supply voltages decrease and YES < Vref, 1. of Q, , Q4UQN. Q2 is OFF', Qs is ON, and Q? becomes OFF. As a result, when Q8 is turned on, Q of the force V mirror is also turned on, so a current of I4 flows through Q9. Here, if we look at the voltage drops VR and VR between % RB and R4, VIN > Vret cv and @, VR, -I, -
R, -I, -R4 Tom VR4... (3) When ¥IN< Vref c2), VR, -I, -
R, %(I − I )−R−VR4·(4), and the voltage of VR4 changes.
つまり、(VR4−V几/)の電圧差がコンパレータの
ヒステリシス電圧となり、(4)式−(3)式より、ヒ
ステリシス電圧Vhysは
Vhys −I4・R4
となり、任意の微少値が安定に得られる。In other words, the voltage difference of (VR4-V几/) becomes the hysteresis voltage of the comparator, and from equations (4) and (3), the hysteresis voltage Vhys becomes Vhys -I4・R4, and any minute value can be stably obtained. .
なお、上記実施例では、pnp l’ランジスタ入力の
電圧比較器について述べ友が、トランジスタをすべて逆
導電形とし、 npn I’ランジスタ入力の電圧比較
器としても良い。In the above embodiment, although the voltage comparator input to the pnp l' transistor was described, all the transistors may be of opposite conductivity type, and the voltage comparator may be used as the voltage comparator input to the npn I' transistor.
以上のようにこの発明によれば、ヒステリシス回路を定
電施工、と抵抗R4の積で得られるようにし友ので、従
来例のようにトランジスタの残り電圧による誤差が発生
せず、高精度なヒステリシス電圧が得られる。iた、数
mVの微少なヒステリシス電圧も得られ、これは、従来
例では実現不可能である。As described above, according to the present invention, since the hysteresis circuit is obtained by the product of constant current construction and resistor R4, errors due to the residual voltage of the transistor do not occur as in the conventional example, and highly accurate hysteresis voltage can be obtained. Additionally, a minute hysteresis voltage of several mV can be obtained, which is impossible to achieve in the conventional example.
第tyはこの発明の一実施例の構成?示す回路図、第2
図は従来の電圧比較器の構成を示す回路図である。
図において、 Q、、Qgは第1のダーリントン接続ト
ランジスタbQ1−(Itは第2のダーリントン接続ト
ランジスタ、R8−R4は抵抗、工、〜工、は定電流源
、Vrefは基準電圧、VtN tfi被比較電圧であ
る。
なお1図中同一符号は同一、tたは相当部分をしめす。What is the configuration of an embodiment of this invention? Circuit diagram shown, 2nd
The figure is a circuit diagram showing the configuration of a conventional voltage comparator. In the figure, Q, , Qg are the first Darlington connection transistor bQ1- (It is the second Darlington connection transistor, R8-R4 are resistors, , ~, are constant current sources, Vref is the reference voltage, and VtN tfi is the resistor. This is a comparison voltage. Note that the same symbols in Figure 1 indicate the same, t, or equivalent parts.
Claims (1)
1及び第2のダーリントン接続トランジスタ群による差
動増幅器形の電圧比較器において、上記第2のダーリン
トン接続トランジスタ群の入力側トランジスタに直列に
接続された抵抗に、上記被測定電圧が上記基準電圧より
大きいときと小さいときとで、所定量異なる電流が流れ
るようにしたことを特徴とする電圧比較器。(1) In a differential amplifier-type voltage comparator using first and second Darlington-connected transistor groups to which a reference voltage and a voltage to be measured are respectively input, the voltage comparator is connected in series to the input side transistor of the second Darlington-connected transistor group. 1. A voltage comparator, wherein different predetermined amounts of current flow through the connected resistor depending on whether the voltage to be measured is larger than or smaller than the reference voltage.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62296862A JPH01138467A (en) | 1987-11-25 | 1987-11-25 | Voltage comparison device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62296862A JPH01138467A (en) | 1987-11-25 | 1987-11-25 | Voltage comparison device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01138467A true JPH01138467A (en) | 1989-05-31 |
Family
ID=17839125
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62296862A Pending JPH01138467A (en) | 1987-11-25 | 1987-11-25 | Voltage comparison device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01138467A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5780823A (en) * | 1980-11-07 | 1982-05-20 | Toshiba Corp | Schmitt trigger circuit |
JPS57111116A (en) * | 1980-12-26 | 1982-07-10 | Fujitsu Ltd | Comparator having hysteresis |
-
1987
- 1987-11-25 JP JP62296862A patent/JPH01138467A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5780823A (en) * | 1980-11-07 | 1982-05-20 | Toshiba Corp | Schmitt trigger circuit |
JPS57111116A (en) * | 1980-12-26 | 1982-07-10 | Fujitsu Ltd | Comparator having hysteresis |
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