JP2004304515A - Comparator with hysteresis - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a comparator having a hysteresis with less error and dispersion and the number of circuit components of which can be decreased. <P>SOLUTION: The comparator is configured such that the emitter of a first transistor Q10 is connected to the base of an input transistor Q9 of the transistors Q6, Q9 configuring a differential amplifier, the emitter of a second transistor Q5 is connected to the base of the reference side transistor Q6, the base of the first transistor Q9 is used for an input terminal, a reference voltage Vref is given to the base of the second transistor Q5, and the collector voltage of the input transistor Q9 of the differential amplifier is extracted via an output transistor Q11. The comparator is characterized in that the collectors of a first current supply transistor Q22 and a second current supply transistor Q21 are connected to the emitter of the second transistor Q5 and an NMOS transistor M1 is provided, which applies on/off switching to the second current supply transistor 21 with the output voltage of the output transistor Q11. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a comparator with hysteresis.
[0002]
[Prior art]
In order to prevent the comparator from malfunctioning due to noise included in the input signal, a comparator with hysteresis is used.
[0003]
For example, Patent Document 1 describes a comparator with hysteresis as shown in FIG. 4 (FIG. 5 of Patent Document 1) and FIG. 5 (FIG. 2 of Patent Document 1).
[0004]
In FIG. 4, the reference voltage Vref is determined by the constant current I generated by the constant current source IA1 and the resistance value of the resistor R1. When the input supplied to the input terminal IN of the comparator rises from a voltage lower than the threshold to a voltage higher than the threshold, the transistor Q10 is turned off, the transistor Q9 is turned off, and the transistor Q11 is also turned off. Then, the output terminal OUT goes high, turning on the NMOS transistor M1. Turning on the NMOS transistor M1 turns on the NPN transistor Q4, which is a DC-grounded base in DC terms, and flows a current I1 determined by the resistance value of the resistor R4. The current is mirrored by a current mirror circuit composed of the transistors Q2 and Q3, and a current I2 equivalent to the current I1 flows to the collector of the transistor Q3. In the case of a normal comparator, the emitter currents of the PNP transistors Q5 and Q10 become the same current I3. In this case, since the emitter current of the transistor Q5 becomes I2 + I3, the potential difference (offset) of ΔVBE by the current I2 is reduced by the transistor Q6. And the base potential of Q9.
[0005]
Conversely, when the input supplied to the input terminal IN of the comparator falls from a voltage higher than the threshold to a voltage lower than the threshold, the transistor Q10 turns on, the transistor Q9 turns on, and the transistor Q11 turns on. Then, the output terminal OUT becomes low level, and the NMOS transistor M1 is turned off. When the NMOS transistor M1 is turned off, the NPN transistor Q4 is turned off, and neither current I1 nor I2 is generated. Therefore, the emitter currents of the transistors Q5 and Q10 become the same current I3, and the comparator operates without offset.
[0006]
As described above, the operation of the comparator when the voltage input to the input terminal IN increases and decreases with respect to the threshold has hysteresis corresponding to the offset voltage ΔVBE.
[0007]
However, the circuit shown in FIG. 4 has a problem that the temperature dependence of the currents I1 and I2 occurs due to the temperature dependence of VBE of the transistor Q4, and the temperature dependence of the offset voltage ΔVBE that determines the hysteresis increases. Further, there is a problem that an error occurs in the currents I1 and I2 due to a variation in the resistance value of the resistor R4, and a variation in the offset voltage ΔVBE occurs.
[0008]
The conventional example shown in FIG. 5 is obtained by adding a switch control circuit having a temperature compensation function to the conventional circuit of FIG. This switch control circuit includes an NMOS transistor M1, resistors R5 and R6, and PNP transistors Q12 and Q13, and a switch is configured by an NMOS transistor M2. The operation of this circuit will be described.
[0009]
When the voltage supplied to the input terminal IN of the comparator rises from a voltage lower than the threshold to a voltage higher than the threshold, the transistor Q11 is turned off and the NMOS transistor M1 is turned on, as in the circuit of FIG. As a result, the constant current I4 determined by the resistor R5 and the VBE of the transistor Q13 flows, and the same current I5 as the constant current I4 flows through the transistor Q12 that forms a current mirror circuit together with the transistor Q13. When the current I5 flows through the resistor R6, the MOS transistor M2 is turned on, and the collector current I2 of the transistor Q2 flows through the transistor Q1 and the resistor R2 without passing through the resistor R3. Therefore, the base potential Vref1 of the transistor Q5 becomes Vref1.
[0010]
On the other hand, when the voltage supplied to the input terminal IN of the comparator falls from a voltage higher than the threshold to a voltage lower than the threshold, the transistor Q11 is turned on and the NMOS transistor M1 is turned off as in the circuit of FIG. As a result, the collector current I4 becomes zero. Then, the collector current of the transistor Q12 forming the current mirror circuit together with the transistor Q13 also becomes 0, so that the MOS transistor M2 is turned off, and the collector current I2 of the transistor Q2 flows to the transistor Q1 via the resistor R3. Therefore, the base potential of the transistor Q5 is Vref1 = Vref + ΔV (ΔV = I2 * R3).
[0011]
As described above, the operation of the comparator when the voltage input to the input terminal IN rises and falls with respect to the threshold has hysteresis of the offset ΔV.
[0012]
[Patent Document 1]
JP-A-2002-314385 (page 2, page 4, FIG. 2, FIG. 5)
[0013]
[Problems to be solved by the invention]
According to the configuration of the comparator with hysteresis shown in FIG. 5, since the offset voltage ΔV defining the hysteresis characteristic does not include the VBE component of the transistor, the temperature dependency is eliminated, but ΔV varies due to the variation of the resistor R3. Further, when the emitter resistance R4 of the transistor Q4 on the collector side of the transistor Q3 constituting the current mirror circuit together with the transistor Q2 varies, ΔV varies due to the change of I2. Further, there is a problem that the number of circuit elements for providing hysteresis is large.
[0014]
SUMMARY OF THE INVENTION It is an object of the present invention to provide a comparator with hysteresis that can reduce errors and variations and simplify the number of circuit elements.
[0015]
[Means for Solving the Problems]
In the comparator with hysteresis of the present invention, the magnitude of the emitter current of the transistor connected to the reference side transistor of the differential amplifier is reduced when the threshold voltage of the input signal input to the input side transistor increases and when the threshold voltage decreases. The hysteresis characteristic is obtained by changing the time between the two.
[0016]
According to the present invention, it is possible to obtain a comparator with hysteresis that can reduce errors and variations and can simplify the number of circuit elements.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
According to a first aspect of the present invention, an emitter of a first transistor for impedance conversion is connected to a base of an input-side transistor of a pair of transistors constituting a differential amplifier, and a reference of the pair of transistors is provided. An emitter of a second transistor is connected to a base of a side transistor, a base of the first transistor is used as an input terminal, and a reference voltage is input to a base of the second transistor to form a pair of the differential amplifiers. A first current supply transistor and a second current supply transistor are connected to an emitter of the second transistor in a comparator for extracting a collector voltage of an input side transistor of the transistor through an output transistor; Turns on / off the second current supply transistor according to the output voltage That it is characterized in the provision of the switching element.
[0018]
In the comparator with hysteresis according to the first aspect, when the input signal supplied to the base of the first transistor rises from less than the threshold to more than the threshold, the switching element is turned on by the voltage output from the output transistor, The current from the second current supply transistor is turned off, and the current flowing to the second transistor becomes only from the first current supply transistor. When the input signal supplied to the base of the first transistor falls from the threshold value or more to less than the threshold value, the switching element is turned off by the voltage output from the output transistor, and the current from the second current supply transistor and the second current supply transistor are turned off. Both the currents from the one current supply transistor flow to the second transistor. Due to the difference between the emitter current of the second transistor when the input voltage rises and the emitter current when the input voltage falls, an offset voltage is generated in the base potential of the reference-side transistor of the differential amplifier, so that the hysteresis characteristic is obtained.
[0019]
The invention according to claim 2 is the comparator with hysteresis according to claim 1, wherein the first current supply transistor and the second current supply transistor are driven at the same base potential. By configuring a current mirror circuit with the bases of transistors having the same shape and the same size in common, the relative error of the collector currents of the first and second current supply transistors can be reduced to 1% or less. This has the effect that the variation of the offset voltage becomes very small.
[0020]
According to a third aspect of the present invention, the emitter of the first transistor for impedance conversion is connected to the base of the input-side transistor of a pair of transistors constituting the differential amplifier, and the base of the pair of transistors is connected to the reference-side transistor of the pair of transistors. An emitter of a second transistor is connected to a base, a base of the first transistor is used as an input terminal, a reference voltage is input to a base of the second transistor, and a pair of transistors constituting the differential amplifier is connected. In a comparator for extracting a collector voltage of an input transistor via an output transistor, one of a pair of current mirror circuits is connected to a collector of the reference transistor and a first current is supplied to an emitter of the second transistor. And the second current supply transistor Wherein a hysteresis comparator with which is characterized in that so as to control the output current path for flowing the second current supply transistor in the collector current of the other transistor of the current mirror circuit.
[0021]
In the comparator with hysteresis according to the third aspect, when the input side transistor constituting the differential amplifier is turned on when the input voltage rises and no current flows through the reference side transistor, no current flows through the current mirror circuit. Therefore, the collector current of the second current supply transistor becomes the emitter current of the second transistor together with the collector current of the first current supply transistor. When the input-side transistor is turned off and the reference-side transistor is turned on when the input voltage drops, current flows into the other transistor of the pair of current mirror circuits, and flows into the collector of the second current supply transistor. Only the collector current of the first current supply transistor becomes the emitter current of the second transistor. Due to the difference between the emitter current of the second transistor when the input voltage rises and the emitter current when the input voltage falls, an offset voltage is generated in the base potential of the reference-side transistor of the differential amplifier, so that the hysteresis characteristic is obtained.
[0022]
The invention according to claim 4 is the comparator with hysteresis according to claim 4, wherein the first current supply transistor and the second current supply transistor are driven at the same base potential. By forming a current mirror circuit with the bases of transistors having the same shape and the same size in common, the relative error of the collector current of the first and second current supply transistors can be reduced to 1% or less. This has the effect that the variation of the offset voltage becomes very small.
[0023]
Hereinafter, an embodiment of the present invention will be described with reference to FIGS.
[0024]
(Embodiment 1)
FIG. 1 is a circuit diagram showing Embodiment 1 of the present invention. In FIG. 1, the comparator with hysteresis includes PNP transistors Q6 and Q9 forming a comparator and NPN transistors Q7 and Q8 forming loads of the transistors of the comparator. Transistors Q5 and Q10 for emitter followers connected to the bases of transistors Q6 and Q9, output transistor Q11, NMOS transistor M1 for offset voltage switching, monolithic transistors Q21 to Q25 forming a current mirror circuit, and backflow prevention And diode D7.
[0025]
In FIG. 1, the reference voltage Vref applied to the base of the transistor Q5 is determined by the constant current generated by the constant current source IA1 and the resistance of the resistor R1.
[0026]
Now, when the input voltage supplied to the input terminal IN rises from a voltage lower than the threshold to a voltage higher than the threshold, the transistor Q10 turns off, the transistor Q9 turns off, and the transistor Q11 turns off. Then, the collector of the transistor Q11 goes high, turning on the NMOS transistor M1. When the NMOS transistor M1 is turned on, the current I4 flows from the transistor Q21, and the diode D7 is reverse-biased, so that the current from the transistor Q21 does not flow to the transistor Q5. Since the collector current IA2 of the transistor Q22 flows through the transistor Q5, the base potential Vref2 of the transistor Q6 becomes Vref2 = Vref + VBE. Here, VBE = Vt * ln (IA2 / Is) (Vt is a thermoelectromotive force, IA2 is a collector current, and Is is a reverse saturation current).
[0027]
On the other hand, when the input voltage supplied to the input terminal IN drops from a voltage higher than the threshold to a voltage lower than the threshold, the transistor Q10 turns on, the transistor Q9 turns on, and the transistor Q11 turns on. Then, the collector of the transistor Q11 becomes low level, and the NMOS transistor M1 is turned off. When the NMOS transistor M1 turns off, the current IA2 'from the transistor Q21 flows to the transistor Q5 through the diode D7. Since the collector current IA2 of the transistor Q22 also flows through the transistor Q5, the base potential of the transistor Q6 becomes Vref2 = Vref + VBE '. Here, VBE ′ = Vt * ln {(IA2 ′ + IA2) / Is}.
[0028]
From the above, the offset voltage of the hysteresis characteristic when the voltage rises and falls is ΔV = VBE′−VBE = Vt * ln {(IA2 ′ + IA2) / IA2}.
[0029]
By extracting IA2 ′ and IA2 from the same current mirror circuit, ΔV = Vt * ln2 (≒ 18 mV) when IA2 ′ = IA2, and ΔV = Vt * ln3 (≒ 29 mV) when IA2 ′ = 2 * IA2. It becomes.
[0030]
FIG. 3 shows a relationship among the input voltage VIN, the output voltage VOUT, and the offset voltage ΔV in the first embodiment.
[0031]
In the circuit configuration of FIG. 1, since a resistor is not used in the comparator section, the accuracy is very good because the variation in the resistance does not affect the offset voltage ΔV.
[0032]
Incidentally, Vt = kT / q (k is Boltzmann's constant, T is absolute temperature, q is electron charge), and the offset voltage ΔV has temperature dependence. For example, in the circuit of ΔV = Vt * ln2, ΔV ≒ 15 mV at −20 ° C., and ΔV２７21 mV at 27 ° C. Thermal noise in electronic circuits is proportional to ΔT. As the thermal noise characteristic, the temperature dependency of ΔV is favorable.
[0033]
(Embodiment 2)
FIG. 2 is a circuit diagram showing Embodiment 2 of the present invention. In FIG. 2, the comparator with hysteresis forms NPN transistors Q6 and Q9 forming a comparator and a current mirror circuit connected to the collector of transistor Q6. PNP transistors Q7 and Q8, emitter follower transistors Q5 and Q10 connected to the bases of transistors Q6 and Q9, phase inversion transistor Q12 whose base is connected to the collector of transistor Q9, output transistor Q11, and current mirror The circuit includes transistors Q31 to Q34 forming a circuit and an offset voltage switching circuit including diodes D4 to D6.
[0034]
In FIG. 2, the reference voltage Vref applied to the base of the transistor Q5 is determined by the forward voltage (= 3 * VF) of the diodes D1 to D3 by the constant current generated by the constant current source IA1.
[0035]
Now, when the input voltage supplied to the input terminal IN falls from a voltage higher than the threshold to a voltage lower than the threshold, the transistor Q10 turns off, the transistor Q9 turns off, the transistor Q12 turns off, and the transistor Q11 turns off. When the transistor Q9 is turned off, the transistor Q6 constituting the differential amplifier is turned on, and a collector current (= IA3) flows from the transistor Q7 of the current mirror circuit. In this example, a collector current of 2 * IA3 flows through the other transistor Q8 of the current mirror circuit. The current is larger than the collector current of the transistor Q32, and is shunted to the diodes D5 and D6 and the transistor Q32. The collector potential of the transistor Q32 rises to 2 * VF. All the current flows from the transistor Q8. The emitter current of the transistor Q5 is only the collector current of the transistor Q31. The emitter potential of the transistor Q5 (base potential of the transistor Q6) is Vref2 = Vref-VBE. Here, VBE = Vt * ln (IA2 / Is) (Vt is a thermoelectromotive force, IA2 is a collector current, and Is is a reverse saturation current).
[0036]
On the other hand, when the input voltage supplied to the input terminal IN increases from a voltage lower than the threshold to a voltage higher than the threshold, the transistor Q10 turns on, the transistor Q9 turns on, and the transistors Q12 and Q11 turn on. When the transistor Q9 is turned on, the transistor Q6 is turned off, current does not flow through the transistors Q7 and Q8 forming the current mirror circuit, and the collector potential of the transistor Q32 falls, so that the diode D4 becomes forward biased and the transistor Q32 Flows from the emitter of the transistor Q5 via the diode D4. Then, the emitter current of the transistor Q5 increases to IA2 + IA2 ', and the emitter potential of the transistor Q5 (base potential of the transistor Q6) becomes Vref2 = Vref-VBE'. Here, VBE ′ = Vt * ln {(IA2 ′ + IA2) / Is}.
[0037]
From the above, the offset voltage of the hysteresis characteristic when the voltage rises and falls is ΔV = VBE′−VBE = Vt * ln {(IA2 ′ + IA2) / IA2}.
[0038]
By extracting IA2 ′ and IA2 from the same current mirror circuit, ΔV = Vt * ln2 (≒ 18 mV) when IA2 ′ = IA2, and ΔV = Vt * ln3 (≒ 29 mV) when IA2 ′ = 2 * IA2. It becomes.
[0039]
The relationship between the input voltage VIN, the output voltage VOUT, and the offset voltage ΔV in the second embodiment is similar to the characteristic shown in FIG.
[0040]
Also in the second embodiment, the accuracy of the offset voltage Δ is very good as in the first embodiment. The same applies to temperature dependency.
[0041]
In the above first and second embodiments, a circuit configuration in which the PNP and the NPN of the transistor are reversed and the power supply line is also reversed in the positive and negative may be similarly implemented.
[0042]
【The invention's effect】
As described above, according to the present invention, the offset voltage is generated in the base potential of the reference-side transistor of the differential amplifier due to the difference in the emitter current of the second transistor when the input voltage rises and when the input voltage falls. Has an effect that a comparator with hysteresis that can reduce errors and variations and can simplify the number of circuit elements can be obtained because the variation in resistance value is not affected.
[0043]
In addition, by configuring the first current supply transistor and the second current supply transistor to be driven at the same base potential, a current mirror circuit is formed by using transistors having the same shape and the same size in common. By doing so, the relative error between the collector currents of the first and second current supply transistors can be reduced to 1% or less, and the effect that the variation in the offset voltage becomes very small can be obtained.
[Brief description of the drawings]
1 is a circuit diagram showing a first embodiment of the present invention; FIG. 2 is a circuit diagram showing a second embodiment of the present invention; FIG. 3 is a time chart showing an operation of the first embodiment of the present invention; FIG. 5 is a circuit diagram showing a first example of a conventional comparator with hysteresis. FIG. 5 is a circuit diagram showing a second example of a conventional comparator with hysteresis.
Q5 to Q12, Q21 to Q25, Q31 to Q34 Transistors D1 to D7 Diode M1 NMOS transistors R1, R11, R12 Resistance Vref Reference voltage IN Input terminal OUT Output terminal

Claims (4)

An emitter of a first transistor for impedance conversion is connected to a base of an input-side transistor of a pair of transistors constituting a differential amplifier, and an emitter of a second transistor is connected to a base of a reference-side transistor of the pair of transistors. Connected to each other, a base of the first transistor is used as an input terminal, a reference voltage is input to a base of the second transistor, and a collector voltage of an input-side transistor of the pair of transistors constituting the differential amplifier is output. In the comparator that takes out
A first current supply transistor and a second current supply transistor are connected to an emitter of the second transistor, and a switching element for turning on and off the second current supply transistor according to an output voltage of the output transistor is provided. A comparator with hysteresis. 2. The comparator with hysteresis according to claim 1, wherein the first current supply transistor and the second current supply transistor are driven at the same base potential. An emitter of a first transistor for impedance conversion is connected to a base of an input-side transistor of a pair of transistors constituting a differential amplifier, and an emitter of a second transistor is connected to a base of a reference-side transistor of the pair of transistors. Connected to each other, a base of the first transistor is used as an input terminal, a reference voltage is input to a base of the second transistor, and a collector voltage of an input-side transistor of the pair of transistors constituting the differential amplifier is output. In the comparator that takes out
One collector of a pair of current mirror circuits is connected to the collector of the reference side transistor, and a first current supply transistor and a second current supply transistor are connected to the emitter of the second transistor. A comparator with hysteresis, wherein a path through which an output current of the second current supply transistor flows is controlled by a collector current of the other transistor of the mirror circuit. 4. The comparator with hysteresis according to claim 3, wherein the first current supply transistor and the second current supply transistor are driven at the same base potential.

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