JPH09258836A - Power circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the power consumption and stabilize the output voltage of the power source of a load circuit which has large current variation like a CMOS circuit by providing a variable current source means which absorbs a variation part of a current flowing to the load. SOLUTION: At a current supply part for the load 20, a power source 10 and a variable current source part 30 are connected in parallel. A comparison part 40 compares the voltage Vi generated by converting a current I3 with an expected value Vex to generate a control voltage Vc for controlling the current of the variable current source part 30. Here, the expected value Vex is set to a voltage expected value that maximizes the current I1 flowing to the load 20. Further, the variable current source part 30 decreases the current I2 of the variable current source part 30 with the control voltage Vc when a detected current increases. When the detected current I3 decreases, on the other hand, the current I2 of the variable current source part 30 is increased with the control voltage Vc. Then the current I3 flowing to the power source 10 is controlled so as to be kept constant at all times.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to electronic circuits, especially C
The present invention relates to a power supply circuit having a small maximum power consumption and a stable voltage as a power supply for a MOS circuit.

[0002]

2. Description of the Related Art Conventionally, ECL has been used for a high-speed logic circuit.
A CMOS circuit can be used up to about 0 MHz. CMOS circuits are becoming the mainstream of logic circuits because they can be easily highly integrated and can reduce power consumption.

However, since the CMOS circuit has a circuit delay time dependent on the power supply voltage, fluctuations in the power supply voltage of several mV also cause deterioration in timing accuracy. Also, CMOS
Due to the structure of the circuit, the circuit current changes greatly in proportion to the operating frequency. Therefore, a CMOS circuit power supply that needs to be operated at various frequencies is required to have a voltage stabilizing ability that can suppress a voltage fluctuation as small as possible against a large current fluctuation of a load. Further, since the operating voltage of the CMOS circuit is also low, a power supply circuit using a power supply with a low power supply voltage and a small maximum power consumption is required for downsizing of the device.

An example of the prior art will be described with reference to FIG. The configuration of a conventional power supply circuit is as shown in FIG.
It is composed of a power supply 10, a reference voltage 11, a voltage follower operational amplifier 12, an operational amplifier 13, and a current buffer transistor 14. And C of load 20
The voltage of the power supply input portion of the MOS circuit is sensed by the sense line 100 and the sense line 200 to stabilize the voltage supplied to the load 20.

Normally, the CMOS circuit of the load 20 can be equivalently regarded as a variable current source, and its current I1 is CMO.
It changes in proportion to the operating frequency of the S circuit. Then, the voltage of VDD in the CMOS circuit of the load 20 is the voltage detected by the sense line 200 and is set to the + side of the reference voltage 11 via the operational amplifier 12 of the voltage follower. The voltage of VSS in the CMOS circuit of the load 20 is detected by the sense line 100 and is fed back to the operational amplifier 12 to control the current flowing through the current buffer transistor 14 so as to be equal to the voltage of the reference voltage 11. We are trying to stabilize the voltage.

[0006]

As described above, in the conventional circuit system, the voltage of the power source 10 is, for example, the reference voltage 1
If the voltage of 1 is 3.3V, a voltage higher by about 1V is required to operate the current buffer transistor 14,
The voltage of the power supply 10 needs to be about 4.3V. for that reason,
There is a practical inconvenience that the maximum power consumption of the power supply 10 is constantly increased by 30% as compared with the case where the voltage required for the CMOS circuit of the load 20 is 3.3V.

Therefore, the present invention has been made in view of these problems, and an object thereof is a power supply circuit having a low maximum power consumption and a stable output voltage as a power supply of a load circuit having a large current fluctuation such as a CMOS circuit. Is intended to provide.

[0008]

In order to solve the above-mentioned problems, the invention according to claim 1 is provided with variable current source means for absorbing a fluctuation portion of the current flowing through the load 20 to suppress the current fluctuation of the power source 10. The gist is a power supply circuit characterized by being stabilized.

In order to solve the above-mentioned problems, the invention according to claim 2 is provided with a current detecting means for detecting a current flowing through the power source 10 and converting it into a voltage so as to detect a fluctuation portion of the current flowing through the load 20. Variable current source means for absorbing is provided, and comparison means for controlling the current of the variable current power supply means by comparing the voltage converted by the current detection means with an expected value voltage is provided to stabilize the current fluctuation of the power supply 10. The gist is a power supply circuit that has been characterized.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described in the following examples.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described with reference to FIGS.
This will be described with reference to FIG. As shown in FIG. 1, the block configuration of the present invention includes a power supply 10, a current detection unit 50, a comparison unit 40, and a variable current source unit 30. In the current supply section for the load 20, the power supply 10 and the variable current source section 30 are connected in parallel.

The current detecting section 50 detects the current I3 flowing through the power source 10. The current I3 detected here is
It is the sum of the current I1 flowing through the load 20 and the current I2 of the variable current source unit 30. That is, I3 = I1 + I2. Then, the detected current I3 is converted into the voltage Vi and output.

On the other hand, in the comparison section 40, the variable voltage source section 30 is compared with the converted voltage Vi and the expected value Vex.
A control voltage Vc for controlling the current is generated. Here, the expected value Vex is set to a voltage expected value that maximizes the current I1 flowing through the load 20. That is, the variable current source unit 3 at this time
The current I2 of 0 becomes 0.

Further, in the variable current source unit 30, when the detected current I3 increases, the current I2 of the variable current source unit 30 increases.
Is reduced by the control voltage Vc. On the contrary, the detection current I
When 3 decreases, the current I2 of the variable current source unit 30 is increased by the control voltage Vc. The current I3 flowing through the power source 10 is controlled so as to always maintain a constant value.

As described above, the power source 10 and the variable current source unit 30 are connected in parallel in the power source supply unit of the load 20, and the variable current source unit 30 absorbs the current fluctuation of the load 20 to thereby load the load 20. It is controlled so that the total of the current of the variable current source 30 and the current of the variable current source 30 does not change. Therefore, power supply 1
The voltage supplied to the load 20 of 0 is stabilized.

Next, a specific circuit example of the present invention will be described with reference to FIGS. 2 and 3. However, in FIG. 3, in order to simplify the explanation, the time delay of the phase relationship is ignored. Since the load 20 can be regarded as an equivalent current source, the flowing current is I1 and the maximum value of I1 is I1max.

The current detecting resistor R1 of the current detecting section 50 is a resistor for detecting the current flowing through the power source 10, and the current detecting resistor R1.
It is desirable to have a small resistance value so that the voltage drop due to 1 does not affect the circuit.

Since the current I1 of the load 20 and the current I2 of the variable current source section 30 are connected in parallel, the current I3 flowing through the power source 10 is given by the following equation (1). I3 = I1 + I2 (1) An operation for controlling the current I3 flowing through the power supply 10 to be always constant will be described below.

The voltage Vr across the current detecting resistor R1 is obtained by the following equation (2). Vr = I3 · R1 (2) Then, via the buffer amplifiers 51 and 52, the resistor R3
˜R6 and an operational amplifier 53 are input to a differential amplifier section for conversion. At this time, the output voltage Vi of the differential amplifier unit is, for example, the following expression (3). Vi = -Vr (3)

The output voltage Vi of the differential amplifier unit is compared with the comparison unit 4
It becomes the input voltage of the integrating circuit composed of the resistor R7 of 0, the capacitor C1, and the operational amplifier 41. The integrator circuit compares with the expected value voltage Vex = R1 · I1max and outputs it as the control voltage Vc of the variable current source unit 30 according to the voltage input to the integrator circuit. Further, Vc is calculated by the following equation (4). Vc = − (1 / C1 · R7) ∫ (Vex−Vi) dt (4)

The reference voltage buffer section of the variable current source section 30 uses the operational amplifier 31 as the emitter voltage of the transistor 33.
Is fed back to control the current flowing through the transistor 33 and operate so as to be the same as the voltage Vref of the reference voltage 11. On the other hand, the control voltage buffer unit feeds back the emitter voltage of the transistor 34 to the operational amplifier 32, controls the current flowing through the transistor 34, and operates so as to have the same voltage as the control voltage Vc.

Therefore, the current I2 of the variable current source unit 30 is
When the base currents of the transistor 33 and the transistor 34 are ignored, the relationship of the following expression (5) is established. I2 = (Vref-Vc) / R2 ... (5)

As shown in FIG. 3A, if the current I1 of the load 20 is increased, the voltage Vr across the current detection resistor R1 is increased, and the differential amplifier 53 passes through the buffer amplifiers 51 and 52. The output voltage Vi that is output is calculated by the equation (3).
As a result, the voltage drops below the expected value voltage Vex as shown in FIG. Then, the control voltage Vc of the variable current source unit 30, which is output by the integrator of the comparison unit 40, is calculated by the equation (4) from FIG.
As shown in (c) of FIG. That is, the negative potential approaches 0. Therefore, from the formula (5), the current I of the variable current source unit 30 is
2 decreases. This is shown in FIG. 3 (d).

Contrary to the above description, when the current I1 of the load 20 decreases, the operation is as shown in FIGS. 3 (a) to 3 (d), so that the current I3 flowing through the power source 10 is as shown in FIG. As shown in (e), the current characteristic has low current fluctuation.

Therefore, in the present invention, the voltage required for the power supply 10 may be high by the voltage drop of the detection resistor R7 in the current detection section 50. For example, if the detection resistance is 0.1 ohm and the current I3 is 1 A, the voltage is 3.4 V. Therefore, the voltage required for the power supply 10 of the conventional circuit is 4.3.
The maximum power consumption can be reduced by about 26% as compared with V.

[0026]

The present invention is embodied in the form described above and has the following effects. Power supply 1
Since the voltage of 0 can be made lower than that of the conventional voltage with respect to the voltage required for the load 20, the maximum power consumption of the power supply 10 is low.
Therefore, the maximum design value of each part based on the maximum power consumption of the power source 10 can be lowered, and therefore, there is an effect that each part used for the load 20, for example, a fan or a wire having a small capacity can be used. Therefore, the power supply 10 and the entire apparatus can be downsized.

[Brief description of drawings]

FIG. 1 is a block diagram of a power supply circuit of the present invention.

FIG. 2 is an example of a power supply circuit of the present invention.

FIG. 3 is an operating characteristic diagram of the power supply circuit of the present invention.

FIG. 4 is a conventional power supply circuit.

[Explanation of symbols]

 10 power supply 11 reference voltage 12, 13, 31, 32, 41 operational amplifier 14, 33, 34 transistor 20 load 30 variable current source section 40 comparison section 50 current detection section 51, 52 buffer amplifier 100, 200 sense line

Claims (2)

[Claims] 1. A power supply circuit characterized in that a variable current source means for absorbing a fluctuation portion of a current flowing through a load (20) is provided to stabilize a current fluctuation of a power supply (10). 2. A current detecting means for detecting a current flowing through a power source (10) and converting it into a voltage, and a variable current source means for absorbing a varying portion of a current flowing through a load (20), said current detecting means. A power supply circuit characterized by stabilizing the current fluctuation of the power supply (10) by providing a comparison means for controlling the current of the variable current power supply means by comparing the voltage converted by the above and the expected value voltage.