JPH09120957A - Plasma device and plasma treatment method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce electronic shading effects and restrain charge damages by supplying high frequency power to a second electrode arranged at a distance less than twice an average free distance of electron opposite the first electrode 2. SOLUTION: A semiconductor wafer 9 is mounted on a first electrode 2 inside a chamber 1, a second electrode 3 is arranged opposite to the first electrode 2 at a distance less than twice an average free distance of electrode from the first electrode 2 and gas is supplied inside the chamber 1 and plasma is produced by supplying high frequency power of 100kHz to 1MHz, for example to the first electrode 2. Furthermore, high frequency power of 10 to 40MHz, for example is supplied to the second electrode 3. Electron near the second electrode 3 is accelerated toward the first electrode 2 by plasma sheath field produced by the high frequency power. Thereby, velocity element of electron in plasma toward the first electrode 2 increases, electrode attains a bottom part of a resist opening part and positive charge is neutralized, and charge-up is restrained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma processing apparatus used for manufacturing a MOS semiconductor device and a plasma processing method for performing etching or film formation using the plasma processing apparatus. The present invention relates to a plasma device and a plasma processing method capable of avoiding damage to a gate oxide film or the like that occurs.

[0002]

2. Description of the Related Art FIG. 33 is a sectional view showing a conventional plasma device. The chamber 21 includes a chamber body 21a and a bell jar 21 that is detachable from the chamber body 21a.
b. A substrate bias electrode 22 is disposed in the chamber 21, and high frequency power is supplied to the substrate bias electrode 22 from a high frequency power supply 24 via a filter 25 and a blocking capacitor 26. The semiconductor wafer 9 is mounted on the substrate bias electrode 22.

A counter electrode 23 is provided above the substrate bias electrode 22, and the counter electrode 23 is maintained at a ground potential. The chamber 21 includes a gas supply unit 27 including a gas cylinder, a mass flow controller, and the like.
Is connected to the chamber 2 from the gas supply unit 27.
A predetermined etching gas or a film forming gas is supplied into 1. The chamber 21 is connected to an exhaust pump 28.

FIG. 34 is a cross-sectional view showing a part of a semiconductor wafer being plasma-etched in the thus-configured plasma apparatus. The semiconductor wafer 31 is formed with a pair of diffusion regions 31a serving as, for example, a source and a drain, and the semiconductor wafer 3 between the pair of diffusion regions 31a.
A gate electrode 33 is formed on the gate electrode 1 via a gate oxide film 32. The gate electrode 33 is covered with an insulating film 38, and an aluminum film 35 for forming a wiring is formed on the insulating film 38. The aluminum film 35 is electrically connected to the gate electrode 33 via the contact hole 34. Further, on the aluminum film 35, openings 36 formed in a predetermined pattern are formed.
A resist 36 having a is formed. Reference numeral 37 denotes a scribe line provided on the semiconductor wafer 31. The semiconductor wafer 31 is cut along the scribe line 37 in a later step, and is separated into a plurality of semiconductor chips.

At the time of plasma etching, an exhaust pump 2
8, the gas supply unit 27
From the above, the etching gas such as CF ₄ , SF ₆ or Cl ₂ is supplied into the chamber 21, and the high frequency power is supplied from the high frequency power supply 24 to the substrate bias electrode 22 through the blocking capacitor 26. Then, the gas in the chamber 21 becomes a plasma state, positive ions in the plasma reach the aluminum film 35 through the resist opening 36a, and the aluminum film 35 is etched.

In such etching, the potential of the gate electrode 33 and the potential of the semiconductor wafer 31 are different from each other, and a leak current flows through the gate oxide film 32 due to the potential difference between the two. May be deteriorated, or in extreme cases, the gate oxide film 32 may be broken down. Such a phenomenon is called charge damage.

Hereinafter, the charge damage will be described in more detail. As shown in FIGS. 35 and 36, electrons e in the plasma collide with the resist 36 during etching, and negative charges are accumulated in the resist 36. Electrons e in the plasma are repelled by this negative charge and resist opening 3
A so-called electronic shading effect occurs that makes it difficult to enter the inside of 6a (Jpn. J. Appl. Phys. Vol. 33 (1994).
pp.6013-6018). On the other hand, the positive ions I having a large mass reach the aluminum film 35 through the resist opening 36a, so that positive charges are accumulated in the aluminum film 35 and the gate electrode 33. At this time, the scribe line 37
Then, since the negative charges accumulated in the resist 36 are hardly affected, the positive ions I and the electrons e reach the semiconductor wafer 31 at almost the same ratio. As a result, a large potential difference is generated between the gate electrode 33 and the semiconductor wafer 31, and F-N injection (Fowler-Nordheim tunnelling injecti
on) and leak current L passes through the gate oxide film 32.
Flows. As a result, deterioration or destruction of the gate oxide film 32 occurs.

In FIG. 37, the horizontal axis represents the high frequency bias voltage value (Vp-p) applied to the semiconductor wafer (Si), and the vertical axis represents the self bias voltage between the hole pattern and the open space pattern. The ratio is 2,4.4
It is a figure which shows the relationship of both at the time of and 8. The hole pattern or the open space pattern was formed by processing an SiO ₂ film. The frequency of the high frequency (RF) power supply is 400 kHz. As is apparent from FIG.
When the voltage of the high-frequency power supply is relatively high, the electron shading effect causes a relatively large voltage difference of about 95 V between the hole pattern and the open space when the aspect ratio is 2. Note that the aspect ratio refers to the ratio of the height of the resist opening to the width of the resist opening.

The electron shading effect of the resist is more effective as the aspect ratio increases. Therefore, even when a plurality of hole patterns having different aspect ratios are provided on a semiconductor wafer, the amount of charge accumulated in a conductive film and the like below each hole pattern is different from each other. Leakage current flows through the thin insulating film on the wafer surface, which may damage the insulating film.

[0010] Charge damage is likely to occur in a wiring etching process for forming an opening having a large aspect ratio, a via hole etching process, a via hole plasma cleaning process, a plasma CVD process, and the like. In addition, local charge-up of the insulating film causes problems such as deterioration of the pattern shape due to etching and change of the etching rate depending on the aspect ratio.

As is apparent from FIG. 37, when the high frequency bias voltage Vp-p is about 200 V or more, the value of the self bias voltage varies depending on the aspect ratio, and as a result, the conductive film under the hole pattern having the different aspect ratio. Leak current may flow between them. Note that the above-described electron shading effect increases as the electron temperature in the plasma increases. It is considered that this is because the higher the electron temperature, the more electrons are accumulated in the resist, and the higher the potential of the resist side wall.

[0012] Usually, C is used in the plasma process.
Gases such as F ₄ , SF ₆ , Cl _2, and HBr are used, and these gases are gases that tend to generate negative ions by the attachment of electrons to molecules, and are called electrically negative gases. I have. When these gases are used, the ratio of the electron density to the plasma density is low, so that the electron temperature necessarily increases. Therefore, in a plasma process using these gases, charge damage due to the electron shading effect is likely to occur.

Further, in the plasma apparatus, if the frequency or voltage of the high frequency power supplied to the substrate bias electrode is too high, the electron temperature in the plasma rises, and charge damage due to the electron shading effect easily occurs. For this reason, conventionally, in order to prevent charge damage, the power of a high-frequency power supply applied to plasma is reduced to reduce the plasma density. As a result, the electronic shading effect is reduced and charge damage can be suppressed.

[0014]

However, if the power of the high frequency power source applied to the plasma is reduced, charge damage can be avoided, but the etching rate also decreases. Incidentally, JP-A-57-1
No. 31374 discloses a plasma etching apparatus that supplies a high frequency voltage to a cathode electrode on which a semiconductor wafer is mounted and supplies a high frequency voltage having a higher frequency than the cathode electrode to an anode electrode facing the cathode electrode. . However, this device increases the etching rate by independently controlling the current density of the ions reaching the semiconductor wafer and the energy of the ions entering the semiconductor wafer. It has not been.

Japanese Unexamined Patent Publication (Kokai) No. 2-312231 discloses a plasma etching apparatus that supplies high frequency power to a cathode electrode on which a semiconductor wafer is placed, and supplies high frequency power having a lower frequency than the cathode electrode to an anode electrode facing the cathode electrode. It is disclosed. However, in this device, the bias power supply frequency of the anode electrode is set lower than the frequency applied to the cathode electrode. Further, since this device forms a magnetic field perpendicular to the wafer in the vicinity of the substrate, the substantial mean free path of electrons is significantly reduced. Therefore, the charge-up suppressing effect of the counter electrode can hardly be expected.

Japanese Unexamined Patent Publication (Kokai) No. 3-74844 also discloses a plasma etching apparatus for supplying high-frequency power to a cathode electrode on which a semiconductor wafer is placed and supplying a high-frequency electrode having a lower frequency than the cathode electrode to an anode electrode facing the cathode electrode. It is disclosed. However, this device does not use two power sources at the same time. Further, the frequency of the bias power supply for the anode electrode is lower than the frequency given to the cathode electrode. Further, since the operating pressure is as high as 1 torr, the effect of suppressing charge-up by the counter electrode can hardly be expected.

Japanese Unexamined Patent Publication (Kokai) No. 5-62935 discloses a plasma etching in which high frequency power for accelerating ions is supplied to a cathode electrode on which a semiconductor wafer is mounted, and high frequency power for plasma generation is supplied to electrodes around the cathode electrode. A device is disclosed. However, in this device, high frequency power for accelerating electrons is not supplied to the electrode facing the cathode electrode. Further, since this device forms a magnetic field in the vicinity of the substrate, the substantial mean free path of electrons is significantly reduced. Therefore, the charge-up suppressing effect of the counter electrode can hardly be expected.

An object of the present invention is to provide a plasma apparatus and a plasma processing method capable of reducing the electron shading effect and suppressing charge damage without affecting various characteristics during the plasma process.

[0019]

SUMMARY OF THE INVENTION The above-mentioned problems are, as illustrated in FIG. 1, a chamber 1 and a first electrode 2 arranged in the chamber 1 on which a semiconductor wafer 9 is mounted.
A second electrode 3 facing the first electrode 2 and arranged at a distance from the first electrode 2 not more than twice the mean free path of electrons, and a first electrode 2 Frequency RF
_{A first} high frequency power source 4 for supplying a high frequency power of 1 and a _second high frequency power for supplying a high frequency power of a _second frequency RF ₂ higher than the first frequency RF ₁ to the second electrode 3. The plasma apparatus is characterized by having a power supply 7, a gas supply means 10 for supplying gas into the chamber 1, and an exhaust pump 13 for exhausting the inside of the chamber 1.

The above-mentioned problems are, as illustrated in FIG. 15, a chamber 1, a first electrode 2 which is arranged in the chamber 1 and on which a semiconductor wafer 9 is mounted, and the first electrode 2.
A second electrode 3 arranged to face the electrode 2, a first power source 4 connected to the first electrode 2, and a second power source 7 connected to the second electrode 3. Gas supply means 10 for supplying a gas into the chamber 1, exhaust means 13 for exhausting the inside of the chamber 1, and the first and second gas for the gas.
And an energy input means 11 for generating plasma by inputting energy without passing through the electrodes 2 and 3, and at least one of the first power source 4 and the second power source 7 supplies high frequency power. This is solved by a plasma device characterized by being a high frequency power supply.

Further, the above-mentioned problem is solved by forming a semiconductor wafer 9 on the first electrode 2 in the chamber 1 as illustrated in FIG.
Of the mean free path of electrons from the first electrode 2
The first electrode 2 and the second electrode
Electrode 3 is placed, and gas is supplied into the chamber 1,
The first high frequency power of the first frequency RF ₁ is supplied to the first electrode 1, and the second high frequency power of the second frequency RF ₂ higher than the first frequency RF ₁ is supplied to the second electrode 2. The plasma processing method is characterized in that plasma is generated in the chamber 1 by supplying it to the electrode 3 of FIG.

As for the above-mentioned problems, as illustrated in FIG. 15, the semiconductor wafer 9 is mounted on the first electrode 2 in the chamber 1, and the first frequency RF ₁ is applied to the first electrode 2. A first high-frequency power is supplied, a second electrode 3 is arranged to face the first electrode 2, a gas is supplied into the chamber 1, and the first and second electrodes 2 and 3 are interposed. This is solved by a plasma processing method, characterized in that energy is input to the gas to generate plasma without the need for heating.

As for the above-mentioned problems, as illustrated in FIG. 28, the semiconductor wafer 9 is mounted on the first electrode 122 in the chamber 121, and the second electrode is provided so as to face the first electrode 122. 123 is disposed, gas is supplied into the chamber 121, and the first and second electrodes 12 are supplied to the gas.
This is solved by a plasma processing method, characterized in that energy is input to generate plasma without passing through 2, 123 and the first high frequency power of the first frequency is supplied to the second electrode 123.

Next, the operation of the present invention will be described. In the present invention, the first and second electrodes are arranged to face each other, and high frequency power of, for example, 100 kHz to 1 MHz is supplied to the first electrode to generate plasma in the chamber.
Further, high frequency power of, for example, 10 MHz to 40 MHz is supplied to the second electrode. It is preferable that the frequency of the high frequency power supplied to the second electrode is high, and 10 MHz to 10 MHz.
It may be set in the range of 0 MHz. Electrons near the second electrode are accelerated toward the first electrode by the plasma sheath electric field generated by the high-frequency power supplied to the second electrode. As a result, the velocity component of the electrons in the plasma toward the first electrode increases, the electrons reach the bottom of the resist opening, neutralize the positive charges, and suppress the charge-up.

In this case, the electrons accelerated by the high frequency power supplied to the second electrode collide with the gas while moving toward the first electrode, and the velocity component in the direction toward the first electrode decreases. . When the distance between the first electrode and the second electrode exceeds twice the mean free path of electrons, the velocity component in the direction toward the first electrode significantly decreases and reaches the bottom of the resist opening. The number of electrons used is reduced, and the effect of preventing charge-up cannot be sufficiently obtained. For this reason,
The distance between the first and second electrodes is not more than twice the mean free path of electrons. The mean free path of electrons is related to the type of gas and the pressure, and the smaller the pressure, the larger the mean free path. When the gas pressure is about 10 mTorr or less, the mean free path is several tens of mm. For example, in the case of Cl ₂ gas used for etching an aluminum film, if the gas pressure is 3 mTorr, the mean free path of electrons is about 50.
mm. In the case of the conventional parallel plate type plasma device, the lower limit of the pressure is about 50 mTorr, and the mean free path of electrons at that time is about 3 mm or less.

Further, in another invention of the present application, high-frequency power having a first frequency is supplied to a first electrode on which a semiconductor wafer is mounted, and the counter electrode facing the first electrode has the first frequency. A second high frequency power having a higher frequency than that is supplied. Then, a third high frequency power is supplied to the coil to generate a high frequency magnetic field in the chamber, and the magnetic field generates plasma in the chamber. Then, the ions in the plasma reach the semiconductor wafer while the first electrode is the cathode, and the electrons reach the semiconductor wafer when the first electrode is the anode and the second electrode is negative. As a result, the positive charge is neutralized and charge damage can be avoided.

Instead of supplying high-frequency power to the coil to bring the gas in the chamber into a plasma state, microwaves may be emitted into the chamber to generate plasma in the chamber. . Further, even when the second electrode is set to a constant potential and the first high frequency power and the second high frequency power are simultaneously supplied to the first electrode, the same effect as described above can be obtained. However, in this case, in order to reduce the electric coupling between the plasma and the side wall inside the chamber, it is preferable to form a thick insulating film on the side wall inside the chamber.

[0028]

Embodiments of the present invention will be described below with reference to the accompanying drawings. (First Embodiment) FIG. 1 is a sectional view showing a plasma device according to a first embodiment of the present invention. Chamber 1
Is composed of a chamber body 1a and a bell jar 1b detachably provided on the chamber body 1a. A substrate bias electrode 2 is provided in the chamber 1, and a semiconductor wafer 9 is provided on the substrate bias electrode 2.
Is placed. The substrate bias electrode 2 is supplied with high frequency power of frequency RF ₁ from a high frequency power supply 4 via a filter 5 and a blocking capacitor 6. Frequency RF
₁ is set in the range of 100 kHz to ₁ MHz. Above the substrate bias electrode 2, a counter electrode 3 is arranged to face the substrate bias electrode 2. A frequency RF ₂ is applied to the counter electrode 3 from a high frequency power source 7 through a filter 8.
High frequency power is supplied. The frequency RF ₂ is, for example, 10
Set in the range of MHz to 100 MHz.

The chamber 1 is connected to a gas supply unit 10 composed of a gas cylinder, a mass flow controller and the like, and a predetermined flow rate of a predetermined etching gas or film forming gas is set in the chamber 1 from the gas supply unit 10. Supplied with. Further, the chamber 1 is connected to the exhaust pump 13. In the present embodiment, as shown in FIG. 2, the distance L between the substrate bias electrode 2 and the counter electrode 3 is
It is set to be equal to or less than twice the mean free path Le of the electron e (2Le ≧ L). For example, when Cl ₂ is used as the etching gas and the gas pressure in the chamber 1 is 3 mTorr, the electron e
Since the mean free path Le of is about 50 mm, the distance between the substrate bias electrode 2 and the counter electrode 3 is set to 100 mm or less.

Before explaining the operation of the plasma device of the present embodiment, the reason why the distance between the substrate bias electrode 2 and the counter electrode 3 is set to twice the mean free path of electrons or less will be described below. The inventors of the present application have investigated the relationship between charge damage and electron temperature during a plasma process by using ECR (Electron Cyclotron Resonanc).
e: Electron cyclotron resonance) A plasma etching device is used to etch the aluminum wiring of the CMOS to examine the charge damage points and to measure the electron temperature of the plasma above the semiconductor wafer by the Langmuir probe method. , I investigated the relationship between the two. FIG. 7 is a diagram showing a method for measuring the electron temperature of plasma by the Langmuir probe method.

The semiconductor wafer 4 is formed on the substrate bias electrode 41.
2 was placed, and the Langmuir probe 43 was arranged above the semiconductor wafer 42, that is, 40 mm above the electrode 41. The Langmuir probe 43 is a needle-shaped probe 43 arranged parallel to the surface of the semiconductor wafer 42.
a and a needle-shaped probe 43b arranged perpendicularly to the surface of the semiconductor wafer 42. The probe 43a measures the electron temperature in the direction parallel to the surface of the semiconductor wafer 42, and the probe 43b measures the electron temperature in the direction perpendicular to the surface of the semiconductor wafer 42. A predetermined voltage is applied to these probes 43a and 43b from power supplies 45a and 45b through ammeters 44a and 44b. By measuring the current flowing through the ammeters 44a and 44b, the electron temperature of plasma in the direction parallel to the surface of the semiconductor wafer and the direction perpendicular to the surface of the semiconductor wafer can be known.

A plurality of gate electrodes are arranged on the semiconductor wafer 42 through a gate oxide film having a thickness of 8 nm (see FIG. 34). Each gate electrode is a square with one side of 1 μm. These gate electrodes are covered with an insulating film, and an aluminum film having a thickness of 0.8 μm is formed on the insulating film. The aluminum film is electrically connected to the gate electrode through a contact hole selectively provided in the insulating film. The antenna ratio, that is, the ratio of the area of the gate electrode to the area of the aluminum film is on the order of 10 ⁴ to 10 ⁶ . Further, a photoresist pattern having a thickness of 1.6 μm is formed on the aluminum film.

A mixed gas of Cl ₂ and BCl ₃ is used, the pressure is 4.5 mTorr, and the microwave power is 8
Plasma etching was performed under the conditions of 00 W and the high frequency power supplied to the substrate bias electrode of 150 W, and the Langmuir probe 43 was moved horizontally with respect to the surface of the semiconductor wafer to examine the relationship between electron temperature and damage.

FIG. 8 is a diagram showing the results of examining the relationship between electron temperature and charge damage by plotting the position on the semiconductor wafer (relative position) on the horizontal axis and the electron temperature on the vertical axis. From FIG. 8, it can be seen that the damage is large at a place where the electron temperature in the direction parallel to the semiconductor wafer is higher than the electron temperature in the direction perpendicular to the semiconductor wafer. When the electron temperature in the direction parallel to the surface of the semiconductor wafer is high, the potential on the side wall of the pattern becomes large negatively, and it is considered that the electron shading effect becomes large. On the contrary, when the electron temperature in the direction perpendicular to the surface of the semiconductor wafer is high, it is considered that the electron shading effect is reduced because the number of electrons entering the bottom of the pattern opening increases.

From these results, the present inventors have found that it is effective to reduce the electron shading effect by making the electron temperature anisotropic within the plasma device. That is, instead of giving an isotropic velocity distribution to the electrons as shown in the conceptual diagram of FIG.
As shown in the conceptual diagram in (b), by giving electrons a large anisotropy in the direction toward the semiconductor wafer, the charge-up on the resist side wall can be relatively reduced. The present invention suppresses charge damage by imparting a large electron temperature anisotropy to electrons in the direction toward the semiconductor wafer as described above.

The results of examining the degree of charge-up reduction when the distance between the first and second electrodes is 1 to 4 times the mean free path of electrons will be described below. FIG. 10 is a diagram showing the plasma device used in the experiment. However, FIG.
In the figure, the illustration of the gas supply unit and the exhaust pump is omitted. The chamber 51 has a bell jar 51a made of cylindrical glass, and the other parts are made of aluminum or an aluminum alloy. The metal part of the chamber 51 is connected to the ground. The bell jar 51a has an outer shape of 500 mm and a wall thickness of 5 m.
m, the height is 200 mm.

A first electrode 52 is arranged in the chamber 51, and samples 59a and 59b described later are mounted on the first electrode 52. A frequency of 40 is applied to the first electrode 52 from a high frequency power supply 61 via a capacitor 62.
High frequency power of 0 kHz is supplied. The second electrode 53 is arranged above the first electrode 52. A high frequency power having a frequency of 13.56 HMz is supplied to the second electrode 53 from a high frequency power supply 63 via a capacitor 64. A coil 56 is wound around the bell jar 51a, and a high frequency power supply 65 supplies high frequency power to the coil 56. A high frequency magnetic field is generated in the chamber 51 by the coil 56, and the gas in the chamber 51 is excited by the high frequency magnetic field to generate plasma.

As a sample 59a, as shown in FIG. 11, a SiO ₂ film 72 having a thickness of about 2 μm is formed on a silicon substrate 71, and a hole pattern composed of a plurality of holes each having a diameter of 1 μm is formed on the SiO ₂ film 72. What formed (Hole pattern) 73 was prepared. Further, as the sample 59b, a sample having a sufficiently large opening (open-space) formed in the SiO ₂ film instead of the hole pattern was prepared. These samples 59a and 59b were fixed on the first electrode 52 by an Al ₂ O ₃ holder 74. And sample 5
9a was connected to a voltmeter 76a and sample 59b was connected to a voltmeter 76b.

Then, Ar (argon) gas is introduced into the chamber 51, and the pressure in the chamber 51 is adjusted to 2.5 mTor.
The mean free path of the electron is changed by changing from r to 10 mTorr, and the distance between the electrodes 52 and 53 is 1 of the mean free path of the electron.
The voltmeter measures the charging voltage of the sample when it is ~ 4 times.
6a, 76b. Other measurement conditions are
Plasma density is 2 to 3 × 10 ¹⁰ cm ⁻³ , first electrode 52
The voltage Vp-p applied to the second electrode 53 is 400V, and the voltage Vp-p applied to the second electrode 53 is 600V.

FIG. 12 (a) is a diagram showing the relationship between the electrodes, where the horizontal axis represents the distance between the electrodes as a ratio to the electron mean free path, and the vertical axis represents the reduced voltage. is there. However, the charging voltage when the high frequency power is not supplied to the second electrode 53 is 100V. This FIG.
As is clear from (a), when the distance between the electrodes 52 and 53 is four times the mean free path of electrons, the effect of reducing the charging voltage is not seen, and the distance between the electrodes 52 and 53 is The charging voltage was reduced by 17 V or more when the average free path was twice or less.

From the results of these experiments, in the plasma device shown in FIG. 1, the distance between the substrate bias electrode 2 and the counter electrode 3 was set to twice the mean free path of electrons or less. In the plasma apparatus shown in FIG. 1, for example, when etching the aluminum film on the semiconductor wafer 9 on which the wiring aluminum film 35 and the resist 36 are formed as shown in FIG. 34, after exhausting the inside of the chamber 1 by the exhaust pump 13. For example, Cl ₂ gas is supplied as an etching gas into the chamber 1 from the gas supply unit 10. Also, the pressure in the chamber 1 is maintained at about 3 mTorr. Then, from the high frequency power source 4 to the substrate bias electrode 2, 100 kHz to 1 MHz
The high frequency power of 10 MHz to 100 MHz is supplied from the high frequency power supply 7 to the counter electrode 3 while supplying the high frequency power of 1. Then, plasma is generated in the chamber 1,
Ions in the plasma reach the aluminum film 35 through the resist opening 36a on the semiconductor wafer 9, and the aluminum film 35 is etched. At this time, on the counter electrode 3 side, the electrons in the plasma are accelerated toward the substrate bias electrode 2 side by the high frequency power supplied to the counter electrode 3. The electrons collide with the gas before reaching the semiconductor wafer 9, and the anisotropy of the electron temperature is attenuated. However, in the present embodiment, the distance between the substrate bias electrode 2 and the counter electrode 3 is set to be narrower than twice the mean free path of electrons, and therefore, as shown in the conceptual diagram of FIG. The electrons reach the bottom of the resist opening through the resist opening while maintaining sufficient electron temperature anisotropy. As a result, the positive charges accumulated in the aluminum film 35 and the gate electrode are neutralized, and charge damage can be avoided.

The results of examining the relationship between the voltage applied to the substrate bias electrode and the counter electrode and the charge-up suppressing effect will be described below. The plasma apparatus shown in FIG. 10 was used for the experiment. A sample 59a was prepared by forming a SiO ₂ film having a thickness of about 2.0 μm on a silicon substrate and forming a hole pattern composed of a plurality of holes having an aspect ratio of 2 on the SiO ₂ film. Further, as the sample 59b, a sample having a sufficiently large opening (open-space) formed in the SiO ₂ film instead of the hole pattern was prepared.

Then, Ar (argon) gas is introduced into the chamber 51, and the pressure in the chamber 51 is adjusted to 2.5 mTor.
It was r. A high frequency power having a frequency of 400 kHz was supplied to the first electrode 52. In addition, in order to generate high-energy electrons in the plasma, the second electrode 53 is
A high frequency power of 3.56 MHz was supplied. Further, the coil 56 was supplied with 1.5 kW of power at a frequency of 3.4 MHz. As a result, plasma was generated in the chamber. The density of plasma is 1 × 10 ¹¹ cm ⁻³ and the electron temperature is 4 eV. The distance between the first electrode 52 and the second electrode 53 is 160 mm, and this distance is almost the same as the mean free path of electrons.

High frequency voltage Vp- applied to the first electrode 52
The self-bias potential of the sample having the hole pattern with the aspect ratio of 2 and the sample having the open space was examined by setting p to 400 V and changing the high frequency voltage Vp-p applied to the second electrode 53 from 0 to 1000 V.
FIG. 13 shows the self-bias potential according to the counter bias applied voltage. In the pole pattern with an aspect ratio of 2, as the counter bias voltage is increased, the self-bias potential of the hole pattern decreases. At this time, the potential slightly increases in the open space pattern. FIG. 14 shows the potential difference between the hole pattern and the open space depending on the applied voltage of the counter bias. It can be seen that the opposing bias reduces the self-bias potential difference and suppresses the charge-up.

High frequency voltage Vp- applied to the second electrode 53
p is 0V, 476V and 840V, and the first electrode 5
The high frequency voltage Vp-p applied to 2 was changed to 100 to 900 V, and the self-bias voltage of the sample having the hole pattern and the sample having the open space was examined. In FIG. 12B, the horizontal axis indicates the sample applied voltage (Substrat
e RF bias voltage) and the self-bias voltage on the vertical axis, showing the relationship between the two. Further, in the case of the sample having the hole pattern, it can be seen from FIG. 12B that the effect of suppressing the charge-up decreases as the voltage applied to the sample increases. This is because the electron shading effect increases as the voltage applied to the sample increases. Further, when the voltage applied to the second electrode 53 is increased, the effect of suppressing charge-up can be seen even if the voltage applied to the sample is high. This is because the higher the voltage applied to the second electrode 53, the higher the energy of the electrons toward the substrate. From this experimental result, it is understood that when the voltage applied to the first electrode 52 is high, the voltage applied to the second electrode 53 may be increased.

The frequency of the voltage supplied to the counter electrode 3 is preferably an integral multiple of the frequency of the voltage supplied to the substrate bias electrode 2. Thereby, the high frequency voltage applied to the substrate bias electrode 2 and the counter electrode 3 can be synchronized. Further, it is preferable that the phase of the high frequency power supplied to the counter electrode 2 can be controlled according to the distance from the substrate bias electrode 2. This is because charge-up can be suppressed by changing the phase of the high frequency power supplied to the counter electrode 3 according to the distance from the substrate bias electrode 2 as shown in a fourth embodiment described later.

Further, as shown in the waveform diagrams of FIGS. 3A and 3B, high frequency power is applied to the counter electrode 3 during the period when the substrate bias electrode 2 is the anode, that is, the period positive to the plasma space potential. Therefore, it is preferable to control the output of the second high-frequency power supply 7 so that the high-frequency power is not applied to the counter electrode 3 during the period when the substrate bias electrode 2 is the cathode, that is, during the period when the plasma space potential is negative. Since the electrons enter the resist opening when the substrate bias electrode 2 is in the anode period, controlling the output of the second high-frequency power source 7 in this manner suppresses an increase in the electron temperature in the plasma, Can effectively enter the resist opening.

FIG. 4 shows that the output of the second high frequency power supply is turned on.
It is a figure which shows the plasma apparatus provided with the control mechanism which turns off. 4, the same components as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted. FIG. 5 is similar to FIG.
It is a figure which shows the voltage waveform of A point, B point, and C point in the inside. The high frequency oscillator 158 outputs a sinusoidal high frequency signal as shown by the waveform at point B in FIG. This high frequency signal is input to the on-off modulator 157. On-off modulator 1
57 is turned on / off by a signal output from the pulse oscillator 159. From the pulse oscillator 159, see FIG.
As shown by the waveform of the dots, a rectangular pulse having a peak value of 5V is output. The output of the pulse oscillator 159 is the high frequency power source 4
Is synchronized with the output of. The on-off modulator 157 transmits the output of the oscillator 158 to the amplifier 156 when the signal output from the pulse oscillator 159 is at “H” level,
When it is at "L" level, the output of the oscillator 158 is cut off.
As a result, the signal shown as the waveform at point C in FIG. 5 is input to the amplifier 156. The amplifier 156 amplifies this input signal and intermittently supplies high frequency power to the counter electrode 3 via the matching box 155. In this way, the counter electrode 3 is formed while the substrate bias electrode 2 is the anode.
A plasma device that supplies high-frequency power to the device is realized.

In the apparatus shown in FIG. 1, the position of the substrate bias electrode 2 or the counter electrode 3 may be easily changed vertically depending on the type or pressure of the gas used. For example, FIG. 6 is a diagram showing the vertical movement mechanism of the substrate bias electrode 2. The base 30 has a drive unit 30a including a motor and gears in the center thereof, and the shaft 30c moves in the vertical direction by the forward and reverse rotations of the motor. Further, guide holes 30b are formed at the four corners of the base 30. On the other hand, rods 2a are provided at the four lower corners of the substrate bias electrode 2.
Is inserted into the guide hole 30b of the base 30. The substrate bias electrode 2 is connected to the drive shaft 30c at the center of the lower surface.

For example, in step etching, etching is performed with a plurality of gas species and gas pressures in the same chamber, but when the gas species and gas pressures change, the mean free path of electrons changes. By providing the substrate bias electrode 2 up-and-down mechanism as shown in FIG. 6, even in the case of step etching, by adjusting the interval between the electrodes 2 and 3 according to the type of gas and the pressure, charge damage is prevented. It is possible to perform step etching while preventing this.

(Second Embodiment) FIG. 15 is a schematic view showing a plasma device according to a second embodiment of the present invention. The present embodiment is an application of the present invention to an inductively coupled plasma (ICP) device. Further, in FIG. 15, the same components as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

In this embodiment, the bell jar 1b is used.
A coil 11 is wound around the outer circumference of the. The coil 11 is supplied with high-frequency power having a frequency RF ₃ of 3.4 MHz from a high-frequency power source 12, whereby a vertical high-frequency magnetic field is generated between the electrodes 2 and 3 in the chamber 1. The portion of the bell jar 1b around which the coil 11 is wound is made of glass. The chamber body 1a is made of aluminum and is connected to the ground.

In addition to obtaining the same effect as in the first embodiment, the present embodiment heats the plasma by the electric field generated by the high frequency magnetic field generated by the coil 11, so that the gas pressure is Even if it is low, there is an advantage that a high plasma density can be obtained. This advantage will be described in more detail. In the case of an apparatus of the type in which energy is input to the gas in the chamber by capacitive coupling through the electrodes like the apparatus shown in FIG. 1 of the first embodiment, the plasma density becomes low when the gas pressure is low. , If the gas pressure is too low,
The plasma cannot be formed and maintained. On the other hand, in the present embodiment, as shown in FIG. 15, since the energy is input without passing through the electrodes, a high plasma density can be obtained even if the gas pressure is low. For this reason,
In the present embodiment, the gas pressure can be lowered, and as a result, the mean free path of electrons is increased, and there is an advantage that there is no limitation on the electrode interval. Is also improved.

The results of investigating the relationship between the frequency of the high frequency power source and the charge damage using the plasma device of this embodiment will be described below. The inventors of the present application have shown in FIG.
The device shown in FIG. 2 was used to examine the electron acceleration effect of the plasma sheath electric field by the high frequency power applied to the substrate bias electrode 2. The gas used was argon (Ar), the gas flow rate was 50 sccm, the pressure was 10 mTorr, and the ICP input power, that is, the power input to the coil 11 was 500 W. The frequency of the high frequency power supplied to the substrate bias electrode 2 is 13.56 MHz, 1 MHz, 600 kHz, 40
It was set to 0 kHz, 200 kHz, or 100 kHz. At this time, high frequency power is not supplied to the counter electrode 3.

The electron temperature of the plasma was measured at a position 20 mm above the center of the substrate bias electrode 2 by the Langmuir probe method shown in FIG. FIG. 16 is a diagram showing a measurement result in which the horizontal axis represents frequency and the vertical axis represents electron temperature. As is clear from FIG. 16, the effect of electron acceleration by the plasma sheath electric field is related to the frequency of the high frequency power supplied to the substrate bias electrode, and there is almost no increase in the electron temperature in the frequency range of 100 kHz to 1 MHz. On the other hand, the substrate bias electrode 2 has 13.56 MH
When the high frequency power of z was applied, the electron temperature significantly increased. From this, it is understood that the frequency of the high frequency power supplied to the substrate bias electrode 2 is preferably 100 kHz to 1 MHz.

Next, the results of examining the effect of reducing the charge damage by the plasma device of the present embodiment by exposing the semiconductor wafer after aluminum wiring etching to static elimination plasma will be described. The chamber 1 (bell jar) of the plasma device has a diameter of 500 mm and a height of 200 mm.
mm and a thickness of 5 mm, which is made of quartz or glass, and has a coil 11 around the chamber 1 with a thickness of 0.2 m.
A copper strip having a length of m, a width of 10 mm, and a length of 10 m is wound five times. The distance between the substrate bias electrode 2 and the counter electrode 3 is 5
cm.

On the other hand, a plurality of gate electrodes formed with a gate oxide film having a thickness of 8 nm are arranged on the semiconductor wafer 9 as a sample. Each gate electrode is a square with one side of 1 μm. These gate electrodes are covered with an insulating film, and a thickness of 0.8 μm is formed on the insulating film.
Aluminum film is formed. The aluminum film is electrically connected to the gate electrode through a contact hole selectively formed in the insulating film. Three types of samples having an antenna ratio of 10 ⁴ , 10 ⁵ or 10 ⁶ were prepared. Further, a photoresist pattern having a thickness of 1.6 μm is formed on the aluminum film.

First, the aluminum film on the semiconductor wafer 9 was etched in a mixed gas of Cl ₂ and BCl ₃ so as not to give charge damage to the gate electrode. Then, this semiconductor wafer 9 was exposed to static elimination plasma. The condition at this time is that the coil 11 is supplied with high-frequency power having a frequency of 3.4 MHz, and the counter electrode 3 has a frequency of 13.5.
A high frequency power of 6 MHz was supplied, and a high frequency power of 400 kHz was supplied to the substrate bias electrode 2. The gas is Ar, the gas flow rate is 50 sccm, and the pressure is 1.
0 mTorr, ICP input power is 1 kW. The high frequency power applied to the substrate bias electrode 2 is 50W. Then, the power of the high frequency power applied to the counter electrode 3 is set to 5
The destruction rate of the gate oxide film due to charge damage was examined at 0 W, 100 W and 150 W. As a result, the destruction rate of the gate oxide film when the high-frequency power is 50 W is 34%, and the destruction rate of the gate oxide film when it is 100 W is 18
%, The gate breakdown rate at 150 W was 4%, and the breakdown rate decreased as the high-frequency power supplied to the counter electrode increased.

The frequency of the high frequency power supplied to the counter electrode 3 is preferably higher than the frequency of the high frequency power supplied to the substrate bias electrode 2. However, the counter electrode 3
Even if the frequency of the high-frequency power supplied to the substrate bias electrode 2 is slightly lower than the frequency of the high-frequency power supplied to the substrate bias electrode 2, the above effect can be obtained depending on the magnitude of the input power.

(Third Embodiment) FIG. 17 is a sectional view showing a plasma device according to a third embodiment of the present invention. The chamber 101 is composed of a chamber body 103 and a lid portion 102 made of quartz or a glass plate that is detachable from the chamber body 103. A substrate bias electrode 108 on which a semiconductor wafer 109 is placed is provided inside the chamber 101. High frequency power is supplied from the high frequency power supply 114 to the substrate bias electrode 108 via the matching circuit 115 and the filter 116. Further, a counter electrode 110 is attached to the lower surface of the lid 102. This counter electrode 110 is, for example, as shown in FIG.
8 has a plurality of rectangular openings 110a as shown in a plan view. The counter electrode 110 has a high frequency power source 11
The high frequency power is supplied from 1 through the matching circuit 112 and the filter 113.

The interval between the substrate bias electrode 108 and the counter electrode 110 is set to be twice the mean free path of electrons or less. The shape of the opening 110a provided in the counter electrode 110 may be any shape as long as the microwave can pass through. The chamber 101 is connected to a gas supply unit 106 including a gas cylinder, a mass flow controller, and the like, and a predetermined gas is supplied from the gas supply unit 106. Further, the chamber 101 is connected to the exhaust pump 107.

A dielectric plate 153 is arranged above the chamber 101. The dielectric plate 153 is connected to the microwave oscillator 151 via the waveguide 152. Using the plasma device configured in this way,
Aluminum film on semiconductor wafer 109 (see FIG. 34)
The case of etching will be described. First, after exhausting the inside of the chamber 101 by the exhaust pump 107, Cl ₂ gas, for example, as an etching gas is supplied from the gas supply unit 106 into the chamber 101. And chamber 1
Maintain the pressure in 01 at about 3 mTorr.

Next, the microwave oscillator 151 is operated. Then, the microwave output from the microwave oscillator 151 passes through the waveguide 152, reaches the dielectric plate 153, and a standing wave is generated in the dielectric plate 153.
This standing wave penetrates into the chamber 101 through the lid 102 and the opening 110a of the counter electrode 110. In this state, the high frequency power source 114
High frequency power of 00 kHz to 1 MHz is supplied to the counter electrode 110 from the high frequency power supply 111 to 10 MHz to 100 MH.
supply z high frequency power. In this case, the plasma is heated by the microwaves that have penetrated into the chamber 101 through the lid 102, so that the plasma density becomes high even at a low pressure.

Ions in this plasma are the semiconductor wafer 1
The aluminum film is etched through the resist opening on 09 to reach the aluminum film. At this time, on the side of the counter electrode 110, the electrons in the plasma are excited by the high frequency power supplied to the counter electrode 110.
It is accelerated toward the 8th side. This electron is a semiconductor wafer 10
By the time it reaches 9, it collides with molecules in the plasma and the anisotropy of electron temperature is attenuated. However, in the present embodiment, since the distance between the substrate bias electrode 108 and the counter electrode 110 is set to twice the mean free path of electrons or less, as shown in the conceptual diagram of FIG. 9B, The electrons have sufficient electron temperature anisotropy and resist opening 36a.
To the bottom of. Thereby, the resist opening 3
The positive charge accumulated at the bottom of 6a is neutralized, and charge damage can be avoided.

In the present embodiment as well, FIG.
As shown in (a) and (b), the substrate bias electrode 108
The output of the second high frequency power supply 111 is set so that the high frequency power applied to the counter electrode 110 is turned on during the anode period and the high frequency power applied to the counter electrode 110 is turned off during the substrate bias electrode 108 is the cathode period. It is preferable to control. As a result, electrons can be effectively allowed to enter the resist opening while suppressing an increase in electron temperature.

Also in this embodiment, the distance between the substrate bias electrode 108 and the counter electrode 110 may be variable. Further, the counter electrode 110 may be embedded in the lid portion 102 made of quartz or glass as shown in FIG. In the counter electrode 110 shown in FIG. 17, particles generated by etching may adhere to the inside of the opening 110 a and prevent microwaves from penetrating into the chamber 101. However, since the counter electrode 110 shown in FIG. 19 is embedded in the lid 102, particles do not adhere between the openings 110a of the counter electrode 110. Further, since there is no unevenness on the surface of the lid 102, the particles attached to the lid 102 can be easily removed.

(Fourth Embodiment) FIG. 20 shows a plasma device according to a fourth embodiment of the present invention. However,
In FIG. 20, the gas supply unit and the exhaust pump are not shown. A first electrode 52, that is, a substrate bias electrode is arranged in the chamber 51, and a semiconductor wafer is mounted on the first electrode 52. This first electrode 5
A second electrode 53, that is, a counter electrode, is arranged above 2. A coil 56 is provided on the outer periphery of the chamber 51.
A high frequency power source 65 supplies high frequency power to the coil 56.

High frequency power is supplied to the first electrode 52 from the high frequency power supply 119a through the capacitor 62. The high frequency power supply 119a outputs high frequency power having a frequency synchronized with the signal output from the signal generator 117. The signal generator 117 outputs a signal having a frequency of 13.56 HMz, for example. Further, high frequency power is supplied to the second electrode 53 from the high frequency power supply 119b through the capacitor 64. The high frequency power 119b also outputs high frequency power having a frequency synchronized with the signal output from the signal generator 117. However, the phase shifter 118 is connected between the high frequency power supply 119b and the signal generator 117, and the phase of the signal given to the high frequency power supply 119b can be controlled by this phase shifter 118.

The results of investigating the degree of charge-up reduction in the plasma device thus constructed will be described below. Samples 59a and 59b similar to those used in the experiment shown in FIG. 10 described above were mounted on the first electrode 52. The distance between the first electrode 52 and the second electrode 53 is 160 mm. Then, the sample 59a was connected to the voltmeter 76a, and the sample 59b was connected to the voltmeter 76b.

Ar gas was introduced into the chamber 51 to maintain the pressure in the chamber 51 at 2.5 mTorr. In addition, the voltage (Vp-p) is 200 V and the frequency is 1 at the first electrode 52.
The high frequency power of 3.56 MHz is supplied to the second electrode 53.
The voltage (Vp-p) is 360V and the frequency is 13.56MH
High frequency power of z was supplied. Then, the phase shifter 118
By changing the phase of the high frequency power output from the high frequency power supply 119b, the voltage difference between the samples 59a and 59b was examined.

In FIG. 21, the horizontal axis represents the phase difference between the high frequency power supplied to the first electrode 52 and the high frequency power supplied to the second electrode 53, and the vertical axis represents the voltage difference between the samples 59a and 59b. (DC self-bias potential difference) It is a figure which shows the relationship between both. However, the second electrode 53
Charging voltage (wi
The thout counter bias) was about 44V. This FIG.
From this, it is understood that charge-up is reduced by controlling the phase difference of the high frequency power supplied to the first electrode 52 and the second electrode 53. Further, from this figure, it is understood that when the second electrode 53 is originally an anode, high-energy electrons should not move to the first electrode 52 side, but there is an effect of reducing charge-up. From this, for one cycle time of high frequency power,
It can be seen that the time taken for the electrons to move between the electrodes cannot be ignored. That is, the optimum phase difference for reducing the charge-up changes according to the distance between the electrodes.

(Fifth Embodiment) FIG. 22 is a sectional view showing a plasma device according to a fifth embodiment of the present invention.
3 is a top view of the same, and FIG. 24 is a top view of the counter electrode. In this embodiment, the present invention is based on TCP.
(Transformer Coupled Plasma) applied to the device.

The chamber 121 has a chamber body 121a.
And a bell jar 121b which is detachable from the chamber body 121a. The upper wall 121c of the bell jar 121b is made of a dielectric material. A substrate bias electrode 122 is provided in the chamber 121.
The semiconductor wafer 9 is mounted on top. The matching circuit 12 is connected to the substrate bias electrode 122 from the high frequency power supply 124.
High frequency power of frequency RF ₁ is supplied via the capacitor 5 and the capacitor 126. Frequency RF ₁ is 100kHz-1M
It is set in the range of Hz.

A disc-shaped counter electrode 123 is arranged on the bell jar 121b so as to face the substrate bias electrode 122. This counter electrode 123 is made of a copper plate, and as shown in FIG.
3a are formed. The counter electrode 123 is supplied with high frequency power of frequency RF ₂ from a high frequency power supply 127 via a matching circuit 128. Frequency RF ₂ is 10
It is set in the range of MHz to 100 MHz. The distance between the substrate bias electrode 122 and the counter electrode 123 is about 50.
mm.

A spiral coil 131 is arranged above the counter electrode 123. This coil 131 is electrically separated from the counter electrode 123, and the high frequency power source 1
High frequency power of frequency RF ₃ is supplied from 32 through the matching circuit 134. Frequency RF ₃ is 1 MHz to 2
It is set in the range of 7 MHz. The chamber 121 is connected to a gas supply unit 130 including a gas cylinder, a mass flow controller and the like, and the gas supply unit 1
A predetermined gas is supplied from 30 at a set flow rate. Further, the chamber 121 is connected to the exhaust pump 133.

In the plasma apparatus configured as described above, gas such as Cl ₂ is supplied from the gas supply unit 130 into the chamber 121, and the inside of the chamber 121 is exhausted by the exhaust pump 133 so that the inside of the chamber 121 is exhausted. The pressure is 1 mTorr to 30 mTorr. Here, it is assumed that the pressure inside the chamber 121 is maintained at 5 mTorr.

Further, the high frequency power source 132 to the coil 131
To supply high frequency power having a frequency RF ₃ of 1 MHz to 27 MHz. Further, the high frequency power supply 124 supplies high frequency power having a frequency RF ₁ of 100 kHz to ₁ MHz to the substrate bias electrode 122, and the high frequency power supply 127 supplies a frequency RF ₂ of 10 MHz to 100 MH to the counter electrode 123.
supply z high frequency power.

A high frequency magnetic field is generated in the chamber 121 by the high frequency power supplied to the coil 131. The electric field generated by this high frequency magnetic field heats the plasma. On the other hand, the potential of the semiconductor wafer 9 is biased by the high frequency power supplied to the substrate bias electrode 121, the ions in the plasma are accelerated toward the semiconductor wafer 9, and the aluminum film or the like on the semiconductor wafer 9 is etched.

Further, the high-frequency power supplied to the counter electrode 123 causes the sheath width between the upper wall portion 121a and the plasma sheath to fluctuate with time at the frequency RF ₃ . Thereby, the electrons in the plasma are accelerated toward the semiconductor wafer 9. When the pressure in the chamber 121 is 3 mTorr, the mean free path of electrons is about 50 mm, the mean free path of electrons at 5 mTorr is about 30 mm, and the distance between the electrodes is set within twice that. Most of the accelerated electrons reach the semiconductor wafer 9 without being scattered. This can reduce charge damage and deterioration of etching characteristics.

In this embodiment, an eddy current is generated in the counter electrode 123 when the high-frequency magnetic field generated by the coil 131 passes through the counter electrode 123. However, as shown in FIG. On the slit 123
Since a is provided, the loss due to the eddy current is relatively small. The counter electrode 123 may be embedded in the upper wall portion 121c made of a dielectric material, as shown in FIG. In this case, the same effect as above can be obtained.

(Sixth Embodiment) FIG. 26 is a sectional view showing a plasma device according to a sixth embodiment of the present invention. In this embodiment, the same parts as those in FIG. 22 are designated by the same reference numerals, and detailed description thereof will be omitted. The upper wall portion 121c of the chamber 121 is made of a dielectric material, and the counter electrode 123 is embedded in the upper wall portion 121c. The counter electrode 123 is grounded.

The insulating film 1 is provided inside the chamber 121.
47 is coated. The thickness of the insulating film 147 is set sufficiently thicker than the thickness of the upper wall portion 121c existing below the counter electrode 123, for example, about 10 times. Substrate bias electrode 1 on which a semiconductor wafer 9 is placed
22 includes a high frequency power supply 124 and a matching circuit 125.
And the frequency RF ₁ is 100k via the capacitor 126.
The high frequency power of 1 MHz to 1 MHz is supplied, and the frequency RF ₂ is 10 MHz to 100 M from the high frequency power supply 144 via the matching circuit 145 and the capacitor 146.
High frequency power of Hz is supplied.

In the thus-configured plasma processing apparatus of this embodiment, the semiconductor wafer 9 is mounted on the substrate bias electrode 122, Cl ₂ is introduced into the chamber 121 as an etching gas, and the exhaust pump 133 is turned on. It is operated to maintain the pressure in the chamber 121 at, for example, 5 mTorr. Then, the substrate bias electrode 122 is supplied with high frequency power of frequencies RF ₁ and RF ₂ from the high frequency power supplies 124 and 144, and the coil 131 is supplied with the high frequency power supply 132.
Supply high frequency power of frequency RF ₃ . Then, plasma is generated in the chamber 121 due to the high-frequency magnetic field generated by the coil 131. The potential of this plasma is modulated by the high frequency power supplied from the high frequency power supply 144, and the electrons in the vicinity of the counter electrode 123 maintained at the ground potential are accelerated toward the substrate bias electrode 122. Thereby, also in the present embodiment, the same effect as that of the fifth embodiment can be obtained.

In the present embodiment, the chamber 121
Since the insulating film 147 is thickly formed inside, the electric coupling between the plasma and the chamber side wall can be reduced. In addition, in this embodiment, FIG.
As shown in (a), even if the output of the second high-frequency power source 144 is controlled so that the output of the second high-frequency power source 144 is turned on during the positive period of the output voltage of the first high-frequency power source 124. Good. Further, as shown in FIG. 27B, the output of the high frequency power source 144 is controlled so that the output of the high frequency power source 144 is turned on during the period when the substrate bias voltage by the high frequency power source 124 is positive with respect to the plasma space potential. May be. As a result, plasma heating can be suppressed and electrons can effectively reach the semiconductor wafer.

(Seventh Embodiment) FIG. 28 is a sectional view showing a plasma device according to an eighth embodiment of the present invention. 28, the same parts as those in FIG. 26 are designated by the same reference numerals, and detailed description thereof will be omitted. In the present embodiment, the electrode 122 on which the semiconductor wafer 9 is mounted is grounded and the electrode 123 facing the electrode 122 is supplied with high frequency power of 100 kHz to 1 MHz from the high frequency power supply 124 via the matching circuit 125a. While supplying, the matching circuit 145a from the high frequency power supply 144
A high frequency power having a frequency of 10 MHz to 100 MHz is supplied via.

Also in the present embodiment, the same effect as that of the sixth embodiment can be obtained. (Eighth Embodiment) FIG. 29 is a sectional view showing a plasma device according to an eighth embodiment of the present invention. In this embodiment, the same parts as those in FIG. 15 are designated by the same reference numerals, and detailed description thereof will be omitted.

In the present embodiment, the helicon wave plasma generator 160 is provided at, for example, four locations on the outer circumference of the chamber 1.
Is provided. This helicon wave plasma generator 16
0 is a cylindrical portion 163 connected to the chamber 1 and the cylindrical portion 1
The antenna 161 arranged around 63 and the cylindrical portion 163.
And a coil 162 arranged near the connecting portion with the chamber 1 to generate a magnetic field. A direct current is supplied to the coil 162 from a power source (not shown). The antenna 161 is connected to a high frequency power source 168 via a matching box 167.

In the plasma device of this embodiment, the gas supplied from the gas supply unit 10 into the chamber 1 enters the cylindrical portion 163 of the helicon wave plasma generation unit 160. On the other hand, from the high frequency power supply 168 to the matching box 1
A high frequency signal is supplied to the antenna 161 via 67,
Electromagnetic waves are emitted from the antenna 161 to the inside of the cylinder 163, and helicon wave plasma is generated inside the cylinder 163. This plasma flows out between the electrodes 2 and 3 inside the chamber 1 by the action of the magnetic field generated by the coil 162. Since high-frequency power is supplied from the high-frequency power supply 7 to the counter electrode 3, charge-up at the time of etching the semiconductor wafer 9 can be avoided as in the second embodiment.

Instead of the gas supply unit 10 for supplying the gas into the chamber 1 or simultaneously with the gas supply unit 10, as shown in FIG. 30, the gas is directly supplied to the inside of the helicon wave plasma generation unit 106. Means may be provided. (Other Embodiments) In each of the above-described embodiments, the case where plasma is generated by the ICP, TCP, microwave, and helicon wave as the plasma generation means has been described, but in addition, ECR, UHF (Ultra High F)
The plasma may be generated by requency or the like.

As shown in FIG. 15, the coil 11a for generating a magnetic field in the chamber is a bell jar 1.
It may be wound around the side part of b, FIG. 31 (a), (b).
As shown in FIG. 5, the dome-shaped bell jars 170 and 171 may be arranged at the upper curved portion. Furthermore, in each of the above-described embodiments, the bias voltage is applied by supplying high-frequency power to the substrate, but in processes such as plasma cleaning that does not require bias,
Even if the substrate bias voltage is not applied, the same effect can be obtained in that electrons are injected into the substrate by the bias to the counter electrode.

Furthermore, in each of the above-described embodiments, the case of plasma etching has been described, but the present invention can also be applied to the plasma CVD method. FIG. 32 shows a semiconductor device having a TiN film formed by the plasma CVD method. In this semiconductor device, an aluminum (Al) electrode 18 is formed on a silicon substrate 15 via an insulating film 16, an insulating film 17 is formed so as to cover these aluminum electrodes 18, and then an opening is formed in the insulating film 17. The portion 17a is provided, and then the TiN film 19 is formed on the entire surface by the plasma CVD method. When forming the TiN film 19, the plasma device described in any of the above-described embodiments is used. This gives T
It is possible to prevent charge damage from occurring in the insulating films 16 and 17 when the iN film 19 is formed.

[0092]

As described above, according to the present invention,
The first and second electrodes are arranged to face each other, and high frequency power of, for example, 100 kHz to 1 MHz is supplied to the first electrode to generate plasma in the chamber. Further, high frequency power of, for example, 10 MHz to 100 MHz is supplied to the second electrode. Electrons near the second electrode are accelerated toward the first electrode by the plasma sheath electric field generated by the high-frequency power supplied to the second electrode. As a result, the velocity component of the electrons in the plasma toward the first electrode increases, the electrons reach the bottom of the resist opening to neutralize the positive charges, suppress the charge-up, and make the etching uniform. Has the effect.

Further, according to another invention of the present application, high-frequency power having a first frequency is supplied to the first electrode on which the semiconductor wafer is mounted, and the first electrode is applied to the counter electrode facing the first electrode. A second high frequency power having a frequency higher than the frequency is supplied. Then, a third high frequency power is supplied to the coil to generate a high frequency magnetic field in the chamber, and the magnetic field generates plasma in the chamber. Then, the ions in the plasma reach the semiconductor wafer while the first electrode is the cathode, and the electrons reach the semiconductor wafer when the first electrode is the anode and the second electrode is negative. As a result, positive charges are neutralized, charge damage is avoided, and etching can be made uniform.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a plasma device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a relationship between a distance between a substrate bias electrode and a counter electrode and an average free path of electrons.

FIG. 3A is a diagram showing an example of a waveform of high frequency power supplied to a substrate bias electrode and a counter electrode, and FIG. 3B is another example of a waveform of high frequency power supplied to a substrate bias electrode and a counter electrode. It is a figure.

FIG. 4 is a diagram showing a plasma device provided with a control mechanism for turning on and off high-frequency power supplied to a counter electrode.

5 is a diagram showing waveforms at points A, B, and C in FIG.

FIG. 6 is a view showing an up / down mechanism of a substrate bias electrode.

FIG. 7 is a diagram showing a method of measuring an electron temperature of plasma by a Langmuir probe method.

FIG. 8 is a diagram showing a relationship between electron temperature and charge damage.

9A is a conceptual diagram showing electrons having an isotropic velocity component, and FIG. 9B is a conceptual diagram showing electrons having large anisotropy in a direction toward a semiconductor wafer.

FIG. 10 is a schematic diagram showing a plasma device used for investigating the relationship between the mean free path of electrons and charge-up.

FIG. 11 is a cross-sectional view showing a sample used for investigating the relationship between the mean free path of electrons and charge-up.

12A is a diagram showing a relationship between a distance between electrodes and a charge-up reduction voltage, and FIG. 12B is a diagram showing a relationship between a sample applied voltage and a self-bias voltage.

FIG. 13 is a diagram showing a hole pattern having an aspect ratio of 2 and a self-bias voltage of an open space.

FIG. 14 is a diagram showing a difference in self-bias voltage between a hole pattern having an aspect ratio of 2 and an open space.

FIG. 15 is a schematic diagram showing a plasma device according to a second embodiment of the present invention.

FIG. 16 is a diagram showing the relationship between the frequency of the high frequency power supplied to the first electrode and the electron temperature.

FIG. 17 is a cross-sectional view showing a plasma device according to a third embodiment of the present invention.

FIG. 18 is a plan view showing a counter electrode of a plasma device according to a third embodiment.

FIG. 19 is a cross-sectional view showing a lid in which a counter electrode is embedded.

FIG. 20 is a sectional view showing a plasma device according to a fourth embodiment of the present invention.

FIG. 21 is a diagram showing the relationship between the phase difference and the voltage difference of the high frequency power supplied to the first and second electrodes.

FIG. 22 is a sectional view showing a plasma device according to a fifth embodiment of the present invention.

FIG. 23 is a top view of the same.

FIG. 24 is a top view showing the counter electrode of the same.

FIG. 25 is a schematic diagram showing a modified example of the fifth embodiment.

FIG. 26 is a sectional view showing a plasma device according to a sixth embodiment of the present invention.

FIG. 27 (a) is a diagram showing an example of output waveforms of the first high frequency power supply and the second high frequency power supply,
(B) is a figure which shows the other example of the output waveform of the 1st high frequency power supply and the 2nd high frequency power supply similarly.

FIG. 28 is a sectional view showing a plasma device according to a seventh embodiment of the present invention.

FIG. 29 is a sectional view showing a plasma device according to an eighth embodiment of the present invention.

FIG. 30 is a cross-sectional view showing a plasma device of a modified example of the eighth embodiment.

FIG. 31 (a) is a cross-sectional view showing an example of a plasma device in which a coil is arranged in a curved portion above a bell jar, and FIG. 31 (b) is another example of a plasma device in which a coil is arranged in a curved portion above a bell jar. It is sectional drawing shown.

FIG. 32 is a diagram showing a semiconductor device having a TiN film formed by a plasma CVD method.

FIG. 33 is a cross-sectional view showing a conventional plasma device.

FIG. 34 is a cross-sectional view showing a part of a semiconductor wafer during plasma etching in the plasma device.

FIG. 35 is a schematic diagram showing an electronic shading effect.

FIG. 36 is a schematic diagram showing the occurrence of charge damage.

FIG. 37 is a diagram showing a difference in self-bias voltage in portions having different aspect ratios.

[Explanation of symbols]

1, 2, 51, 101, 121 chambers 2, 22, 41, 52, 108, 122 substrate bias electrodes (first electrodes) 3, 23, 53, 110, 123 counter electrodes (second electrodes) 4, 7 , 12, 24, 61, 63, 65, 111, 11
4,124,127,132,144 High frequency power source 5,8,25,113,116 Filter 6,26,62,64,126,146 Capacitor 9,31,42,109 Semiconductor wafer 10,27,106,130 Gas Supply unit 11, 56, 131 Coil 13, 28, 107, 133 Exhaust pump 15, 71 Silicon substrate 16, 17, 147 Insulating film 18 Al electrode 19 TiN film 32 Gate oxide film 33 Gate electrode 34 Contact hole 35 Aluminum film 36 Resist 37 Scribe Line 72 SiO ₂ Film 112, 115, 125, 128, 134, 145 Matching Circuit 117 Signal Generator 118 Phase Converter 151 Microwave Oscillator 152 Waveguide 153 Derivative Plate

Front page continuation (72) Inventor Masato Kosugi 4-1-1 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujishitsu Co., Ltd. No. 1 Fujitsu Limited

Claims (47)

[Claims] 1. A chamber, a first electrode disposed in the chamber for mounting a semiconductor wafer, and facing the first electrode and twice the mean free path of electrons from the first electrode. Second placed at the following distance
Electrode, a first high frequency power source for supplying high frequency power of a first frequency to the first electrode, and a high frequency power of a second frequency higher than the first frequency for the second electrode. A plasma device comprising: a second high-frequency power supply for supplying a gas, a gas supply means for supplying a gas into the chamber, and an exhaust pump for exhausting the inside of the chamber. 2. The plasma device according to claim 1, wherein the first frequency is 100 kHz to 1 MHz. 3. The second frequency is 10 MHz to 4
It is 0 MHz, The plasma apparatus of Claim 1 characterized by the above-mentioned. 4. The second frequency is 40 MHz to 1
It is 00 MHz, The plasma apparatus of Claim 1 characterized by the above-mentioned. 5. The plasma device according to claim 1, wherein the second frequency is an integral multiple of the first frequency. 6. A chamber, a first electrode arranged in the chamber to mount a semiconductor wafer, a second electrode arranged so as to face the first electrode, and the first electrode. A first power supply connected to the second electrode, a second power supply connected to the second electrode, a gas supply means for supplying a gas into the chamber, an exhaust means for exhausting the inside of the chamber, Energy input means for inputting energy to generate plasma without passing through the first and second electrodes, and at least one of the first power source and the second power source supplies high frequency power. A plasma device characterized by being a high-frequency power source. 7. The first power supply is 100 kHz to 1
7. The plasma device according to claim 6, wherein the plasma device is a high frequency power supply that supplies high frequency power of MHz. 8. The second power supply is 10 MHz to 40 MHz.
7. The plasma device according to claim 6, wherein the plasma device is a high frequency power supply that supplies high frequency power of MHz. 9. The second power source is 40 MHz to 10 MHz.
The plasma device according to claim 6, which is a high-frequency power supply that supplies a high-frequency power of 0 MHz. 10. The first power source is a high frequency power source that supplies high frequency power of a first frequency, and the second power source is a high frequency power source that supplies high frequency power of a second frequency. 7. The plasma device according to claim 6, wherein the frequency of 2 is an integral multiple of the first frequency. 11. The plasma device according to claim 6, wherein the distance between the first and second electrodes is set to be twice the mean free path of electrons or less. 12. The plasma device according to claim 6, wherein the upper portion of the chamber is made of a dielectric material, and the second electrode is embedded in the upper portion of the chamber. 13. The first power source is a high frequency power source for supplying high frequency power of a first frequency, and the second power source supplies the second electrode to the second electrode while the first electrode is an anode. The plasma device according to claim 6, wherein the plasma device is a high-frequency power supply that supplies high-frequency power of the second frequency. 14. The plasma apparatus according to claim 6, wherein the energy inputting means is a microwave emitter that emits microwaves into the chamber. 15. The upper part of the chamber is made of a dielectric material, the second electrode is provided with slits or holes and embedded in the upper part of the chamber, and the microwave emitter is connected to the upper part of the chamber. 15. The plasma device according to claim 14, wherein the plasma device is provided. 16. The energy inputting means is a conductive coil for generating a high frequency magnetic field in the chamber, and the conductive coil is connected to a third power supply for supplying high frequency power of a third frequency. The plasma device according to claim 6, wherein the plasma device is provided. 17. The plasma device according to claim 16, wherein the conductive coil is wound around the chamber. 18. The plasma device according to claim 16, wherein the conductive coil is arranged above the chamber and laterally of the second electrode. 19. The plasma device according to claim 16, wherein the conductive coil is arranged above the second electrode, and the second electrode is provided with a hole or a slit. 20. The first power supply is a constant voltage power supply, the second power supply is a high frequency power supply, and the second electrode further supplies a high frequency power of a fourth frequency to a fourth electrode. The plasma device according to claim 16, wherein the plasma device is connected to the plasma device. 21. The second power supply is a constant voltage power supply, the first power supply is a high frequency power supply, and the first power supply further supplies a high frequency power of a fourth frequency to the first electrode. The plasma device according to claim 16, wherein the plasma device is connected to the plasma device. 22. The plasma device according to claim 20, further comprising an insulating film that covers at least a side inner wall surface between the first and second electrodes of the inner wall surface of the chamber. . 23. The plasma device according to claim 6, wherein the plasma charging means is an electromagnetic wave generator provided laterally between the first and second electrodes. 24. A semiconductor wafer is mounted on a first electrode in a chamber, and a semiconductor wafer is placed facing the first electrode at a distance of not more than twice the mean free path of electrons from the first electrode. Two
Electrode is disposed, gas is supplied into the chamber, and the first electrode is connected to the first electrode.
Supplying a first high frequency power having a frequency of 2 to a second frequency and supplying a second high frequency power having a second frequency higher than the first frequency to the second electrode to generate plasma in the chamber. And a plasma processing method. 25. The plasma processing method according to claim 24, wherein the first frequency is 100 kHz to 1 MHz. 26. The plasma processing method according to claim 24, wherein the second frequency is 10 MHz to 40 MHz. 27. The plasma processing method according to claim 24, wherein the second frequency is 40 MHz to 100 MHz. 28. The plasma processing method of claim 24, wherein the second high frequency power is supplied during a period when the first electrode is an anode. 29. A semiconductor wafer is mounted on a first electrode in a chamber, a first high frequency power having a first frequency is supplied to the first electrode, and a second high frequency power is provided so as to face the first electrode. Electrode is arranged, gas is supplied into the chamber, and energy is input to the gas to generate plasma without passing through the first and second electrodes. 30. The plasma processing method according to claim 29, wherein the first frequency is 100 kHz to 1 MHz. 31. The plasma processing method of claim 29, wherein the second electrode is supplied with a second high frequency power having a second frequency. 32. The plasma processing method according to claim 31, wherein the second frequency is 10 MHz to 40 MHz. 33. The plasma processing method according to claim 31, wherein the second frequency is 40 MHz to 100 MHz. 34. The plasma processing method according to claim 31, wherein the second frequency is an integral multiple of the first frequency. 35. The plasma processing method according to claim 31, wherein the second frequency is higher than the first frequency. 36. The plasma processing method according to claim 31, wherein the second high frequency power is supplied during a period in which the first electrode is an anode. 37. The input of energy is to generate a high frequency magnetic field in the chamber, and the second high frequency power of a second frequency is supplied to the second electrode. 29. The plasma processing method according to 29. 38. The input of energy is to generate a high-frequency magnetic field in the chamber, hold the second electrode at a constant potential, and apply a second frequency to the first electrode. 30. The plasma processing method according to claim 29, wherein the second high frequency power is supplied. 39. The plasma processing method according to claim 38, wherein the second electrode is held at a ground potential. 40. A semiconductor wafer is mounted on a first electrode in a chamber, a second electrode is arranged so as to face the first electrode, a gas is supplied into the chamber, and a gas is supplied to the gas. A plasma processing method, characterized in that energy is input to generate plasma without passing through the first and second electrodes, and first high-frequency power of a first frequency is supplied to the second electrode. 41. The plasma processing method of claim 40, wherein the first frequency is 10 MHz to 40 MHz. 42. The plasma processing method according to claim 40, wherein the first frequency is 40 MHz to 100 MHz. 43. The plasma processing method according to claim 40, wherein the input of energy is introduction of microwaves into the chamber. 44. The input of energy is to generate a high-frequency magnetic field in the chamber, hold the first electrode at a constant potential, and apply a second frequency to the second electrode. The plasma processing method of claim 40, wherein the second high frequency power is supplied. 45. The plasma processing method according to claim 44, wherein the first electrode is held at a ground potential. 46. The plasma processing method according to claim 29, wherein the distance between the first and second electrodes is set to be equal to or less than twice the mean free path of electrons. 47. The energy input is performed in a region lateral to the first electrode and the second electrode, and plasma generated in the region is applied to the first electrode and the second electrode. The plasma processing method according to claim 29 or 40, wherein the plasma processing method is introduced during the period.