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JP3704423B2 - Surface treatment equipment - Google Patents

Surface treatment equipment Download PDF

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Publication number
JP3704423B2
JP3704423B2 JP22776797A JP22776797A JP3704423B2 JP 3704423 B2 JP3704423 B2 JP 3704423B2 JP 22776797 A JP22776797 A JP 22776797A JP 22776797 A JP22776797 A JP 22776797A JP 3704423 B2 JP3704423 B2 JP 3704423B2
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Prior art keywords
sample
voltage
plasma
period
surface treatment
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JP22776797A
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JPH1167734A (en
Inventor
哲郎 小野
功一 中宇祢
巽 水谷
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Hitachi Ltd
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Hitachi Ltd
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Description

【0001】
【発明の属する技術分野】
本発明は半導体素子の表面処理装置にかかわり、特にプラズマを用いて半導体表面のエッチングを行なう表面処理装置に関する。
【0002】
【従来の技術】
半導体素子のエッチングに現在広く用いられている装置は、プラズマを利用する装置である。本発明はこのようなプラズマを利用した装置に適用する。ここではそのうちの一つであるECR(電子サイクロトロン共鳴)方式と呼ばれる装置を例に取り従来技術を説明する。この方式では、外部より磁場を印加した真空容器中でマイクロ波によりプラズマを発生する。磁場により電子はサイクロトロン運動し、この周波数とマイクロ波の周波数を共鳴させることで効率良くプラズマを発生できる。試料に入射するイオンを加速するために、試料には高周波電圧が印加される。プラズマとなるガスには塩素やフッ素などのハロゲンガスが用いられる。
【0003】
この装置の主に高精度化をはかる目的で特開平6-151360号公報が知られている。この発明では、試料に印加する高周波電圧をオンーオフと間欠的に制御することにより、エッチングしたい物質であるSiと下地酸化膜との選択比を高くできる。
【0004】
【発明が解決しようとする課題】
近年の半導体素子の微細化に伴い、プロセスに用いるプラズマが素子に与える損傷の問題が顕在化している。具体的には、MOS(metal oxide semiconductor)トランジスタのゲート酸化膜の厚さは256M以降のメモリ素子では約4nmになる。このようなゲート酸化膜の薄膜化に加えて加工のアスペクト比(縦方向と横方向の寸法比)が大きくなると、電子シェーディングと呼ばれる現象で生じる損傷が問題になる。
【0005】
次に図を用いて、電子シェーディング現象の説明を行う。図2(b)はエッチング装置内のプラズマにさらされている半導体ウエハの断面図である。図2(a)は(b)のレジストパタンを上から見た図である。図中の試料は損傷評価用の素子であるが、実デバイスでは主にトランジスタのゲート部分に相当する。Si基板205の上に素子分離酸化膜204、ゲート酸化膜203が形成その上にpoly Si層202とレジスト201が櫛状に形成されている。プラズマエッチング中には、電子206とイオン207が試料に入射する。イオン207は試料に印加される高周波電圧で加速されて試料表面に垂直に入射するが、電子207は質量が小さいのでランダムな速度成分が大きい上にバイアスで減速されるので、試料には不揃いな方向で入射する。
【0006】
このために図2(b)に示すように、アスペクト比の高い溝の加工では、イオンは溝底208まで到達できるが、電子は主にレジスト201の側壁に捕獲される。するとゲート酸化膜203にはpoly Si層202を介して正の電荷が蓄積され、この量がある値を超えるとゲート酸化膜203が絶縁破壊を起こし、素子不良となる。以上のように、イオンと電子の方向性の違いから微細溝内に電子が供給されない現象を電子シェーディングと呼ぶ。
【0007】
本発明の目的は、この電子シェーディングによる素子の損傷を低減する表面処理装置を提供することにある。
【0008】
上記目的は、真空容器と、この真空容器のなかにプラズマを発生させる手段と、前記プラズマにより表面が処理される試料をその上に設置するための試料台と、前記試料に電圧を印加するための電源とを備え、前記電圧は、その振幅が20V以下の期間と300V以上の期間とを有して、これらの期間が交互に繰り返される表面処理装置により達成される。さらに、前記電圧の振幅が100Hzから10kHzの周波数で繰り返されることにより達成される。さらにまた、前記振幅が 300V 以上の期間が前記繰り返しの1つの期間にしめる割合が5%以上70%以下であることにより達成される。さらにまた、前記電圧の振幅を切り替える際の電圧の立ち上がり及び立ち下がり時間の合計が、前記繰り返しの周期の10%以下であることにより達成される
【0009】
【発明の実施の形態】
実施例1
以下、本発明の一実施例を図1乃至図6により説明する。
【0010】
図1(a)は本発明を適用するプラズマエッチング装置の全体構成図である。図1(a)において、マイクロ波電源101から導波管102と導入窓103を介して真空容器104内にマイクロ波が導入される。導入窓103の材質は石英、セラミックなど電磁波を透過する物質である。真空容器104の回りには電磁石105が設置されており、磁場強度はマイクロ波の周波数と共鳴を起こすように設定されて、たとえば周波数が2.45GHzならば磁場強度は875Gaussである。この磁場強度でプラズマ106中の電子のサイクロトロン運動が電磁波の周波数と共鳴するために、効率よく電磁波のエネルギーがプラズマに供給され高密度のプラズマができる。試料107は試料台108の上に設置される。試料に入射するイオンを加速するために、高周波電圧電源109が試料台18に接続されている。高周波電圧電源の周波数に特に制限はないが、通常では周波数は200kHzから20MHzの範囲が実用的である。
【0011】
図1(b)は高周波電圧電源109の電圧波形110を示す。本発明に従い,電圧の振幅は20V以下の期間、この場合は0Vでoffと表示してあると振幅が300V以上の期間(図中onと表示)に分けて印加してある。
【0012】
次にこの装置で図2に示す構造の損傷評価素子をエッチングして、ゲート酸化膜203の絶縁破壊率を測定した結果を図3に示す。
【0013】
エッチングのガスにはCl2(75sccm)と酸素(5sccm)の混合ガスを用いた。真空容器14内部の圧力を0.4Pa とした。マイクロ波電源101の出力を600Wとした。高周波電圧電源109の周波数は800KHzで、オンオフは行わず連続状にして、その振幅Vppをパラメータとした。図1に示す素子の形状はゲート酸化膜203の厚さが4nm、poly Si層202の厚さ0.2μm 、レジスト201の厚さが1μmで、櫛の長さが1mm、櫛数は100本、櫛幅と櫛間スペースはそれぞれ0.5μm とした。図3では横軸が振幅Vppで縦軸がゲート酸化膜の絶縁破壊率である。図3よりわかるようにVppに対して絶縁破壊率は極大値を持ち、Vppが20V以下および300V以上では、実際のデバイスでは問題とならない程度の絶縁破壊率5%以内になる。しかしVppが20V以下ではイオンの加速が十分ではなくエッチング速度が遅い、あるいはエッチングの方向性が悪いなどの問題点がある。一方、Vppが300V以上ではイオンのエネルギーが高すぎてpoly Siと酸化膜のエッチング速度の選択比が小さくなる問題点がある。
【0014】
そこで本発明では図1(b)に示すようにイオン加速電圧をVppが20V以下のオフ期間とVppが300V以上のオン期間の繰り返しにして試料に印加した。繰り返しの周波数を100Hzから10kHzで図2に示す素子構造で絶縁破壊率を5%以内にすることができた。さらに、オン時のVppを450Vにすると絶縁破壊率はほぼ0になった。この方法ではオンの期間が1周期にしめる割合(以後デューティー比と呼ぶ)を変化させることによりpoly Siのエッチング速度と対酸化膜選択比を調整することができるので、前述したエッチング速度と選択比の低下を回避することができる。なお、デューティー比は5%以上70%以下が適当な範囲でたとえばオン時のVppを350Vにして前述の条件でエッチングを行うと、デューティー比50%でpoly Siエッチング速度250nm/分で対酸化膜選択比25、デューティー比を15%ではpoly Siエッチング速度180nm/分で対酸化膜選択比180と良好な値が得られた。
【0015】
さらにこの方法と組み合わせて、低損傷エッチングを実現するにはマイクロ波の電力を小さくしてプラズマの密度を下げればよいことがわかった。具体的にはマイクロ波電力を400Wにすることで絶縁破壊率をさらに低減することができた。図1に示す示すエッチング装置のプラズマ発生部分(試料台108上面から導入窓103の下面までの空間)の体積は15000ccなので1cc当たりのマイクロ波rf電力は0.027W/ccとなる。プラズマ発生部分の体積が変わったり、エッチング装置の方式が変わってもプラズマ発生用電源の電力とプラズマ発生部分の体積の割合を0.027W/cc以下にすると本発明の効果がさらに上がる。
【0016】
公知例では試料に印加する高周波電圧をオンオフ制御する方法は述べられているが、損傷を低減する方法に関しての記載はなく、また図3に示す実験データなしでは同業他者の類推も不可能である。
【0017】
実施例2
図4は本発明を適用する別の装置構造で、この装置では数百kHzから数十MHzのいわいるラジオ波帯(以後rfと呼ぶ)の周波数で誘導結合によりプラズマを発生させる。真空容器403はアルミナや石英などの電磁波を透過する物質でつくられている。その回りに、プラズマ410を発生させるための電磁コイル402が巻いてある。コイルにはrf電源404が接続されている。真空容器401内には試料台408がありその上に試料407が置かれ、高周波電圧電源409が接続されている。真空容器401には上蓋405がついているがこれは一体型でもかまわない。
【0018】
本発明に従い、高周波電圧電源409はVpp20V以下のオフ期間とVppが300V以上のオン期間の繰り返しにして試料台408に印加した。この装置でも図2に示す損傷評価素子で測定した電子シェーディングによる絶縁破壊率は5%以下に抑えられて、本発明の有用性がわかった。
【0019】
図4に示す装置では、電磁コイル402は上蓋405の上に設置されていても効果は同じである。
【0020】
実施例3
図5は本発明を適用する別の装置構造で、この装置ではrf電力の容量結合によりプラズマを発生させる。真空容器501内には2枚の電極502、505が平行に配置してある。電極にはそれぞれrf電源503と高周波電圧電源506が接続してある。試料504は試料台をかねる電極505の上におかれる。ガスは試料と対向した電極502に開いた穴から導入管508を通して容器内に入れられる。プラズマ507は2枚の電極の間で発生する。
【0021】
このタイプの装置でも高周波電圧電源506をVppが20V以下のオフ期間とVppが300V以上のオン期間の繰り返しにして試料に印加することで、電子シェーディングによる損傷を抑えることができた。
【0022】
実施例4
次に、試料に印加する高周波電圧の波形についての実施例を述べる。Vppを20V以下から300V以上に変化させると、電源の性能によって立ち上がり立ち下がりに時間がかかり、図6に示すような波形になる。立ち上がり時間t1と立ち下がり時間t2の間では、Vppが20Vと300Vの間、すなわち絶縁破壊が生じる電圧になる。この期間が1周期に占める割合がどのくらいならば問題ないかを測定した。その結果、t1とt2の合計が周期Tに占める割合が10%以下ならば、本発明で述べる効果があることがわかった。
以上のように、上記実施例により、 poly Si のエッチング速度と対酸化膜選択比の低下を回避して、トランジスタのゲート酸化膜の絶縁破壊を防ぐことができる。
【0023】
【発明の効果】
以上の通り、本発明によれば、電子シェーディングによる素子の損傷を低減する表面処理装置を提供できる。
【図面の簡単な説明】
【図1】(a)本発明を適用する装置の全体構成図である。
(b)高周波電圧電源の電圧波形図である。
【図2】(a)損傷評価のための試料の断面図(電子シェーディング現象の説明図)である。
(b)半導体ウェハの断面図である。
【図3】高周波電圧振幅とゲート酸化膜絶縁破壊率の関係図である。
【図4】本発明を適用する装置の全体構成図である。
【図5】本発明を適用する装置の全体構成図である。
【図6】高周波電圧の波形図である。
【符号の説明】
101…マイクロ波電源、102…導波管、103…導入窓、104,403,501…真空容器、105…磁石、106,410,507…プラズマ、107,407,504…試料、108,408…試料台、109,409,506…高周波電圧電源、110,508…ガス導入管、110…電圧波形、201…レジスト,202…poly Si層,203…ゲ…ト酸化膜、204…素子分離酸化膜、205…基板Si、206…電子、207…イオン、208…溝底、402…電磁コイル、404,503…rf電源、405…上蓋、502,505…電極、601…高周波電圧波形。
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a surface treatment apparatus for semiconductor elements, and more particularly to a surface treatment apparatus for etching a semiconductor surface using plasma.
[0002]
[Prior art]
An apparatus widely used at present for etching semiconductor elements is an apparatus using plasma. The present invention is applied to an apparatus using such plasma. Here, the prior art will be described taking an example of an apparatus called an ECR (electron cyclotron resonance) system, which is one of them. In this method, plasma is generated by microwaves in a vacuum container to which a magnetic field is applied from the outside. Electrons cause cyclotron motion by a magnetic field, and plasma can be generated efficiently by resonating this frequency with the microwave frequency. In order to accelerate ions incident on the sample, a high frequency voltage is applied to the sample. A halogen gas such as chlorine or fluorine is used as the plasma gas.
[0003]
Japanese Patent Laid-Open No. 6-151360 is known mainly for the purpose of improving the accuracy of this apparatus. In the present invention, the selective ratio between Si, which is a substance to be etched, and the base oxide film can be increased by intermittently controlling the high-frequency voltage applied to the sample on and off.
[0004]
[Problems to be solved by the invention]
With the recent miniaturization of semiconductor elements, the problem of damage to the elements caused by plasma used in the process has become apparent. Specifically, the thickness of the gate oxide film of a metal oxide semiconductor (MOS) transistor is about 4 nm in a memory element of 256M or later. When the aspect ratio of processing (longitudinal and lateral dimension ratio) increases in addition to the thinning of the gate oxide film, damage caused by a phenomenon called electronic shading becomes a problem.
[0005]
Next, the electronic shading phenomenon will be described with reference to the drawings. FIG. 2B is a cross-sectional view of a semiconductor wafer exposed to plasma in an etching apparatus. FIG. 2A is a view of the resist pattern of FIG. 2B viewed from above. Although the sample in the figure is an element for damage evaluation, in an actual device, it mainly corresponds to the gate portion of the transistor. An element isolation oxide film 204 and a gate oxide film 203 are formed on a Si substrate 205, and a poly Si layer 202 and a resist 201 are formed in a comb shape thereon. During plasma etching, electrons 206 and ions 207 enter the sample. The ions 207 are accelerated by a high-frequency voltage applied to the sample and are incident perpendicularly on the sample surface. However, since the electrons 207 have a small mass, they have a large random velocity component and are decelerated by a bias. Incident in the direction.
[0006]
For this reason, as shown in FIG. 2B, in the processing of a groove having a high aspect ratio, ions can reach the groove bottom 208, but electrons are mainly captured by the side wall of the resist 201. Then, positive charges are accumulated in the gate oxide film 203 through the poly Si layer 202, and when this amount exceeds a certain value, the gate oxide film 203 causes dielectric breakdown, resulting in an element failure. As described above, the phenomenon in which electrons are not supplied into the fine groove due to the difference in directionality between ions and electrons is called electron shading.
[0007]
An object of the present invention is to provide a surface treatment apparatus that reduces damage to elements due to this electronic shading.
[0008]
The purpose is to apply a voltage to the vacuum vessel, a means for generating plasma in the vacuum vessel, a sample stage for placing a sample whose surface is treated by the plasma, and a sample. The voltage is achieved by a surface treatment apparatus in which the amplitude has a period of 20 V or less and a period of 300 V or more, and these periods are alternately repeated. Furthermore, this is achieved by repeating the amplitude of the voltage at a frequency of 100 Hz to 10 kHz. Furthermore, it is achieved when the period in which the amplitude is 300 V or more is set to one period of the repetition is 5% or more and 70% or less . Furthermore, this is achieved by the sum of the rise and fall times of the voltage when switching the amplitude of the voltage being 10% or less of the repetition period .
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Example 1
An embodiment of the present invention will be described below with reference to FIGS.
[0010]
FIG. 1A is an overall configuration diagram of a plasma etching apparatus to which the present invention is applied. In FIG. 1A, microwaves are introduced from a microwave power source 101 into a vacuum vessel 104 through a waveguide 102 and an introduction window 103. The material of the introduction window 103 is a substance that transmits electromagnetic waves, such as quartz or ceramic. An electromagnet 105 is installed around the vacuum vessel 104, and the magnetic field intensity is set to resonate with the frequency of the microwave. For example, if the frequency is 2.45 GHz, the magnetic field intensity is 875 Gauss. With this magnetic field strength, the cyclotron motion of electrons in the plasma 106 resonates with the frequency of the electromagnetic wave, so that the energy of the electromagnetic wave is efficiently supplied to the plasma and a high-density plasma can be formed. The sample 107 is set on the sample stage 108. A high-frequency voltage power source 109 is connected to the sample stage 18 in order to accelerate ions incident on the sample. There is no particular limitation on the frequency of the high-frequency voltage power supply, but in general, the frequency is practically in the range of 200 kHz to 20 MHz.
[0011]
FIG. 1B shows a voltage waveform 110 of the high frequency voltage power supply 109. In accordance with the present invention, the voltage amplitude is applied in divided periods of 20 V or less, in this case, when 0 V is displayed as “off”, the amplitude is 300 V or more (indicated as “on” in the figure).
[0012]
Next, FIG. 3 shows the result of measuring the dielectric breakdown rate of the gate oxide film 203 by etching the damage evaluation element having the structure shown in FIG.
[0013]
As the etching gas, a mixed gas of Cl2 (75 sccm) and oxygen (5 sccm) was used. The pressure inside the vacuum vessel 14 was 0.4 Pa. The output of the microwave power source 101 was 600W. The frequency of the high-frequency voltage power supply 109 is 800 KHz, it is not turned on and off, it is continuous, and its amplitude Vpp is used as a parameter. Thickness 4nm of elements in the form a gate oxide film 203 shown in FIG. 1, the thickness of 0.2 mu m of poly Si layer 202, it is in 1μm thickness of the resist 201, 1 mm length of the comb, comb number 100, the comb width and the inter-comb space were each 0.5 μm. In FIG. 3, the horizontal axis represents the amplitude Vpp and the vertical axis represents the dielectric breakdown rate of the gate oxide film. As can be seen from FIG. 3, the breakdown rate has a maximum value with respect to Vpp, and when Vpp is 20 V or less and 300 V or more, the breakdown rate is within 5%, which is not a problem in an actual device. However, when Vpp is 20 V or less, there is a problem that ions are not sufficiently accelerated and the etching rate is slow or the etching direction is poor. On the other hand, when Vpp is 300 V or more, there is a problem that the ion energy is too high and the selectivity of the etching rate between poly Si and the oxide film becomes small.
[0014]
Therefore, in the present invention, as shown in FIG. 1B, the ion acceleration voltage is applied to the sample by repeating the off period in which Vpp is 20 V or less and the on period in which Vpp is 300 V or more. With the repetition frequency of 100 Hz to 10 kHz, the dielectric breakdown rate was within 5% with the element structure shown in FIG. Furthermore, when Vpp at the time of ON was set to 450V, the dielectric breakdown rate became almost zero. In this method, the poly Si etching rate and the oxide film selection ratio can be adjusted by changing the ratio (hereinafter referred to as the duty ratio) that makes the ON period one cycle. A decrease can be avoided. The duty ratio should be 5% or more and 70% or less. For example, if etching is performed under the above conditions with Vpp at ON being 350 V and the etching is performed under the above-described conditions, the anti-oxide film is formed at a poly Si etching rate of 250 nm / min with a duty ratio of 50%. When the selection ratio was 25 and the duty ratio was 15%, a good value was obtained with an oxide film selection ratio of 180 at a poly Si etching rate of 180 nm / min.
[0015]
Furthermore, in combination with this method, it has been found that the plasma power can be reduced by reducing the microwave power in order to realize low damage etching. Specifically, the dielectric breakdown rate could be further reduced by setting the microwave power to 400W. Since the volume of the plasma generation portion (the space from the upper surface of the sample stage 108 to the lower surface of the introduction window 103) of the etching apparatus shown in FIG. 1 is 15000 cc, the microwave rf power per cc is 0.027 W / cc. Even if the volume of the plasma generation portion changes or the method of the etching apparatus changes, the effect of the present invention is further improved if the ratio of the power of the plasma generation power source to the volume of the plasma generation portion is 0.027 W / cc or less.
[0016]
In the known example, a method for on / off control of the high-frequency voltage applied to the sample is described, but there is no description about a method for reducing damage, and analogy of others in the same industry is impossible without the experimental data shown in FIG. is there.
[0017]
Example 2
FIG. 4 shows another apparatus structure to which the present invention is applied. In this apparatus, plasma is generated by inductive coupling at a frequency of a so-called radio wave band (hereinafter referred to as rf) of several hundred kHz to several tens of MHz. The vacuum vessel 403 is made of a material that transmits electromagnetic waves, such as alumina or quartz. Around that, an electromagnetic coil 402 for generating plasma 410 is wound. An rf power source 404 is connected to the coil. A sample stage 408 is provided in the vacuum container 401, and a sample 407 is placed thereon, and a high frequency voltage power source 409 is connected thereto. The vacuum vessel 401 has an upper lid 405, but this may be an integral type.
[0018]
In accordance with the present invention, the high frequency voltage power source 409 was applied to the sample stage 408 by repeating an off period of Vpp 20 V or less and an on period of Vpp 300 V or more. Also in this apparatus, the dielectric breakdown rate by electronic shading measured by the damage evaluation element shown in FIG. 2 was suppressed to 5% or less, and the usefulness of the present invention was found.
[0019]
In the apparatus shown in FIG. 4, the effect is the same even if the electromagnetic coil 402 is installed on the upper lid 405.
[0020]
Example 3
FIG. 5 shows another apparatus structure to which the present invention is applied. In this apparatus, plasma is generated by capacitive coupling of rf power. In the vacuum vessel 501, two electrodes 502 and 505 are arranged in parallel. An rf power source 503 and a high frequency voltage power source 506 are connected to the electrodes, respectively. The sample 504 is placed on an electrode 505 that also serves as a sample stage. The gas is introduced into the container through the introduction tube 508 from the hole opened in the electrode 502 facing the sample. Plasma 507 is generated between the two electrodes.
[0021]
Even in this type of apparatus, the high frequency voltage power source 506 was repeatedly applied to the sample with an off period in which Vpp was 20 V or less and an on period in which Vpp was 300 V or more, thereby preventing damage due to electronic shading.
[0022]
Example 4
Next, an example of the waveform of the high frequency voltage applied to the sample will be described. When Vpp is changed from 20 V or less to 300 V or more, it takes time to rise and fall depending on the performance of the power supply, and a waveform as shown in FIG. 6 is obtained. Between the rise time t1 and the fall time t2, Vpp is between 20V and 300V, that is, a voltage causing dielectric breakdown. The proportion of this period in one cycle was measured to find no problem. As a result, it was found that the effect described in the present invention is obtained if the ratio of the total of t1 and t2 to the period T is 10% or less.
As described above, according to the above-described embodiment, it is possible to prevent the dielectric breakdown of the gate oxide film of the transistor by avoiding the decrease in the etching rate of poly Si and the selectivity to the oxide film.
[0023]
【The invention's effect】
As described above , according to the present invention, it is possible to provide a surface treatment apparatus that reduces damage to elements due to electronic shading.
[Brief description of the drawings]
FIG. 1A is an overall configuration diagram of an apparatus to which the present invention is applied.
(B) It is a voltage waveform figure of a high frequency voltage power supply.
FIG. 2A is a cross-sectional view of a sample for damage evaluation (an explanatory diagram of an electronic shading phenomenon).
(B) It is sectional drawing of a semiconductor wafer.
FIG. 3 is a relationship diagram between a high-frequency voltage amplitude and a gate oxide film dielectric breakdown rate.
FIG. 4 is an overall configuration diagram of an apparatus to which the present invention is applied.
FIG. 5 is an overall configuration diagram of an apparatus to which the present invention is applied.
FIG. 6 is a waveform diagram of a high-frequency voltage.
[Explanation of symbols]
101 ... Microwave power supply, 102 ... Waveguide, 103 ... Introduction window, 104,403,501 ... Vacuum vessel, 105 ... Magnet, 106,410,507 ... Plasma, 107,407,504 ... Sample, 108,408 ... Sample stand, 109,409,506 ... High frequency voltage power supply, 110,508 ... Gas introduction tube , 110 ... voltage waveform, 201 ... resist, 202 ... poly Si layer, 203 ... gate oxide film, 204 ... element isolation oxide film, 205 ... substrate Si, 206 ... electron, 207 ... ion, 208 ... groove bottom, 402 ... electromagnetic coil, 404,503 ... rf power source, 405 ... top cover, 502,505 ... electrode, 601 ... high frequency voltage waveform.

Claims (4)

真空容器と、この真空容器のなかにプラズマを発生させる手段と、前記プラズマにより表面が処理される試料をその上に設置するための試料台と、前記試料に電圧を印加するための電源とを備え、前記電圧は、その振幅が20V以下の期間と300V以上の期間とを有して、これらの期間が交互に繰り返される表面処理装置。A vacuum vessel, means for generating plasma in the vacuum vessel, a sample stage for installing a sample whose surface is treated by the plasma, and a power source for applying a voltage to the sample A surface treatment apparatus in which the voltage has a period in which the amplitude is 20 V or less and a period in which the voltage is 300 V or more, and these periods are alternately repeated. 前記電圧の振幅が100Hzから10kHzの周波数で繰り返される請求項1に記載の表面処理装置。The surface treatment apparatus according to claim 1, wherein the amplitude of the voltage is repeated at a frequency of 100 Hz to 10 kHz. 前記振幅が300V以上の期間が前記繰り返しの1つの期間にしめる割合が5%以上70%以下である請求項1または2に記載の表面処理装置。3. The surface treatment apparatus according to claim 1, wherein a ratio of the period in which the amplitude is 300 V or more is set to one period of the repetition is 5% or more and 70% or less. 4. 前記電圧の振幅を切り替える際の電圧の立ち上がり及び立ち下がり時間の合計が、前記繰り返しの周期の10%以下である請求項1または2に記載の表面処理装置。3. The surface treatment apparatus according to claim 1, wherein the total rise time and fall time of the voltage when switching the amplitude of the voltage is 10% or less of the repetition period. 4.
JP22776797A 1997-08-25 1997-08-25 Surface treatment equipment Expired - Lifetime JP3704423B2 (en)

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