JPH0888343A - Image reader - Google Patents

Abstract

PURPOSE: To reduce capacitance kick noises, and to diminish dark output noises by crossing all of wirings extracted from second input wirings in wirings extracted to an AND circuit from first and second input wirings adjacently formed on the input side and reverse side of the AND circuit respectively over the second input wirings. CONSTITUTION: In an insulating substrate, a plurality of second input wirings E(1-x) are adjoined on the input side of an AND circuit 3, and a plurality of first input wirings D(1-y) are arranged adjacently on the reverse side to the input side of the AND circuit 3. Constitution, in which wirings L(1-x) extracted from the second input wirings E(1-x) in wirings L(1-x) , L(1-y) extracted to an AND circuit 3 from the first and second input wirings D(1-y) , E(1-x) formed through interlayer insulating films are crossed over all second input wirings E(1-x) , is formed. Accordingly, parasitic capacitance in all extracted wirings due to the inter-layer insulating films is equalized, thus simultaneously setting the timing of the rise and fall of driving voltage applied to the input wirings E(1-x) .

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image reading apparatus, and more particularly to an apparatus for reading images on a document such as a facsimile, an image scanner, a digital copying machine, an electronic blackboard in a time series.

[0002]

2. Description of the Related Art In recent years, a charge coupled device (CC) has been used in a document reading unit such as a facsimile.
Instead of the image reading apparatus of the reduction optical system using D), an image reading apparatus generally called a contact image sensor is used. This image reading device has a plurality of one-dimensionally formed photoelectric conversion elements made of a thin film semiconductor such as amorphous silicon a-Si on a glass substrate, and can read an image on a document at the same size. A photodiode is usually used for the photoelectric conversion element,
Since the photocurrent generated in the photodiode is extremely weak, the charge storage method in which the photocurrent is once stored in the junction capacitance of the photodiode and then detected is widely adopted. Here, an example of a matrix driving type image reading apparatus by the charge storage method will be briefly described with reference to the drawings.

As shown in FIG. 15, conventional image reading
The device has a photodiode 50 as a photoelectric conversion element.
There are m × n arrays, and these photodiodes 50 are
The locking diode 52 is connected in series with the opposite polarity.
It These paired photodiodes 50 and blockins
The diode 52 has n blocks B for every m blocks._1.B _2.
... B_nIt is divided into. And the blocking dio
The anode terminal of the cathode 52 is each block B_1.B_2.... B_n
A shift register is provided via a buffer gate 54 common to each
Is connected to each output terminal of the switch 56.

On the other hand, the anode end of the photodiode 50
Child is each block B_1.B_2.... B_nRelatively in the same position between
Common current amplification circuit IV_1.IV_2.… IV
_mThrough the integrator circuit IN_1.IN_2.… IN_mConnected to
There is. Furthermore, the integration circuit IN _1.IN_2.… IN_nTo the sun
Pull-hold circuit SH_1.SH_2.… SH_mAnd multiplex
The service circuit MPX and the amplifier circuit 58 are connected to each other.
Current amplifier circuit IV_1.IV_2.… IV_mAnd the integration circuit IN
_1.IN_2.… IN_mAnd sample and hold circuit SH_1.SH
_2.… SH_mAnd multiplexer circuit MPX and amplifier circuit
58 causes the current flowing out from the photodiode 50.
I_1.I_2.... I_mSignal processing circuit for time integration of
It is configured.

According to this image reading apparatus, as shown in FIG.
Enter the shift register 56 as shown in the time chart.
The applied data input pulse Din is the clock pulse CL
The shift register 56 is sequentially shifted according to K.
The output is sequentially output from each output terminal. This
Block B on each photodiode 50_1.B_2.... B _n
The drive voltage is sequentially applied in units. Drive power
The junction capacitance is applied to the photodiode 50 to which pressure is applied.
Current I corresponding to the optical signal stored in the quantity_1.I_2.
... I_mFlows, each current amplifier circuit IV_1.IV_2.… IV_mTo
Further amplified, further integration circuit IN_1.IN_2.… IN
_mAnd sample and hold circuit SH_1.SH_2.… SH_mWhen,
A signal composed of a multiplexer circuit MPX and an amplifier circuit 58.
Signal from the photodiode 50 by the signal processing circuit
Current I_1.I_2.... I_mIs processed and the output voltage Vout is
can get. In this way, each photodiode 50
The electric signal is stored in the block B by the shift register 56 or the like._1.
B_2.... B_nSequential scanning is performed in units, and
The channels are read at the same time.

As described above, the drive voltage Vd of the matrix drive system by the charge storage method is the shift register output as shown in the time chart.
Therefore, for example, in an A4 size image reading device with 8 elements / mm, the number of elements is 1728, and 32
It is composed of any of channels × 54 blocks, 16 channels × 108 blocks, or 8 channels × 216 blocks, and is usually composed of 16 channels × 108 blocks. However, there is a problem that a large number of shift registers are required in any structure.
Further, when integrated into an IC, analog circuit parts are expensive, and therefore it is necessary to use many inexpensive digital circuits.

[0007]

Therefore, the inventors of the present invention have conducted diligent research to reduce the number of drive gates and provide an efficient and inexpensive image reading apparatus, and as a result, the number of gates on the drive side is extremely small. An invention that can be constructed was conceived and disclosed in Japanese Patent Application No. 5-257792. This image reading device has a matrix configuration on the driving side, and the overall circuit diagram is as shown in FIG. In this figure, the driving side is the first applying means D _1.
D _2. ... D _y and, second applying means E _1. E _2. ... and a matrix of E _x, the first applied through the resistor Rd and Re means D _1.
D _2. The first drive voltage from D _y and the second applying means E
_1. E ₂ .... Photodiode 60 in the first block B _1. B ₂ .... B _n to which the second drive voltage from E _x is simultaneously applied
The signal is read from the. A blocking diode 62 is connected to the photodiode 60 in order to retain the electric charge being accumulated.

On the other hand, essential part circuit of the image reading apparatus, as shown in FIG. 18, the second applying means and provided adjacent to the input side of the resistor on the insulating substrate E _1. E _2. ... E _x and x the input wirings E _(1-x) extending in one direction from the first application means and provided adjacent to the input lines _{E (1-x) D 1.} D 2. ... D y
Y input wirings D _(1-y) extending in one direction from each of the input wirings D _(1-y) and E _(1-x) are provided on the insulating substrate side via an interlayer insulating film to form a resistance Rd, Retrieval wiring L to Re
_(1-x) and L _(1-y) are provided. In such an image reading apparatus, the corresponding photoelectric conversion element is driven only when the first drive voltage and the second drive voltage are simultaneously applied to the resistors Rd and Re as described above. Become.

Then, the above-mentioned Japanese Patent Application No. 5-257792.
Image reading device described in No.
Driven by the chart. As shown,
Line D _(1-y)Input while the first drive voltage is being supplied to
Power wiring E_(1-x)The second drive voltage is applied sequentially from
The photodiode 60 to which the applied voltage of
Signals are sequentially read. However, this first and
And when the second applied voltage rises and falls.
Keying diode capacitance and parasitic capacitance between wirings
Capacitance kick noise from the photodiode
It will be superimposed on the electrical signal and dark output noise will increase.
Would.

Since this capacitance kick noise has opposite polarities when the applied voltage rises and falls, an arbitrary input wiring E _(1-x) and the input wiring to which the second applied voltage is applied next. If the parasitic capacitance at E _(1-x) is the same, as shown in FIG. 20, it is possible to completely cancel and eliminate by setting the timings of the applied voltage rising and falling simultaneously. Become. On the other hand, the lead-out wiring L _(1-x) from the input lines E _(1-x) in FIG. 18, since extends from the place of naturally subject to connection input lines E _(1-x), its length Will be different. However, in such a configuration, the parasitic capacitance between the lead _- out wiring L _(1-x) and the input wiring E _(1-x) is different between the respective lead _- out wirings L _(1-x) . Therefore, as described above, each lead wire L
The parasitic capacitances of _(1-x) were not the same because of their different lengths, and therefore the capacitance kick noise could not be completely canceled out.

[0011]

SUMMARY OF THE INVENTION The present invention solves the above problems and provides an image reading apparatus capable of reducing capacitance kick noise and dark output noise. Such an aspect of the present invention is an image reading apparatus in which a driving voltage is applied to a plurality of photoelectric conversion elements arranged in a one-dimensional array on an insulating substrate to read an electric signal of the photoelectric conversion elements. Is divided into a plurality of blocks by a predetermined number, and a first application unit for applying a first drive voltage in units of the predetermined number of photoelectric conversion elements in the block, and photoelectric conversion selected from each block. A second applying unit for applying a second drive voltage in units of elements, and the first drive voltage and the second drive voltage are input, while an electric signal from the photoelectric conversion element is output. In an image reading device having a logical product circuit, a plurality of second input wirings from a second applying means extending in one direction are provided adjacent to the input side of the logical product circuit on the insulating substrate, and No. extending in the direction The plurality of first input wirings from the applying means are arranged adjacent to each other on the side opposite to the input side of the AND circuit in the second input wirings. Out of the lead wires from the first and second input wires to the AND circuit provided on the insulating substrate side of the wires via the interlayer insulating film, at least the lead wires from the second input wire are all second wires. The image reading apparatus is characterized in that the input wiring is crossed.

[0012]

The present invention is configured as described above, and a plurality of second input wires from the second applying means extending in one direction are provided adjacent to the input side of the AND circuit on the insulating substrate. Further, in the plurality of first input wirings from the first applying means extending in one direction, the plurality of first input wirings are arranged adjacent to each other on the side opposite to the input side of the AND circuit in the second input wiring, First
And out of the lead wires from the first and second input wires to the AND circuit provided on the insulating substrate side of the second input wire via the interlayer insulating film, at least the lead wire from the second input wire is , And the second input wirings are crossed, the parasitic capacitances in all the extraction wirings due to the interlayer insulating film are the same.

[0013]

EXAMPLES The details of the present invention will be described below based on specific examples. FIG. 1 shows a main circuit of an image reading apparatus of the present invention, and FIG. 2 shows a schematic diagram of the entire circuit. The illustrated example is an image reading apparatus in which a driving voltage is applied to a plurality of photoelectric conversion elements 1 arranged one-dimensionally on an insulating substrate to read an electric signal of the photoelectric conversion elements 1, and the photoelectric conversion elements 1 are Is divided into a plurality of blocks C _1. C ₂ .... C _y for each predetermined number, and the blocks C _1. C ₂ .
first applying means for applying a first drive voltage in units of photoelectric conversion element 1 of the predetermined number in the _y D _1. D _2. ... D _y
And a second applying means E _1. E ₂ .... E for applying a second drive voltage in units of the photoelectric conversion element 1 selected from each block.
_In the image reading device 5 having _x and including the first drive voltage and the second drive voltage as input and outputting the electric signal from the photoelectric conversion element 1, an insulating substrate in the above, the second applying means extending in one direction E _1. E _2. ... plurality of second input lines E from E _x
(1-x) is provided adjacent to the input side of the AND circuit 3, and the plurality of first input wirings from the first applying means extending in one direction are provided with the second input wiring E. Arranged adjacently on the side opposite to the input side of the AND circuit 3 in _(1-X) ,
First and second input lines D _(1-y), E is provided with an interlayer insulating film on the insulating substrate side of the _(1-X), first and second input lines D _(1-y), E _(1-X) from the take-out wiring to the logical product circuit 3 L _(1-X), of the L _(1-y), the lead-out wiring L ₍₁ from at least a second input lines E _{(1 -X) -X)} represents the image reading device 5 characterized in that it crosses all the second input wirings E _(1-X) . Here, as the photoelectric conversion element 1, one in which a photodiode 7 and a blocking diode 9 are connected in series with opposite polarities is used.

[0014] Then, across the second lead-out wiring L _(1-X) from the input lines E _(1-X) is all the second input lines E _(1-X) As shown in FIG. 1 Therefore, the parasitic capacitances in all the lead-out lines L _(1-X) due to the interlayer insulating film are the same. Therefore, as shown in FIG. 20, capacitance kick noise can be reduced by setting the timing of the rise and fall of the second drive voltage sequentially applied to the input wiring E _(1-x) at the same time. It can be completely offset. Then, it was confirmed that such a structure almost completely cancels the dark output noise caused by the conventional capacitance kick. Data on the effect of reducing the dark output noise according to the present invention is shown in the following FIG. The figure shows nine second applying means E _1.
E _2. The dark output of the photodiode 7 corresponding to E _x is
It is a comparison between the conventional circuit pattern and the circuit pattern of the present invention. In the figure, the white circles represent the present invention and the black circles represent the conventional example. Since the dark output is represented by the output from the amplifier, the unit is mV. As for FIG. 4, the second applying means E _1. E ₂ .... E of the image reading apparatus used in this test.
₁ schematically shows the structure of a take-out wiring L _(1-X) from _x , where (a) is the present invention and (b) is a conventional example.
As shown, as the conventional example sequentially proceeds E _1. E _2. ..., the lead-out wiring L and _(1-X) a second application means E _1. E _2. ...
Whereas superimposed intersection of the input lines E _(1-x) from E _x is increasing, as is that of the present invention described above, the input lines in any of the lead-out wiring L _(1-X) E _(1-x)
The number of overlaps with and is constant. In this way, since the parasitic capacitances of all the lead _- out lines L _(1-X) are all the same, the timing of the rise and fall of the second drive voltage sequentially applied to the input line E _(1-x) The capacitance kick noise can be completely canceled and removed by setting so as to be at the same time.

Hereinafter, such an image reading apparatus of the present invention will be described.
The overall configuration including the operation of the
Keep it. More specifically, the one in FIG. 2 is arranged in one dimension.
The plurality of photoelectric conversion elements 1 that have been converted into n first block
Cook B_1.B_2.... B_nThe first block of the one
B_(n)The drive voltage is set in units of m photoelectric conversion elements 1 in
The electrical signals of the photoelectric conversion element 1 are applied in order and read.
The image reading device 5 to be output,
n first blocks B_1.B_2.... B_nDrive voltage in order
The driving side to be applied is the y second blocks C for every x number.
_1.C_2.… C_yThe second block C is divided into_1.C
_2.… C_yX first blocks B in_1.B _2.... B_nIn units
First applying means D for sequentially applying the first drive voltage to_1.
D_2.... D _yAnd each second block C_1.C_2.… C_yRelative between
Block B at the same position_1.B_2.... B_nIn units
Second applying means E for sequentially applying the second drive voltage to the_1.
E _2.… E_xAnd the first drive voltage and the second drive voltage
Is the first block B at the same time_1.B_2.... B_nWhen applied to
The first block B_1.B_2.... B_nPhotoelectric conversion elements
Resistors Rd and R for applying a drive voltage for driving 1 as a unit
An image reading device 5 including e and a logical product circuit
An adder circuit composed of resistors Rd and Re as 3
Is. Here, in the present invention, the first applying means D_1.D_2.…
D_yAnd second applying means E_1.E_2.… E_xDrive voltage from both
The signal is read from the photodiode 7 only when is input.
The logical product circuit 3 referred to in the present invention has a configuration that is found.
Is the first applying means D _1.D_2.... D_yAnd second applying means
E_1.E_2.… E_xPhotodio only when both are "ON"
It means that the card 7 is "ON".
It Therefore, as described above, the voltage of the two resistors Rd and Re
Is addition, that is, the first applying means D_1.D_2.... D_yAnd the second
Applying means E_1.E_2.… E_xWhen voltage is applied to both
The threshold voltage is reached only at the
The configuration to be performed is also included in this. That is,
The diode 7 has a first applying means D._1.D_2.... D_yAnd the
2 applying means E_1.E_2.… E_xBoth added voltage of
Therefore, it is expressed as an adder circuit.

Further, in the image reading apparatus according to the present embodiment, m × n photodiodes 7 as photoelectric conversion elements 1 and blocking diodes 9 connected in series to them in reverse polarity are arranged one-dimensionally. However, it is divided into _n first blocks B _1. B ₂ .... B _n with the m photodiodes 7 and the blocking diodes 9 as one unit. The photodiode 7 and the blocking diode 9 are formed by stacking thin film semiconductors such as amorphous silicon a-Si in a pin structure or the like, and may have the same structure or different structures. It may be.

The anode terminals of these photodiodes 7 are connected to the common matrix wiring 11 at the relatively same positions among the first blocks B _1. B ₂ .... B _n . A current amplifier circuit, an integrating circuit, a sample hold circuit, a multiplexer circuit, etc. are usually connected to the output terminals of these matrix wirings 11,
The current I _1. I ₂ .... I _m flowing in each photodiode 7 is time-integrated and serially output.

On the other hand, each anode of the blocking diode 9 is
The terminal is the first block B of each_1.B _2.... B_nCommon to each
Connected to the common wiring 13 and further divided into n
First block B_1.B_2.... B_nIs the y second for every x
Block C_1.C_2.… C_yIt is divided into. And each
Second block C_1.C_2.… C_yX of each of the first
Rock B_1.B_2.... B_xThe first drive voltage in order
First block B so that it can be applied_1.B_2.... B_xCommon
The wiring 13 is a common input wiring via each resistor Rd.
D_(1-y)Via the first applying means D_1.D_2.... D_yConnected to
Has been done. Furthermore, each second block C_1.C_2.… C_ywhile
The first block B relatively located at the same position_1.B_2.... B_x
The common wiring 13 of each of the
Power wiring E _(1-x)Via the second applying means E_1.E_2.… E_x
Is connected to the second drive voltage to the second block C._1.C_2.…
C_yFirst block B in_1.B_2.... B_xIndividually and in order
It is configured to be applied to.

FIG. 5 shows a cross section of the main part of the image reading device 5 of the present invention. Such a structure is manufactured as follows. First, a lower electrode film serving as a lower electrode by depositing chromium or the like on an insulating substrate 15 such as a glass substrate, a semiconductor film in which amorphous silicon a-Si is sequentially deposited in a pin structure or the like, and an upper transparent electrode. A transparent conductive film made of, for example, ITO is laminated in order. Here, the thickness of the lower electrode film is about 100 to
1000Å, the thickness of the semiconductor film is about 7,000 to 12,000
Å, the transparent conductive film is deposited so as to have a thickness of about 200 to 800 Å, but the film thickness is adapted to the set resistance value and is not particularly limited.

After that, the upper transparent electrode 17 and the semiconductor layer 1 are etched by photolithography in the reverse order.
9 and the lower electrode 21 to form the photodiode 7
And the blocking diode 9 are formed. Then, when forming the lower electrode 21, the lead-out wiring 2 for connecting to the matrix wiring 11 at the same time as the lower electrode 21.
3 and the common wiring 13 and resistors Rd and R that follow integrally with it
e and the extraction wirings L _(1-X) and L _(1-Y) connected to the input wirings D _{(1- y)} and E _{(1-x )} are integrally formed. Here, since the resistors Rd and Re are formed by the same lower electrode film as the lower electrode 21 and the like, the line width, the line width, and the line length are set to be sufficiently thin and sufficiently long so that the resistors can function as resistors. The adder circuit formed by the resistors Rd and Re is made of the material of the lower electrode 21, and when chromium is used, for example, its specific resistance is 60 μΩ · cm, and if a resistor of width 10 μm × length 7 mm × thickness 1000 Å is created. 4.2
A resistance value of KΩ is obtained.

Next, a transparent interlayer insulating film 25 made of silicon oxide SiOx or the like is deposited on the insulating substrate 15 on which the photodiode 7 and the like are formed, and then contact holes 27 are formed at predetermined positions by photolithography. Form. Next, a metal film made of aluminum or the like is deposited on the transparent interlayer insulating film 25, and then the metal film is etched by photolithography to connect the photodiode 7 and the blocking diode 9 to each other.
9 and the matrix wiring 11 and the input wirings D _{(1 -y)} and E _(1-x) are formed. And finally silicon nitride Si
The insulating protective film 31 made of Nx or the like is applied, and the image reading device 5 according to the present embodiment is manufactured. Here, the thickness of the transparent interlayer insulating film 25 is about 12,000 to 18,000Å,
The thickness of the metal film is about 12,000 to 18,000 Å, and the thickness of the insulating protective film 31 is about 3,000 to 8,000 Å, but it is not particularly limited.

Next, the image reading apparatus having the above configuration
The operation of will be described. First, an arbitrary first block B_1.B_2.
... B_nAny pair of photodiodes 7 and
As shown in FIG.
Resistor Rd and resistor Re are connected to form an adder circuit
Has been done. Therefore, as shown in (b), the input terminal D
_(y), E_(x)From the first drive voltage D = 5V,
When the driving voltage E = 5V of 2 is input, the potential Vd at the point B
Is 5 V, which means a read state. Next, the first drive voltage
When the pressure D = 0V and the second drive voltage E = 0V, the point B
Has a potential Vd of 0V, D = 0V, E = 5V, and
When D = 5V and E = 0V are input, the potential V at point B
d is 2.5, and both are stored and read.
It will not be done.

By the way, when the potential Vd at the point B is 2.5 V, the photodiode 7 and the blocking diode 9 are
If the potential V _PD between and is not lower than 2.5 V, no problem will occur. If the light incident on the photodiode 7 is too strong, the potential V _PD is 2.5.
Even if it is V, it will be read. But,
Even in this case, reading can be avoided by shortening the accumulation time, that is, by increasing the speed.

[0024] These input terminal D _1. D _2. ... D _y and input terminals E _1. E _2. ... E _x, which is the output terminal of the shift register via buffer gates, not shown, each connected, Including these, the first applying means and the second applying means are respectively configured. Therefore, the shift register used is a total of (x + y) stages of flip-flops, and the number of gates is significantly reduced as compared with the conventional shift register equipped with n (= x × y) stages of flip-flops. be able to.

In such an embodiment, the resistors Rd and Re used are the input terminals D _1. D ₂ .... D _y and the input terminal E.
_1. E ₂ .... The number of resistors Rd is y and the number of resistors R corresponds to the number of E _x.
e is x and resistance is Rd = Re = R, the first or second
If the drive voltage of V is V, the consumption current is (y-1) / 2R × V on the input terminal D _(y) side and (x-1) / 2R × V on the input terminal E _(x) side. . So, for example, 8
ch analog (220 blocks) y = 10, x = 22
With a matrix of Rd = Re = R = 10
If KΩ and the first or second drive voltage is V = 5v, the current consumption on the input terminal E _(x) side is 5.25 mA, the input terminal D
_The current consumption on the _(y) side is 2.25 mA. Therefore, the resistors Rd and Re to be used are determined in reverse from this, and several KΩ ~
Several tens of KΩ is preferable.

Here, more specifically, the resistance values of the resistors Rd and Re that can be used in the adding circuit of the image reading apparatus 5 will be obtained. As shown in FIG. 7A, a case where an image reading device of 1 block and 8 channels is driven by a driving voltage of 5V will be described as an example. First, the size of the photodiode PD, which is the photoelectric conversion element 1, is 110 μm square, and the size of the blocking diode BD is 33 μm square. The lower electrode is made of chrome and the upper transparent electrode is made of ITO. Silicon a-
A semiconductor layer was formed by depositing 9000Å Si. When the obtained image reading device was driven with a driving voltage of 5 V,
The capacitance kick current I flowing in the one block was measured and found to be about 5.7 μA. Therefore, in the image reading apparatus, it is preferable to set the resistance values of the resistors Rd and Re so that the influence of the capacitance kick current I can be removed from the reading current.

On the other hand, the image reading apparatus is shown in FIG.
In the mode shown in ₍₁₎ , that is, when the driving voltage 5V is applied to the input terminal E _(x) and the input terminal ₍ D _{) (y)} , and in the mode shown in (c) of the figure, that is, the input terminal D Drive voltage 5V is applied to _(y) while input terminal E
_{When (x)} is 0V or in the mode shown in (d) of the figure,
That is, when the input terminal E _(x) and the input terminal D _(y) are 0V, the image reading device is not driven. here,
When the image reading device is driven, the resistance is Rd = R
When e = R, the total resistance value in the adder circuit is R / 2. When the total resistance value (R / 2) of the adder circuit when driving the image reading apparatus is small, the driving power consumption becomes large, and therefore the larger resistance value is preferable. However, if the resistance value is too large, the delay time becomes long. Therefore, the total resistance value (R / 2) of the adding circuit is preferably about 100 KΩ or less.

The mode shown in FIG. 7C when the image reading device is not driven occurs when the mode is switched from the mode shown in FIG. 7B when it is driven. At this time, the capacitance kick current I Flows. Note that, hereinafter, only the capacitance kick current I having a constant capacitance due to the junction capacitance of the blocking diode BD is targeted, and consideration is given to canceling this in relation to the driving method.
Since the image reading device should not be driven by the capacitance kick current I, it is necessary to select the resistor R which is a resistance value capable of flowing the capacitance kick current I to the ground in the mode shown in FIG. is there.
For safety, this resistor R is a capacitance kick current I
It is preferable to set such that a current of several times or more (about 5.7 μA) can flow. Therefore, assuming that a current that is 5 times the capacitance kick current I can flow, the resistance value of the resistor R is about 88 KΩ, and similarly, assuming 10 times, it is about 44 KΩ. This resistance value satisfies the above condition of the resistance value of the resistor R when the image reading apparatus is driven, and the resistance value of the resistor R is about 88 KΩ.
Then, the total resistance value during driving is about 44 KΩ, the capacitance kick current I can be sufficiently flowed during driving, and the voltage drop due to this current I (about 5.7 μA) is about 0.25 V. Therefore, it is very small with respect to the driving voltage of 5 V and does not affect the characteristics. Therefore,
It is preferable to select a resistor R having a resistance value capable of flowing a current five times or more of the capacitance kick current I in the mode shown in FIG.

Next, the operation of this image reading apparatus is shown in the time chart shown in FIG. 8B, taking the image reading apparatus 33 shown in FIG. 8A in which the driving side is formed into a matrix of 3 × 3 as an example. Based on the explanation. The image reading device 33 is a simplified version of the image reading device 5 shown in FIG. 1 and FIG. 2 and has the same configuration, so the description thereof will be omitted.

The output terminals of the shift register are connected to the input terminals D1, D2, D3 and the input terminals E1, E2, E3 constituting the first and second applying means of the image reading device 33 via buffer gates, respectively. However, the data input pulse input to the shift register is sequentially shifted in the shift register according to the clock pulse CLK, and is sequentially output from each output terminal of the shift register.

That is, the first drive voltage sequentially input from the input terminals D1, D2, D3 is passed through the resistor Rd to the first blocks B1, B2, B3, the first blocks B4, B5, B6 and the first blocks B4, B5, B6, respectively. It is applied to the photoelectric conversion elements of one block B7, B8, B9. Here, the timing of sequentially inputting the first drive voltage is such that the rising edge and the falling edge coincide. On the other hand, the second drive voltage sequentially input from the input terminals E1, E2, E3 is passed through the resistor Re to the first block B1, B4, B7 and the first block B, respectively.
2, B5, B8 and the photoelectric conversion elements of the first blocks B3, B6, B9. Here, the timing of sequentially inputting the second drive voltage is such that the rising edge and the falling edge coincide.

As a result, the first drive voltage sequentially input from the input terminals D1, D2, D3 and the input terminals E1, E
The second drive voltage sequentially input from E2 and E3 are added by an adder circuit including resistors Rd and Re, respectively, and when a predetermined applied voltage is reached, the first block B
The photoelectric conversion elements 1, B1 ... B9 are driven. Therefore, for example, when the first drive voltage is input from the input terminal D1, the input terminals E1, E2, E
By shifting and applying the second drive voltage in order from 3, the photoelectric conversion elements in the first blocks B1, B2, B3 are driven in order. Similarly,
When the first drive voltage is input from the input terminal D2, the second drive voltage is sequentially shifted and applied from the input terminals E1, E2, and E3 to apply the first drive voltage to the first blocks B4, B5, B6. The photoelectric conversion elements therein are driven in order.

The image reading device 33 is driven in this manner, but as described above, the first and second image reading devices 33 are driven.
At the timing of the driving voltage of the first block B1, when the rising and the falling are matched and the values of the resistors Rd and Re are matched, in order from T1 to T2 and from T2 to T3, B2, B2 and B3
The amount of change in the applied voltage between the above and the like is as shown in the lower part of Table 1. As a result, the first blocks B1, B1 ...
The sum of the changes in the applied voltage for each B9 is 0, that is, it is canceled between the blocks, and noise is not output.

[0034]

[Table 1]

Although one embodiment of the image reading device 5 according to the present invention has been described in detail above, the present invention is not limited to the above-mentioned embodiment and can be implemented in other modes.

For example, as shown in FIGS. 9 and 10, the image reading device 35 is connected to m × n photodiodes 7 as photoelectric conversion elements 1 in series with reverse polarity to them, as in the above-described embodiment. Blocking diode 9
And are arranged in one dimension. Each of the anode terminals of the photodiode 7 and each of the anode terminals of the blocking diode 9 have substantially the same configuration as the above-described embodiment, and the matrix wiring 11 and the input wirings D _(1-y) , E _{(1- x)} . That is, in the image reading device 35, the resistors Rd and Re connected to the common wiring 13 of the blocking diode 9 are connected.
And the input wirings D _(1-y) and E _(1-x) are formed at the same time as the connection electrode 29 that connects the upper transparent electrodes of the photodiode 7 and the blocking diode 9, and these are formed in the transparent interlayer insulating film 25. The contact holes 27 are connected to the extraction wirings L _(1-x) , L _(1-y) and Lp.

In the method of manufacturing the image reading apparatus 35 having such a structure, the photodiode 7 and the blocking diode 9 are formed on the insulating substrate 15 by a conventional method, and
Lead wire 2 is formed from the lower electrode 21 of the photodiode 7.
3 is integrally formed, and the extraction wiring Lp and the extraction wirings L _(1-x) and L _(1-y) extending from the common wiring 13 of the blocking diode 9 are integrally formed. Then, after forming a contact hole 27 in the transparent interlayer insulating film 25 deposited on these photodiodes 7 etc., a metal film such as aluminum is deposited, and this metal film is etched by a photolithography method or the like. The connection electrodes 29, the matrix wiring 11, and the contact holes 2.
The input circuit D _(1-y) and E _(1-x) is formed with the addition circuit by the resistors Rd and Re connected via 7. After that, the insulating protective film 31 is applied and the image reading device 35 is manufactured. Image reading device 35 having such a configuration
The adding circuit formed by the resistors Rd and Re in FIG.
When aluminum is used, the specific resistance is 3 μΩ · cm and the width is 10 μm.
If you make a resistor of m × length 7mm × thickness 1000Å,
A resistance value of 210Ω is obtained.

Next, as shown in FIG. 11 and FIG. 12, an adding circuit formed by resistors Rd and Re in the image reading device 37 is provided on the semiconductor layer 19 made of amorphous silicon a-Si or the like, and the photodiode 7 or the like is provided thereon. Transparent electrode 1
It is also possible to use ITO or the like for forming 7. That is, a lower electrode film that forms the lower electrode 21, a semiconductor film that forms the semiconductor layer 19, and a transparent conductive film that forms the upper transparent electrode 17 are sequentially deposited on the insulating substrate 15, and then a photo film is formed in the reverse order. When the upper transparent electrode 17 and the like are formed by etching by the lithography method, the resistances Rd and Re are simultaneously formed by the transparent conductive film made of ITO or the like.
Is formed. Since the transparent conductive film made of ITO or the like has a relatively high resistance value, the resistances Rd, R having a desired resistance value are obtained.
There is an advantage that it is easy to configure e. That is, for example, the specific resistance of ITO is about 500 μΩ · cm, and the width is 10
If a resistor of μm × length 7 mm × thickness 1000 Å is made, a resistance value of about 35 KΩ is obtained.

In this structure, the adder circuit including the resistors Rd and Re is laminated on the lower electrode film 21a forming the lower electrode 21 and the semiconductor layer 19.
By irradiating the resistors Rd and Re with light, a photoelectromotive force is generated. Therefore, in the upper part of the resistors Rd and Re,
The light shielding film 39 may be provided via the transparent interlayer insulating film 25. Further, since the lower electrode film 21a exists as a common line in the adding circuit portion formed by the resistors Rd and Re, a terminal is provided on the lower electrode film 21a and a reverse bias voltage is applied to the semiconductor layer 19 thereon, or 0 is applied. It is preferable to ground to (zero) V.

Further, in such a configuration, the resistors Rd, R
The semiconductor layer 1 formed under the adder circuit section composed of e
As shown in FIG. 12, 9 may be etched into a pattern different from the pattern of the resistors Rd and Re, but in order to simplify the step of forming the resist film, the semiconductor layer 19 is formed.
Needless to say, it may be etched into the same pattern as the pattern of the resistors Rd and Re.

In the image reading device 37, the adder circuit composed of the resistors Rd and Re formed on the semiconductor layer 19 is covered with the transparent interlayer insulating film 25 as shown in FIG. , Re and the input wirings D _{(1 -y)} and E _(1-x) for supplying a driving voltage to the resistors Rd, Re are provided with contact holes 27 formed in the transparent interlayer insulating film 25 and extraction wirings L _{(1- x)} , L _(1-y) and the connection electrode Lp. On the other hand, the common wiring 13 formed at the anode terminal of the blocking diode 9 and the resistors Rd and Re
Are connected by a connection electrode Lp via a contact hole 27 formed in the transparent interlayer insulating film 25.

Although the typical embodiments of the image reading apparatus according to the present invention have been described above in detail, the image reading apparatus according to the present invention is not limited to the above-described embodiments.
It can also be implemented in other modes.

Next, as shown in FIGS. 13 and 14, resistors Rd and R forming an adder circuit of the image reading device 43.
e is the counter electrodes 45, 47 and amorphous silicon a-Si
It is also possible to use a resistor 49 composed of a semiconductor layer such as. That is, the counter electrodes 45 and 47 are formed integrally with, for example, the common wiring 13 and the like, and the counter electrodes 45 and 47 are covered with a semiconductor layer forming the photodiode 7 or the like and used as resistors. . The electric conductivity of a semiconductor such as amorphous silicon a-Si is about 10 ³ to 10 ⁻⁸ (Ω · cm) ⁻¹ , and by adjusting the distance between the opposing electrodes 45 and 47 and the opposing length,
The required resistance value can be set appropriately.

In the image reading apparatus according to this structure, the counter electrode can be formed by the upper transparent electrode made of ITO or the like. The semiconductor used as the resistor may be a p-type semiconductor, an n-type semiconductor, an i-type semiconductor, or the like. For example, the electric conductivity is about 10 ³ to 10 ⁻⁸ (Ω · cm) ^−1. Alternatively, a semiconductor having a relatively high electric conductivity such as n-type hydrogenated microcrystalline silicon may be deposited and used. Note that n-type hydrogenated microcrystalline silicon is obtained by doping hydrogenated microcrystalline silicon with phosphorus P or an element of Group 5 of the periodic table.

Further, in the above embodiment, the counter electrodes 45 and 47 forming the resistance are formed by the lower electrode film deposited on the insulating substrate 15. However, one of the counter electrodes is formed by the lower electrode film. It is also possible to form the other by the upper transparent electrode film. In this example, it is preferable that, for example, the i-type semiconductor layer or the like of the semiconductor layers forming the resistor, that is, the p-type semiconductor layer, the i-type semiconductor layer, or the n-type semiconductor layer is not deposited.

Although the image reading apparatus according to the present invention has been described above with reference to the drawings, it goes without saying that the present invention is not limited to the illustrated embodiments.

For example, in the above-mentioned embodiment, the cathode terminals of the photodiode 7 and the blocking diode 9 are connected to each other, but conversely, the anode terminals of the photodiode 7 and the blocking diode 9 are connected to each other, and the photodiode 7 is connected. The cathode terminal of the blocking diode 9 may be connected to the resistor forming the adding circuit, and the cathode terminal of the blocking diode 9 may be connected to the current amplifying circuit. The present invention can also be applied to a type that is selectively driven by a TFT or the like instead of the blocking diode 9. Further, not only the contact type but also the so-called perfect contact type image reading apparatus can be naturally applied.

In addition, in the present invention, in addition to the charge storage type in which a capacitance kick is likely to occur, the photoelectric conversion element 1 is provided with CdS.
The present invention can be carried out in a mode in which various improvements, modifications and variations are made based on the knowledge of those skilled in the art, such as being applicable to a photoconductive type using -CdSe and the like, without departing from the spirit of the invention.

[0049]

As described above, according to the present invention, the following excellent effects can be obtained as described in the section of the operation. On the insulating substrate, a plurality of second input wirings from the second applying means extending in one direction are provided adjacent to the input side of the AND circuit, and a plurality of second input wirings from the first applying means extending in one direction. In the first input wiring of the book, the second input wiring is arranged adjacently on the side opposite to the input side of the AND circuit, and is arranged on the insulating substrate side of the first and second input wirings. Among the lead wires from the first and second input wires to the AND circuit provided via the interlayer insulating film, at least the lead wire from the second input wire crosses all the second input wires. With such a configuration, the parasitic capacitances in all the extraction wirings caused by the interlayer insulating film are the same. Therefore, it is possible to almost completely cancel and eliminate the capacitance kick noise due to the parasitic capacitance of the take-out wiring only by matching the timings of the fall of the second drive voltage and the rise of the next second drive voltage. it can. This is because the extraction wirings have different lengths in the related art, that is, the extraction wirings have become longer in sequence, so that they correspond to the second driving voltage and the second driving voltage. Where there was a constraint that the drive voltage had to be applied in order so that the difference in parasitic capacitance between the two lead-out wirings was reduced, in the present invention, since the parasitic capacitances of all the lead-out wirings are the same, This means that it is not necessary to consider the application order, and as a result, the degree of freedom in selecting the driving method can be greatly improved.

Further, the image reading apparatus of the present invention can be combined with the method of reducing the leading noise at the time of reading and the noise caused by the junction capacitance of the photodiode as described above, which has been a problem from the past. It is possible to reduce the noise due to the capacitance in the charge storage type at an extremely high level.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing a circuit example of a main part of an image reading apparatus of the present invention.

FIG. 2 is a schematic explanatory view showing an entire circuit of the image reading apparatus of the present invention.

FIG. 3 is an explanatory diagram showing a dark output noise reducing effect of the image reading apparatus of the present invention.

4A and 4B are explanatory diagrams showing a configuration of a take-out wiring used for a test of a dark output noise reduction effect by the image reading apparatus of the present invention, in which FIG. 4A is the present invention, and FIG. 4B is a comparative conventional example. Represent

5A and 5B are explanatory views showing an example of a sectional structure of a main part of the image reading apparatus of the present invention, in which FIG. 5A is a sectional view taken along line AA in FIG.
(B) is the same BB sectional view

6A and 6B are explanatory diagrams showing an operation mode of the image reading apparatus of the present invention, FIG. 6A is a logical product circuit using an adder circuit, and FIG.
Represents the change in the voltage applied to the anode of the blocking diode as the drive voltage changes.

FIG. 7 is an explanatory diagram showing an operation mode of the image reading apparatus of the present invention, in which (a) is an explanatory circuit diagram and (b) to (d) are first diagrams.
And an equivalent circuit associated with a change in the second drive voltage, respectively.

8A and 8B are explanatory diagrams showing an operation mode of the image reading apparatus of the present invention, in which FIG. 8A is an explanatory circuit diagram and FIG. 8B is a timing chart.

FIG. 9 is an explanatory diagram showing a circuit example of a main part of the image reading apparatus of the present invention.

10 is an explanatory diagram showing an example of a sectional structure of a main part of the image reading apparatus of the present invention, which is a sectional view taken along the line AA of FIG.

FIG. 11 is an explanatory diagram showing an example of a main circuit of the image reading apparatus of the present invention.

12 is an explanatory diagram showing an example of a sectional structure of a main part of the image reading apparatus of the present invention, in which (a) is a sectional view taken along line AA of FIG.
(B) shows the same BB sectional drawing, respectively.

FIG. 13 is an explanatory diagram showing a circuit example of a main part of the image reading apparatus of the present invention.

FIG. 14 is an explanatory diagram showing an example of a sectional structure of a main part of the image reading apparatus of the present invention, which is a sectional view taken along line AA of FIG.

FIG. 15 is a schematic explanatory diagram showing an entire circuit of a conventional image reading device.

FIG. 16 is a drive timing chart of a conventional image reading device.

FIG. 17 is a schematic explanatory view showing an entire circuit of an image reading apparatus already proposed by the applicant.

FIG. 18 is an explanatory diagram illustrating an example of a main circuit of the image reading apparatus in FIG.

FIG. 19 is a drive timing chart of the image reading apparatus in FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Photoelectric conversion element 3 AND circuit 5, 33, 35, 37, 41, 43 Image reading device 7, 50, 60 Photodiode 9, 52, 62 Blocking diode 11 Matrix wiring 13 Common wiring 15 Insulating substrate 17 Upper transparent electrode 19 Semiconductor layer 21 Lower electrode 23 Lead wiring 25 Transparent interlayer insulating film 27 Contact hole 29 Connection electrode 31 Insulation protective film 39 Light-shielding film 45, 47 Counter electrode 49 Resistor 54 Buffer gate 56 Shift register 58 Amplifying circuit D _1. D ₂ . D _y First applying means (input terminal) E _1. E ₂ .... E _x Second applying means (input terminal) L _(1-x) , L _(1-x) take _- out wiring

Claims (1)

[Claims] 1. An image reading apparatus in which a driving voltage is applied to a plurality of photoelectric conversion elements arranged in a one-dimensional manner on an insulating substrate to read an electric signal of the photoelectric conversion elements, and the photoelectric conversion elements are predetermined. Each block is divided into a plurality of blocks, and a first application unit that applies a first drive voltage in units of the predetermined number of photoelectric conversion elements in the block, and a photoelectric conversion element selected from each block. A second application unit for applying a second drive voltage to each unit, and a logical product that outputs the electric signal from the photoelectric conversion element while inputting the first drive voltage and the second drive voltage. In an image reading device having a circuit, a plurality of second input wirings from a second applying means extending in one direction is provided adjacent to the input side of the AND circuit on the insulating substrate, First application extending The plurality of first input wirings from the means are arranged adjacent to each other on the side opposite to the input side of the logical product circuit in the second input wirings. Out of the lead wires from the first and second input wires to the AND circuit provided on the insulating substrate side via the interlayer insulating film, at least the lead wires from the second input wire are all second input wires. An image reading device characterized in that it crosses wiring.