JPH08179994A - Computer system - Google Patents

Abstract

PURPOSE: To provide a system low in cost and high in reliability by applying change only to add respective error check mechanisms by duplicating main memory and always storing information of the same content in both main memories. CONSTITUTION: A CPU 3 makes an external data write processing part 4 read in first prescribed program data and numeric data from an external memory device FDD1 or HDD2, and write them on the same addresses of the main memories M1, M2, respectively. In the execution of an intruction, when no error is detected in the parity check of the instruction read out from the main memory M1 on a master side, however, noncoincidence occurs as a result of comparison of the same instruction by reading out from the main memory M2 on a slave side, read/write check processing is performed on both main memories M1, M2. When a read/write error is detected in either main memory M1 or M2, the instruction of the main memory M1 or M2 on a normal side in which no error is detected is executed.

Description

Detailed Description of the Invention

[0001]

This invention relates to computer systems.

[0002]

2. Description of the Related Art Generally, a computer system is generally provided with a main memory for reading a program executed by a CPU and data required for arithmetic processing from an auxiliary storage device and storing the data, and temporarily writing data of the arithmetic processing result of the CPU. Has been.

[0003]

The main memory is an important part for the computer system to execute the arithmetic processing of various programs, but an error occurs with a certain probability in the DRAM which is widely used as the main memory. Is inevitable. However, since the conventional computer system was provided with only one main memory area, if the error check function detects that an error has occurred in the main memory, the system must be immediately shut down. If such an error occurs during the execution of various calculations, there is a problem that the calculations must be restarted from the beginning after the system is restarted.

Therefore, in order to improve the reliability of the computer system, the system has conventionally been duplicated,
The same system is installed in two systems, the same input signal is input to each system at the same time, the necessary data is read from each external storage device, the operation is executed in parallel, and the obtained result is obtained from each external device. Although it is stored in the storage device, one of the systems is set as the master and the other is set as the slave, and normally, the display result, plant control, alarm notification, etc. are mainly performed by using the calculation result of the system on the master side. When an abnormality occurs in the system on the master side, the system on the slave side up to that point is immediately switched to the master side for use to improve reliability.

However, in such a conventional duplex system, since the external storage device and the CPU are all duplicated, it is necessary to purchase two units of the device itself, resulting in a high cost and a device cost. There was a problem that the installation space was almost doubled.

The present invention has been made in view of the above-mentioned problems of the prior art, and a low cost and highly reliable system can be obtained by simply duplicating the main memory and adding an error check mechanism for each. It is an object to provide a computer system that can be realized.

[0007]

According to a first aspect of the present invention, there is provided a computer system including a dual main memory and a CP.
In response to a write command from U, an information writing processing unit that writes the same information in parallel to each of the duplicated main memories, an error check unit that performs an error check of each duplicated main memory, and an error check unit. When an error of the main memory currently being used as the master is detected, the main memory on the slave side is switched to the master side and is used as a memory switching processing unit.

[0008]

According to the computer system of the invention of claim 1,
The main memory is duplicated so that the programs and data executed by the CPU are written in parallel to the respective main memories at the same time so that both main memories always store the same content information.

Then, the error check function unit checks the memory on the master side, and when an error occurs, the memory switching processing unit immediately switches the main memory on the slave side to the master side and uses it. Even if an error occurs, the operation is continuously executed without the system going down, and the reliability of the system is improved.

[0010]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 shows a hardware configuration of an embodiment of the present invention, in which two main memories M1 and M that are duplicated are provided.
2, a floppy disk drive device (FDD) 1 and a hard disk drive device (H
DD) 2 and a mechanism provided in the CPU 3, an external data write processing unit 4 for controlling transfer of files from the external storage devices 1 and 2 to the same address area of the main memories M1 and M2, and one instruction from the main memories M1 and M2. Each time the file data of the same address is read, the instruction register 5 that executes the file on the master side, the parity check processing unit 6 that performs the parity check of the read file data, the main memories M1 and M2 at the time of executing the instruction
Of the same address area, and the read / write check processing units 8 and 9 for performing read / write checks of the main memories M1 and M2 in order to detect an error that cannot be detected by the parity check. I have it.

In the actual duplication, a DRAM is used.
Memory area is divided into two and each memory area is allocated as an area of the main memories M1 and M2.

Next, the operation of the computer system having the above configuration will be described with reference to the flowchart of FIG. In the CPU 3, the main memory M which is the first duplicated
Which one of the master (M) side and the slave (S) side of 1 and M2 is determined. Here, for convenience of description, the main memory M1 is on the master side and the main memory M2 is
Is the slave side.

Then, the CPU 3 first causes the external data write processing unit 4 to operate the FDD 1 or the HDD of the external storage device.
Predetermined program data and numerical data are read from No. 2 and written in the same address area of each of the main memories M1 and M2. Here, files A, B, C
Are written in the same address area.

In executing an instruction, the instruction register 5 reads the file data of the same address from the main memories M1 and M2 for each instruction, and sets the file read from the main memory M1 on the master side (step S1). Then, the parity check processing unit 6 performs a parity check (step S2), and if there is no parity error, the comparison processing unit 7 compares the file data with the corresponding data in the main memory M2 on the slave side and confirms whether or not they match ( In step S3), if they match, the command of the file data on the master side is executed (step S4). If it is necessary to write the calculation result, the same address area of each of the main memories M1 and M2 is written.

If a parity error is detected in the instruction data read from the master side in the parity check in step S2, the same instruction data is read from the main memory M2 on the slave side to perform a parity check (steps S5 and S6). If there is no parity error, the instruction is executed (step S7). Also in this case, if it is necessary to write the calculation result, the main memories M1 and M2
Write the same address area for each.

If an error is also detected in the parity check of the main memory M2 on the slave side, the system is judged to be abnormal and the system is stopped (step S8).

Although an error was not detected in the parity check of the instruction read from the master side main memory M1 as described above, the same instruction was read from the slave side main memory M2 in step S3, and as a result of comparison, there was a mismatch. In case of both main memory M
1, read / write check processing unit 8 for each M2,
Read / write check processing is performed in step 9 (step S
9) If an error is detected in the read / write of any of the main memories, the instruction of the main memory M1 or M2 on the normal side where the error is not detected is executed (step S10). Also in this case, if it is necessary to write the calculation result, the same address area of each of the main memories M1 and M2 is written.

The read / write check process is as follows. In other words, by specifying a specific address, the data stored in it is temporarily saved, the specific data is written to an empty memory area, the written data is immediately read, and the read data is the original specific data. It is determined whether or not the read / write function is normal, and if they do not match, the read / write function is abnormal. If it is normal, the temporarily saved data is written to the original address, and the read / write check process ends.

Despite the fact that the file data in both main memories M1 and M2 are different, as a result of the read / write check in step S9, there is no abnormality in the main memory, or an abnormality is detected in both main memories. If so, the system is considered to be abnormal and the system is stopped (step S11).

Thus, in the computer system of this embodiment, the main memory is simply duplicated and the CPU
By making a slight change to the read / write processing for the main memory of, the system down can be avoided even in the situation where the system down could not be avoided by the performance of DRAM in the past, and the entire hardware is duplicated. Without this, the reliability of the entire system can be improved.

[0021]

As described above, according to the invention of claim 1,
The main memory is duplicated, and the programs and data executed by the CPU are written in parallel to each main memory at the same time so that both main memories always store the same information, and the error check function unit is used to master the data. Side memory check, and if an error occurs, the memory switching processing section immediately switches the main memory that was on the slave side to the master side and uses it. Even if it occurs, the operation can be executed continuously without the system going down, the system reliability can be improved, and there is no need to duplicate the entire hardware to improve the system reliability. In addition, it is possible to suppress an increase in installation space and cost.

[Brief description of drawings]

FIG. 1 is a block diagram showing a hardware configuration of an embodiment of the invention of claim 1;

FIG. 2 is a flowchart showing an error check operation of the main memory of the above embodiment.

[Explanation of Codes] 1 floppy disk drive device 2 hard disk drive device 3 CPU 4 external data write processing unit 5 instruction register 6 parity check processing unit 7 comparison processing unit 8 read / write check processing unit 9 read / write check processing unit M1, M2 main memory

Claims (1)

[Claims] 1. A dual main memory and an information write processing unit that writes the same information in parallel to each of the dual main memories in response to a write command from a CPU, and each of the dual main memories. An error check unit that performs an error check, and a memory switching processing unit that switches the main memory on the slave side to the master side when the error check unit detects an error in the main memory currently used as the master. A computer system comprising: