JPH08148371A - Multilayer ceramic capacitor - Google Patents
Multilayer ceramic capacitorInfo
- Publication number
- JPH08148371A JPH08148371A JP29007394A JP29007394A JPH08148371A JP H08148371 A JPH08148371 A JP H08148371A JP 29007394 A JP29007394 A JP 29007394A JP 29007394 A JP29007394 A JP 29007394A JP H08148371 A JPH08148371 A JP H08148371A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- ceramic capacitor
- dielectric
- end faces
- present
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は積層セラミックコンデン
サに関し、詳細には、メッキ浴に対する耐熱衝撃性を高
めた積層セラミックコンデンサに関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a monolithic ceramic capacitor, and more particularly to a monolithic ceramic capacitor having enhanced thermal shock resistance against a plating bath.
【0002】[0002]
【従来の技術】積層セラミック(磁器)コンデンサは、
一般に、誘電体磁器層と内部電極とを交互に積層してコ
ンデンサ本体を形成し、その本体の内部電極の端部が露
出した両端面に、一対の外部電極がそれぞれの内部電極
と電気的に接続するように構成されている。このような
積層セラミックコンデンサは、通常、次のようにして作
製される。2. Description of the Related Art Multilayer ceramic (porcelain) capacitors are
In general, dielectric ceramic layers and internal electrodes are alternately laminated to form a capacitor body, and a pair of external electrodes are electrically connected to the internal electrodes on both end surfaces of the body, where the ends of the internal electrodes are exposed. Is configured to connect. Such a monolithic ceramic capacitor is usually manufactured as follows.
【0003】まず、誘電体磁器材料の粉末とバインダと
を十分に混合したスリップからドクターブレード法によ
ってセラミックグリーンシートを成形する。このグリー
ンシートに、銀(Ag)−パラジウム(Pd)合金など
からなる電極材料の粉末とバインダとを混合してペース
ト状にした導電性ペーストをスクリーン印刷法などによ
って内部電極パターンとして印刷し、それらを所望の層
数積層して圧着・切断してグリーンチップを作製する。
このグリーンチップを焼成してコンデンサ本体を形成
し、このコンデンサ本体の内部電極端部が露出した両端
面に、外部電極用のAgまたはAg−Pd合金などから
なる導電性ペーストを塗布・焼付して外部電極を形成
し、その外部電極表面にニッケル(Ni)メッキやスズ
(Sn)メッキまたは半田メッキなどの金属メッキ膜を
形成して、積層セラミックコンデンサとなる。First, a ceramic green sheet is formed by a doctor blade method from a slip in which a powder of a dielectric ceramic material and a binder are sufficiently mixed. On this green sheet, a conductive paste made by mixing a powder of an electrode material composed of silver (Ag) -palladium (Pd) alloy and a binder to form a paste is printed as an internal electrode pattern by a screen printing method or the like. A desired number of layers are laminated, pressure-bonded and cut to produce a green chip.
The green chip is fired to form a capacitor body, and a conductive paste made of Ag or Ag-Pd alloy for the external electrode is applied and baked on both end surfaces of the capacitor body where the internal electrode ends are exposed. An external electrode is formed, and a metal plating film such as nickel (Ni) plating, tin (Sn) plating, or solder plating is formed on the surface of the external electrode to form a monolithic ceramic capacitor.
【0004】上記のようにして得られた積層セラミック
コンデンサの内部構造は、図2に断面図で示したように
なっている。図2の積層セラミックコンデンサ1におい
て、2はコンデンサ本体であり、その内部には誘電体磁
器層3と内部電極4a・4bとが交互に積層されてい
る。5a・5bは外部電極、6a・6bはその上に形成
された金属メッキ膜であり、外部電極5a・5bはコン
デンサ本体2の両端面において内部電極4a・4bの端
部とそれぞれ電気的に接続している。The internal structure of the monolithic ceramic capacitor obtained as described above is as shown in the sectional view of FIG. In the monolithic ceramic capacitor 1 of FIG. 2, reference numeral 2 denotes a capacitor body, in which dielectric ceramic layers 3 and internal electrodes 4a and 4b are alternately laminated. 5a and 5b are external electrodes, 6a and 6b are metal plating films formed thereon, and the external electrodes 5a and 5b are electrically connected to the ends of the internal electrodes 4a and 4b on both end faces of the capacitor body 2. are doing.
【0005】同図に示すように、従来の積層セラミック
コンデンサ1では、内部電極4a・4bはコンデンサ本
体2の内部で平坦に形成されており、内部電極4a・4
bと外部電極5a・5bとがコンデンサ本体2の端部に
おいてほぼ垂直に接続されていた。As shown in the figure, in the conventional monolithic ceramic capacitor 1, the internal electrodes 4a and 4b are formed flat inside the capacitor body 2, and the internal electrodes 4a and 4b are formed.
b and the external electrodes 5a and 5b were connected substantially vertically at the end of the capacitor body 2.
【0006】[0006]
【発明が解決しようとする課題】しかしながら、このよ
うな従来の積層セラミックコンデンサ1においては、外
部電極5a・5bの上に金属メッキ膜6a・6bを形成
する際にメッキ浴液が外部電極5a・5bを浸透して、
コンデンサ本体2側の内部電極4a・4bや内部電極4
a・4bと誘電体磁器層2との界面に浸入することがあ
った。そしてその結果、積層セラミックコンデンサ1の
耐熱衝撃性が低下してしまって回路基板に実装する時の
半田による熱衝撃のためにコンデンサ本体2にクラック
が発生したり、コンデンサ1の誘電損失や絶縁抵抗など
の電気的特性が著しく劣化してしまうとともに使用中の
信頼性が低下してしまうという問題点があった。However, in such a conventional monolithic ceramic capacitor 1, when the metal plating films 6a and 6b are formed on the external electrodes 5a and 5b, the plating bath liquid is used. Penetrating 5b,
Internal electrodes 4a and 4b and internal electrode 4 on the capacitor body 2 side
There was a case where it penetrated into the interface between a.4b and the dielectric ceramic layer 2. As a result, the thermal shock resistance of the monolithic ceramic capacitor 1 deteriorates, and thermal shock due to solder when mounting on the circuit board causes cracks in the capacitor body 2, and dielectric loss and insulation resistance of the capacitor 1 occur. There is a problem that the electrical characteristics such as markedly deteriorate and the reliability during use decreases.
【0007】本発明は上記事情に鑑みて本発明者等が鋭
意研究を進めた結果完成したもので、その目的は、金属
メッキ膜の形成によるメッキ浴液のコンデンサ本体内部
への浸入を防止して、耐熱衝撃性を高め、電気的特性の
劣化を防止した、高信頼性の積層セラミックコンデンサ
を提供することにある。The present invention has been completed as a result of intensive research conducted by the present inventors in view of the above circumstances. The purpose of the present invention is to prevent the plating bath solution from entering the inside of the capacitor body due to the formation of a metal plating film. Therefore, it is to provide a highly reliable multilayer ceramic capacitor which has improved thermal shock resistance and prevented deterioration of electrical characteristics.
【0008】また本発明の目的は、メッキ浴液のコンデ
ンサ本体内部への浸入を防止することにより、外部電極
上への金属メッキ膜の形成あるいは回路基板への半田実
装を行なっても特性や信頼性が低下しない、耐熱衝撃性
に優れた積層セラミックコンデンサを提供することにあ
る。Another object of the present invention is to prevent the penetration of the plating bath solution into the inside of the capacitor body, so that even if a metal plating film is formed on the external electrodes or soldering is performed on the circuit board, the characteristics and reliability can be improved. It is an object of the present invention to provide a monolithic ceramic capacitor which is excellent in thermal shock resistance and does not deteriorate in properties.
【0009】[0009]
【課題を解決するための手段】本発明の積層セラミック
コンデンサは、誘電体磁器層と内部電極とを交互に積層
して形成されたコンデンサ本体と、そのコンデンサ本体
の端面に形成され、かつ上記内部電極に電気的に接続さ
れる外部電極とを備えた積層セラミックコンデンサにお
いて、前記内部電極および誘電体磁器層のそれぞれ端面
が積層方向に屈曲していることを特徴とするものであ
る。A monolithic ceramic capacitor according to the present invention comprises a capacitor body formed by alternately laminating dielectric ceramic layers and internal electrodes, and a capacitor body formed on an end face of the capacitor body. In a multilayer ceramic capacitor provided with an external electrode electrically connected to the electrode, the end faces of the internal electrode and the dielectric ceramic layer are bent in the stacking direction.
【0010】[0010]
【作用】本発明の積層セラミックコンデンサは、複数層
積層された内部電極および誘電体磁器層の端面がコンデ
ンサ本体の端面近傍においてそれぞれ積層方向に屈曲し
た構成としているので、外部電極上に金属メッキ膜を形
成する際や回路基板に半田実装する際に、メッキ浴液が
内部電極の内部や内部電極と誘電体磁器層との界面など
のコンデンサ本体内部に浸入することを防止できる。こ
れは、内部電極および誘電体磁器層をそのように曲げる
ことによってコンデンサ本体の端面における内部電極の
厚みが薄くなり、また内部電極と誘電体磁器層とが十分
に密着して、その端面における誘電体磁器層と内部電極
との隙間がなくなるので、メッキ液が浸入する空洞が小
さくなるためであると考えられる。In the multilayer ceramic capacitor of the present invention, the end faces of the internal electrodes and the dielectric porcelain layer, which are laminated in a plurality of layers, are bent in the stacking direction near the end faces of the capacitor body. It is possible to prevent the plating bath liquid from entering the inside of the capacitor body such as the inside of the internal electrode or the interface between the internal electrode and the dielectric porcelain layer when forming the solder or mounting the solder on the circuit board. This is because by bending the internal electrode and the dielectric ceramic layer in such a manner, the thickness of the internal electrode on the end surface of the capacitor body becomes thin, and the internal electrode and the dielectric ceramic layer are sufficiently adhered to each other, and the dielectric It is considered that this is because the gap between the body porcelain layer and the internal electrode disappears, so that the cavity into which the plating solution penetrates becomes small.
【0011】そのため本発明の積層セラミックコンデン
サによれば、メッキ液の浸入に起因するコンデンサ本体
におけるクラックの発生、あるいはコンデンサの誘電損
失や絶縁抵抗などの電気的特性の劣化を防止することが
でき、耐熱衝撃性に優れた高信頼性の積層セラミックコ
ンデンサを提供することができる。Therefore, according to the monolithic ceramic capacitor of the present invention, it is possible to prevent the occurrence of cracks in the capacitor body due to the penetration of the plating solution, or the deterioration of the electrical characteristics such as the dielectric loss and the insulation resistance of the capacitor, It is possible to provide a highly reliable multilayer ceramic capacitor having excellent thermal shock resistance.
【0012】本発明の積層セラミックコンデンサにおい
て内部電極および誘電体磁器層の端面を積層方向に屈曲
させるには、種々の方法を用いることができる。例え
ば、内部電極パターンを印刷したセラミックグリーンシ
ートを所望の層数積層して圧着し、それを切断してグリ
ーンチップを作製する際に切断の方法および条件を適切
に選択することにより、切断後のグリーンチップにおい
て内部電極パターンとセラミックグリーンシートとの端
面をともに積層方向に一様に屈曲させることができる。
そして、それを焼成することによって、切断された端面
近傍において内部電極および誘電体磁器層のそれぞれ端
面が積層方向に屈曲したコンデンサ本体を得ることがで
きる。従って、本発明の積層セラミックコンデンサはそ
のようにして容易に作製することができるため、製造工
程や製造コストが増加することもなく、耐熱衝撃性に優
れた高信頼性の積層セラミックコンデンサを安価に提供
することができる。In the laminated ceramic capacitor of the present invention, various methods can be used to bend the end faces of the internal electrodes and the dielectric ceramic layers in the laminating direction. For example, by laminating a desired number of layers of a ceramic green sheet on which an internal electrode pattern is printed and pressure bonding, and by appropriately selecting the cutting method and conditions when cutting the green chip to produce a green chip, In the green chip, both end surfaces of the internal electrode pattern and the ceramic green sheet can be bent uniformly in the stacking direction.
Then, by firing it, it is possible to obtain a capacitor body in which the end faces of the internal electrode and the dielectric ceramic layer are bent in the stacking direction in the vicinity of the cut end face. Therefore, since the monolithic ceramic capacitor of the present invention can be easily produced in such a manner, a highly reliable monolithic ceramic capacitor excellent in thermal shock resistance can be manufactured at low cost without increasing the manufacturing process and the manufacturing cost. Can be provided.
【0013】[0013]
【実施例】以下、本発明の積層セラミックコンデンサを
実施例に基づいて詳述する。なお、本発明は以下の実施
例に限定されるものではなく、本発明の主旨を逸脱しな
い範囲で種々の変更や改良を加えることは何ら差し支え
ない。EXAMPLES The multilayer ceramic capacitor of the present invention will be described in detail below based on examples. The present invention is not limited to the following embodiments, and various modifications and improvements may be added without departing from the gist of the present invention.
【0014】図1は本発明の積層セラミックコンデンサ
の構成例を示す断面図である。図1の積層セラミックコ
ンデンサ7において8はコンデンサ本体であり、その内
部には誘電体磁器層9と内部電極10a・10bとが交互に
積層されている。11a・11bは外部電極、12a・12bは
その上に形成された金属メッキ膜であり、外部電極11a
・11bはコンデンサ本体8の両端面において内部電極10
a・10bの端部とそれぞれ電気的に接続している。そし
て同図に範囲Aで示したように、本発明の積層セラミッ
クコンデンサ7では、内部電極10a・10bおよび誘電体
磁器層9のそれぞれ端面が、コンデンサ本体8の端面近
傍Aで積層方向すなわち同図においては下方に一様に屈
曲して形成されている。FIG. 1 is a sectional view showing an example of the structure of the monolithic ceramic capacitor of the present invention. In the monolithic ceramic capacitor 7 of FIG. 1, reference numeral 8 is a capacitor body, in which dielectric ceramic layers 9 and internal electrodes 10a and 10b are alternately laminated. 11a and 11b are external electrodes, and 12a and 12b are metal plating films formed on the external electrodes.
11b is an internal electrode 10 on both end faces of the capacitor body 8.
It is electrically connected to the ends of a and 10b, respectively. As shown by the range A in the figure, in the monolithic ceramic capacitor 7 of the present invention, the end faces of the internal electrodes 10a and 10b and the dielectric ceramic layer 9 are in the laminating direction near the end face A of the capacitor body 8, that is, Is formed by being bent uniformly downward.
【0015】本発明の積層セラミックコンデンサ7にお
いて内部電極10a・10bおよび誘電体磁器層9のそれぞ
れ端面をコンデンサ本体8の端面近傍で積層方向に屈曲
させるに当たっては、図1に示したように両端面におい
て同方向に曲げてもよいし、両端面でそれぞれ逆方向に
曲げてもよい。また、その屈曲部分の形状は断面が曲線
状となるように湾曲させた形状でもよく、屈曲部分の曲
率も一定であっても変化させてもよい。また、1段また
は多段に折れ曲がった形状でもよいし、それらを組み合
わせた形状であってもよい。In the laminated ceramic capacitor 7 of the present invention, when the respective end faces of the internal electrodes 10a and 10b and the dielectric porcelain layer 9 are bent in the stacking direction in the vicinity of the end face of the capacitor body 8, both end faces are bent as shown in FIG. May be bent in the same direction, or both end surfaces may be bent in opposite directions. Further, the shape of the bent portion may be curved so that the cross section has a curved shape, and the curvature of the bent portion may be constant or may be changed. Further, the shape may be one-stepped or multi-stepped, or a combination thereof.
【0016】図1中にAで示した内部電極10a・10bお
よび誘電体磁器層9の屈曲部分の長さは、作製する積層
セラミックコンデンサの寸法や特性に応じて適宜設定す
るが、30〜100 μmの長さとするのが好ましく、それに
より本発明の作用効果を顕著に高めることができる。The lengths of the bent portions of the internal electrodes 10a and 10b and the dielectric porcelain layer 9 shown by A in FIG. 1 are appropriately set according to the dimensions and characteristics of the laminated ceramic capacitor to be manufactured, but are set to 30 to 100. The length is preferably μm, which can remarkably enhance the action and effect of the present invention.
【0017】コンデンサ本体8の端面近傍において内部
電極10a・10bおよび誘電体磁器層9のそれぞれ端面を
積層方向に屈曲させる方法としては、上述したように種
々の方法を用いることができるが、中でもグリーンチッ
プに切断する際の切断方法および条件によれば、比較的
簡便にかつ低コストで行なうことができるという点で好
適である。As a method of bending the end faces of the internal electrodes 10a and 10b and the dielectric ceramic layer 9 in the stacking direction in the vicinity of the end face of the capacitor body 8, various methods can be used as described above. According to the cutting method and conditions for cutting into chips, it is preferable in that it can be performed relatively easily and at low cost.
【0018】例えば切断によって内部電極10a・10bお
よび誘電体磁器層9の端面を屈曲させたコンデンサ本体
8を得るには、約50〜100 ℃に加熱したダイシング刃を
用いて乾式で切断する方法がある。これによれば、ダイ
シング刃の熱および摩擦熱により切断面を柔らかくでき
るため内部電極10a・10bおよび誘電体磁器層9の端面
を積層方向に一様に屈曲させることができ、その屈曲部
分の長さもダイシング刃の熱を調整することによって所
望の範囲に設定することができる。For example, in order to obtain the capacitor body 8 in which the end faces of the internal electrodes 10a and 10b and the dielectric porcelain layer 9 are bent by cutting, a dry cutting method using a dicing blade heated to about 50 to 100 ° C. is used. is there. According to this, since the cut surface can be softened by the heat of the dicing blade and the frictional heat, the end surfaces of the internal electrodes 10a and 10b and the dielectric ceramic layer 9 can be uniformly bent in the stacking direction, and the length of the bent portion can be increased. Also, it can be set in a desired range by adjusting the heat of the dicing blade.
【0019】本発明の積層セラミックコンデンサ7の誘
電体磁器層9には、種々の誘電体材料を用いることがで
き、例えばBaTiO3 ・LaTiO3 ・CaTiO3
・NdTiO3 ・MgTiO3 ・SrTiO3 ・CaZ
rO3 ・SrSnO3 ・BaTiO3 にNb2 O5 ・T
a2 O5 ・ZnO・CoO等を添加した組成物や、Ba
TiO3 の構成原子であるBaをCaで、TiをZrや
Snで部分的に置換した固溶体等のチタン酸バリウム系
材料、Pb(Mg1/3 Nb2/3 )O3 ・Pb(Fe,N
d,Nb)O3 系ペロブスカイト型構造化合物、Pb
(Mg1/3 Nb2/3 )O3 −PbTiO3 等の2成分系
組成物、Pb(Mg1/3 Nb2/3 )O3 −PbTiO3
−Pb(Mg1/2 W1/2 )O3 ・Pb(Mg1/3 Nb
2/3 )O3 −Pb(Zn1/3 Nb2/3 )O3 −PbTi
O3 ・Pb(Mg1/3 Nb2/3 )O3−Pb(Zn1/3
Nb2/3 )O3 −Pb(Sm1/2 Nb1/2 )O3 等の3
成分系組成物、あるいはそれらにMnO・MnO2 ・C
uO・BaTiO3 等を添加したもの等の鉛系リラクサ
ー材料などが挙げられる。コンデンサ本体8の形成に際
しては、これらの誘電体粉末を有機バインダと十分に混
合したスリップからセラミックグリーンシートに成形し
たものを使用する。Various dielectric materials can be used for the dielectric ceramic layer 9 of the monolithic ceramic capacitor 7 of the present invention. For example, BaTiO 3 .LaTiO 3 .CaTiO 3
· NdTiO 3 · MgTiO 3 · SrTiO 3 · CaZ
rO 3 · SrSnO 3 · BaTiO 3 with Nb 2 O 5 · T
a composition containing a 2 O 5 , ZnO, CoO or the like, or Ba
A barium titanate-based material such as a solid solution in which Ba, which is a constituent atom of TiO 3 , is partially replaced by Ca, and Ti is partially replaced by Zr or Sn, Pb (Mg 1/3 Nb 2/3 ) O 3 .Pb (Fe, N
d, Nb) O 3 based perovskite structure compound, Pb
(Mg 1/3 Nb 2/3) O 3 -PbTiO 2 -component composition such as 3, Pb (Mg 1/3 Nb 2/3 ) O 3 -PbTiO 3
-Pb (Mg 1/2 W 1/2 ) O 3 · Pb (Mg 1/3 Nb
2/3) O 3 -Pb (Zn 1/3 Nb 2/3) O 3 -PbTi
O 3 · Pb (Mg 1/3 Nb 2/3 ) O 3 -Pb (Zn 1/3
3 such as Nb 2/3 ) O 3 -Pb (Sm 1/2 Nb 1/2 ) O 3
Component composition, or MnO · MnO 2 · C in their
Lead-based relaxor materials such as those to which uO / BaTiO 3 and the like are added can be used. When the capacitor body 8 is formed, a ceramic green sheet formed from slips in which these dielectric powders are sufficiently mixed with an organic binder is used.
【0020】内部電極10a・10bを形成する材料として
は、例えばPd・Ag・Pt・Ni・Cu・Pbおよび
それらの合金が挙げられる。内部電極10a、10bの形成
に当たっては、このような電極材料粉末をバインダと混
合粉砕してペースト状にした導電性ペーストを用いる。
この導電性ペーストをスクリーン印刷法などによってセ
ラミックグリーンシート上に内部電極パターンとして印
刷して、積層・圧着し、焼成して焼結させることによ
り、所望の内部電極10a・10bを形成する。Examples of materials for forming the internal electrodes 10a and 10b include Pd, Ag, Pt, Ni, Cu, Pb and alloys thereof. In forming the internal electrodes 10a and 10b, a conductive paste is used which is prepared by mixing and pulverizing such electrode material powder with a binder.
The conductive paste is printed as an internal electrode pattern on a ceramic green sheet by a screen printing method or the like, laminated, pressure-bonded, fired and sintered to form desired internal electrodes 10a, 10b.
【0021】外部電極11a・11bを形成する材料は内部
電極10a・10bとほぼ同様であり、必要に応じてガラス
フリットなどを添加して、導電性ペーストとしてコンデ
ンサ本体8の端面に塗布・焼成することにより所望の外
部電極11a・11bを形成する。あるいはスパッタリング
等の薄膜形成法による導体膜によって形成してもよい。
この外部電極11a・11bは、コンデンサ本体8の端面の
みでなく、必要に応じて側面に回り込ませて形成しても
よい。The material for forming the external electrodes 11a and 11b is almost the same as that of the internal electrodes 10a and 10b. If necessary, glass frit or the like is added to apply and bake on the end face of the capacitor body 8 as a conductive paste. As a result, desired external electrodes 11a and 11b are formed. Alternatively, a conductor film may be formed by a thin film forming method such as sputtering.
The external electrodes 11a and 11b may be formed not only on the end faces of the capacitor body 8 but also on the side faces as necessary.
【0022】外部電極11a・11b上に形成する金属メッ
キ膜12a・12bの材料としては、Ni・Ni−Sn・A
uなどがあり、電解メッキや無電解メッキなどのメッキ
法によって形成する。The material of the metal plating films 12a and 12b formed on the external electrodes 11a and 11b is Ni.Ni-Sn.A.
u, etc., and is formed by a plating method such as electrolytic plating or electroless plating.
【0023】また、積層セラミックコンデンサ7を回路
基板に半田実装する場合は、リフロー法やフロー半田法
などが用いられる。When the monolithic ceramic capacitor 7 is mounted on the circuit board by soldering, a reflow method or a flow soldering method is used.
【0024】以下に本発明のチップ型積層セラミックコ
ンデンサの具体例を示す。 〔例1〕まず、誘電体磁器層の材料としてチタン酸バリ
ウムを主成分とするX7R特性の材料粉末を用意し、有
機バインダと混合後、得られたスリップを用いてドクタ
ーブレード法によって厚さ15μmのセラミックグリーン
シートを成形した。Specific examples of the chip type multilayer ceramic capacitor of the present invention will be shown below. [Example 1] First, as a material for the dielectric porcelain layer, a material powder having X7R characteristics containing barium titanate as a main component was prepared, mixed with an organic binder, and the obtained slip was used to obtain a thickness of 15 μm by a doctor blade method. The ceramic green sheet of was molded.
【0025】このセラミックグリーンシートに、Pdま
たはAg−Pd粉末に有機バインダを添加して混合した
導電性ペーストを用いて、スクリーン印刷法により内部
電極パターンを印刷した。An internal electrode pattern was printed on this ceramic green sheet by a screen printing method using a conductive paste prepared by adding an organic binder to Pd or Ag-Pd powder and mixing them.
【0026】その後、印刷した内部電極パターンが交互
に櫛形構造になるように90層積層し、100 ℃で熱圧着し
て、図3に断面図で示すような構造の積層体13を得た。
図3に示すように、積層体13はセラミックグリーンシー
ト14と内部電極パターン15とが交互に櫛形構造になるよ
うに積層されている。ここで同図中の一点鎖線は、グリ
ーンチップを得るために積層体13を切断する位置を示し
ている。Then, 90 layers were laminated so that the printed internal electrode patterns were alternately formed into a comb structure, and thermocompression bonding was performed at 100 ° C. to obtain a laminated body 13 having a structure shown in the sectional view of FIG.
As shown in FIG. 3, in the laminated body 13, the ceramic green sheets 14 and the internal electrode patterns 15 are alternately laminated so as to have a comb structure. Here, the alternate long and short dash line in the figure indicates the position where the laminated body 13 is cut to obtain a green chip.
【0027】次に、この積層体13を約50〜100 ℃に加熱
したダイシング刃を用いて、回転数10,000回転/分、ス
ピード10cm/秒の条件で乾式で切断してグリーンチッ
プを作製した。Next, the laminated body 13 was dry-cut using a dicing blade heated to about 50 to 100 ° C. under the conditions of a rotation speed of 10,000 rotations / minute and a speed of 10 cm / second to produce a green chip.
【0028】そして、このグリーンチップを脱バインダ
処理した後 1,300℃で2時間焼成を行ない、面取り処理
を行なって本発明の実施例の試料Aを作製した。Then, after removing the binder from the green chip, it was fired at 1,300 ° C. for 2 hours to be chamfered to prepare a sample A of the embodiment of the present invention.
【0029】また比較例として、積層体13を以下のよう
にして切断してグリーンチップを作製した。一つは上記
のダイシング刃を用いて、刃を加熱せずに回転数10,000
回転/分、スピード10cm/秒の条件で湿式で切断し
た。もう一つは厚み 100μmのレザー刃を用いて押し切
りにより切断した。これらに同様に脱バインダ処理・焼
成・面取り処理を行なって、比較例の試料B(湿式ダイ
シング刃切断)およびC(レザー刃押し切り切断)を作
製した。As a comparative example, a green chip was produced by cutting the laminate 13 as follows. One is the above dicing blade, the number of rotation is 10,000 without heating the blade.
Wet cutting was performed under the conditions of rotation / minute and speed of 10 cm / second. The other was cut by pressing with a 100 μm thick leather blade. In the same manner, binder removal processing, firing, and chamfering processing were performed to prepare samples B (wet dicing blade cutting) and C (leather blade push cutting) of comparative examples.
【0030】これらの試料AおよびB・Cの内部電極お
よび誘電体磁器層の形状を、クロスセクション処理を行
なって金属顕微鏡により観察したところ、試料Aの内部
電極および誘電体磁器層のそれぞれ端面は図1に示すよ
うに端面近傍で積層方向に一様に屈曲しており、その屈
曲部分の長さは50μmであった。これに対して試料Bお
よびCの内部電極および誘電体磁器層のそれぞれ端面
は、図2に示すように端面に至るまで直線状の平坦な形
状であった。The shapes of the internal electrodes and the dielectric porcelain layers of Samples A, B and C were observed by a metallographic microscope after cross section processing. As shown in FIG. 1, it was uniformly bent in the stacking direction near the end face, and the length of the bent portion was 50 μm. On the other hand, the end faces of the internal electrodes and the dielectric porcelain layers of Samples B and C each had a linear flat shape up to the end face as shown in FIG.
【0031】〔例2〕次に、〔例1〕で作製した試料A
およびB・Cについて、以下のようにして外部電極を形
成し、メッキ浴に対する耐熱衝撃性を評価・比較した。[Example 2] Next, sample A prepared in [Example 1]
For B and C, external electrodes were formed as follows, and the thermal shock resistance to the plating bath was evaluated and compared.
【0032】まず、試料AおよびB・Cの内部電極が引
き出された端面に、Ag粉末に有機バインダを添加して
混合した導電性ペーストを塗布し、700 ℃で焼付けて厚
み 100μmの外部電極を形成した。First, a conductive paste prepared by adding an organic binder to Ag powder was mixed and applied to the end faces of the internal electrodes of Samples A, B, and C, which were baked at 700 ° C. to form external electrodes with a thickness of 100 μm. Formed.
【0033】次いで、ワット浴でNiメッキをかけ続け
て硫酸浴でSnメッキをかけた。Then, Ni plating was continuously applied in a Watt bath and then Sn plating was applied in a sulfuric acid bath.
【0034】そして、メッキが終了した各試料をそれぞ
れ 200個ずつ、300 ℃・360 ℃・400 ℃の半田槽に3秒
間投入して熱衝撃を加えた。その後、取り出した試料を
40倍の双眼顕微鏡で観察して、熱衝撃によるクラックが
発生している試料数を調べて比較した。Then, 200 samples of each plated sample were placed in a solder bath of 300 ° C., 360 ° C. and 400 ° C. for 3 seconds and subjected to thermal shock. After that, the sample taken out
The number of samples in which cracks were generated by thermal shock was examined by observing with a 40 × binocular microscope and compared.
【0035】また、それぞれの試料について絶縁抵抗を
測定し、抵抗値が1×104 MΩ以下となって絶縁不良を
起こしている試料数を調べて比較した。Further, the insulation resistance of each sample was measured, and the number of samples having a resistance value of 1 × 10 4 MΩ or less and causing insulation failure was examined and compared.
【0036】これらの耐熱衝撃性の評価結果を表1に示
す。Table 1 shows the evaluation results of these thermal shock resistances.
【0037】[0037]
【表1】 [Table 1]
【0038】表1の結果より分かるように、本発明の試
料Aにおいては300 ℃および 360℃ではクラックの発生
が見られず、400 ℃でわずかに1個の発生が見られただ
けであった。これに対して試料BおよびCではかなりの
クラック発生が見られた。As can be seen from the results in Table 1, in sample A of the present invention, no cracks were found at 300 ° C and 360 ° C, and only one was found at 400 ° C. . On the other hand, in Samples B and C, considerable cracking was observed.
【0039】また、絶縁不良の発生も本発明の試料Aで
は見られず、これに対して試料BおよびCでは 360℃以
上で絶縁不良の発生が見られた。Insulation failure did not occur in Sample A of the present invention, whereas in Samples B and C, insulation failure occurred at 360 ° C. or higher.
【0040】これらの結果より本発明の試料Aは、内部
電極および誘電体磁器層がコンデンサ本体の端面まで平
坦に形成された従来の積層セラミックコンデンサ試料B
・Cより、耐熱衝撃性に優れていることが確認できた。From these results, the sample A of the present invention is the conventional multilayer ceramic capacitor sample B in which the internal electrodes and the dielectric ceramic layer are formed flat to the end surface of the capacitor body.
-It was confirmed from C that the thermal shock resistance was superior.
【0041】〔例3〕次に〔例1〕で作製した試料Aお
よびB・Cについて、外部電極を形成せずに、〔例2〕
と同様にしてメッキ浴に対する耐熱衝撃性を評価・比較
した。[Example 3] Next, with respect to the samples A, B and C produced in [Example 1], without forming an external electrode, [Example 2]
The thermal shock resistance to the plating bath was evaluated and compared in the same manner as in.
【0042】そして〔例2〕と同様にして、メッキが終
了した各試料をそれぞれ 200個ずつ、300 ℃・360 ℃・
400 ℃の半田槽に3秒間投入して熱衝撃を加えた。その
後、取り出した試料を40倍の双眼顕微鏡で観察して、熱
衝撃によるクラックが発生している試料数を調べて比較
した。Then, in the same manner as in [Example 2], 200 pieces of each plated sample were placed at 300 ° C and 360 ° C.
It was placed in a solder bath at 400 ° C for 3 seconds and subjected to thermal shock. After that, the taken-out samples were observed with a 40 × binocular microscope, and the number of samples in which cracks due to thermal shock were generated was examined and compared.
【0043】この耐熱衝撃性の評価結果を表2に示す。Table 2 shows the evaluation results of this thermal shock resistance.
【0044】[0044]
【表2】 [Table 2]
【0045】表2の結果より分かるように、本発明の試
料Aにおいては 300℃および 360℃ではクラックの発生
が見られず、400 ℃でわずかに3個の発生が見られただ
けであった。これに対して試料BおよびCでは 300℃で
も4〜5個、 360℃では50個前後、400 ℃では 100個近
くと、かなりのクラック発生が見られた。As can be seen from the results in Table 2, in sample A of the present invention, no cracks were found at 300 ° C and 360 ° C, and only three were found at 400 ° C. . On the other hand, in Samples B and C, 4 to 5 cracks were observed at 300 ° C., around 50 cracks at 360 ° C., and near 100 cracks at 400 ° C.
【0046】これらの結果によっても本発明の試料A
は、内部電極および誘電体磁器層がコンデンサ本体の端
面まで平坦に形成された従来の積層セラミックコンデン
サ試料B・Cより、耐熱衝撃性に優れていることが確認
できた。Based on these results, the sample A of the present invention is also obtained.
It has been confirmed that the thermal shock resistance is superior to the conventional multilayer ceramic capacitor samples B and C in which the internal electrodes and the dielectric ceramic layer are formed flat to the end face of the capacitor body.
【0047】〔例4〕次に試料AおよびB・Cそれぞれ
2,000個を用いて、340 ℃のフロー半田によって基板へ
の半田実装を行なった。これらを90℃・65%RHの温湿
度環境の湿中槽に投入して1V/1秒の条件のパルス電
圧印加試験を96時間行なった。そして、試験後のそれぞ
れの試料について絶縁抵抗を測定し、抵抗値が1×104
MΩ以下となって絶縁不良を起こしている試料数を調べ
て比較した。[Example 4] Next, samples A and B and C respectively
Using 2,000 pieces, solder mounting was performed on the board by flow soldering at 340 ° C. These were put into a wet tank in a temperature / humidity environment of 90 ° C. and 65% RH, and a pulse voltage application test under the condition of 1 V / 1 second was performed for 96 hours. Then, the insulation resistance of each sample after the test was measured, and the resistance value was 1 × 10 4
The number of samples having MΩ or less and causing insulation failure was examined and compared.
【0048】この評価結果を表3に示す。Table 3 shows the evaluation results.
【0049】[0049]
【表3】 [Table 3]
【0050】表3の結果より分かるように、本発明の試
料Aにおいては絶縁不良の発生は見られず、これに対し
て試料Bでは10個、試料Cでは15個の絶縁不良の発生が
見られた。As can be seen from the results in Table 3, no defective insulation was found in the sample A of the present invention, whereas 10 defective samples were found in the sample B and 15 defective samples were found in the sample C. Was given.
【0051】これらの結果によっても本発明の試料A
は、内部電極および誘電体磁器層がコンデンサ本体の端
面まで平坦に形成された従来の積層セラミックコンデン
サ試料B・Cより、耐熱衝撃性に優れて高信頼性である
ことが確認できた。Based on these results, the sample A of the present invention is also obtained.
It has been confirmed that, as compared with the conventional multilayer ceramic capacitor samples B and C in which the internal electrodes and the dielectric porcelain layer are formed flat to the end face of the capacitor body, have excellent thermal shock resistance and high reliability.
【0052】以上のように、本発明の積層セラミックコ
ンデンサによれば、内部電極および誘電体磁器層の端面
がコンデンサ本体の端面近傍においてそれぞれ積層方向
に屈曲していることにより、内部電極および内部電極と
誘電体磁器層との界面などのコンデンサ本体へのメッキ
浴液の浸入を防止することができることから、耐熱衝撃
性に優れ、電気的特性も劣化しない、高信頼性の積層セ
ラミックコンデンサを提供することができた。As described above, according to the monolithic ceramic capacitor of the present invention, the end faces of the internal electrode and the dielectric ceramic layer are bent in the stacking direction in the vicinity of the end face of the capacitor body, respectively. Since it is possible to prevent the plating bath liquid from entering the capacitor body at the interface between the capacitor and the dielectric ceramic layer, etc., it is possible to provide a highly reliable multilayer ceramic capacitor that has excellent thermal shock resistance and does not deteriorate electrical characteristics. I was able to.
【0053】また本発明の積層セラミックコンデンサ
は、例えば上述のように積層体をグリーンチップに切断
する際の方法や条件の選択によって容易に作製すること
ができるので、従来の積層セラミックコンデンサと比べ
ても製造工数や製造コストが増加することがない。その
ため、耐熱衝撃性に優れた高信頼性の積層セラミックコ
ンデンサを安価に提供できるものである。Further, since the monolithic ceramic capacitor of the present invention can be easily manufactured by selecting the method and conditions for cutting the laminated body into green chips as described above, for example, compared with the conventional monolithic ceramic capacitor. However, the manufacturing man-hours and manufacturing costs do not increase. Therefore, a highly reliable monolithic ceramic capacitor having excellent thermal shock resistance can be provided at low cost.
【0054】[0054]
【発明の効果】以上詳述したように、本発明の積層セラ
ミックコンデンサによれば、内部電極および誘電体磁器
層のそれぞれ端面が積層方向に屈曲していることによ
り、外部電極上への金属メッキ膜の形成時のメッキ浴液
のコンデンサ本体内部への浸入を防止して、耐熱衝撃性
を高め、電気的特性の劣化を防止した、高信頼性の積層
セラミックコンデンサを提供することができた。As described in detail above, according to the monolithic ceramic capacitor of the present invention, since the end faces of the internal electrode and the dielectric ceramic layer are bent in the laminating direction, the metal plating on the external electrode is performed. It has been possible to provide a highly reliable multilayer ceramic capacitor which prevents the plating bath solution from entering the inside of the capacitor body at the time of forming a film, enhances thermal shock resistance, and prevents deterioration of electrical characteristics.
【0055】また本発明の積層セラミックコンデンサに
よれば、内部電極および誘電体磁器層のそれぞれ端面を
積層方向に屈曲してメッキ浴液のコンデンサ本体内部へ
の浸入を防止することにより、外部電極上への金属メッ
キ膜の形成のみならず回路基板への半田実装を行なって
も特性や信頼性が低下しない、耐熱衝撃性に優れた積層
セラミックコンデンサを提供することができた。According to the monolithic ceramic capacitor of the present invention, the end surfaces of the internal electrode and the dielectric porcelain layer are bent in the laminating direction to prevent the plating bath solution from entering the inside of the capacitor body. It has been possible to provide a monolithic ceramic capacitor having excellent thermal shock resistance, in which characteristics and reliability are not deteriorated not only by forming a metal plating film on the substrate but also by solder mounting on a circuit board.
【0056】さらに、本発明の積層セラミックコンデン
サは容易に作製することができ、従来の積層セラミック
コンデンサと比べても製造工数や製造コストが増加する
ことがないので、耐熱衝撃性に優れた高信頼性の積層セ
ラミックコンデンサを安価に提供できる。Further, the monolithic ceramic capacitor of the present invention can be easily manufactured, and the number of manufacturing steps and the manufacturing cost are not increased as compared with the conventional monolithic ceramic capacitor. Therefore, the thermal shock resistance is excellent and the reliability is high. A monolithic ceramic capacitor with low cost can be provided at low cost.
【図1】本発明の積層セラミックコンデンサの構成例を
示す断面図である。FIG. 1 is a cross-sectional view showing a configuration example of a monolithic ceramic capacitor of the present invention.
【図2】従来の積層セラミックコンデンサの構成を示す
断面図である。FIG. 2 is a sectional view showing the structure of a conventional monolithic ceramic capacitor.
【図3】本発明の積層セラミックコンデンサの実施例に
おける積層体の構成ならびに切断位置を示す断面図であ
る。FIG. 3 is a cross-sectional view showing a structure and a cutting position of a laminated body in an example of the laminated ceramic capacitor of the present invention.
1、7・・・・・・・・・・・積層セラミックコンデン
サ 2、8・・・・・・・・・・・コンデンサ本体 3、9・・・・・・・・・・・誘電体磁器層 4a、4b、10a、10b・・・内部電極 5a、5b、11a、11b・・・外部電極 6a、6b、12a、12b・・・金属メッキ膜1, 7 ..... multilayer ceramic capacitors 2, 8 ..... capacitor body 3, 9 ..... dielectric ceramics Layers 4a, 4b, 10a, 10b ... Internal electrodes 5a, 5b, 11a, 11b ... External electrodes 6a, 6b, 12a, 12b ... Metal plating film
Claims (1)
して形成されたコンデンサ本体と、該コンデンサ本体の
端面に形成され、かつ上記内部電極に電気的に接続され
る外部電極とを備えた積層セラミックコンデンサにおい
て、前記内部電極および誘電体磁器層のそれぞれ端面が
積層方向に屈曲していることを特徴とする積層セラミッ
クコンデンサ。1. A capacitor main body formed by alternately laminating dielectric ceramic layers and internal electrodes, and an external electrode formed on an end surface of the capacitor main body and electrically connected to the internal electrode. A monolithic ceramic capacitor provided with the internal electrode and the dielectric ceramic layer, each end face of which is bent in the laminating direction.
Priority Applications (1)
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---|---|---|---|
JP29007394A JP3544569B2 (en) | 1994-11-24 | 1994-11-24 | Multilayer ceramic capacitors |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29007394A JP3544569B2 (en) | 1994-11-24 | 1994-11-24 | Multilayer ceramic capacitors |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH08148371A true JPH08148371A (en) | 1996-06-07 |
JP3544569B2 JP3544569B2 (en) | 2004-07-21 |
Family
ID=17751447
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JP29007394A Expired - Lifetime JP3544569B2 (en) | 1994-11-24 | 1994-11-24 | Multilayer ceramic capacitors |
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JP2001244138A (en) * | 2000-02-29 | 2001-09-07 | Kyocera Corp | Laminated electronic component and manufacturing method thereof |
JP2002015942A (en) * | 2000-06-29 | 2002-01-18 | Kyocera Corp | Multilayer electronic component |
JP2002184646A (en) * | 2000-12-12 | 2002-06-28 | Matsushita Electric Ind Co Ltd | Method of manufacturing ceramic electronic component |
KR20140094110A (en) * | 2013-01-21 | 2014-07-30 | 삼성전기주식회사 | Multi-layered ceramic capacitor and mounting circuit thereof |
US20150077897A1 (en) * | 2012-05-24 | 2015-03-19 | Murata Manufacturing Co., Ltd. | Multilayer Ceramic Electronic Component |
JPWO2014104061A1 (en) * | 2012-12-28 | 2017-01-12 | 株式会社村田製作所 | Multilayer ceramic electronic component and method of manufacturing the multilayer ceramic electronic component |
US10304632B2 (en) | 2015-11-27 | 2019-05-28 | Samsung Electro-Mechanics Co., Ltd. | Multilayer ceramic electronic component with improved withstand voltage characteristics and method of manufacturing the same |
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1994
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Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001244138A (en) * | 2000-02-29 | 2001-09-07 | Kyocera Corp | Laminated electronic component and manufacturing method thereof |
JP4508342B2 (en) * | 2000-02-29 | 2010-07-21 | 京セラ株式会社 | Multilayer electronic component and manufacturing method thereof |
JP2002015942A (en) * | 2000-06-29 | 2002-01-18 | Kyocera Corp | Multilayer electronic component |
JP4577951B2 (en) * | 2000-06-29 | 2010-11-10 | 京セラ株式会社 | Multilayer electronic components |
JP2002184646A (en) * | 2000-12-12 | 2002-06-28 | Matsushita Electric Ind Co Ltd | Method of manufacturing ceramic electronic component |
US20150077897A1 (en) * | 2012-05-24 | 2015-03-19 | Murata Manufacturing Co., Ltd. | Multilayer Ceramic Electronic Component |
US9478357B2 (en) * | 2012-05-24 | 2016-10-25 | Murata Manufacturing Co., Ltd. | Multilayer ceramic electronic component |
JPWO2014104061A1 (en) * | 2012-12-28 | 2017-01-12 | 株式会社村田製作所 | Multilayer ceramic electronic component and method of manufacturing the multilayer ceramic electronic component |
KR20140094110A (en) * | 2013-01-21 | 2014-07-30 | 삼성전기주식회사 | Multi-layered ceramic capacitor and mounting circuit thereof |
US10304632B2 (en) | 2015-11-27 | 2019-05-28 | Samsung Electro-Mechanics Co., Ltd. | Multilayer ceramic electronic component with improved withstand voltage characteristics and method of manufacturing the same |
US10943736B2 (en) | 2015-11-27 | 2021-03-09 | Samsung Electro-Mechanics Co., Ltd. | Method of manufacturing a multilayer ceramic electronic component with improved withstand voltage characteristics |
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