JPH0758409A - Surface emitting semiconductor laser element - Google Patents
Surface emitting semiconductor laser elementInfo
- Publication number
- JPH0758409A JPH0758409A JP22378993A JP22378993A JPH0758409A JP H0758409 A JPH0758409 A JP H0758409A JP 22378993 A JP22378993 A JP 22378993A JP 22378993 A JP22378993 A JP 22378993A JP H0758409 A JPH0758409 A JP H0758409A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- bragg reflector
- distributed bragg
- current
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
- H01S5/0421—Electrical excitation ; Circuits therefor characterised by the semiconducting contacting layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
- H01S5/18308—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
- H01S5/18341—Intra-cavity contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/2205—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers
- H01S5/2222—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers having special electric properties
Landscapes
- Semiconductor Lasers (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、光通信などの光源に用
いる分布ブラッグ反射(DBR)型面発光半導体レーザ
素子に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a distributed Bragg reflection (DBR) type surface emitting semiconductor laser device used as a light source for optical communication.
【0002】[0002]
【従来技術】基板より垂直方向にレーザ光を出射する垂
直共振器型面発光半導体レーザ素子においては、低しき
い値動作を行うために高反射率反射鏡を形成することが
重要である。半導体多層膜からなる分布ブラッグ反射鏡
(DBR)は、この高反射率反射鏡として有望視されて
いる。2. Description of the Related Art In a vertical cavity surface emitting semiconductor laser device that emits laser light in a vertical direction from a substrate, it is important to form a high reflectivity reflecting mirror in order to perform a low threshold operation. A distributed Bragg reflector (DBR) made of a semiconductor multilayer film is regarded as a promising reflector with high reflectance.
【0003】従来の垂直共振器型面発光半導体レーザ素
子は、例えば図4に示すような構造をしている。図中、
1はn−InP基板、2はn−DBR層、3はGaIn
AsP活性層、4はp−InPクラッド層、5はp−I
nP埋め込み層、6はn−InP埋め込み層、7はp−
DBR層、8はp+ −InGaAsコンタクト層、9は
p電極、10はn電極である。半導体多層膜からなるn
−DBR層2およびp−DBR層7は、相対的に屈折率
が高く、バンドギャップエネルギーが小さいGaInA
sP層と、相対的に屈折率が低く、バンドギャップエネ
ルギーが大きいInP層のペアの繰り返しで構成されて
おり、高い反射率を有する。層厚は、各々発振波長に対
して1/4光学波長である。A conventional vertical cavity surface emitting semiconductor laser device has, for example, a structure as shown in FIG. In the figure,
1 is an n-InP substrate, 2 is an n-DBR layer, 3 is GaIn
AsP active layer, 4 p-InP clad layer, 5 p-I
nP buried layer, 6 is n-InP buried layer, 7 is p-
The DBR layer, 8 is a p + -InGaAs contact layer, 9 is a p electrode, and 10 is an n electrode. N consisting of semiconductor multilayer film
The -DBR layer 2 and the p-DBR layer 7 have a relatively high refractive index and a small band gap energy of GaInA.
The sP layer and the InP layer having a relatively low refractive index and a large band gap energy are repeatedly formed, and have a high reflectance. The layer thicknesses are each 1/4 optical wavelength with respect to the oscillation wavelength.
【0004】ところで、半導体多層膜DBRはヘテロ構
造特有なバンド構造を有するため、ヘテロ障壁の繰り返
しにより、素子抵抗が高くなるという問題がある。そこ
で、この抵抗を下げるためには、半導体多層膜の不純物
濃度を高める必要があり、特に、移動度の低いp−DB
Rにおいては、n−DBR以上に不純物濃度を高める必
要がある。また、他の抵抗を下げる方法としては、半導
体多層膜のバンドギャップエネルギーが大きい方の層の
みにドープして、部分的に不純物濃度を高めるモジュレ
ーションドーピングを施してもよく、こうすると一層抵
抗を下げることができる。By the way, since the semiconductor multi-layered film DBR has a band structure peculiar to the hetero structure, there is a problem that the element resistance becomes high due to repetition of the hetero barrier. Therefore, in order to reduce this resistance, it is necessary to increase the impurity concentration of the semiconductor multilayer film, and in particular, p-DB having a low mobility is required.
In R, it is necessary to increase the impurity concentration above n-DBR. As another method of lowering the resistance, only the layer having a larger band gap energy of the semiconductor multilayer film may be doped to carry out modulation doping to partially increase the impurity concentration, which further lowers the resistance. be able to.
【0005】[0005]
【発明が解決しようとする課題】しかしながら、上述の
ように半導体多層膜DBRの不純物濃度を高めても、p
−DBRの場合には抵抗の低減に限界があるため、p−
DBRを用いると、それによる発熱の影響を避けること
ができない。更に、不純物濃度が高くなると、光の吸収
損失も高くなるため、しきい値電流が増加するという問
題があった。However, even if the impurity concentration of the semiconductor multilayer film DBR is increased as described above, p
-In the case of DBR, there is a limit to the reduction of resistance, so p-
When the DBR is used, the influence of heat generation due to it cannot be avoided. Further, when the impurity concentration becomes high, the absorption loss of light also becomes high, and there is a problem that the threshold current increases.
【0006】[0006]
【課題を解決するための手段】本発明は上記問題点を解
決した面発光半導体レーザ素子を提供するもので、半導
体基板と、該半導体基板上に設けられた活性層を含む半
導体層と、該半導体層上に設けられた半導体多層膜から
なる分布ブラッグ反射鏡とを備え、前記分布ブラッグ反
射鏡には垂直方向にレーザ光を出射する光出射部を有
し、光出射部側に設けられた第1電極と、前記半導体基
板側に設けられた第2電極とを備えた面発光半導体レー
ザ素子において、前記半導体層と分布ブラッグ反射鏡と
の間に電流拡散層を設け、第1電極は前記電流拡散層上
に分布ブラッグ反射鏡を介さずに設けたことを特徴とす
るものである。SUMMARY OF THE INVENTION The present invention provides a surface-emitting semiconductor laser device that solves the above-mentioned problems, including a semiconductor substrate, a semiconductor layer including an active layer provided on the semiconductor substrate, A distributed Bragg reflector made of a semiconductor multilayer film provided on a semiconductor layer, and the distributed Bragg reflector has a light emitting portion for emitting laser light in a vertical direction, and is provided on the light emitting portion side. In a surface emitting semiconductor laser device including a first electrode and a second electrode provided on the semiconductor substrate side, a current diffusion layer is provided between the semiconductor layer and the distributed Bragg reflector, and the first electrode is the It is characterized in that it is provided on the current diffusion layer without a distributed Bragg reflector.
【0007】[0007]
【作用】上述のように、半導体層の分布ブラッグ反射鏡
に接する側に電流拡散層を設け、第1電極は前記電流拡
散層上に分布ブラッグ反射鏡を介さずに設けると、注入
電流は、分布ブラッグ反射鏡を通らずに、第1電極から
電流拡散層を通って活性層に注入することができる。従
って、素子の注入電流に対する抵抗が低下し、発熱を防
ぐことができるとともに、分布ブラッグ反射鏡に抵抗を
下げるための不純物を注入する必要がないので、光の吸
収損失は低減し、従って、しきい値電流が低減する。As described above, when the current diffusion layer is provided on the side of the semiconductor layer in contact with the distributed Bragg reflector, and the first electrode is provided on the current diffused layer without the distributed Bragg reflector, the injected current is The active layer can be injected from the first electrode through the current diffusion layer without passing through the distributed Bragg reflector. Therefore, the resistance to the injection current of the element is reduced, heat generation can be prevented, and since it is not necessary to inject the impurity for reducing the resistance into the distributed Bragg reflector, the light absorption loss is reduced, and therefore, The threshold current is reduced.
【0008】[0008]
【実施例】以下、図面に示した実施例に基づいて本発明
を詳細に説明する。図1は、本発明にかかる面発光半導
体レーザ素子の一実施例の断面図である。図中、11は
n−InP基板、12はn−DBR層、13はGaIn
AsP活性層(λg =1.3〜1.6μm)、14はp
−InPクラッド層、15はp−InP埋め込み層、1
6はn−InP埋め込み層、17はp+ −InP電流拡
散層、18はp+ −InGaAsコンタクト層、19は
光吸収損を減らすためにノンドーピングであるノンドー
プDBR層、20はp電極、21はn電極である。n−
DBR層12およびノンドープDBR層19は、25〜
30ペアのGaInAsP井戸層とInP障壁層から構
成され、井戸層と障壁層の厚さはそれぞれ1/4光学波
長である。また、p+ −InP電流拡散層17は、厚さ
が0.1μm以下であり、不純物濃度が5×1018cm
-3以上である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the embodiments shown in the drawings. FIG. 1 is a sectional view of an embodiment of a surface emitting semiconductor laser device according to the present invention. In the figure, 11 is an n-InP substrate, 12 is an n-DBR layer, and 13 is GaIn.
AsP active layer (λ g = 1.3 to 1.6 μm), 14 is p
-InP clad layer, 15 is a p-InP buried layer, 1
6 is an n-InP buried layer, 17 is a p + -InP current diffusion layer, 18 is a p + -InGaAs contact layer, 19 is a non-doped DBR layer which is non-doping to reduce light absorption loss, 20 is a p-electrode, 21 Is the n-electrode. n-
The DBR layer 12 and the non-doped DBR layer 19 are 25-
It is composed of 30 pairs of GaInAsP well layers and InP barrier layers, and the thicknesses of the well layers and barrier layers are each 1/4 optical wavelength. The p + -InP current diffusion layer 17 has a thickness of 0.1 μm or less and an impurity concentration of 5 × 10 18 cm 2.
-3 or more.
【0009】本実施例は、図2に示す工程で作製した。
即ち、 1)先ず、n−InP基板11上に、n−DBR層1
2、GaInAsP活性層13、p−InPクラッド層
14を順次積層する(図2(a))。 2)次いで、円形または矩形状のメサを形成後、p−I
nP埋め込み層15、n−InP埋め込み層16で埋め
込む(図2(b))。 3)次いで、p−InPクラッド層14、p+ −InP
電流拡散層17、p+ −InGaAsコンタクト層18
を順次積層する(図2(c))。 4)次いで、p+ −InP電流拡散層17を利用して、
メサ上部のコンタクト層18を選択エッチングで除去し
た後、ノンドープDBR層19を積層する(図2
(d))。 5)次いで、活性層13上部以外のDBR層19をエッ
チングで除いて、コンタクト層18を表面に現し、その
上にp電極20を形成する。また、基板11の裏面にn
電極21を形成する(図2(e))。This embodiment was manufactured by the process shown in FIG.
That is, 1) First, the n-DBR layer 1 is formed on the n-InP substrate 11.
2, the GaInAsP active layer 13, and the p-InP clad layer 14 are sequentially stacked (FIG. 2A). 2) Then, after forming a circular or rectangular mesa, p-I
The nP burying layer 15 and the n-InP burying layer 16 are buried (FIG. 2B). 3) Then, p-InP clad layer 14, p + -InP
Current diffusion layer 17, p + -InGaAs contact layer 18
Are sequentially laminated (FIG. 2C). 4) Next, using the p + -InP current diffusion layer 17,
After removing the contact layer 18 on the mesa by selective etching, a non-doped DBR layer 19 is laminated (FIG. 2).
(D)). 5) Next, the DBR layer 19 other than the upper part of the active layer 13 is removed by etching to expose the contact layer 18 on the surface, and the p electrode 20 is formed thereon. Also, on the back surface of the substrate 11,
The electrode 21 is formed (FIG. 2E).
【0010】本実施例では、p電極20から注入された
電流は、DBR層19を通らずに、p+ −InP電流拡
散層17で拡散し、p−InPクラッド層14を通って
活性層13に入る。活性層13の周りは、p−InP埋
め込み層15、n−InP埋め込み層16で埋め込まれ
ているので、電流は活性層13のみに流れる。本実施例
では、図4に示した従来例に比較して、しきい値電圧が
約半減した。In this embodiment, the current injected from the p-electrode 20 does not pass through the DBR layer 19 but diffuses in the p + -InP current diffusion layer 17, passes through the p-InP clad layer 14, and then becomes active layer 13. to go into. Since the periphery of the active layer 13 is filled with the p-InP burying layer 15 and the n-InP burying layer 16, the current flows only in the active layer 13. In this example, the threshold voltage was reduced by half compared to the conventional example shown in FIG.
【0011】図3は、他の実施例の断面図である。本実
施例では、n−InP基板11の活性層13下部に相当
する部分を除去し、そこに誘電体多層膜ミラー25を形
成したものである。23はn−InPクラッド層、24
はn−GaInAsaPエッチングストップ層である。
本実施例では、前記実施例のように基板11側のDBR
層12を電流が通らないため、より一層素子抵抗が減少
する。FIG. 3 is a sectional view of another embodiment. In the present embodiment, the part corresponding to the lower part of the active layer 13 of the n-InP substrate 11 is removed, and the dielectric multilayer film mirror 25 is formed there. 23 is an n-InP clad layer, 24
Is an n-GaInAsaP etching stop layer.
In this embodiment, the DBR on the substrate 11 side is the same as in the previous embodiment.
Since no current passes through the layer 12, the device resistance is further reduced.
【0012】[0012]
【発明の効果】以上説明したように本発明によれば、半
導体基板と、該半導体基板上に設けられた活性層を含む
半導体層と、該半導体層上に設けられた半導体多層膜か
らなる分布ブラッグ反射鏡とを備え、前記分布ブラッグ
反射鏡には垂直方向にレーザ光を出射する光出射部を有
し、光出射部側に設けられた第1電極と、前記半導体基
板側に設けられた第2電極とを備えた面発光半導体レー
ザ素子において、前記半導体層と分布ブラッグ反射鏡と
の間に電流拡散層を設け、第1電極は前記電流拡散層上
に分布ブラッグ反射鏡を介さずに設けてあるため、素子
抵抗が低減し、しきい値電流が低減するという優れた効
果がある。As described above, according to the present invention, a distribution including a semiconductor substrate, a semiconductor layer including an active layer provided on the semiconductor substrate, and a semiconductor multilayer film provided on the semiconductor layer. A Bragg reflector, and the distributed Bragg reflector has a light emitting portion for emitting laser light in a vertical direction, a first electrode provided on the light emitting portion side, and a semiconductor substrate side. In a surface emitting semiconductor laser device including a second electrode, a current diffusion layer is provided between the semiconductor layer and the distributed Bragg reflector, and the first electrode is provided on the current diffused layer without the distributed Bragg reflector. Since it is provided, there is an excellent effect that the element resistance is reduced and the threshold current is reduced.
【図1】本発明に係る面発光半導体レーザ素子の一実施
例の断面図である。FIG. 1 is a sectional view of an embodiment of a surface emitting semiconductor laser device according to the present invention.
【図2】(a)〜(e)は、上記実施例の製作工程の説
明図である。2 (a) to 2 (e) are explanatory views of a manufacturing process of the above embodiment.
【図3】本発明の他の実施例の断面図である。FIG. 3 is a sectional view of another embodiment of the present invention.
【図4】従来の面発光半導体レーザ素子の断面図であ
る。FIG. 4 is a sectional view of a conventional surface emitting semiconductor laser device.
11 基板 12 n−DBR層 13 活性層 14 p−InPクラッド層 15 p−InP埋め込み層 16 n−InP埋め込み層 17 電流拡散層 18 コンタクト層 19 ノンドープDBR層 20 p電極 21 n電極 23 n−InPクラッド層 24 n−GaInAsaPエッチングストップ層 25 誘電体多層膜ミラー 11 substrate 12 n-DBR layer 13 active layer 14 p-InP clad layer 15 p-InP buried layer 16 n-InP buried layer 17 current diffusion layer 18 contact layer 19 non-doped DBR layer 20 p-electrode 21 n-electrode 23 n-InP clad Layer 24 n-GaInAsaP etching stop layer 25 Dielectric multilayer film mirror
Claims (1)
れた活性層を含む半導体層と、該半導体層上に設けられ
た半導体多層膜からなる分布ブラッグ反射鏡とを備え、
前記分布ブラッグ反射鏡には垂直方向にレーザ光を出射
する光出射部を有し、光出射部側に設けられた第1電極
と、前記半導体基板側に設けられた第2電極とを備えた
面発光半導体レーザ素子において、前記半導体層と分布
ブラッグ反射鏡との間に電流拡散層を設け、第1電極は
前記電流拡散層上に分布ブラッグ反射鏡を介さずに設け
たことを特徴とする面発光半導体レーザ素子。1. A semiconductor substrate, a semiconductor layer including an active layer provided on the semiconductor substrate, and a distributed Bragg reflector made of a semiconductor multilayer film provided on the semiconductor layer,
The distributed Bragg reflector has a light emitting portion for emitting laser light in a vertical direction, and includes a first electrode provided on the light emitting portion side and a second electrode provided on the semiconductor substrate side. In the surface emitting semiconductor laser device, a current diffusion layer is provided between the semiconductor layer and the distributed Bragg reflector, and the first electrode is provided on the current diffused layer without the distributed Bragg reflector. Surface emitting semiconductor laser device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22378993A JPH0758409A (en) | 1993-08-17 | 1993-08-17 | Surface emitting semiconductor laser element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22378993A JPH0758409A (en) | 1993-08-17 | 1993-08-17 | Surface emitting semiconductor laser element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0758409A true JPH0758409A (en) | 1995-03-03 |
Family
ID=16803741
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP22378993A Pending JPH0758409A (en) | 1993-08-17 | 1993-08-17 | Surface emitting semiconductor laser element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0758409A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0748007A2 (en) * | 1995-06-08 | 1996-12-11 | Hewlett-Packard Company | Surface-emitting lasers |
KR100269145B1 (en) * | 1997-12-29 | 2000-10-16 | 윤종용 | Surface emitting laser diode and method for manufacturing it |
JP2009246051A (en) * | 2008-03-28 | 2009-10-22 | Kyocera Corp | Light-emitting device and method of manufacturing the same |
-
1993
- 1993-08-17 JP JP22378993A patent/JPH0758409A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0748007A2 (en) * | 1995-06-08 | 1996-12-11 | Hewlett-Packard Company | Surface-emitting lasers |
EP0748007A3 (en) * | 1995-06-08 | 1997-12-17 | Hewlett-Packard Company | Surface-emitting lasers |
KR100269145B1 (en) * | 1997-12-29 | 2000-10-16 | 윤종용 | Surface emitting laser diode and method for manufacturing it |
JP2009246051A (en) * | 2008-03-28 | 2009-10-22 | Kyocera Corp | Light-emitting device and method of manufacturing the same |
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