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JPH0625005Y2 - Pressure contact type semiconductor device - Google Patents

Pressure contact type semiconductor device

Info

Publication number
JPH0625005Y2
JPH0625005Y2 JP1987007183U JP718387U JPH0625005Y2 JP H0625005 Y2 JPH0625005 Y2 JP H0625005Y2 JP 1987007183 U JP1987007183 U JP 1987007183U JP 718387 U JP718387 U JP 718387U JP H0625005 Y2 JPH0625005 Y2 JP H0625005Y2
Authority
JP
Japan
Prior art keywords
support plate
semiconductor substrate
ring
pressure contact
outer peripheral
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1987007183U
Other languages
Japanese (ja)
Other versions
JPS63115218U (en
Inventor
維豊 矢島
剛三 塚田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP1987007183U priority Critical patent/JPH0625005Y2/en
Publication of JPS63115218U publication Critical patent/JPS63115218U/ja
Application granted granted Critical
Publication of JPH0625005Y2 publication Critical patent/JPH0625005Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/741Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L24/743Apparatus for manufacturing layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/741Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L2224/743Apparatus for manufacturing layer connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Description

【考案の詳細な説明】 〔産業上の利用分野〕 本考案は、PN接合あるいはショットキバリアのような
整流接合を備えた半導体基板を半導体と近似した熱膨張
係数を有する支持板に固着しないで、絶縁環とその両端
面に可撓性部分を介して固着された電極体とからなる平
形容器中に収容して容器外からの圧力により半導体基板
と支持板とを接触せしめる圧接型半導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention does not fix a semiconductor substrate having a pn junction or a rectifying junction such as a Schottky barrier to a support plate having a thermal expansion coefficient similar to that of a semiconductor. The present invention relates to a pressure-contact type semiconductor device which is housed in a flat container composed of an insulating ring and electrode bodies fixed to both end faces of the insulating ring via flexible portions and which brings a semiconductor substrate and a support plate into contact with each other by pressure from outside the container.

〔従来の技術〕[Conventional technology]

半導体基板とモリブデン,タングステンのような半導体
と近似した熱膨張係数を有する支持板とを固着すると、
熱膨張係数が完全には一致していないために製造工程中
あるいは使用中の温度変化により半導体基板に歪が生
じ、特性に影響が及ぶことがある。そのため第2図に示
すように、絶縁環1とそれに変形可能な薄い金属環2で
結合される上,下電極体3とからなる平形容器内に半導
体基板4および上,下Mo支持板5を収容し、両電極体3
に加えられる加圧力により基板4と両支持板5ならびに
各支持板5と上下電極体3の間を加圧接触させたものが
知られている。この際、半導体基板4と両支持板5の板
面に平行方向の位置ずれを防ぐために、弗素樹脂などか
らなる絶縁環6によってその周囲を囲むことも知られて
いる。
When a semiconductor substrate and a supporting plate having a thermal expansion coefficient similar to that of a semiconductor such as molybdenum or tungsten are fixed,
Since the coefficients of thermal expansion do not completely match, the semiconductor substrate may be distorted due to temperature changes during the manufacturing process or during use, which may affect the characteristics. Therefore, as shown in FIG. 2, the semiconductor substrate 4 and the upper and lower Mo support plates 5 are placed in a flat container composed of the insulating ring 1 and the deformable thin metal ring 2 and the upper and lower electrode bodies 3. Accommodate, both electrode body 3
It is known that the substrate 4 and both support plates 5 and each support plate 5 and the upper and lower electrode bodies 3 are brought into pressure contact with each other by a pressing force applied to. At this time, it is also known that the periphery of the semiconductor substrate 4 and the supporting plates 5 are surrounded by an insulating ring 6 made of a fluororesin or the like in order to prevent displacement in a direction parallel to the plate surfaces.

〔考案が解決しようとする問題点〕[Problems to be solved by the invention]

しかし、このような半導体装置は、両電極体3間に圧力
が加わらないときには基板4および支持板5が容器内で
縦方向に移動するため、運搬中などの振動により半導体
基板4が支持板5と衝突して欠けるなどの破損が生じ、
特性が損なわれる欠点があった。
However, in such a semiconductor device, since the substrate 4 and the supporting plate 5 move vertically in the container when no pressure is applied between the electrode bodies 3, the semiconductor substrate 4 causes the supporting plate 5 to move due to vibration during transportation. It collides with and is damaged such as chipping,
There was a drawback that the characteristics were impaired.

本考案は、上述の欠点を除き、電極体間の圧力により各
部材間の加圧接触が行われていない状態で外部から機械
的な力が加わっても、半導体基板に破損の生ずることの
ない半導体装置を提供することを目的とする。
Except for the above-mentioned drawbacks, the present invention does not cause damage to the semiconductor substrate even if a mechanical force is applied from the outside in a state where the pressure contact between the members is not made by the pressure between the electrode bodies. An object is to provide a semiconductor device.

〔問題点を解決するための手段〕[Means for solving problems]

上記の目的を達成するために、本考案は、絶縁環とその
両端面に可撓性部分を介して各固着された第1,第2の
電極体とからなる容器内に第1,第2の支持板にて挟持
された半導体基板が収容され、容器外から両電極体間に
加えられる圧力により半導体基板と支持板,支持板と電
極体が相互に加圧接触するものにおいて、前記第1,第
2の支持板の絶縁環方向の外周端に少なくとも1つの切
り欠きが全周に形成され、半導体基板と支持板とが支持
板の板面に垂直方向の変位を制限する伸縮性,絶縁性を
持った環状樹脂体に囲まれ、前記環状樹脂体が前記支持
板の外周端及び切り欠きと半導体基板の外周端とに周接
するものとする。
In order to achieve the above object, the present invention provides a first and second container in a container, which includes an insulating ring and first and second electrode bodies fixed to both end surfaces of the insulating ring through flexible portions. The semiconductor substrate sandwiched between the support plates is housed, and the semiconductor substrate and the support plate and the support plate and the electrode body are brought into pressure contact with each other by the pressure applied between the electrode bodies from the outside of the container. , At least one notch is formed all around the outer peripheral edge of the second support plate in the insulating ring direction, and the semiconductor substrate and the support plate are stretchable and insulative to limit displacement in a direction perpendicular to the plate surface of the support plate. It is assumed that the annular resin body is surrounded by the annular resin body having the property, and the annular resin body makes circumferential contact with the outer peripheral edge and the notch of the support plate and the outer peripheral edge of the semiconductor substrate.

〔作用〕[Action]

樹脂体が支持板の外周端と全周に形成された切り欠きに
周接し支持板の縦方向の移動を制限することにより、運
搬中などに機械的な力が加わっても半導体基板が支持板
と強く衝突することがなく、破損のおそれがない。ま
た、樹脂体が絶縁性をもつため支持板あるいは電極体間
の短絡のおそれがなく、伸縮性をもつため電極体間の圧
力による基板,支持板間の接触が妨げられることがな
い。
Since the resin body makes circumferential contact with the outer peripheral edge of the support plate and the notches formed on the entire circumference to limit the vertical movement of the support plate, the semiconductor substrate is supported by the support plate even if mechanical force is applied during transportation. It does not collide strongly with and there is no risk of damage. Further, since the resin body has an insulating property, there is no possibility of short circuit between the support plate or the electrode body, and since the resin body has elasticity, the contact between the substrate and the support plate is not hindered by the pressure between the electrode bodies.

〔実施例〕〔Example〕

第1図(a),(b)は本考案の一実施例を示し、第1図(a)
に示すように60mmの直径を有するシリコン基板4は厚さ
300μmで、図示しないが一面にMo層を被着してショッ
トキバリアが形成され、Al箔を介して2枚のMo支持板5
の間にはさまれている。Mo支持板5は反基板側の径が小
さくされて段差51を有する。両支持板5およびシリコン
基板4の外周には環状絶縁体7が密着している。環状絶
縁体7は、厚さ5mm程度でデュポン社商品名テフロンあ
るいは日東電化(株)商品名ニトフロンのような4弗化
エチレン樹脂のシールテープを支持板の周囲にまきつけ
るだけでもよく、あるいは熱収縮性のシリコーンゴムチ
ューブを嵌めるか、シリコーンゴム環を伸ばして嵌めて
もよい。支持板5には段差があるので、巻き付けた絶縁
テープあるいは嵌めた絶縁環が支持板の厚さ方向にずれ
ることがない。
1 (a) and 1 (b) show an embodiment of the present invention, and FIG.
The silicon substrate 4 having a diameter of 60 mm as shown in
Although not shown, a Mo layer is deposited on one surface at 300 μm to form a Schottky barrier, and two Mo support plates 5 are formed via an Al foil.
It is sandwiched between. The Mo support plate 5 has a step 51 because the diameter on the side opposite to the substrate is reduced. An annular insulator 7 is in close contact with the outer peripheries of both support plates 5 and silicon substrate 4. The ring-shaped insulator 7 may have a thickness of about 5 mm and may be simply wrapped around a supporting plate with a sealing tape made of tetrafluoroethylene resin such as Teflon under the trade name of DuPont or Nitoflon under the trade name of Nitto Denka Co., Ltd. A flexible silicone rubber tube may be fitted, or a silicone rubber ring may be extended and fitted. Since the supporting plate 5 has a step, the wound insulating tape or the fitted insulating ring does not shift in the thickness direction of the supporting plate.

第1図(b)は、このようにして一体にされたシリコン基
板4と支持板5を第2図の場合と同様な平形容器に収容
した状態を示す。
FIG. 1 (b) shows a state in which the silicon substrate 4 and the support plate 5 thus integrated are housed in the same flat container as in the case of FIG.

第3図(a),(b)は別の実施例を示し、この場合はシリコ
ン基板4とそれぞれ両面に段差51が形成されたMo支持板
5の周囲に、2分割されて半円状の4弗化エチレン樹脂
環7が嵌められている。これによりシリコン基板4,支
持板5は位置決め、固定される。この場合は、円形の環
状体を嵌めるより装着が容易であるという利点がある。
3 (a) and 3 (b) show another embodiment. In this case, a silicon substrate 4 and a Mo support plate 5 having steps 51 formed on both sides are divided into two semicircular portions. A tetrafluoroethylene resin ring 7 is fitted. As a result, the silicon substrate 4 and the support plate 5 are positioned and fixed. In this case, there is an advantage that the mounting is easier than fitting a circular annular body.

〔考案の効果〕[Effect of device]

本考案によれば、平形容器内に収容される半導体基板と
両側の支持板とを外周を囲む伸縮性,絶縁性の環状樹脂
体で位置決め、固定するもので、両電極体間に圧力が加
わらない運搬中等容器の縦方向に振動があっても半導体
基板と支持板の相対的位置の変動による衝突が防止さ
れ、また基板が容器との衝突からも保護されるので、基
板の欠けの生ずることがなく、信頼性の高い半導体装置
が得られる。
According to the present invention, a semiconductor substrate housed in a flat container and supporting plates on both sides are positioned and fixed by a stretchable and insulative annular resin body surrounding the outer periphery, and pressure is applied between both electrode bodies. Even if there is vibration in the vertical direction of the container during transportation, etc., the collision due to the change in the relative position of the semiconductor substrate and the support plate is prevented, and the substrate is protected from the collision with the container. And a highly reliable semiconductor device can be obtained.

【図面の簡単な説明】[Brief description of drawings]

第1図(a),(b)は本考案の一実施例を示し、(a)は半導体
基板と支持板の組立て後、(b)は容器に組込み後の断面
図、第2図は従来の半導体装置の断面図、第3図(a),
(b)は本考案の別の実施例の半導体基板と支持板の組立
て後を示し、(a)は断面図,(b)は平面図である。 1:絶縁環、3:電極体、4:シリコン基板、5:Mo支
持板、7:環状絶縁体。
1 (a) and 1 (b) show an embodiment of the present invention, (a) is a sectional view after assembling a semiconductor substrate and a supporting plate, (b) is a sectional view after being assembled in a container, and FIG. Sectional view of the semiconductor device of FIG.
FIG. 7B is a sectional view of the semiconductor substrate and the support plate according to another embodiment of the present invention after assembling, and FIG. 1: Insulating ring, 3: Electrode body, 4: Silicon substrate, 5: Mo support plate, 7: Ring insulator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】絶縁環とその両端面に可撓性部分を介して
各固着された第1,第2の電極体とからなる容器内に第
1,第2の支持板にて挟持された半導体基板が収容さ
れ、容器外から両電極体間に加えられる圧力により半導
体基板と支持板、支持板と電極体が相互に加圧接触する
ものにおいて、前記第1,第2の支持板の絶縁環方向の
外周端に少なくとも1つの切り欠きが全周に形成され、
半導体基板と支持板とが支持板の板面に垂直方向の変位
を制限する伸縮性,絶縁性を持った環状樹脂体に囲ま
れ、前記環状樹脂体が前記支持板の外周端及び切り欠き
と半導体基板の外周端とに周接することを特徴とする圧
接型半導体装置。
1. A first and a second support plates sandwiched in a container composed of an insulating ring and first and second electrode bodies fixed to both end surfaces of the insulating ring via flexible portions. Insulation of the first and second support plates in which the semiconductor substrate is housed and the semiconductor substrate and the support plate and the support plate and the electrode body are in pressure contact with each other due to the pressure applied from the outside of the container between the two electrode units. At least one notch is formed all around the outer peripheral edge in the ring direction,
The semiconductor substrate and the support plate are surrounded by a ring-shaped resin body having elasticity and insulation which limits displacement in a direction perpendicular to the plate surface of the support plate, and the ring-shaped resin body forms an outer peripheral end and a notch of the support plate. A pressure contact type semiconductor device, which is in contact with an outer peripheral edge of a semiconductor substrate.
JP1987007183U 1987-01-21 1987-01-21 Pressure contact type semiconductor device Expired - Lifetime JPH0625005Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987007183U JPH0625005Y2 (en) 1987-01-21 1987-01-21 Pressure contact type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987007183U JPH0625005Y2 (en) 1987-01-21 1987-01-21 Pressure contact type semiconductor device

Publications (2)

Publication Number Publication Date
JPS63115218U JPS63115218U (en) 1988-07-25
JPH0625005Y2 true JPH0625005Y2 (en) 1994-06-29

Family

ID=30790404

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987007183U Expired - Lifetime JPH0625005Y2 (en) 1987-01-21 1987-01-21 Pressure contact type semiconductor device

Country Status (1)

Country Link
JP (1) JPH0625005Y2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998043301A1 (en) * 1997-03-26 1998-10-01 Hitachi, Ltd. Flat semiconductor device and power converter employing the same

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55152049U (en) * 1979-04-18 1980-11-01
DE3308661A1 (en) * 1983-03-11 1984-09-20 SEMIKRON Gesellschaft für Gleichrichterbau u. Elektronik mbH, 8500 Nürnberg SEMICONDUCTOR ELEMENT
JPH0216534Y2 (en) * 1985-09-17 1990-05-08

Also Published As

Publication number Publication date
JPS63115218U (en) 1988-07-25

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