JPH06169051A - Lead frame and manufacture thereof and semiconductor package - Google Patents
Lead frame and manufacture thereof and semiconductor packageInfo
- Publication number
- JPH06169051A JPH06169051A JP4341622A JP34162292A JPH06169051A JP H06169051 A JPH06169051 A JP H06169051A JP 4341622 A JP4341622 A JP 4341622A JP 34162292 A JP34162292 A JP 34162292A JP H06169051 A JPH06169051 A JP H06169051A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- lead
- thin film
- heat
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 49
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000010409 thin film Substances 0.000 claims abstract description 105
- 239000003822 epoxy resin Substances 0.000 claims abstract description 31
- 229920000647 polyepoxide Polymers 0.000 claims abstract description 31
- 239000000919 ceramic Substances 0.000 claims abstract description 20
- 239000011810 insulating material Substances 0.000 claims abstract description 14
- 230000002093 peripheral effect Effects 0.000 claims abstract description 8
- 229920005989 resin Polymers 0.000 claims description 42
- 239000011347 resin Substances 0.000 claims description 42
- 229910052751 metal Inorganic materials 0.000 claims description 32
- 239000002184 metal Substances 0.000 claims description 32
- TZCXTZWJZNENPQ-UHFFFAOYSA-L barium sulfate Chemical compound [Ba+2].[O-]S([O-])(=O)=O TZCXTZWJZNENPQ-UHFFFAOYSA-L 0.000 claims description 24
- RAXXELZNTBOGNW-UHFFFAOYSA-N imidazole Natural products C1=CNC=N1 RAXXELZNTBOGNW-UHFFFAOYSA-N 0.000 claims description 24
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 18
- 238000000034 method Methods 0.000 claims description 15
- 239000003795 chemical substances by application Substances 0.000 claims description 13
- 239000004843 novolac epoxy resin Substances 0.000 claims description 11
- 230000008878 coupling Effects 0.000 claims description 10
- 238000010168 coupling process Methods 0.000 claims description 10
- 238000005859 coupling reaction Methods 0.000 claims description 10
- 239000000945 filler Substances 0.000 claims description 10
- 239000002904 solvent Substances 0.000 claims description 10
- 239000000377 silicon dioxide Substances 0.000 claims description 9
- FPZWZCWUIYYYBU-UHFFFAOYSA-N 2-(2-ethoxyethoxy)ethyl acetate Chemical compound CCOCCOCCOC(C)=O FPZWZCWUIYYYBU-UHFFFAOYSA-N 0.000 claims description 7
- 239000000203 mixture Substances 0.000 claims description 7
- 239000000049 pigment Substances 0.000 claims description 7
- 238000009413 insulation Methods 0.000 claims description 6
- 230000017525 heat dissipation Effects 0.000 abstract description 20
- 239000010410 layer Substances 0.000 description 136
- 239000010949 copper Substances 0.000 description 30
- 229910045601 alloy Inorganic materials 0.000 description 12
- 239000000956 alloy Substances 0.000 description 12
- 229910052802 copper Inorganic materials 0.000 description 12
- 239000000463 material Substances 0.000 description 12
- 239000010408 film Substances 0.000 description 11
- 239000011521 glass Substances 0.000 description 11
- 239000000758 substrate Substances 0.000 description 10
- 238000007740 vapor deposition Methods 0.000 description 10
- 230000000873 masking effect Effects 0.000 description 9
- 238000005530 etching Methods 0.000 description 8
- 238000001723 curing Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 7
- 239000000853 adhesive Substances 0.000 description 6
- 230000001070 adhesive effect Effects 0.000 description 6
- 239000004033 plastic Substances 0.000 description 6
- 239000000126 substance Substances 0.000 description 6
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 5
- 238000007650 screen-printing Methods 0.000 description 5
- 238000007789 sealing Methods 0.000 description 5
- 239000002356 single layer Substances 0.000 description 5
- 238000004544 sputter deposition Methods 0.000 description 5
- 229910000640 Fe alloy Inorganic materials 0.000 description 4
- 239000002313 adhesive film Substances 0.000 description 4
- 239000007822 coupling agent Substances 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 238000002844 melting Methods 0.000 description 4
- 230000008018 melting Effects 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 239000000843 powder Substances 0.000 description 4
- 238000003466 welding Methods 0.000 description 4
- 239000006087 Silane Coupling Agent Substances 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- 238000003825 pressing Methods 0.000 description 3
- SBASXUCJHJRPEV-UHFFFAOYSA-N 2-(2-methoxyethoxy)ethanol Chemical compound COCCOCCO SBASXUCJHJRPEV-UHFFFAOYSA-N 0.000 description 2
- LXBGSDVWAMZHDD-UHFFFAOYSA-N 2-methyl-1h-imidazole Chemical compound CC1=NC=CN1 LXBGSDVWAMZHDD-UHFFFAOYSA-N 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 2
- 229910001374 Invar Inorganic materials 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- 239000000460 chlorine Substances 0.000 description 2
- 125000003700 epoxy group Chemical group 0.000 description 2
- 125000000524 functional group Chemical group 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229910000833 kovar Inorganic materials 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 230000004043 responsiveness Effects 0.000 description 2
- 238000004904 shortening Methods 0.000 description 2
- ANRHNWWPFJCPAZ-UHFFFAOYSA-M thionine Chemical compound [Cl-].C1=CC(N)=CC2=[S+]C3=CC(N)=CC=C3N=C21 ANRHNWWPFJCPAZ-UHFFFAOYSA-M 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- RUEBPOOTFCZRBC-UHFFFAOYSA-N (5-methyl-2-phenyl-1h-imidazol-4-yl)methanol Chemical compound OCC1=C(C)NC(C=2C=CC=CC=2)=N1 RUEBPOOTFCZRBC-UHFFFAOYSA-N 0.000 description 1
- WUAFLNUJIPFKHQ-UHFFFAOYSA-N 1,3-bis[2-(2-methyl-1h-imidazol-5-yl)ethyl]urea Chemical compound N1C(C)=NC=C1CCNC(=O)NCCC1=CN=C(C)N1 WUAFLNUJIPFKHQ-UHFFFAOYSA-N 0.000 description 1
- FBHPRUXJQNWTEW-UHFFFAOYSA-N 1-benzyl-2-methylimidazole Chemical compound CC1=NC=CN1CC1=CC=CC=C1 FBHPRUXJQNWTEW-UHFFFAOYSA-N 0.000 description 1
- QKVROWZQJVDFSO-UHFFFAOYSA-N 2-(2-methylimidazol-1-yl)ethanamine Chemical compound CC1=NC=CN1CCN QKVROWZQJVDFSO-UHFFFAOYSA-N 0.000 description 1
- VDAIJDKQXDCJSI-UHFFFAOYSA-N 2-(2-methylimidazol-1-yl)ethylurea Chemical compound CC1=NC=CN1CCNC(N)=O VDAIJDKQXDCJSI-UHFFFAOYSA-N 0.000 description 1
- SFPKYQLUNZBNQA-UHFFFAOYSA-N 2-[4,5-bis(2-cyanoethoxymethyl)-2-phenylimidazol-1-yl]propanenitrile Chemical compound N#CC(C)N1C(COCCC#N)=C(COCCC#N)N=C1C1=CC=CC=C1 SFPKYQLUNZBNQA-UHFFFAOYSA-N 0.000 description 1
- POAOYUHQDCAZBD-UHFFFAOYSA-N 2-butoxyethanol Chemical compound CCCCOCCO POAOYUHQDCAZBD-UHFFFAOYSA-N 0.000 description 1
- ZNQVEEAIQZEUHB-UHFFFAOYSA-N 2-ethoxyethanol Chemical compound CCOCCO ZNQVEEAIQZEUHB-UHFFFAOYSA-N 0.000 description 1
- YTWBFUCJVWKCCK-UHFFFAOYSA-N 2-heptadecyl-1h-imidazole Chemical compound CCCCCCCCCCCCCCCCCC1=NC=CN1 YTWBFUCJVWKCCK-UHFFFAOYSA-N 0.000 description 1
- QXSNXUCNBZLVFM-UHFFFAOYSA-N 2-methyl-1h-imidazole;1,3,5-triazinane-2,4,6-trione Chemical compound CC1=NC=CN1.O=C1NC(=O)NC(=O)N1 QXSNXUCNBZLVFM-UHFFFAOYSA-N 0.000 description 1
- ZCUJYXPAKHMBAZ-UHFFFAOYSA-N 2-phenyl-1h-imidazole Chemical compound C1=CNC(C=2C=CC=CC=2)=N1 ZCUJYXPAKHMBAZ-UHFFFAOYSA-N 0.000 description 1
- RJIQELZAIWFNTQ-UHFFFAOYSA-N 2-phenyl-1h-imidazole;1,3,5-triazinane-2,4,6-trione Chemical compound O=C1NC(=O)NC(=O)N1.C1=CNC(C=2C=CC=CC=2)=N1 RJIQELZAIWFNTQ-UHFFFAOYSA-N 0.000 description 1
- LLEASVZEQBICSN-UHFFFAOYSA-N 2-undecyl-1h-imidazole Chemical compound CCCCCCCCCCCC1=NC=CN1 LLEASVZEQBICSN-UHFFFAOYSA-N 0.000 description 1
- UIDDPPKZYZTEGS-UHFFFAOYSA-N 3-(2-ethyl-4-methylimidazol-1-yl)propanenitrile Chemical compound CCC1=NC(C)=CN1CCC#N UIDDPPKZYZTEGS-UHFFFAOYSA-N 0.000 description 1
- SESYNEDUKZDRJL-UHFFFAOYSA-N 3-(2-methylimidazol-1-yl)propanenitrile Chemical compound CC1=NC=CN1CCC#N SESYNEDUKZDRJL-UHFFFAOYSA-N 0.000 description 1
- BVYPJEBKDLFIDL-UHFFFAOYSA-N 3-(2-phenylimidazol-1-yl)propanenitrile Chemical compound N#CCCN1C=CN=C1C1=CC=CC=C1 BVYPJEBKDLFIDL-UHFFFAOYSA-N 0.000 description 1
- SZUPZARBRLCVCB-UHFFFAOYSA-N 3-(2-undecylimidazol-1-yl)propanenitrile Chemical compound CCCCCCCCCCCC1=NC=CN1CCC#N SZUPZARBRLCVCB-UHFFFAOYSA-N 0.000 description 1
- MLLXXNHPVFZVTB-UHFFFAOYSA-N 3-[2-(2-methylimidazol-1-yl)ethylamino]propanenitrile Chemical compound CC1=NC=CN1CCNCCC#N MLLXXNHPVFZVTB-UHFFFAOYSA-N 0.000 description 1
- ZDZYGYFHTPFREM-UHFFFAOYSA-N 3-[3-aminopropyl(dimethoxy)silyl]oxypropan-1-amine Chemical compound NCCC[Si](OC)(OC)OCCCN ZDZYGYFHTPFREM-UHFFFAOYSA-N 0.000 description 1
- OXYZDRAJMHGSMW-UHFFFAOYSA-N 3-chloropropyl(trimethoxy)silane Chemical compound CO[Si](OC)(OC)CCCCl OXYZDRAJMHGSMW-UHFFFAOYSA-N 0.000 description 1
- LVNLBBGBASVLLI-UHFFFAOYSA-N 3-triethoxysilylpropylurea Chemical compound CCO[Si](OCC)(OCC)CCCNC(N)=O LVNLBBGBASVLLI-UHFFFAOYSA-N 0.000 description 1
- SJECZPVISLOESU-UHFFFAOYSA-N 3-trimethoxysilylpropan-1-amine Chemical compound CO[Si](OC)(OC)CCCN SJECZPVISLOESU-UHFFFAOYSA-N 0.000 description 1
- UUEWCQRISZBELL-UHFFFAOYSA-N 3-trimethoxysilylpropane-1-thiol Chemical compound CO[Si](OC)(OC)CCCS UUEWCQRISZBELL-UHFFFAOYSA-N 0.000 description 1
- TYOXIFXYEIILLY-UHFFFAOYSA-N 5-methyl-2-phenyl-1h-imidazole Chemical compound N1C(C)=CN=C1C1=CC=CC=C1 TYOXIFXYEIILLY-UHFFFAOYSA-N 0.000 description 1
- ULKLGIFJWFIQFF-UHFFFAOYSA-N 5K8XI641G3 Chemical compound CCC1=NC=C(C)N1 ULKLGIFJWFIQFF-UHFFFAOYSA-N 0.000 description 1
- QTBSBXVTEAMEQO-UHFFFAOYSA-M Acetate Chemical compound CC([O-])=O QTBSBXVTEAMEQO-UHFFFAOYSA-M 0.000 description 1
- 238000003855 Adhesive Lamination Methods 0.000 description 1
- QDZXJOMXPRWGFG-UHFFFAOYSA-N CCC1=NC=NC=N1.O=C1NC(=O)NC(=O)N1 Chemical compound CCC1=NC=NC=N1.O=C1NC(=O)NC(=O)N1 QDZXJOMXPRWGFG-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910017060 Fe Cr Inorganic materials 0.000 description 1
- 229910002544 Fe-Cr Inorganic materials 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- 229910018487 Ni—Cr Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- UUQQGGWZVKUCBD-UHFFFAOYSA-N [4-(hydroxymethyl)-2-phenyl-1h-imidazol-5-yl]methanol Chemical compound N1C(CO)=C(CO)N=C1C1=CC=CC=C1 UUQQGGWZVKUCBD-UHFFFAOYSA-N 0.000 description 1
- 239000002518 antifoaming agent Substances 0.000 description 1
- 125000003118 aryl group Chemical group 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 125000006297 carbonyl amino group Chemical group [H]N([*:2])C([*:1])=O 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 125000001309 chloro group Chemical group Cl* 0.000 description 1
- UPHIPHFJVNKLMR-UHFFFAOYSA-N chromium iron Chemical compound [Cr].[Fe] UPHIPHFJVNKLMR-UHFFFAOYSA-N 0.000 description 1
- 238000013329 compounding Methods 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 230000010485 coping Effects 0.000 description 1
- XCJYREBRNVKWGJ-UHFFFAOYSA-N copper(II) phthalocyanine Chemical compound [Cu+2].C12=CC=CC=C2C(N=C2[N-]C(C3=CC=CC=C32)=N2)=NC1=NC([C]1C=CC=CC1=1)=NC=1N=C1[C]3C=CC=CC3=C2[N-]1 XCJYREBRNVKWGJ-UHFFFAOYSA-N 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010828 elution Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- SBRXLTRZCJVAPH-UHFFFAOYSA-N ethyl(trimethoxy)silane Chemical compound CC[Si](OC)(OC)OC SBRXLTRZCJVAPH-UHFFFAOYSA-N 0.000 description 1
- 238000013007 heat curing Methods 0.000 description 1
- RBTKNAXYKSUFRK-UHFFFAOYSA-N heliogen blue Chemical compound [Cu].[N-]1C2=C(C=CC=C3)C3=C1N=C([N-]1)C3=CC=CC=C3C1=NC([N-]1)=C(C=CC=C3)C3=C1N=C([N-]1)C3=CC=CC=C3C1=N2 RBTKNAXYKSUFRK-UHFFFAOYSA-N 0.000 description 1
- 239000011256 inorganic filler Substances 0.000 description 1
- 229910003475 inorganic filler Inorganic materials 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000012860 organic pigment Substances 0.000 description 1
- 239000005022 packaging material Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- BPSIOYPQMFLKFR-UHFFFAOYSA-N trimethoxy-[3-(oxiran-2-ylmethoxy)propyl]silane Chemical compound CO[Si](OC)(OC)CCCOCC1CO1 BPSIOYPQMFLKFR-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Epoxy Resins (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Compositions Of Macromolecular Compounds (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明は、多ピン化に対応でき
かつ高速性、放熱性、低電源雑音特性にすぐれた半導体
パッケージを提供するためのリードフレームに係り、接
地板層とリード先端内側の空間部分に方形枠状電源部層
を形成したリードフレーム層とを耐熱性絶縁樹脂層を介
して積層し、リードフレーム層と電源部層上に耐熱性エ
ポキシ絶縁樹脂またはセラミックス薄膜を介して成膜し
たＡｌ薄膜配線にてインナーリードを形成した多層構造
からなり、インナーリードのファインピッチを実現し多
ピン化に対応でき、放熱性、低電源雑音特性にすぐれ、
かつワイヤボンディング特性を著しく向上させたリード
フレームとその製造方法並びにこのリードフレームを用
いた半導体パッケージに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame for providing a semiconductor package capable of coping with an increase in the number of pins, excellent in high speed, heat dissipation, and low power supply noise characteristics. A lead frame layer having a rectangular frame-shaped power supply layer formed in the space of the above is laminated via a heat-resistant insulating resin layer, and a heat-resistant epoxy insulating resin or ceramic thin film is formed on the lead frame layer and the power supply layer. It has a multi-layered structure in which the inner leads are formed by the filmed Al thin film wiring, and the inner leads have a fine pitch and can support a large number of pins, and have excellent heat dissipation and low power noise characteristics.
In addition, the present invention relates to a lead frame in which wire bonding characteristics are remarkably improved, a manufacturing method thereof, and a semiconductor package using the lead frame.
【０００２】[0002]
【従来の技術】近年、半導体素子の大集積化が急速に進
み、それに伴いリードフレームの多ピン化及びリードの
狭ピッチ化が要求されており、そこで小型・軽量でかつ
多ピン化に対応できる表面実装型のＱＦＰ（Ｑｕａｄ
Ｆｌａｔ Ｐａｃｋａｇｅ）が各種の半導体装置に用い
られている。2. Description of the Related Art In recent years, the integration of semiconductor devices has rapidly increased, and along with this, there has been a demand for a lead frame having a large number of pins and a lead pitch narrowing. Surface mount type QFP (Quad
Flat Package) is used in various semiconductor devices.
【０００３】また、半導体素子は小型軽量化とともに、
大容量化と高速作動性も要求されており、高速、多ピン
用途のパッケージにはセラミックＰＧＡ（Ｐｉｎ Ｇｒ
ｉｄＡｒｒａｙ）が用いられていた。このセラミックＰ
ＧＡはＱＦＰに比較して、多ピン化が容易で、放熱性が
すぐれており、また多層構造で低雑音特性が得やすい等
の特徴がある。In addition, the semiconductor element has become smaller and lighter,
High capacity and high speed operation are also required, and ceramic PGA (Pin Gr
idArray) was used. This ceramic P
Compared with QFP, GA has features that it is easy to increase the number of pins, has excellent heat dissipation, and has a multi-layered structure that facilitates obtaining low noise characteristics.
【０００４】今日ではラップトップコンピューターの高
速化と大容量化が進む中で、高速ＬＳＩに小型軽量化の
要請から表面実装型の軽量で安価なプラスチックＱＦＰ
が求められている。しかし、従来のプラスチックＱＦＰ
用の単層タイプのリードフレームは、上記の多ピン化に
対応すべく、リードの微細化がなされているが、リード
の微細化はリードの抵抗を高くし、それにより信号に歪
みを生じ、半導体素子の応答性が悪くなる等の問題点が
あった。また、放熱性は熱伝導性のよい単層Ｃｕリード
フレームを用いたプラスチックＱＦＰでも約１Ｗ程度で
あり、消費電力が２〜３Ｗの高速ＭＰＵ（ＭｉｃｒｏＰ
ｒｏｃｅｓｓｉｎｇ Ｕｎｉｔ）を搭載できない問題点
があった。Today's laptop computers are becoming faster and larger in capacity, and due to the demand for high-speed LSIs to be smaller and lighter, surface mount type lightweight and inexpensive plastic QFPs are used.
Is required. However, conventional plastic QFP
The single-layer type lead frame for use has been miniaturized in order to cope with the above-mentioned increase in the number of pins, but miniaturization of the lead increases the resistance of the lead, which causes signal distortion, There is a problem that the response of the semiconductor element is deteriorated. In addition, the heat dissipation is about 1 W even with a plastic QFP using a single-layer Cu lead frame with good thermal conductivity, and the power consumption is 2-3 W for high-speed MPU (MicroP
There was a problem that the processing unit could not be installed.
【０００５】従来のプラスチックＱＦＰ用の単層タイプ
のリードフレームは、金属帯条にプレス加工等により所
要の配線パターンを形成しているが、半導体装置の小型
化により金属帯条も薄帯化されているため、強度等の問
題により、リードの微細化にも限界があった。そこで、
半導体素子を搭載するステージとリードフレームを別個
に設けて、絶縁物を介してステージをリードフレームに
担持させることにより、パッケージの破損低減、放熱性
の向上、多ピン化をはかることが提案（特開昭６３−３
１８７６３号公報）されている。In a conventional single-layer type lead frame for a plastic QFP, a required wiring pattern is formed on a metal strip by pressing or the like, but the metal strip is thinned by downsizing of a semiconductor device. Therefore, there is a limit to miniaturization of leads due to problems such as strength. Therefore,
Providing a stage on which a semiconductor element is mounted and a lead frame separately, and supporting the stage on the lead frame via an insulator reduces package damage, improves heat dissipation, and increases the number of pins (special feature). Kaisho 63-3
18763).
【０００６】また、平らな金属板からなる電源層や接地
層とリードフレームを絶縁性両面接着フィルム等を介し
て積層することにより、電源、接地の面積を大きくし
て、放熱性を向上させることが提案（特開昭６３−２４
６８５１号公報）されている。Further, by laminating a power source layer or a ground layer made of a flat metal plate and a lead frame via an insulating double-sided adhesive film or the like, it is possible to increase the area of the power source and the ground and improve the heat dissipation. (Japanese Patent Laid-Open No. 63-24
6851).
【０００７】さらに、グランド用共通リードとリードフ
レームを積層させ、リードフレームに配列した多数本の
リードの内側空間部分に、電源用共通リードを設けて、
多数本のリードのうちの電源リードと接地リードの本数
を減らし、多ピン化することが提案（特開平１−９３１
５６号公報）されている。Further, a common lead for ground and a lead frame are laminated, and a common lead for power supply is provided in an inner space portion of a large number of leads arranged in the lead frame,
It is proposed to reduce the number of power supply leads and ground leads among a large number of leads to increase the number of pins (Japanese Patent Laid-Open No. 1-931).
No. 56).
【０００８】[0008]
【発明が解決しようとする課題】上述した従来の多層タ
イプのリードフレームは、従来の単層タイプのリードフ
レームに比べて放熱性の向上や多ピン化を実現している
が、リード先端ピッチは０．３ｍｍ程度とその狭ピッチ
化には限界があり、より一層の多ピン化要求には対応で
きなかった。また、電源層や接地層とリードフレームと
を積層接着させる際に、厚みが薄く絶縁効果にすぐれる
ポリイミドなどの絶縁性両面接着フィルムを用いている
が、該絶縁性両面接着フィルムが柔軟な素材であるため
に、ワイヤーボンダーのボンディング荷重と超音波出力
が下地側に発散し、ワイヤーの接合強度や接合の均一性
が悪化するのが原因でボンディング不良を招来する問題
があった。いずれにしても、従来の多層タイプのリード
フレームでは、高速ＬＳＩ用として必要な多ピン化、高
放熱性、低雑音特性の全てを満足するものが得られてい
ない。The above-mentioned conventional multi-layer type lead frame achieves improved heat dissipation and more pins than the conventional single-layer type lead frame, but the lead tip pitch is There is a limit to the narrow pitch of about 0.3 mm, and it has not been possible to meet the demand for further increase in the number of pins. In addition, when the power supply layer or the ground layer and the lead frame are laminated and bonded, an insulating double-sided adhesive film such as polyimide having a small thickness and excellent in insulating effect is used, but the insulating double-sided adhesive film is a flexible material. Therefore, the bonding load of the wire bonder and the ultrasonic output are diverged to the base side, and the bonding strength of the wire and the uniformity of the bonding are deteriorated, which causes a problem of defective bonding. In any case, conventional multi-layer type lead frames have not been able to satisfy all of the high pin count, high heat dissipation, and low noise characteristics required for high-speed LSI.
【０００９】出願人は、機械的強度並びに熱放散性にす
ぐれた金属パッケージとして、基板とチップを被包する
キャップに低熱膨張合金を用い、基板の絶縁層として高
融点ガラスを被着して、内部リードにＡｌまたはＣｕ薄
膜にて配置形成して外部リードとの接続を容易にし、こ
れら基板とキャップとを低融点ガラスにて一体化した構
成を提案（特開平２−３０３０５２号公報）した。The applicant used a low thermal expansion alloy for a cap enclosing a substrate and a chip as a metal package excellent in mechanical strength and heat dissipation, and applying a high melting point glass as an insulating layer of the substrate, A structure has been proposed (Japanese Patent Laid-Open No. 2-303052) in which the inner lead is arranged and formed of an Al or Cu thin film to facilitate the connection with the outer lead, and the substrate and the cap are integrated with a low melting point glass.
【００１０】また、出願人は、多ピン化、高速性、高放
熱性、低雑音特性にすぐれた半導体パッケージを提供す
るためのリードフレームとして、接地板層とリード先端
内側の空間部分に方形枠状電源部層を形成したリードフ
レーム層とを絶縁層のガラス薄膜にてガラス溶着し、リ
ードフレーム層と電源部層上にガラスまたはセラミック
薄膜を介して成膜したＡｌ薄膜配線にてインナーリード
を形成した多層構造からなるリードフレームを提案（特
願平３−２４６６００号）した。Further, the applicant has proposed, as a lead frame for providing a semiconductor package excellent in high pin count, high speed, high heat dissipation, and low noise characteristics, a rectangular frame in the space portion inside the tip of the ground plate layer and the lead. The lead frame layer on which the power supply layer is formed by glass welding with the glass thin film of the insulating layer, and the inner lead is formed by the Al thin film wiring formed on the lead frame layer and the power supply layer through the glass or ceramic thin film. A lead frame having a formed multilayer structure was proposed (Japanese Patent Application No. 3-246600).
【００１１】しかし、前者の金属パッケージでは、電磁
気的なシールド効果を有しすぐれた熱放散性が得られる
が、高速ＬＳＩ用として必要な多ピン化、高放熱性、低
雑音特性の全てを満足し、かつ安価に提供することがで
きない。また、上記の提案は共に、絶縁層に高融点ガラ
スや低融点ガラスなどのガラスを用いているが、該ガラ
スは接着時に破損したり、Ａｌ薄膜配線を形成するため
にガラスにフォトレジスト成膜する際に用いる現像液、
剥離液、水等によりガラスが侵されて、インナーリード
を形成するＡｌ薄膜が侵食される問題があった。However, the former metal package has an electromagnetic shielding effect and excellent heat dissipation, but satisfies all of the high pin count, high heat dissipation, and low noise characteristics required for high-speed LSI. However, it cannot be provided inexpensively. Further, both of the above proposals use glass such as high melting point glass or low melting point glass for the insulating layer. However, the glass is broken at the time of adhesion, or a photoresist film is formed on the glass in order to form Al thin film wiring. Developer used when
There is a problem that the glass is attacked by the stripping solution, water, etc., and the Al thin film forming the inner leads is attacked.
【００１２】この発明は、高速ＬＳＩ用として最適なセ
ラミックＰＧＡに匹敵する特性を有し、かつ表面実装型
で軽量かつ安価に提供できる高速ＬＳＩ用半導体パッケ
ージを実現できるリードフレームを目的とし、特に、イ
ンナーリードのファインピッチが可能で多ピン化に対応
でき、放熱性、低電源雑音特性にすぐれ、さらにワイヤ
ボンディング特性を著しく向上させたリードフレームと
その製造方法並びにこのリードフレームを用いた半導体
パッケージの提供を目的としている。An object of the present invention is to provide a lead frame capable of realizing a semiconductor package for a high speed LSI, which has characteristics comparable to those of a ceramic PGA which is optimum for a high speed LSI, and which can be provided at a low cost in a surface mount type. Fine pitch of the inner leads is possible, it is possible to support a large number of pins, it has excellent heat dissipation and low power noise characteristics, and the wire bonding characteristics are remarkably improved, and its manufacturing method and the semiconductor package using this lead frame. It is intended to be provided.
【００１３】[0013]
【課題を解決するための手段】この発明は、周辺部に複
数のリード用突起部を有する接地板層と、リード先端内
側の空間部分に各リードから離間させかつ電源用リード
と接続した方形枠状電源部層を形成したリードフレーム
層とが、リードの一部及び上記方形枠状電源部層を覆う
耐熱性絶縁樹脂層で溶着積層され、また該接地板層の突
起部とリードフレーム層の接地用リードが接続され、さ
らに該リードフレーム層上に方形枠状電源部層の中央部
を除いた所要部分に耐熱性絶縁樹脂薄膜またはセラミッ
クス薄膜からなる絶縁材層を介在させてＡｌ薄膜配線ま
たはＣｕ薄膜配線からなる信号配線層が形成されインナ
ーリードを構成したことを特徴とするリードフレームで
ある。SUMMARY OF THE INVENTION According to the present invention, there is provided a grounding plate layer having a plurality of lead projections in a peripheral portion thereof, and a rectangular frame which is separated from each lead in a space portion inside the lead tip and is connected to a power supply lead. And a lead frame layer on which a heat-resistant insulating resin layer covering a part of the lead and the rectangular frame-shaped power supply layer is welded and laminated, and the protrusion of the ground plate layer and the lead frame layer are formed. A grounding lead is connected, and an Al thin film wiring or an insulating thin film made of a heat-resistant insulating resin thin film or a ceramics thin film is interposed on a predetermined portion of the lead frame layer excluding the central portion of the rectangular frame-shaped power supply layer. A lead frame is characterized in that a signal wiring layer made of Cu thin film wiring is formed to constitute an inner lead.
【００１４】また、この発明は、（１）周辺部に複数の
突起部を有する所要形状の接地板層を打ち抜き可能に形
成した接地用金属板に、その少なくともチップとの接地
予定面にワイヤーボンデイング用薄膜を成膜し、さらに
上記接地予定面を除く所要面に耐熱性絶縁樹脂薄膜を設
ける工程と、または少なくとも半導体チップとの接地予
定面にワイヤーボンデイング用薄膜を成膜する代わり
に、予め該薄膜をクラッドした接地用金属板を用いて、
所要面に耐熱性絶縁樹脂薄膜を設ける工程と、（２）リ
ード先端内側の空間部分に各リードから離間させかつ電
源用リードと接続した方形枠状電源部層を有し打ち抜き
可能に形成したリードフレーム用金属板に、その方形枠
状電源部とワイヤーボンデイング予定面にワイヤーボン
デイング用薄膜を成膜し、さらに方形枠状電源部層の中
央部を除いた所要部分に耐熱性絶縁樹脂薄膜またはセラ
ミックス薄膜を設ける工程と、（３）接地用金属板上に
リードフレーム用金属板を載置し両者間の耐熱性絶縁樹
脂層にて接着して一体化した後、前記の耐熱性絶縁樹脂
薄膜またはセラミックス薄膜上にＡｌ薄膜配線またはＣ
ｕ薄膜配線を成膜してインナーリードを設け、かつ接地
板のリード用突起部とリードフレーム用金属板のリード
とを接続する工程とからなることを特徴とするリードフ
レームの製造方法である。Further, according to the present invention, (1) a metal plate for grounding, which is formed so that a grounding plate layer having a required shape and having a plurality of protrusions on the peripheral portion thereof can be punched, is wire-bonded at least to a surface to be grounded with a chip. Forming a thin film for heat treatment, and further providing a heat-resistant insulating resin thin film on a required surface other than the surface to be grounded, or instead of forming a thin film for wire bonding on the surface to be grounded with at least the semiconductor chip, in advance. Using a grounding metal plate clad with a thin film,
A step of providing a heat-resistant insulating resin thin film on a required surface, and (2) a lead formed in a space inside the tip of the lead, separated from each lead and having a rectangular frame-shaped power supply layer connected to the power supply lead, and capable of being punched. On the metal plate for the frame, the wire bonding thin film is formed on the rectangular frame power supply part and the wire bonding planned surface, and the heat resistant insulating resin thin film or ceramic is formed on the required part except the central part of the rectangular frame power part layer. A step of providing a thin film, and (3) placing the lead frame metal plate on the grounding metal plate and adhering them together with a heat resistant insulating resin layer between the two, and then forming the heat resistant insulating resin thin film or Al thin film wiring or C on the ceramic thin film
A method of manufacturing a lead frame, comprising: forming a thin film wiring of u, providing an inner lead, and connecting a lead projection of a ground plate and a lead of a lead frame metal plate.
【００１５】さらに、この発明は、上記構成のリードフ
レームを主体とし、接地板層に固着した半導体チップと
ともに樹脂にて封着したことを特徴とする半導体パッケ
ージである。また、この発明は、上記構成のリードフレ
ームを主体とし、接地板層の露出面を耐熱性絶縁樹脂で
封着し、接地板に固着した半導体チップとインナーリー
ドを被包した金属キャップが耐熱性絶縁樹脂を介して封
着したことを特徴とする半導体パッケージである。Further, the present invention is a semiconductor package, which is mainly composed of the lead frame having the above-mentioned structure and which is sealed with resin together with the semiconductor chip fixed to the ground plate layer. Further, the present invention is mainly composed of the lead frame having the above-mentioned structure, and the exposed surface of the ground plate layer is sealed with a heat-resistant insulating resin, and the semiconductor chip fixed to the ground plate and the metal cap encapsulating the inner lead are heat-resistant. It is a semiconductor package characterized by being sealed with an insulating resin.
【００１６】また、さらにこの発明は上記のリードフレ
ームとその製造方法並びに半導体パッケージにおいて、
上述の耐熱性絶縁エポキシ樹脂が、ノボラックエポキシ
樹脂４０％〜５０％と、予めカップリング処理を施した
硫酸バリウムとシリカを混合したフィラー４０％〜５０
％と、顔料１％〜２％及び溶剤カルビトールアセテート
８％〜９％とを含む主剤を１００部として、イミダゾー
ル系硬化剤を６部〜２０部を調合したものであることを
特徴とする。Further, the present invention provides the lead frame, the manufacturing method thereof, and the semiconductor package as described above,
The above-mentioned heat-resistant insulating epoxy resin is a novolac epoxy resin 40% to 50%, and a filler 40% to 50% which is a mixture of barium sulfate and silica subjected to a coupling treatment in advance.
%, The pigment is 1% to 2%, and the solvent carbitol acetate is 8% to 9% as a main component as 100 parts, and 6 to 20 parts of an imidazole-based curing agent is prepared.
【００１７】発明の好ましい実施態様 この発明に用いる方形枠状電源部を形成したリードフレ
ーム層及び突起部を有する接地板層の材料としては、Ｆ
ｅ−Ｎｉ系合金（４２Ｎｉ−Ｆｅ等）、Ｆｅ−Ｃｒ合金
（１８Ｃｒ−Ｆｅ等）、Ｆｅ−Ｎｉ−Ｃｒ系合金（４２
Ｎｉ−６Ｃｒ−Ｆｅ等）等の公知の低熱膨張合金が使用
できる。また、熱放散性を考慮して、熱伝導性の良いＣ
ｕ、Ｃｕ合金等を中間層に配置した上記低熱膨張合金の
クラッド材、例えば、インバー／Ｃｕ／インバー、コバ
ール／Ｃｕ／コバールを用いることもでき、さらに熱膨
張を考慮してリードフレーム層と接地板層は同材質にす
ることが好ましい。また、上記リードフレーム層及び接
地板層の厚みは、半導体パッケージの小型化並びに放熱
性等を考慮すると０．０５ｍｍ〜０．５ｍｍが好まし
い。Preferred Embodiments of the Invention As a material of the lead frame layer having the rectangular frame-shaped power source portion used in the present invention and the ground plate layer having the protrusions, F
e-Ni alloys (42Ni-Fe etc.), Fe-Cr alloys (18Cr-Fe etc.), Fe-Ni-Cr alloys (42
Known low thermal expansion alloys such as Ni-6Cr-Fe) can be used. Also, in consideration of heat dissipation, C having good thermal conductivity
It is also possible to use a clad material of the above-mentioned low thermal expansion alloy in which u, Cu alloy or the like is disposed in the intermediate layer, for example, Invar / Cu / Invar, Kovar / Cu / Kovar, and in addition to the thermal expansion, the contact with the lead frame layer is taken into consideration. It is preferable that the ground plane layers are made of the same material. Further, the thicknesses of the lead frame layer and the ground plate layer are preferably 0.05 mm to 0.5 mm in consideration of miniaturization of the semiconductor package and heat dissipation.
【００１８】リードフレーム層のリード先端、接地板層
の半導体チップとの接地予定面、リードフレーム層の方
形枠状電源部層等のワイヤーボンディング予定位置には
ワイヤーボンディング用薄膜を形成するが、薄膜材質と
しては予定したボンディングワイヤーの材質に応じてＡ
ｌ、Ｃｕ等の金属や合金膜を蒸着等の気相成膜方法にて
形成したり、あるいは形成したＡｌまたはＣｕ薄膜上に
ＡｕめっきなどのＡｕ薄膜を設けることによりワイヤー
ボンディングを確実に実施できる。例えば、Ａｌボンデ
ィングワイヤーを使用する場合には、予め所定のワイヤ
ーボンディング予定部にＡｌを成膜したり、Ａｕボンデ
ィングワイヤーを使用する場合には、該予定部にＣｕを
成膜した後にＡｕめっきを施してワイヤーボンディング
用薄膜を成膜することが好ましい。特に、突起部を有す
る接地板として、上記の低熱膨張合金の全面または一部
にボンディングワイヤーの材質に応じてＡｌまたはＣｕ
をクラッドしたものを用いるか、あるいは該クラッド面
上にＡｕめっきを施すことにより、ワイヤーボンディン
グ予定位置へのＡｌまたはＣｕ薄膜の成膜工程を省略す
ることができる。A thin film for wire bonding is formed on the tip of the lead of the lead frame layer, the surface of the grounding plate layer to be grounded to the semiconductor chip, the rectangular frame-shaped power source layer of the lead frame layer, and the like. The material is A depending on the material of the planned bonding wire.
Wire bonding can be reliably performed by forming a metal or alloy film such as l or Cu by a vapor phase film forming method such as vapor deposition, or by providing an Au thin film such as Au plating on the formed Al or Cu thin film. . For example, when an Al bonding wire is used, an Al film is formed in advance on a predetermined wire bonding planned portion, and when an Au bonding wire is used, a Cu film is formed on the predetermined portion and then Au plating is performed. It is preferable to form the thin film for wire bonding by applying it. In particular, as a ground plate having a protrusion, Al or Cu may be formed on the entire surface or a part of the low thermal expansion alloy depending on the material of the bonding wire.
It is possible to omit the film forming step of the Al or Cu thin film at the position to be wire-bonded by using the material clad with or by plating the surface of the clad with Au.
【００１９】耐熱性絶縁樹脂 この発明において、耐熱性絶縁樹脂は、接地板層とリー
ドフレーム層との接着積層用及び絶縁用、接地板層及び
リードフレーム層のワイヤーボンディング用薄膜並びに
Ａｌ薄膜配線またはＣｕ薄膜配線からなる信号配線層と
半導体素子とのワイヤーボンディング時のボンディング
荷重と超音波出力の下地発散防止並びにボンディング時
の高温に対抗できる耐熱性を必要とすることから、リー
ドフレームとの熱膨張係数差が小さく、機械的強度が高
く、耐熱性及び耐湿性に優れ、さらにＮａ、Ｃｌの溶出
性のない耐熱性絶縁エポキシ樹脂が望ましい。Heat-Resistant Insulating Resin In the present invention, the heat-resistant insulative resin is used for adhesion and lamination of the ground plate layer and the lead frame layer and for insulation, a wire bonding thin film for the ground plate layer and the lead frame layer, and an Al thin film wiring or Thermal expansion with the lead frame is required because the bonding load during wire bonding between the signal wiring layer made of Cu thin film wiring and the semiconductor element and the underlayer divergence of ultrasonic output are required and heat resistance that can withstand the high temperature during bonding is required. A heat-resistant insulating epoxy resin having a small coefficient difference, high mechanical strength, excellent heat resistance and moisture resistance, and no elution of Na and Cl is desirable.
【００２０】この発明による耐熱性絶縁エポキシ樹脂
は、芳香環や塩素環を主鎖に含み、一分子当たりのエポ
キシ基の数を増加させて（多官能化）、三次元網目構造
を密にし、加橋点距離を短くして、耐熱性を向上させる
ことを特徴とするもので、具体的な成分として、ノボラ
ックエポキシ樹脂（エポキシ当量１７３〜１８５、官能
基数２．４〜３．６）４０％〜５０％と、予めカップリ
ング剤でカップリング処理した沈降性硫酸バリウム及び
微細シリカ粉の混合物からなるフィラー４０％〜５０％
と、顔料１％〜２％及び溶剤カルビトールアセテート８
％〜９％とを含む主剤を１００部として、イミダゾール
系硬化剤を６部〜２０部を調合したものである。The heat-resistant insulating epoxy resin according to the present invention contains an aromatic ring or a chlorine ring in the main chain and increases the number of epoxy groups per molecule (multifunctionalization) to make the three-dimensional network structure denser, It is characterized by shortening the bridge point distance and improving heat resistance. As a specific component, novolac epoxy resin (epoxy equivalent 173 to 185, functional group number 2.4 to 3.6) 40% -40% to 50% and 40% to 50% filler composed of a mixture of precipitated barium sulfate and fine silica powder, which has been previously coupled with a coupling agent.
And pigment 1% to 2% and solvent carbitol acetate 8
% To 9% as the main component, and 6 to 20 parts of the imidazole-based curing agent is prepared.
【００２１】この発明の耐熱性絶縁エポキシ樹脂におい
て、ノボラックエポキシ樹脂は、上述の如く、耐熱性絶
縁エポキシ樹脂の耐熱性を向上させるために一分子当た
りのエポキシ基の数が多く、多官能なものが好ましい。
前記ノボラックエポキシ樹脂の主剤中に占める割合は、
４０％未満では接着力が低下し、５０％を越えると耐熱
性が低下するので４０％〜５０％が好ましい範囲であ
る。In the heat-resistant insulating epoxy resin of the present invention, the novolac epoxy resin is a polyfunctional one having a large number of epoxy groups per molecule in order to improve the heat resistance of the heat-resistant insulating epoxy resin as described above. Is preferred.
The ratio of the novolac epoxy resin in the main component is
If it is less than 40%, the adhesive strength will decrease, and if it exceeds 50%, the heat resistance will decrease, so 40% to 50% is the preferred range.
【００２２】この発明による耐熱性絶縁エポキシ樹脂に
おいて、ノボラックエポキシ樹脂に、カップリング処理
した沈降性硫酸バリウム及び微細シリカ粉の混合物から
かるフィラーを添加するのは、ノボラックエポキシ樹脂
の熱膨張係数を接地板層及びリードフレーム層に整合さ
せ、かつ耐熱性を向上させる効果があるためであり、さ
らに、フィラーを添加することで、ワイヤーボンディン
グ時にワイヤーボンダーのボンディング荷重と超音波出
力を集中させることでき、ワイヤーボンディング特性が
著しく向上させることができるためである。In the heat-resistant insulating epoxy resin according to the present invention, it is necessary to add a filler made of a mixture of the precipitated precipitated barium sulfate and fine silica powder, which has been subjected to the coupling treatment, to the novolac epoxy resin because the coefficient of thermal expansion of the novolac epoxy resin is added. Matching to the ground plane layer and the lead frame layer, and because it has the effect of improving the heat resistance, further, by adding a filler, it is possible to concentrate the bonding load and ultrasonic output of the wire bonder at the time of wire bonding, This is because the wire bonding characteristics can be significantly improved.
【００２３】前記フィラー中の沈降性硫酸バリウムは、
無機充填剤として耐熱性向上に効果があり、前記ノボラ
ックエポキシ樹脂との接着力を向上させるために予めカ
ップリング処理を施すことが好ましい。カップリング処
理を施す沈降性硫酸バリウムの粒径は、０．１μｍ未満
では印刷性が低下し、５０μｍを越えると耐熱性が低下
するため、０．１μｍ〜５０μｍが好ましい。The precipitated barium sulfate in the filler is
As an inorganic filler, it is effective in improving heat resistance, and it is preferable to perform a coupling treatment in advance in order to improve the adhesive force with the novolac epoxy resin. The particle size of the precipitated barium sulfate to be subjected to the coupling treatment is preferably 0.1 μm to 50 μm because the printability decreases when it is less than 0.1 μm and the heat resistance decreases when it exceeds 50 μm.
【００２４】この発明による耐熱性絶縁エポキシ樹脂に
おいて、硫酸バリウムをカップリング処理するためのカ
ップリング剤は、化学構造式がＹＲＳｉＸ3で表される
シランカップリング剤が適しており、構造式中のＸは珪
素原子に結合している加水分解基ＣＬ、ＯＲ、ＯＣＯＲ
等であり、Ｙは有機マトリックスと反応する有機官能基
ＣＨ2＝ＣＨ、ＣＨ2＝ＣＣＨ3ＣＯＯ、ＮＨ2、ＮＨ2Ｃ2
Ｈ4ＮＨ、ＮＨ2ＣＯＮＨ、ＨＳ、ＣＬ及び下記化１に示
すもの等である。In the heat-resistant insulating epoxy resin according to the present invention, a silane coupling agent having a chemical structural formula represented by YRSiX 3 is suitable as a coupling agent for coupling barium sulfate. X is a hydrolyzable group bonded to a silicon atom CL, OR, OCOR
Is equal, Y is an organic functional group CH 2 = CH which reacts with the organic matrix, CH 2 = CCH 3 COO, NH 2, NH 2 C 2
H 4 NH, NH 2 CONH, HS, CL, and those shown in Chemical formula 1 below.
【００２５】[0025]
【化１】 [Chemical 1]
【００２６】シランカップリング剤としては、γ−グリ
シドキシプロピルトリメトキシシラン（分子量２３６．
１）、γ−クロロプロピルトリメトキシシラン、β−
（３．４エポキシシクロヘキシル）エチルトリメトキシ
シラン、γ−メルカプトプロピルトリメトキシシラン、
γ−アミノプロピルトリメトキシシラン、Ｎ−β（アミ
ノエチル）−γ−アミノプロピルトリメトキシシラン、
γ−ユレイドプロピルトリエトキシシラン等を用いるこ
とができる。これらのシランカップリング剤は分子内に
無機物に対して反応性をもつ部分Ｘと、有機物に対して
反応性に富む部分Ｙを併せ持つため、接着力は著しく向
上する。またカップリング剤としては、チタンカップリ
ング剤なども用いることができる。As the silane coupling agent, γ-glycidoxypropyltrimethoxysilane (molecular weight 236.
1), γ-chloropropyltrimethoxysilane, β-
(3.4 epoxycyclohexyl) ethyltrimethoxysilane, γ-mercaptopropyltrimethoxysilane,
γ-aminopropyltrimethoxysilane, N-β (aminoethyl) -γ-aminopropyltrimethoxysilane,
γ-ureidopropyltriethoxysilane and the like can be used. Since these silane coupling agents have both a portion X reactive with an inorganic substance and a portion Y highly reactive with an organic substance in the molecule, the adhesive force is remarkably improved. A titanium coupling agent or the like can also be used as the coupling agent.
【００２７】また、前記のカップリング処理した沈降性
硫酸バリウムと混合して用いるシリカは、耐熱性に効果
があるため添加する。また、粒径は５０ｎｍ以下の微細
粉末であることが好ましい。前記沈降性硫酸バリウムと
シリカの混合物の主剤中に占める割合は、４０％〜５０
％が好ましく、４０％未満では耐熱性が劣化するため好
ましくなく、また、５０％を越えると印刷性が劣化する
ので好ましくない。Silica used in combination with the above-mentioned coupling-treated precipitated barium sulfate is added because it has an effect on heat resistance. Further, it is preferable that the powder is a fine powder having a particle diameter of 50 nm or less. The ratio of the mixture of the precipitated barium sulfate and silica in the main agent is 40% to 50.
%, Less than 40% is not preferable because heat resistance is deteriorated, and more than 50% is not preferable because printability is deteriorated.
【００２８】主剤に添加する有機顔料としては、粒径が
２μｍ程度のシアニングリーンのほか、フタロシアニン
ブルー、銅フタロシアニンなどが好ましく、その添加量
は、耐熱性、耐薬品性、耐溶剤性を考慮すると、１％〜
２％の添加が好ましい。As the organic pigment to be added to the main component, cyanine green having a particle size of about 2 μm, phthalocyanine blue, copper phthalocyanine and the like are preferable, and the addition amount thereof is taken into consideration in terms of heat resistance, chemical resistance and solvent resistance. 1% ~
Addition of 2% is preferred.
【００２９】また、溶剤カルビトールアセテートとして
は、溶剤メチールカルビトールのほか、セルフルブアセ
テート、ブチールセルソルブ、セルソルブなどが好まし
く、その添加量は、８％未満では粘度が高くなり印刷性
が低下し、９％を越えると粘度が低下して印刷性も低下
するので好ましくないので、よって８％〜９％の添加が
好ましい。さらに、上記の顔料や溶剤メチールカルビト
ール等ともに、少量の消泡剤を添加することも有効であ
る。Further, as the solvent carbitol acetate, in addition to the solvent methyl carbitol, serfulv acetate, butyl cellosolve, cellosolve, etc. are preferable, and if the addition amount is less than 8%, the viscosity becomes high and the printability becomes poor. If it exceeds 9%, the viscosity is lowered and the printability is also lowered, which is not preferable. Therefore, addition of 8% to 9% is preferable. Furthermore, it is also effective to add a small amount of an antifoaming agent together with the above-mentioned pigment and the solvent methyl carbitol.
【００３０】主剤に対して添加する硬化剤は、イミダゾ
ール系の硬化剤が好ましく、またその配合量は主剤を１
００部として、３部未満では耐熱性の効果が乏しく、２
０部を越えるとポットライフが短くなるので、３部〜２
０部が好ましく、さらに好ましくは６部〜２０部であ
る。上記のイミダゾールとしては、イミダゾール、２−
メチルイミダゾール、２−エチル−４−メチルイミダゾ
ール、２−フェニルイミダゾール、２−ウンデシルイミ
ダゾール、２−ヘプタデシルイミダゾール、１−ベンジ
ル−２−メチルイミダゾール、２−フェニル−４−メチ
ルイミダゾール、１−シアノエチル−２−メチルイミダ
ゾール、１−シアノエチル−２−フェニルイミダゾー
ル、１−シアノエチル−２−エチル−４−メチルイミダ
ゾール、１−アミノエチル−２−メチルイミダゾール、
１−（シアノエチルアミノエチル）−２−メチルイミダ
ゾール、Ｎ−（２−メチルイミダゾリル−１−エチル）
−尿素、１−シアノエチル−２−ウンデシルイミダゾー
ル、１−シアノエチル−２−メチルイミダゾールトリメ
リテート、１−シアノエチル−２−フェニルイミダゾー
ルトリメリテート、１−シアノエチル−２−エチル−４
−メチルイミダゾールトリメリテート、１−シアノエチ
ル−２−ウンデシルイミダゾールトリメリテート、２．
４−ジアミノ−６−（２’−メチルイミダゾリル−
（１’））−エチル−Ｓ−トリアジン、２．４−ジアミ
ノ−６−（２’−ウンデシルイミダゾリル−（１’））
−エチル−Ｓ−トリアジン、２．４−ジアミノ−６−
（２’−エチル−４’−メチルイミダゾリル−
（１’））−エチル−Ｓ−トリアジン、１−ドテシル−
２−メチル−３−ベンジルイミダゾリウムクロライド、
Ｎ，Ｎ’−ビス−（２−メチルイミダゾリル−１−エチ
ル）−尿素、Ｎ，Ｎ’−（２−メチルイミダゾリル−
（１）−エチル）−アジポイルジアミド、２．４−ジア
ルキルイミダゾール−５−ジチオカルボン酸、１．３−
ジベンジル−２−メチルイミダゾリウムクロライド、２
−フェニル−４−メチル−５−ヒドロキシメチルイミダ
ゾール、２−フェニル−４．５−ジヒドロキシメチルイ
ミダゾール、１−シアノエチル−２−フェニル−４．５
−ジ（シアノエトキシメチル）イミダゾール、２−メチ
ルイミダゾール ・ イソシアヌール酸付加物、２−フ
ェニルイミダゾール ・ イソシアヌール酸付加物、
２．４−ジアミノ−６（２’−メチルイミダゾリル−
（１）’）エチル−Ｓ−トリアジン ・ イソシアヌー
ル酸付加物、２−アルキル−４−フォルミルイミダゾー
ル、２．４−ジアルキル−５−フォルミルイミダゾール
等が好ましい。The curing agent added to the main agent is preferably an imidazole type curing agent, and the compounding amount of the main agent is 1
If it is less than 3 parts as 00 parts, the effect of heat resistance is poor and 2
If you exceed 0 copies, the pot life will be shortened, so 3 copies-2
0 part is preferable, and 6 to 20 parts is more preferable. Examples of the above-mentioned imidazole include imidazole, 2-
Methyl imidazole, 2-ethyl-4-methyl imidazole, 2-phenyl imidazole, 2-undecyl imidazole, 2-heptadecyl imidazole, 1-benzyl-2-methyl imidazole, 2-phenyl-4-methyl imidazole, 1-cyanoethyl -2-methylimidazole, 1-cyanoethyl-2-phenylimidazole, 1-cyanoethyl-2-ethyl-4-methylimidazole, 1-aminoethyl-2-methylimidazole,
1- (cyanoethylaminoethyl) -2-methylimidazole, N- (2-methylimidazolyl-1-ethyl)
-Urea, 1-cyanoethyl-2-undecylimidazole, 1-cyanoethyl-2-methylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazole trimellitate, 1-cyanoethyl-2-ethyl-4
-Methylimidazole trimellitate, 1-cyanoethyl-2-undecylimidazole trimellitate, 2.
4-diamino-6- (2'-methylimidazolyl-
(1 ′))-Ethyl-S-triazine, 2.4-diamino-6- (2′-undecylimidazolyl- (1 ′))
-Ethyl-S-triazine, 2.4-diamino-6-
(2'-ethyl-4'-methylimidazolyl-
(1 ′))-Ethyl-S-triazine, 1-dotecil-
2-methyl-3-benzylimidazolium chloride,
N, N'-bis- (2-methylimidazolyl-1-ethyl) -urea, N, N '-(2-methylimidazolyl-
(1) -Ethyl) -adipoyldiamide, 2.4-dialkylimidazole-5-dithiocarboxylic acid, 1.3-
Dibenzyl-2-methylimidazolium chloride, 2
-Phenyl-4-methyl-5-hydroxymethylimidazole, 2-phenyl-4.5-dihydroxymethylimidazole, 1-cyanoethyl-2-phenyl-4.5
-Di (cyanoethoxymethyl) imidazole, 2-methylimidazole-isocyanuric acid adduct, 2-phenylimidazole-isocyanuric acid adduct,
2.4-Diamino-6 (2'-methylimidazolyl-
(1) ') Ethyl-S-triazine-Isocyanuric acid adduct, 2-alkyl-4-formylimidazole, 2.4-dialkyl-5-formylimidazole and the like are preferable.
【００３１】上述した耐熱性絶縁樹脂は、周辺部に複数
のリード用突起部を有する接地板層と、リード先端内側
の空間部分に各リードから離間させかつ電源用リードと
接続した方形枠状電源部層を形成したリードフレーム層
との間、及び該リードフレーム層とＡｌ薄膜配線または
Ｃｕ薄膜配線からなる信号配線層との間に介在させるも
のであるが、耐熱性、耐湿性および機械的強度にすぐれ
ることから、パッケージ素材を金属キャップやセラミッ
クスキャップでパッケージする際の封着用の接着剤とし
て用いたり、また、金属キャップやセラミックスキャッ
プでパッケージした際のパッケージの底部、すなわち接
地板層の露出面全面に絶縁用として被着させることも有
効である。上記耐熱性絶縁樹脂を、接地板層とリードフ
レーム層との間に介在させる場合の厚みは、５０μｍ未
満では絶縁性が悪くなり、２００μｍを越えるとリード
フレーム層から接地板層への熱伝達が悪くなるため、５
０μｍ〜２００μｍの厚みが好ましく、より好ましくは
１００μｍ程度である。The heat-resistant insulating resin described above is a rectangular frame-shaped power source in which a ground plate layer having a plurality of lead projections in the peripheral portion and a space inside the tip of the lead are separated from the leads and connected to the power leads. The heat resistance, moisture resistance and mechanical strength are provided between the lead frame layer on which the partial layer is formed and between the lead frame layer and the signal wiring layer made of Al thin film wiring or Cu thin film wiring. Therefore, it is used as an adhesive for sealing when the packaging material is packaged with a metal cap or ceramics cap, and the bottom of the package when exposed with a metal cap or ceramics cap, that is, the exposed ground plane layer is exposed. It is also effective to adhere the entire surface for insulation. When the heat-resistant insulating resin is interposed between the ground plate layer and the lead frame layer, the thickness is less than 50 μm, the insulation is poor, and when it exceeds 200 μm, heat transfer from the lead frame layer to the ground plate layer is caused. 5 because it gets worse
The thickness is preferably 0 μm to 200 μm, more preferably about 100 μm.
【００３２】耐熱性絶縁樹脂の固着方法は公知の技術が
採用でき、例えば接地板層の所要部分にスクリーン印刷
で耐熱性絶縁樹脂を所要厚み、所要パターンに薄膜形成
したのち、該耐熱性絶縁樹脂を介してリードフレーム層
を接地板層に着接し、温度８０°Ｃ〜９０°Ｃで少なく
とも１時間以上加熱した後、さらに温度１３０°Ｃ〜２
００°Ｃで少なくとも３０分以上加熱する硬化処理を施
して固定する。As a method for fixing the heat-resistant insulating resin, a well-known technique can be adopted. For example, after the heat-resistant insulating resin is formed into a thin film with a required thickness and a required pattern by screen printing on a required portion of the ground plate layer, the heat-resistant insulating resin is fixed. The lead frame layer is attached to the grounding plate layer via the via and heated at a temperature of 80 ° C. to 90 ° C. for at least 1 hour or more, and then a temperature of 130 ° C. to 2
A hardening treatment of heating at 00 ° C. for at least 30 minutes or more is applied and fixed.
【００３３】また、Ａｌ薄膜配線またはＣｕ薄膜配線と
の絶縁材としては、前述の耐熱性絶縁樹脂のほかＡｌ2
Ｏ3などのセラミックスを用いることができ、Ａｌ2Ｏ3
を用いる場合は、Ａｌ2Ｏ3をスパッタリングや蒸着等の
気相成膜方法により形成することができ、絶縁層が緻密
なことから、リードフレーム層上に形成する絶縁物層と
して好ましい。その厚みは３μｍ〜２０μｍが好まし
く、上記の耐熱性絶縁樹脂よりも半導体パッケージを薄
型化できる利点がある。As the insulating material for the Al thin film wiring or the Cu thin film wiring, in addition to the above-mentioned heat resistant insulating resin, Al 2
Ceramics such as O 3 can be used, and Al 2 O 3
When used, Al 2 O 3 can be formed by a vapor phase film forming method such as sputtering or vapor deposition, and since the insulating layer is dense, it is preferable as the insulating layer formed on the lead frame layer. The thickness is preferably 3 μm to 20 μm, and has an advantage that the semiconductor package can be made thinner than the above heat-resistant insulating resin.
【００３４】この発明において、Ａｌ薄膜配線及びＣｕ
薄膜配線は、リードフレーム層上に着設された絶縁材層
とリード先端上の所定位置にマスク処理を施した後、Ａ
ｌまたはＣｕを蒸着して成膜し、マスク材を除去して薄
膜配線を完成するほか、予めリード先端及び絶縁材全面
にＡｌまたはＣｕ薄膜を貼付したり、蒸着にて被着した
後、エッチング処理にて不要な部分を除去する方法等の
薄膜形成技術にて容易に精度よく被着することができ
る。上記のＡｌまたはＣｕ薄膜配線は蒸着やエッチング
等の薄膜形成技術が適用しやすく、また半導体素子との
ワイヤーボンディングも容易にできる利点がある。上記
のＡｌまたはＣｕの薄膜配線の厚みは、リード数等によ
り適宜決定すれば良いが、応答性や歪み等の電気特性を
考慮すれば３μｍ〜２０μｍが好ましい。また、ボンデ
ィングワイヤーにＡｕを用いる場合にはＣｕ薄膜配線上
にＡｕめっき等からなる薄膜配線を施すと良い。In the present invention, Al thin film wiring and Cu
The thin film wiring is processed by masking the insulating material layer attached on the lead frame layer and a predetermined position on the tip of the lead, and
l or Cu is vapor-deposited to form a film, and the mask material is removed to complete the thin film wiring. In addition, Al or Cu thin film is previously attached to the lead tip and the entire surface of the insulating material, or deposited by vapor deposition, and then etched. A thin film forming technique such as a method of removing an unnecessary portion by processing can be applied easily and accurately. The above Al or Cu thin film wiring has an advantage that a thin film forming technique such as vapor deposition or etching can be easily applied and wire bonding with a semiconductor element can be easily performed. The thickness of the Al or Cu thin film wiring may be appropriately determined depending on the number of leads and the like, but is preferably 3 μm to 20 μm in consideration of electrical characteristics such as responsiveness and distortion. When Au is used for the bonding wire, it is advisable to provide a thin film wiring made of Au plating or the like on the Cu thin film wiring.
【００３５】図面に基づく開示 図１はこの発明によるリードフレームの一実施例の積層
状態を示す展開斜視説明図である。図２のａ〜ｄはこの
発明によるリードフレームの製造工程を示す縦断説明図
である。図３のａはこの発明による樹脂封止型の半導体
パッケージであり、ｂは金属キャップ封止型の半導体パ
ッケージである。以下に図１及び図２に基づいてこの発
明によるリードフレームの構成並びに製造方法を詳述す
る。この発明によるリードフレームは、図１に示す如
く、周辺部に複数のリード用突起部２を有する接地板層
１から順に説明すると、耐熱性絶縁エポキシ樹脂層３、
リード５先端内側の空間部分に各リード５から離間させ
かつ電源用リード６と接続した方形枠状電源部層７を形
成したリードフレーム層４、方形枠状電源部層の中央部
を除いた所要部分に成膜された耐熱性絶縁エポキシ樹脂
薄膜またはセラミックス薄膜からなる絶縁材層８、Ａｌ
薄膜配線またはＣｕ薄膜配線からなる信号配線層９の各
層が後述する製造方法にて積層され一体化される。Disclosure Based on the Drawings FIG. 1 is an exploded perspective view showing a laminated state of an embodiment of a lead frame according to the present invention. 2A to 2D are longitudinal explanatory views showing a manufacturing process of the lead frame according to the present invention. 3A shows a resin-sealed semiconductor package according to the present invention, and b shows a metal-cap-sealed semiconductor package. The structure and manufacturing method of the lead frame according to the present invention will be described in detail below with reference to FIGS. The lead frame according to the present invention, as shown in FIG. 1, will be described in order from the ground plate layer 1 having a plurality of lead projections 2 on the periphery thereof.
The lead frame layer 4 in which a rectangular frame-shaped power source layer 7 is formed in the space inside the tips of the leads 5 so as to be separated from each lead 5 and connected to the power source lead 6, and is required except for the central portion of the rectangular frame-shaped power source layer. Insulating material layer 8 consisting of heat-resistant insulating epoxy resin thin film or ceramics thin film formed on a portion, Al
Each layer of the signal wiring layer 9 made of thin film wiring or Cu thin film wiring is laminated and integrated by a manufacturing method described later.
【００３６】なお、図１のリードフレーム層４はアウタ
ーリードを打ち抜き形成する前のセクションバー及びガ
イドレールと呼ばれるリードを支持するためのフレーム
部を有する例を示しており、以下の製造方法は所要帯材
に複数個取りする例を示す。また、ボンディングワイヤ
ーにはＡｌまたはＣｕを用いる場合を説明し、ワイヤー
にＡｕを用いる場合のボンディング予定位置に設ける薄
膜はＣｕ膜にさらにＡｕ膜を設けるとよい。The lead frame layer 4 in FIG. 1 shows an example having a frame portion for supporting the leads called a section bar and guide rail before the outer lead is punched and formed, and the following manufacturing method is required. An example of taking a plurality of strips will be shown. Further, the case where Al or Cu is used for the bonding wire will be described, and it is preferable that the thin film provided at the intended bonding position when Au is used for the wire is further provided with an Au film on the Cu film.
【００３７】図２に示す如く、まず、４２Ｎｉ−Ｆｅ合
金等の低熱膨張合金からなる所要寸法の帯状接地板に、
例えば所要のマスキングを行った後エッチングにて、複
数個の接地板層１を形成し、マスキングを除去した後、
ワイヤーボンディング用薄膜としてＡｌ薄膜またはＣｕ
薄膜１０を少なくともボンディング予定位置に例えばス
パッタリングや蒸着にて成膜する。接地板層１には、リ
ードフレーム層４の接地用リードにスポット溶接等によ
り接続するための突起部２を周囲の所定位置に設けてあ
る。また、接地板層１はエッチング方法以外にプレス加
工にて形成することもできる。As shown in FIG. 2, first, a strip-shaped grounding plate made of a low thermal expansion alloy such as 42Ni-Fe alloy and having a required size is formed.
For example, after performing the required masking, a plurality of ground plate layers 1 are formed by etching, and after removing the masking,
Al thin film or Cu as a thin film for wire bonding
The thin film 10 is formed at least at a predetermined bonding position by, for example, sputtering or vapor deposition. The ground plate layer 1 is provided with a protrusion 2 at a predetermined peripheral position for connecting to the ground lead of the lead frame layer 4 by spot welding or the like. Further, the ground plate layer 1 can be formed by pressing instead of the etching method.
【００３８】上記のスパッタリングや蒸着形成の工程を
省略するために、当該低熱膨張合金の全面または所要部
に、予めＡｌ等をクラッドした後、プレス加工や、エッ
チング処理等により接地板層１を形成することもでき
る。さらにこの帯状接地板の各接地板層１には例えばス
クリーン印刷技術により、耐熱性絶縁エポキシ樹脂層３
が半導体チップの載置位置を除く所要位置に成膜され
る。In order to omit the above-mentioned steps of sputtering and vapor deposition formation, the entire surface or a required portion of the low thermal expansion alloy is clad with Al or the like in advance, and then the ground plate layer 1 is formed by pressing or etching. You can also do it. Furthermore, the heat-resistant insulating epoxy resin layer 3 is formed on each ground plate layer 1 of the strip-shaped ground plate by, for example, screen printing technology.
Is deposited at a required position except the mounting position of the semiconductor chip.
【００３９】また、同様に４２Ｎｉ−Ｆｅ合金等の低熱
膨張合金からなる所要寸法の帯状リードフレーム基板
に、例えば所要のパターンを印刷して現像後にこれをエ
ッチング液にて処理して図１に示すごときリードフレー
ム層４を複数個形成する。すなわち、基板にはリード５
と電源用リード６が所要配置され、リード５先端内側の
空間部分に各リード５から離間させかつ電源用リード６
と接続した方形枠状電源部層７を形成してある。Similarly, a strip-shaped lead frame substrate having a required size and made of a low thermal expansion alloy such as a 42Ni-Fe alloy is printed with a required pattern, developed, and then treated with an etching solution, as shown in FIG. A plurality of such lead frame layers 4 are formed. That is, the lead 5 on the substrate
And the power supply leads 6 are arranged as required, and the power supply leads 6 are separated from the respective leads 5 in the space inside the tips of the leads 5.
The rectangular frame-shaped power supply part layer 7 connected to is formed.
【００４０】また、リードフレーム層４のワイヤーボン
ディング予定位置にワイヤーボンディング用薄膜として
Ａｌ薄膜またはＣｕ薄膜１１をスパッタリングや蒸着に
て成膜する。さらに、方形枠状電源部層の中央部を除い
た所要部分に例えばスクリーン印刷技術により、耐熱性
絶縁エポキシ樹脂層３と同様材質の耐熱性絶縁エポキシ
樹脂薄膜を成膜した絶縁材層８を設ける。耐熱性絶縁エ
ポキシ樹脂薄膜に代えて例えばＡｌ2Ｏ3薄膜からなる絶
縁材層８を設ける場合は、スパッタリングや蒸着等によ
り形成することができる。Further, an Al thin film or a Cu thin film 11 is formed as a wire bonding thin film on the lead frame layer 4 at a predetermined wire bonding position by sputtering or vapor deposition. Further, an insulating material layer 8 formed by depositing a heat-resistant insulating epoxy resin thin film made of the same material as the heat-resistant insulating epoxy resin layer 3 is provided by a screen printing technique, for example, on a required portion of the rectangular frame-shaped power source layer except the central portion. . When the insulating material layer 8 made of, for example, an Al 2 O 3 thin film is provided instead of the heat-resistant insulating epoxy resin thin film, it can be formed by sputtering, vapor deposition, or the like.
【００４１】次に治具を用いて上述の帯状接地板の上に
帯状リードフレーム基板を重ねて、所要温度・時間で耐
熱性絶縁エポキシ樹脂層３を硬化させて、接地板層１と
リードフレーム層４を積層する。積層後、リードフレー
ム層４上のリードの所要位置と絶縁材層８上にインナー
リードを形成するため、所定の配線パターンにマスク処
理を施した後、ＡｌまたはＣｕをスパッタリングあるい
は蒸着し、再度マスク材を除去する方法により、Ａｌ薄
膜配線またはＣｕ薄膜配線からなる信号配線層９が形成
される。また、予めリード先端及び絶縁層８上全面にＡ
ｌまたはＣｕ箔を貼付したり、蒸着にて成膜した後、エ
ッチング処理にて不要な部分を除去する方法により形成
することもできる。Next, a strip-shaped lead frame substrate is laid on the strip-shaped ground plate using a jig, and the heat-resistant insulating epoxy resin layer 3 is cured at the required temperature and time, so that the ground plate layer 1 and the lead frame. Layer 4 is laminated. After stacking, in order to form inner leads on the required positions of the leads on the lead frame layer 4 and on the insulating material layer 8, after masking a predetermined wiring pattern, Al or Cu is sputtered or vapor-deposited and masked again. By the method of removing the material, the signal wiring layer 9 made of Al thin film wiring or Cu thin film wiring is formed. In addition, the lead tip and the entire surface of the insulating layer 8 are previously A
Alternatively, it can be formed by a method in which an unnecessary portion is removed by an etching process after a 1 or Cu foil is attached or a film is formed by vapor deposition.
【００４２】次いで接地板層１の接地用リード２とリー
ドフレーム層４のリードとをスポット溶接などの手段に
て接続することにより、この発明のリードフレーム２０
を得ることができる。得られたリードフレーム２０の中
心空間部の接地板層１上に、半導体チップ２１をろう材
や接着剤等で固着した後、方形枠状電源部層７、接地板
層１、信号配線層９のそれぞれの所定位置と、上記半導
体チップ２１の端子とをＡｌまたはＣｕからなるボンデ
ィングワイヤー２２を用いてそれぞれ接続する。Then, the ground lead 2 of the ground plate layer 1 and the lead of the lead frame layer 4 are connected by means of spot welding or the like, whereby the lead frame 20 of the present invention is connected.
Can be obtained. After fixing the semiconductor chip 21 to the ground plate layer 1 in the central space of the obtained lead frame 20 with a brazing material or an adhesive, a rectangular frame-shaped power supply layer 7, a ground plate layer 1, and a signal wiring layer 9 are formed. And the respective terminals of the semiconductor chip 21 are connected to each other using bonding wires 22 made of Al or Cu.
【００４３】この発明によるリードフレーム２０を用い
て樹脂封止型パッケージを作成するには、図３のａに示
す如く、上記構成のリードフレーム２０を用い接地板層
１上に載置してワイヤーボンディングした半導体チップ
２１とともに樹脂３０にて封止することによりプラスチ
ックパッケージ３１を容易に製造できる。In order to produce a resin-sealed package using the lead frame 20 according to the present invention, as shown in FIG. 3A, the lead frame 20 having the above-mentioned structure is used and placed on the ground plate layer 1 to wire. The plastic package 31 can be easily manufactured by sealing with the resin 30 together with the bonded semiconductor chip 21.
【００４４】また、金属パッケージを作成するには、図
３のｂに示す如く、上記構成のリードフレーム２０の半
導体チップ２１を載置しない側の接地板層１の露出面全
面に絶縁用耐熱性絶縁エポキシ樹脂層３２を被着し、リ
ードフレーム層４のアウターリードを構成する部位の所
要位置に封着用耐熱性絶縁エポキシ樹脂層３３を被着
し、接地板層１上に半導体チップ２１を載置、ワイヤー
ボンディングした後、半導体チップ２１とインナーリー
ド部を被包可能な金属キャップ３４を封着用耐熱性絶縁
エポキシ樹脂層３３上に載せて封着することにより電磁
シールド性にすぐれる金属パッケージ３５を容易に製造
できる。In order to manufacture a metal package, as shown in FIG. 3B, heat resistance for insulation is applied to the entire exposed surface of the ground plate layer 1 on the side of the lead frame 20 on which the semiconductor chip 21 is not mounted. An insulating epoxy resin layer 32 is applied, a heat-resistant insulating epoxy resin layer 33 for sealing is applied to a required position of the outer frame of the lead frame layer 4, and the semiconductor chip 21 is mounted on the ground plate layer 1. After mounting and wire bonding, a metal cap 34 capable of encapsulating the semiconductor chip 21 and the inner lead portion is placed on the heat-resistant insulating epoxy resin layer 33 for sealing and sealed, and a metal package 35 having excellent electromagnetic shielding property is obtained. Can be easily manufactured.
【００４５】[0045]
【作用】この発明は、高速ＬＳＩ用リードフレームとし
て、多ピン化並びにリード先端ピッチの狭ピッチ化が可
能で、放熱性、低雑音特性、製造性のいずれにもすぐれ
た特性を示し、さらにワイヤボンディング特性を著しく
向上させることができる構成からなるリードフレームを
目的に、多層リードフレーム構造について種々検討した
結果、リード先端内側の空間部分に各リードから離間さ
せかつ電源用リードと接続した方形枠状電源部層を形成
したリードフレーム層と接地板層とを耐熱性絶縁エポキ
シ樹脂層で接着積層する構成により、多ピン化を図り放
熱性、低雑音特性、製造性及びワイヤボンディング特性
を改善できること、さらに該基板上の所要部分に耐熱性
絶縁エポキシ樹脂薄膜またはセラミックス薄膜からなる
絶縁材層を介在させてＡｌ薄膜配線またはＣｕ薄膜配線
からなるインナーリードを設けた構成により、リード先
端ピッチの狭ピッチ化が可能なことを知見し、この発明
を完成した。The present invention, as a lead frame for a high-speed LSI, can have a large number of pins and a narrow lead tip pitch, and exhibits excellent heat dissipation, low noise characteristics, and manufacturability. As a result of various studies on the multi-layered lead frame structure aiming at a lead frame having a structure capable of remarkably improving the bonding characteristics, as a result, a rectangular frame shape in which a space between the leads is separated from each lead and connected to a power supply lead The structure in which the lead frame layer on which the power source layer is formed and the ground plate layer are bonded and laminated with a heat-resistant insulating epoxy resin layer can improve the heat dissipation, low noise characteristics, manufacturability, and wire bonding characteristics by increasing the number of pins. Further, an insulating material layer made of a heat-resistant insulating epoxy resin thin film or a ceramic thin film is interposed at a required portion on the substrate. The structure in which inner leads of Al thin film wiring or Cu thin film wiring Te, and finding that it is possible that narrow pitch of the lead tip pitch, and have completed the present invention.
【００４６】[0046]
【実施例】４２Ｎｉ−Ｆｅ合金からなる厚み０．３５ｍ
ｍの帯状低熱膨張合金板を接地用金属板として用い、周
辺部に複数の０．２ｍｍ×３ｍｍの突起部を有する所要
形状の接地板層（縦３０ｍｍ×横３０ｍｍ）部形状を４
個打ち抜き可能にエッチング手段にて形成した。さらに
各々接地板層の半導体チップとの接地予定面を露出させ
るマスキング後、Ａｌ薄膜を５μｍ厚みに蒸着してマス
キングを除去し、さらに上記接地予定面を除く所要面に
下記する耐熱性絶縁エポキシ樹脂薄膜をスクリーン印刷
法にて０．２ｍｍ厚みに設けた。[Example] 0.35 m thick made of 42Ni-Fe alloy
The band-shaped low thermal expansion alloy plate of m is used as a metal plate for grounding, and a grounding plate layer (30 mm in length × 30 mm in width) of a required shape having a plurality of 0.2 mm × 3 mm protrusions in the peripheral portion is formed into 4 parts.
It was formed by etching so that it could be punched out individually. Further, after masking to expose the grounding surface of the grounding plate layer to the semiconductor chip, an Al thin film is vapor-deposited to a thickness of 5 μm to remove the masking, and the following heat-resistant insulating epoxy resin is applied to the required surface other than the grounding surface. The thin film was formed by screen printing to a thickness of 0.2 mm.
【００４７】耐熱性絶縁エポキシ樹脂 主剤 樹脂 ： ノボラックエポキシ樹脂４５％ フィラー ： カップリング処理済硫酸バリウム＋シリ
カ４５％ 顔料 ： シアニングリーン２％ 溶剤 ： カルビトールアセテート８％ 硬化剤 硬化性２メチルイミダゾール１１部（主剤１０
０部に対して） なお、主剤は硬化剤を添加する前によく分散 ・ 混合
させた。得られた、耐熱性絶縁エポキシ樹脂はポットラ
イフ８時間、粘度４５０ポイズ／°Ｃであった。Heat-resistant insulating epoxy resin Main resin Resin: Novolac epoxy resin 45% Filler: Coupling-treated barium sulfate + silica 45% Pigment: Cyanine green 2% Solvent: Carbitol acetate 8% Curing agent Curing 2-methylimidazole 11 parts (Main agent 10
The main component was well dispersed and mixed before adding the curing agent. The obtained heat-resistant insulating epoxy resin had a pot life of 8 hours and a viscosity of 450 poise / ° C.
【００４８】４２Ｎｉ−Ｆｅ合金からなる厚み０．１５
ｍｍの低熱膨張合金板をリードフレーム基板として用
い、リード先端内側の空間部分に各リードから離間させ
かつ電源用リードと接続した方形枠状電源部層を有する
リードフレーム（縦４０ｍｍ×横４０ｍｍ）を４個打ち
抜き可能にエッチング手段にて形成した。さらに、その
方形枠状電源部とワイヤーボンデイング予定面を露出さ
せるマスキング後、Ａｌ薄膜を５μｍ厚みに蒸着してマ
スキングを除去し、さらに方形枠状電源部層の中央部を
除いた所要部分に上記と同様の耐熱性絶縁エポキシ樹脂
薄膜を０．２ｍｍ厚みにスクリーン印刷法にて設けた。Thickness made of 42Ni-Fe alloy 0.15
Using a low thermal expansion alloy plate of mm as a lead frame substrate, a lead frame (vertical 40 mm x width 40 mm) having a rectangular frame-shaped power source layer separated from each lead and connected to a power lead in the space inside the lead tip is used. Four pieces were formed by etching so that they could be punched. Further, after masking to expose the rectangular frame-shaped power supply section and the surface to be wire-bonded, an Al thin film is vapor-deposited to a thickness of 5 μm to remove the masking. A heat-resistant insulating epoxy resin thin film similar to the above was provided to a thickness of 0.2 mm by screen printing.
【００４９】接地用金属板上にリードフレーム基板を載
置して、１５０℃×６０分の条件にて加熱硬化処理を施
して一体化した後、前記リードフレーム層の耐熱性絶縁
エポキシ樹脂薄膜上に、マスキングと蒸着手段によりＡ
ｌ薄膜配線を０．０１ｍｍ厚みに成膜してインナーリー
ドを設け、かつ接地板層のリード用突起部とリードフレ
ームとをスポット溶接にて接続した。次に、接地板層の
中央部に高速ＬＳＩチップを接着剤で固着載置したの
ち、半導体チップとＡｌ薄膜配線、方形枠状電源部、接
地板のそれぞれをＡｌワイヤーでボンディングした。上
記のワイヤーボンディングを行なった際のボンディング
ミスは２／２０００の割合であり、ポリイミド絶縁性両
面接着フィルムを用いた従来の多層リードフレームの割
合５０／２０００に比べてボンディングミスの割合が大
幅に減少し、生産性が格段に向上した。After placing the lead frame substrate on the grounding metal plate and subjecting it to heat curing treatment under the condition of 150 ° C. × 60 minutes for integration, the lead frame layer is placed on the heat-resistant insulating epoxy resin thin film. A by masking and vapor deposition means
l Thin film wiring was formed to a thickness of 0.01 mm to provide an inner lead, and the lead projection of the ground plate layer and the lead frame were connected by spot welding. Next, a high-speed LSI chip was fixedly mounted on the central portion of the ground plate layer with an adhesive, and then the semiconductor chip, the Al thin film wiring, the rectangular frame-shaped power supply unit, and the ground plate were bonded with Al wires. The rate of bonding mistakes when performing the above wire bonding is 2/2000, and the rate of bonding mistakes is greatly reduced compared to the conventional multilayer lead frame rate of 50/2000 using a polyimide insulating double-sided adhesive film. However, productivity has improved dramatically.
【００５０】上記のチップを搭載しワイヤーボンディン
グを完了した各リードフレーム部をそれぞれ樹脂封止し
たのち、不要なフレーム部を切除して切離し、４個の樹
脂封止型高速ＬＳＩパッケージを得た。上記樹脂封止型
パッケージの放熱性を調べたところ、２Ｗ以上の消費電
力に対し適合した。また、電気特性を調べたところ、信
号の歪みもなく、応答性も極めて良好であった。従来の
単層リードフレームに比べ電源ノイズは１／２以下に低
減できた。Each of the lead frame portions on which the above chips were mounted and wire bonding was completed were resin-sealed, and then unnecessary frame portions were cut and separated to obtain four resin-sealed high-speed LSI packages. When the heat dissipation of the resin-encapsulated package was examined, it was suitable for power consumption of 2 W or more. Moreover, when the electrical characteristics were examined, there was no signal distortion and the response was extremely good. Compared with the conventional single layer lead frame, the power supply noise could be reduced to less than 1/2.
【００５１】[0051]
【発明の効果】この発明によるリードフレームは以下の
様々な効果を奏する。 １）ＡｌまたはＣｕ薄膜配線層を有することにより、極
めて微細な配線が実現でき、多ピン化が図れ、高速ＬＳ
Ｉなどの高集積化半導体素子にも十分対応できる。 ２）接地板層とリードフレーム層との接着積層に、フィ
ラーを含有する耐熱性絶縁樹脂を用いたことにより、ワ
イヤーボンダーのボンディング荷重と超音波出力を集中
させることできるため、ワイヤーボンディング特性が著
しく向上して高精度なボンディングが可能になり、ワイ
ヤーの接合強度、接合均一性が向上してワイヤーボンデ
ィングの信頼性が向上するとともに、生産性も大幅に向
上する。 ３）絶縁材層に耐熱性絶縁樹脂やＡｌ2Ｏ3を用いること
により、金属パッケージ、セラミックスパッケージ等に
適用でき、特に耐熱性絶縁樹脂を用いた場合は、微細な
ＡｌまたはＣｕ薄膜配線からなる信号配線層の形成工程
で用いる現像液や剥離液水などに侵されることがないた
めに、高精度な微細配線をすることができ、また緻密な
Ａｌ2Ｏ3を用いた場合は厚みを薄くすることができ、半
導体装置及びパッケージを薄型化できる。 ４）多層構造にして方形枠状電源部の面積を大きくした
ことにより、配線が微細化されているにもかかわらず、
電源ノイズ、信号の歪み等は低くおさえられ、応答性も
極めて良好であり、高速性にも対応できる。 ５）多層構造にして接地板の面積を大きくしたことによ
り、２Ｗ以上に放熱性が向上し、消費電力が２〜３Ｗの
高速ＭＰＵも搭載できる。 ６）リードフレーム基板に方形枠状電源部を備えたこと
により、部品を製造する工程が簡素化され、また、方形
枠状電源部の任意の位置にボンディングできることか
ら、半導体素子からのボンディングが容易になり、さら
にボンディングワイヤーを短くしてその抵抗を減少させ
ることができ、電源ノイズ、信号の歪み等を低減でき
る。 ７）上記の効果を奏するリードフレームを主体にパッケ
ージ化することにより、樹脂封止型及び金属キャップ封
止型の半導体パッケージを製造性よくかつ安価に提供で
きる。The lead frame according to the present invention has the following various effects. 1) By having an Al or Cu thin film wiring layer, extremely fine wiring can be realized, the number of pins can be increased, and high speed LS can be achieved.
It can also be used for high integration semiconductor devices such as I. 2) By using a heat-resistant insulating resin containing a filler in the adhesive lamination of the ground plate layer and the lead frame layer, the bonding load and ultrasonic output of the wire bonder can be concentrated, so the wire bonding characteristics are outstanding. As a result, the bonding strength and bonding uniformity of the wires can be improved, and the reliability of wire bonding can be improved, and the productivity can be significantly improved. 3) By using heat resistant insulating resin or Al 2 O 3 for the insulating material layer, it can be applied to metal packages, ceramics packages, etc. Especially when heat resistant insulating resin is used, it is composed of fine Al or Cu thin film wiring. Since it is not attacked by water such as developer or stripping solution used in the process of forming the signal wiring layer, highly precise fine wiring can be performed, and the thickness can be reduced when dense Al 2 O 3 is used. Therefore, the semiconductor device and the package can be thinned. 4) Although the wiring has been miniaturized by making the area of the rectangular frame-shaped power supply unit large by using a multilayer structure,
Power supply noise, signal distortion, etc. are kept low, responsiveness is extremely good, and high speed is also supported. 5) By increasing the area of the ground plate with a multilayer structure, the heat dissipation is improved to 2 W or more, and a high-speed MPU with power consumption of 2 to 3 W can also be mounted. 6) Since the lead frame substrate is provided with the rectangular frame-shaped power supply unit, the process of manufacturing the parts is simplified, and since it can be bonded to any position of the rectangular frame-shaped power supply unit, the bonding from the semiconductor element is easy. In addition, the resistance of the bonding wire can be reduced by shortening the bonding wire, and power supply noise, signal distortion, etc. can be reduced. 7) By mainly packaging the lead frame having the above effects, it is possible to provide a resin-sealed type and a metal cap-sealed type semiconductor package with good productivity and at low cost.
【図１】この発明によるリードフレームの一実施例の積
層状態を示す展開分解斜視説明図である。FIG. 1 is an exploded perspective view showing a laminated state of an embodiment of a lead frame according to the present invention.
【図２】ａ〜ｄはこの発明によるリードフレームの製造
工程を示す縦断説明図である。2A to 2D are longitudinal explanatory views showing a manufacturing process of a lead frame according to the present invention.
【図３】ａはこの発明による樹脂封止型の半導体パッケ
ージ であり、ｂは金属キャップ封止型の半導体パッケ
ージ である。FIG. 3A is a resin-sealed semiconductor package according to the present invention, and b is a metal cap-sealed semiconductor package.
１ 接地板層 ２ 突起部 ３ 耐熱性絶縁エポキシ樹脂層 ４ リードフレーム層 ５ リード ６ 電源用リード ７ 方形枠状電源部層 ８ 絶縁材層 ９ 信号配線層 １０，１１ 薄膜 ２０ リードフレーム ２１ 半導体チップ ２２ ボンディングワイヤー ３０ 樹脂 ３１ プラスチックパッケージ ３２ 絶縁用耐熱性絶縁エポキシ樹脂層 ３３ 封着用耐熱性絶縁エポキシ樹脂層 ３４ 金属キャップ ３５ 金属パッケージ DESCRIPTION OF SYMBOLS 1 Ground plate layer 2 Protrusion 3 Heat-resistant insulating epoxy resin layer 4 Lead frame layer 5 Lead 6 Power supply lead 7 Square frame power supply layer 8 Insulating material layer 9 Signal wiring layer 10, 11 Thin film 20 Lead frame 21 Semiconductor chip 22 Bonding wire 30 Resin 31 Plastic package 32 Heat-resistant insulating epoxy resin layer for insulation 33 Heat-resistant insulating epoxy resin layer for sealing 34 Metal cap 35 Metal package
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｃ０８Ｌ 63/00 ＮＬＤ 8830−4Ｊ ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Internal reference number FI technical display location C08L 63/00 NLD 8830-4J
Claims (8)
接地板層と、リード先端内側の空間部分に各リードから
離間させかつ電源用リードと接続した方形枠状電源部層
を形成したリードフレーム層とが、リードの一部及び上
記方形枠状電源部層を覆う耐熱性絶縁樹脂層で接着積層
され、また該接地板層の突起部とリードフレーム層の接
地用リードが接続され、さらに該リードフレーム層上に
方形枠状電源部層の中央部を除いた所要部分に耐熱性絶
縁樹脂薄膜またはセラミックス薄膜からなる絶縁材層を
介在させてＡｌ薄膜配線またはＣｕ薄膜配線からなる信
号配線層が形成されインナーリードを構成したことを特
徴とするリードフレーム。1. A ground plate layer having a plurality of lead projections on its periphery, and a lead formed with a rectangular frame-shaped power supply layer separated from each lead and connected to a power supply lead in a space inside the lead tip. The frame layer is adhesively laminated with a heat-resistant insulating resin layer that covers a part of the lead and the rectangular frame-shaped power supply layer, and the protrusion of the ground plate layer and the ground lead of the lead frame layer are connected to each other. A signal wiring layer made of Al thin film wiring or Cu thin film wiring with an insulating material layer made of a heat-resistant insulating resin thin film or a ceramic thin film interposed in a required portion on the lead frame layer excluding the central portion of the rectangular frame-shaped power supply portion layer. A lead frame characterized in that an inner lead is formed by forming the.
の接地板層を打ち抜き可能に形成した接地用金属板に、
その少なくとも半導体チップとの接地予定面にワイヤー
ボンデイング用薄膜を成膜し、さらに上記接地予定面を
除く所要面に耐熱性絶縁樹脂薄膜を設ける工程と、リー
ド先端内側の空間部分に各リードから離間させかつ電源
用リードと接続した方形枠状電源部層を有し打ち抜き可
能に形成したリードフレーム用金属板に、その方形枠状
電源部とワイヤーボンデイング予定面にワイヤーボンデ
イング用薄膜を成膜し、さらに方形枠状電源部層の中央
部を除いた所要部分に耐熱性絶縁樹脂薄膜またはセラミ
ックス薄膜を設ける工程と、接地用金属板上にリードフ
レーム用金属板を載置し両者間の耐熱性絶縁樹脂層にて
接着して一体化した後、前記の耐熱性絶縁樹脂薄膜また
はセラミックス薄膜上にＡｌ薄膜配線またはＣｕ薄膜配
線を成膜してインナーリードを設け、かつ接地板のリー
ド用突起部とリードフレーム用金属板のリードとを接続
する工程とからなることを特徴とするリードフレームの
製造方法。2. A grounding metal plate formed so that a grounding plate layer having a required shape and having a plurality of protrusions on its peripheral portion can be punched out,
At least the step of forming a wire bonding thin film on the surface to be grounded with the semiconductor chip and further providing a heat-resistant insulating resin thin film on the required surface other than the surface to be grounded, and separating the leads from the leads in the space inside the tip of the leads. And a lead frame metal plate that has a rectangular frame-shaped power supply layer connected to the power supply lead and is capable of being punched, and forms a wire bonding thin film on the rectangular frame-shaped power supply part and the wire bonding planned surface. Furthermore, the step of providing a heat-resistant insulating resin thin film or ceramics thin film on the required part of the rectangular frame-shaped power supply layer excluding the central part, and the heat-resistant insulation between the two by placing the lead frame metal plate on the ground metal plate. After bonding and integrating with a resin layer, an Al thin film wiring or a Cu thin film wiring is formed on the heat resistant insulating resin thin film or the ceramic thin film, and The provided Rido, and manufacturing method of lead frame, characterized in that comprising the step of connecting the leads of the lead protrusion and the lead frame forming metal plate of the ground plate.
にワイヤーボンデイング用薄膜を成膜する工程に代えて
予め該薄膜をクラッドした接地用金属板を用いて、所要
面に耐熱性絶縁樹脂薄膜を設ける工程を特徴とする請求
項２記載のリードフレームの製造方法。3. A heat-resistant insulating resin thin film is provided on a required surface by using a grounding metal plate in which the thin film for wire bonding is clad in advance instead of the step of forming a thin film for wire bonding on at least a surface to be grounded with a semiconductor chip. The method of manufacturing a lead frame according to claim 2, characterized by the steps.
接地板層と、リード先端内側の空間部分に各リードから
離間させかつ電源用リードと接続した方形枠状電源部層
を形成したリードフレーム層とが、リードの一部及び上
記方形枠状電源部層を覆う耐熱性絶縁樹脂層で接着積層
され、また該接地板層の突起部とリードフレーム層の接
地用リードが接続され、さらに該リードフレーム層上に
方形枠状電源部層の中央部を除いた所要部分に耐熱性絶
縁樹脂薄膜またはセラミックス薄膜からなる絶縁材層を
介在させてＡｌ薄膜配線またはＣｕ薄膜配線からなる信
号配線層が形成されインナーリードを構成したリードフ
レームを主体とし、接地板層に固着した半導体チップと
ともに樹脂にて封着したことを特徴とする半導体パッケ
ージ。4. A ground plate layer having a plurality of lead projections on its periphery, and a lead formed with a rectangular frame-shaped power supply layer separated from each lead and connected to a power supply lead in a space inside the lead tip. The frame layer is adhesively laminated with a heat-resistant insulating resin layer that covers a part of the lead and the rectangular frame-shaped power supply layer, and the protrusion of the ground plate layer and the ground lead of the lead frame layer are connected to each other. A signal wiring layer made of Al thin film wiring or Cu thin film wiring with an insulating material layer made of a heat-resistant insulating resin thin film or a ceramic thin film interposed in a required portion on the lead frame layer excluding the central portion of the rectangular frame-shaped power supply portion layer. A semiconductor package, which is mainly composed of a lead frame having an inner lead formed therein and is sealed with a resin together with a semiconductor chip fixed to a ground plate layer.
接地板層と、リード先端内側の空間部分に各リードから
離間させかつ電源用リードと接続した方形枠状電源部層
を形成したリードフレーム層とが、リードの一部及び上
記方形枠状電源部層を覆う耐熱性絶縁樹脂層で接着積層
され、また該接地板層の突起部とリードフレーム層の接
地用リードが接続され、さらに該リードフレーム層上に
方形枠状電源部層の中央部を除いた所要部分に耐熱性絶
縁樹脂薄膜またはセラミックス薄膜からなる絶縁材を介
在させてＡｌ薄膜配線またはＣｕ薄膜配線からなる信号
配線層が形成されインナーリードを構成したリードフレ
ームを主体とし、接地板の露出面を耐熱性絶縁樹脂で封
着し、接地板に固着した半導体チップとインナーリード
を被包した金属キャップが耐熱性絶縁樹脂を介して封着
されたことを特徴とする半導体パッケージ。5. A ground plate layer having a plurality of lead projections on its peripheral portion, and a lead formed with a rectangular frame-shaped power supply layer separated from each lead and connected to a power supply lead in a space inside the lead tip. The frame layer is adhesively laminated with a heat-resistant insulating resin layer that covers a part of the lead and the rectangular frame-shaped power supply layer, and the protrusion of the ground plate layer and the ground lead of the lead frame layer are connected to each other. A signal wiring layer made of Al thin film wiring or Cu thin film wiring is formed on the lead frame layer by interposing an insulating material made of a heat-resistant insulating resin thin film or a ceramic thin film at a required portion except for the central portion of the rectangular frame-shaped power supply layer. Mainly composed of the lead frame that formed the inner lead, the exposed surface of the ground plate was sealed with a heat-resistant insulating resin, and the metal chip encapsulating the semiconductor chip and the inner lead fixed to the ground plate. A semiconductor package in which the cap is sealed with a heat-resistant insulating resin.
エポキシ樹脂４０％〜５０％と、予めカップリング処理
を施した硫酸バリウムとシリカを混合したフィラー４０
％〜５０％と、顔料１％〜２％及び溶剤カルビトールア
セテート８％〜９％とを含む主剤を１００部として、イ
ミダゾール系硬化剤を６部〜２０部を調合したものであ
ることを特徴とする請求項１記載のリードフレーム。6. A filler 40 in which the heat-resistant insulating epoxy resin is a mixture of 40% to 50% of a novolac epoxy resin and barium sulfate and silica which have been previously subjected to a coupling treatment.
% To 50%, 1% to 2% of pigment, and 8% to 9% of solvent carbitol acetate as a main component as 100 parts, and 6 to 20 parts of an imidazole-based curing agent are prepared. The lead frame according to claim 1.
エポキシ樹脂４０％〜５０％と、予めカップリング処理
を施した硫酸バリウムとシリカを混合したフィラー４０
％〜５０％と、顔料１％〜２％及び溶剤カルビトールア
セテート８％〜９％とを含む主剤を１００部として、イ
ミダゾール系硬化剤を６部〜２０部を調合したものであ
ることを特徴とする請求項２または請求項３記載のリー
ドフレームの製造方法。7. A filler 40 in which the heat-resistant insulating epoxy resin is a mixture of 40% to 50% of a novolac epoxy resin and barium sulfate and silica which have been previously subjected to a coupling treatment.
% To 50%, 1% to 2% of pigment, and 8% to 9% of solvent carbitol acetate as a main component as 100 parts, and 6 to 20 parts of an imidazole-based curing agent are prepared. The method for manufacturing a lead frame according to claim 2 or 3.
エポキシ樹脂４０％〜５０％と、予めカップリング処理
を施した硫酸バリウムとシリカを混合したフィラー４０
％〜５０％と、顔料１％〜２％及び溶剤カルビトールア
セテート８％〜９％とを含む主剤を１００部として、イ
ミダゾール系硬化剤を６部〜２０部を調合したものであ
ることを特徴とする請求項４または請求項５記載の半導
体パッケージ。8. A filler 40 in which the heat-resistant insulating epoxy resin is a mixture of novolac epoxy resin 40% to 50% and barium sulfate and silica which have been previously subjected to a coupling treatment.
% To 50%, 1% to 2% of pigment, and 8% to 9% of solvent carbitol acetate as a main component as 100 parts, and 6 to 20 parts of an imidazole-based curing agent are prepared. The semiconductor package according to claim 4 or claim 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4341622A JPH06169051A (en) | 1992-11-27 | 1992-11-27 | Lead frame and manufacture thereof and semiconductor package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4341622A JPH06169051A (en) | 1992-11-27 | 1992-11-27 | Lead frame and manufacture thereof and semiconductor package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06169051A true JPH06169051A (en) | 1994-06-14 |
Family
ID=18347514
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4341622A Pending JPH06169051A (en) | 1992-11-27 | 1992-11-27 | Lead frame and manufacture thereof and semiconductor package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06169051A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997030478A1 (en) * | 1996-02-15 | 1997-08-21 | Nitto Denko Corporation | Semiconductor device and multilayered lead frame used for the same |
| US5726490A (en) * | 1994-09-26 | 1998-03-10 | Nec Corporation | Semiconductor device |
| US5776802A (en) * | 1993-12-08 | 1998-07-07 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and manufacturing method of the same |
| US6137299A (en) * | 1997-06-27 | 2000-10-24 | International Business Machines Corporation | Method and apparatus for testing integrated circuit chips |
| US7174110B2 (en) | 2004-05-17 | 2007-02-06 | Fuji Xerox Co., Ltd. | Image forming device having replacement units mounted thereto |
| US7199306B2 (en) | 1994-12-05 | 2007-04-03 | Freescale Semiconductor, Inc. | Multi-strand substrate for ball-grid array assemblies and method |
| JP2013010945A (en) * | 2011-05-27 | 2013-01-17 | Taiyo Ink Mfg Ltd | Thermosetting resin composition, and dry film and printed wiring board which use the same |
-
1992
- 1992-11-27 JP JP4341622A patent/JPH06169051A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5776802A (en) * | 1993-12-08 | 1998-07-07 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and manufacturing method of the same |
| US5726490A (en) * | 1994-09-26 | 1998-03-10 | Nec Corporation | Semiconductor device |
| US7199306B2 (en) | 1994-12-05 | 2007-04-03 | Freescale Semiconductor, Inc. | Multi-strand substrate for ball-grid array assemblies and method |
| US7397001B2 (en) | 1994-12-05 | 2008-07-08 | Freescale Semiconductor, Inc. | Multi-strand substrate for ball-grid array assemblies and method |
| WO1997030478A1 (en) * | 1996-02-15 | 1997-08-21 | Nitto Denko Corporation | Semiconductor device and multilayered lead frame used for the same |
| US6137299A (en) * | 1997-06-27 | 2000-10-24 | International Business Machines Corporation | Method and apparatus for testing integrated circuit chips |
| US7174110B2 (en) | 2004-05-17 | 2007-02-06 | Fuji Xerox Co., Ltd. | Image forming device having replacement units mounted thereto |
| JP2013010945A (en) * | 2011-05-27 | 2013-01-17 | Taiyo Ink Mfg Ltd | Thermosetting resin composition, and dry film and printed wiring board which use the same |
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