JPH054846B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an integrated circuit device, and more particularly to an integrated circuit device having a function of stopping oscillation of an oscillation circuit for a crystal or ceramic resonator.

[Conventional technology]

In recent years, with the progress of integrated circuit technology, the use of CMOS integrated circuit devices is rapidly progressing. Along with this,
In order to make effective use of the low power consumption feature of CMOS, an integrated circuit device (hereinafter referred to as "integrated circuit device") has a function to inhibit the operation of internal circuits by stopping the primary oscillation of the oscillation circuit when the integrated circuit is in a non-operating state (standby). , LSI) are known.

In FIG. 3 showing a conventional example, this integrated circuit device has an input terminal 11, an output terminal 12, a P-channel MOS/FET 33, and an N-channel MOS/FET 33.
It consists of FETs 34 and 35, a feedback resistor 36, and an inverter 37, and its output is supplied to the internal circuit of the LSI as a clock signal. Additionally, a control signal 38 is applied. When oscillating using a resonator, connect the resonator between terminals 11 and 12,
The control signal 38 is set to low level (hereinafter simply referred to as "0"). As a result, a clock signal is supplied from the inverter 37 to the internal circuit of the LSI, and the LSI becomes operational. In addition, when stopping the operation, by setting the control signal 38 to a high level (hereinafter abbreviated as "1"), the MOS FET 35 becomes conductive, the input terminal 11 becomes "0", and the MOS FET 33 becomes conductive. However, since the output terminal 12 becomes "1", oscillation is stopped and the clock signal is fixed at "0". This greatly reduces power consumption inside the LSI.

There is no problem when using a resonator in this way, but in various control devices that use multiple LSIs, synchronization between LSIs is required, so instead of using an oscillation circuit inside the LSI, an external oscillation circuit is used. It is common to provide a common clock signal to each LSI.

[Problem that the invention seeks to solve]

In Figure 3, when supplying a clock signal from the outside, it is logically sufficient to supply it only from the input terminal 11, but if the clock frequency is high, it is difficult to operate reliably due to the capacitance of the output terminal 12, etc. . For this reason, it is common to supply a complementary signal of the input terminal 11 to the output terminal 12. In this case, control signal 3 is used to stop the operation of the LSI.
8 is set to "1", the input terminal 11 is fixed to "0" and the output terminal 12 is fixed to "1", which may conflict with the clock signal supplied from the outside and destroy the LSI. Alternatively, even if this does not lead to destruction, there is a serious drawback in that a large current flows and unnecessary power is consumed.

The purpose of the present invention is to eliminate these drawbacks, ensure reliable operation even when a resonator is used, or when a clock signal is supplied from the outside, and prevent destruction of the LSI and waste of power even in the non-operating state. The object of the present invention is to provide an integrated circuit device that does not require consumption.

[Means for solving problems]

The configuration of the present invention is such that, in an integrated circuit device having an oscillation circuit using a crystal or ceramic resonator, an inverter having a first terminal as an input and a second terminal as an output is connected between the input and output of this inverter. and means for setting the output of the inverter to a high impedance state using a control signal.

〔Example〕

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing an integrated circuit device according to a first embodiment of the present invention. In the figure, this integrated circuit device includes an input terminal 11, an output terminal 12, P-channel MOS/FETs 13 and 14, N-channel MOS/FETs 15 and 16, and a feedback resistor 17.
Inverter 18 (control signal 19 is input)
and a NOR circuit 20, and the output of the NOR circuit 20 supplies a clock signal to the inside of the LSI. First, when using a resonator,
A resonator is connected between the input and output terminals 11 and 12, and the control signal 19 is set to "0". As a result, the output of the inverter 18 becomes "1", and the MOS/FET1
4 and 15 conduct, and MOS/FETs 13 and 16 operate as an inverter, so oscillation continues.
A clock signal is supplied from the NOR circuit 20 to the inside of the LSI. Next, if you want to stop the LSI operation,
When the control signal 19 is set to “1”, the inverter 18
The output becomes "0", the MOS/FETs 14 and 15 are cut off, and the output terminal 12 becomes a high impedance state, so the oscillation stops and
The output of the NOR circuit 20 is “0” by the control signal 19
Fixed. Therefore, the power consumption inside the oscillation circuit and the LSI becomes extremely small.

Next, the case where a clock signal is supplied from the outside will be explained. When an external clock signal is supplied to the input terminal 11 and a complementary signal of the input terminal 11 is supplied to the output terminal 12, in the operating state where the control signal 19 is "0", the MOS/FET 13
The circuit constituted by 1 to 16 operates as an inverter, and its output is in phase with the signal supplied to the output terminal 12, and a clock signal is supplied to the internal circuit of the LSI via the NOR circuit 20. Also, LSI
When the internal circuit is to be inactive, the control signal 19 is set to "1" and the MOS/FETs 14 and 15 are cut off. Therefore, the output terminal 12 is in a high impedance state, and no competition occurs even if an external clock signal is input. Also NOR
The output of the circuit 20 is fixed at "0" by the control signal 19, and the supply of clock signals to the inside of the LSI is stopped, resulting in low power consumption.

FIG. 2 is a circuit diagram showing an integrated circuit device according to a second embodiment of the present invention. This integrated circuit device is constructed in a manner similar to that shown in FIG. MOS・FET13,
The output of the inverter circuit consisting of 16
It is connected to the output terminal 12 via a switch circuit composed of MOS/FETs 14 and 15. As in the first embodiment of the present invention, when the control signal 19 is "0", it is in the operating state, and when it is "1", it is in the stopped state. In the stop state where the control signal 19 is "1", the switch circuit composed of the MOS/FETs 14 and 15 is cut off, so the output terminal 12 becomes a high impedance state, similar to the first embodiment of the present invention. Effects can be obtained.

〔Effect of the invention〕

As explained above, according to the present invention, by setting the inverter output of the oscillation circuit to a high impedance state using a control signal, reliable operation is ensured even when a resonator is used or when a clock signal is supplied from the outside. You can also
When setting the LSI to non-operating state,
No destruction of LSI or wasted power consumption.
The effect is that a highly versatile LSI can be provided.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an integrated circuit device according to a first embodiment of the present invention, FIG. 2 is a circuit diagram showing an integrated circuit device according to a second embodiment of the present invention, and FIG. 3 is a circuit diagram showing an integrated circuit device according to a second embodiment of the present invention. FIG. 2 is a circuit diagram showing a circuit device. 11...Input terminal, 12...Output terminal, 13,1
4,33...P channel MOS/FET, 15,1
6, 34, 35...N channel MOS/FET, 1
7, 36... Feedback resistor, 18, 37... Inverter,
19, 38...control signal, 20...NOR circuit.

Claims (1)

[Claims] 1 In an integrated circuit device having an oscillation circuit using a crystal or ceramic resonator, an inverter having a first terminal as an input and a second terminal as an output, and a feedback resistance element connected between the input and output of this inverter. , means for setting the output of the inverter to a high impedance state using a control signal.