JPH0547921A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To constitute element isolation insulation wherein bird's beaks scarcely exist and no step-difference is present, by a method wherein an element isolation region is previously etched and made lower than the substrate surface, and the step-difference between the element isolation insulating film and an element forming region silicon substrate is almost eliminated by selectively oxidizing SOG and the silicon substrate. CONSTITUTION:According to a specified pattern, an oxide film 4, an oxidation resistant film 3, a thin oxide film 2, and a silicon substrate 1 are selectively etched by anisotropic dry etching. The oxide film 4 is etched and eliminated by a wet etching method. An oxide film formed on the whole exposed surface by a CVD method, and a specified resist pattern is formed by coating.exposing.developing resist. An insulating film pattern 6 is formed by selectively etching the oxide film by a wet etching method. The whole surface is coated with SOG by a rotation coating method, and the recessed part is filled with SOG 7. By heat treatment, the cured SOG 7 and peripheral silicon are oxidized to form an oxide insulating film 8.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming an insulator element isolation region using selective oxidation on a silicon semiconductor substrate. In pattern scale-down (miniaturization) accompanying the recent increase in speed and integration of ICs and VLSIs, flattening of element isolation insulating films and reduction of parasitic capacitance due to bird's beaks are required. for that reason,
It is necessary to reduce the step between the element isolation insulating film and the silicon substrate and reduce the bird's beak.

[0002]

2. Description of the Related Art A conventional element isolation technique by selective oxidation is
Known as LOCOS, an oxidation resistant film pattern is formed on a silicon substrate, and silicon not covered with the oxidation resistant film pattern is oxidized by thermal oxidation to form an oxide film (SiO ₂ film). That is why. During thermal oxidation,
Not only does silicon oxidize to about twice the volume of SiO ₂ , but the oxidization goes below the oxidation resistant pattern (ie,
Lateral), and as a result, a bird's beak-shaped oxide film (Si
O ₂ film) is generated. Further, usually, a thin silicon oxide film (SiO ₂ film) for buffering defects that suppresses the generation of crystal defects during the selective thermal oxidation is formed in advance under the oxidation resistant film pattern. The film promotes the formation of bird's beaks.

[0003]

Therefore, the conventional element isolation by the selective oxidation method has the following problems with respect to the scale-down which may be further advanced in the future due to the high speed and high integration of the integrated circuit. .. The step (step between the oxide film and the silicon substrate) caused by the selective oxidation causes a decrease in reliability of the upper interlayer insulating film and the upper wiring layer (that is, a step coverage problem).

The occurrence (progression) of bird's beak narrows the element formation region, resulting in a reduction in processing (dimension) accuracy. In view of the total parasitic capacitance that adversely affects the operating speed of the element (transistor), the bird's beak causes an increase in the ratio of the parasitic capacitance. An object of the present invention is to provide a method for forming an element isolation region by selective oxidation that does not cause the above-mentioned drawbacks.

[0005]

Means for Solving the Problems The above-mentioned objects are: steps (a) to (f): (a) a step of forming an oxidation resistant film pattern on a silicon semiconductor substrate; (b) covering with the oxidation resistant film pattern. A step of selectively etching away the silicon semiconductor substrate that has not been exposed; (c) an insulating film that surrounds the element region at a predetermined distance from the element formation region in a region corresponding to the isolation region in the etching removal region. A step of forming a pattern; (d) a step of embedding SOG between the element region and the insulating film pattern; (e) a selective oxidation of the SOG and the silicon substrate by a thermal oxidation treatment to form an oxide insulating film, And a step of forming an element isolation insulating film with the insulating film pattern; and (f) removing the oxidation resistant film pattern. .

The insulating film pattern is preferably obtained by selectively etching an insulating film deposited over the entire surface with a thickness similar to the etching depth, which contributes to surface flattening. The distance (spacing) between the element region in which SOG is to be embedded and the insulating film pattern is preferably 2 to 4 μm, and if it is narrower than 2 μm, processing accuracy is required during the insulating film patterning process. If the width is larger than 4 μm, processing accuracy with adjacent elements is required.

[0007]

In the present invention, the element isolation (isolation) region is previously etched to be lower than the surface of the silicon substrate, and the element isolation insulating film and the element are formed by the volume expansion of the SOG and the selective oxidation of the silicon substrate. A flat surface can be obtained by substantially eliminating the step difference from the region silicon substrate. The selective oxidation first oxidizes SOG and then slightly oxidizes the silicon substrate, so that bird's beaks are small even if they occur.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the accompanying drawings by way of example embodiments of the present invention. 1 to 6 are
6A and 6B are a schematic cross-sectional view and a plan view illustrating a step of forming an element isolation insulating film according to the method of manufacturing a semiconductor device of the present invention.

As shown in FIG. 1, a silicon substrate (for example,
For example, P type (100) Si, 10-20 Ωcm) 1
Then, a thermal oxidation process is performed to form a thin oxide (SiO₂) Form membrane 2 over the entire surface
To achieve. The thin oxide film 2 has a thickness of 10 nm, for example.
Silicon nitride film (oxidation resistant film) directly on the silicon substrate
Formed and subjected to selective thermal oxidation, silicon and silicon nitride
The occurrence of crystal defects due to thermal stress with
Suppress. A CVD method (chemical vapor deposition) is formed on the oxide film 2.
The silicon nitride (Si) which is an oxidation resistant film ₃N
_Four) Form the film 3 on the entire surface. The thickness of this oxidation resistant film 3 is
For example, it is 150 nm. Further, C is formed on the entire surface of the oxidation resistant film 3.
Oxidation by the VD method (SiO₂) Membrane 4 (at a thickness of 200 nm)
To form.

Next, as shown in FIG. 2, the oxide film 4, the oxidation resistant film 3, the thin oxide film 2 and the silicon substrate 1 are selectively etched according to a predetermined pattern shape. To this end, a resist is applied on the oxide film 4, exposed and developed to form a predetermined resist pattern (not shown) by a normal lithography technique, and then the oxide film 4 is formed by an anisotropic dry etching method. , Oxidation resistant film 3 and thin oxide film 2
To etch. Further, the silicon substrate 1 is etched to a depth of, for example, 200 to 400 nm by an anisotropic dry etching method in which the etching gas is changed to that for silicon to form a recess. This etching portion (recess) corresponds to at least the element isolation region 5A, and also includes the insulating region 5B between the collector and the base in the bipolar transistor. A plan view in this state is FIG. Although it is possible to substitute the resist film without forming the oxide film 4, it is necessary to process (etch) the silicon nitride of the oxidation resistant film 4 with high accuracy and perform high-precision selective etching as the entire etching process. It is better to have the oxide film 4.

As shown in FIG. 4, the oxide film 4 is removed by wet etching. Next, an oxide film (SiO ₂ , thickness 200 to 400 nm) is formed on the exposed entire surface by the CVD method, and resist coating / exposure /
Form a predetermined resist pattern (not shown) by development,
The insulating film pattern 6 is formed by selectively etching the oxide film by a wet etching method, as shown in FIG. The insulating film pattern 6 is located in the element isolation region 5A and at a position several μm (2 to 4 μm) away from the silicon substrate convex portions 1B and 1C which are the element formation regions. Thus, there is a space between the insulating film pattern 6 and the silicon substrate protrusions 1B and 1C. In addition, the silicon substrate convex portion 1
The insulating region 5B between B and 1C is also a space.
Then, SOG (spin on glass, for example, "OCD (trade name)" by Tokyo Ohka) is applied on the entire surface by a spin coating method, and the spaces (recesses) are filled with SOG7. SOG
The thickness of 7 is, for example, 75 to 150 nm, and it is also attached to the side wall. This SOG7 is cured at 800 ° C. for 30 minutes in a steam-added oxygen (Wet O ₂ ) atmosphere. A plan view of this state is shown in FIG.

As shown in FIG. 6, thermal oxidation treatment (for example,
Wet O ₂ atmosphere at 1000 ° C. for 100 minutes is applied to oxidize the cured SOG7, and further oxidize some of the silicon around it to form an oxide insulating film 8 (thickness 400 to 600 n).
m) is formed, and the element isolation insulating film 9 is constituted by the insulating film pattern 6 previously formed. In this selective thermal oxidation, the silicon oxidation of the silicon substrate 1 is greatly reduced as compared with the conventional one, and bird's beaks are hardly generated. Note that the SOG is formed so that the surface of the element isolation insulating film 9 thus formed is substantially flat.
The coating amount of No. 7 and the thermal oxidation treatment time are set. Next, the oxidation resistant film 4 is removed by etching by a wet etching method, and the thin oxide film 2 thereunder is removed by etching instead of the etching solution. In this state, the convex portions 1B and 1C of the silicon substrate 1 and the element isolation insulating film 9 become substantially flat. Then, the exposed convex portions 1B and 1C of the silicon substrate 1 are doped with impurities in a normal process,
A bipolar transistor (or MOSFET) is manufactured.

[0013]

As described above, according to the method of manufacturing a semiconductor device of the present invention, it is possible to form an element isolation insulating film having almost no bird's beak and no steps. Therefore, since there is no bird's beak and there is no parasitic capacitance due to the bird's beak, the parasitic capacitance can be reduced, the operation speed of the element can be improved, and the element formation region can be formed accurately.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of a semiconductor device when a film is formed on a silicon substrate by a manufacturing method according to the present invention.

FIG. 2 is a schematic cross-sectional view of a semiconductor device when a silicon substrate is selectively etched by the manufacturing method according to the present invention.

FIG. 3 is a schematic plan view of the semiconductor device of FIG.

FIG. 4 is a schematic cross-sectional view of a semiconductor device when SOG is applied and formed by a manufacturing method according to the present invention.

5 is a schematic plan view of the semiconductor device of FIG.

FIG. 6 is a schematic cross-sectional view of a semiconductor device when an element isolation insulating film is formed by a manufacturing method according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Silicon substrate 3 ... Oxidation resistant film 4 ... Oxide film 5A ... Element isolation area 5B ... Insulation area 6 ... Oxide film pattern 7 ... SOG 8 ... Oxide insulation film 9 ... Element isolation insulation film

Claims (3)

[Claims] 1. The following steps (a) to (f): (a) a step of forming an oxidation resistant film pattern on a silicon semiconductor substrate (1); (b) the silicon not covered with the oxidation resistant film pattern. A step of selectively removing the semiconductor substrate (1) by etching; (c) a step of forming an insulating film pattern (6) at a predetermined distance from the element forming area in the area corresponding to the isolation area in the etching removing area. (D) Step of burying SOG (7) between the element regions (1B, 1C) and the insulating film pattern (6); (e) Selectively oxidizing the SOG and the silicon substrate by thermal oxidation treatment. An oxide insulating film (8), and a step of forming an element isolation insulating film (9) with the insulating film pattern (6); and (f) a step of removing the oxidation resistant film pattern. Tosu Manufacturing method of semiconductor device. 2. The manufacturing method according to claim 1, wherein the insulating film pattern (6) is obtained by selective etching of an insulating film deposited and formed on the entire surface in a thickness similar to the etching depth. 3. The manufacturing method according to claim 1, wherein the distance between the element regions (1B, 1C) and the insulating film pattern (6) is 2 to 4 μm.