JPH05161343A - Driving circuit for mos gate transistor - Google Patents

Abstract

PURPOSE:To reduce the power loss at switching operation of a MOS gate transistor. CONSTITUTION:In a device, which turns on or turns off a MOS gate transistor 6 such a IGBT, MOSFET, the MOS transistor 6 is controlled through the gate resistor of low impedance by providing a rate-of-change limiting means 20, which limits the rate of change of a switching command signal within the specified rate of change, and an amplification means 21, which amplifies the power of signal where the rate of change is limited.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to IGBTs and MOSFETs.
And a drive circuit for a MOS gate transistor.

[0002]

2. Description of the Related Art A conventional IGBT drive circuit is shown in FIG. The amplifier composed of the positive gate power source 1, the negative gate power source 2 and the transistors 3 and 4 power-amplifies the drive signal e _g to output the gate signal V _G ,
The IGBT 6 is driven via the gate resistor 5. (IGB
The diode connected in anti-parallel with T6 is omitted because it is unnecessary for explanation.) The IGBT 6 is connected in series with the IGBT 8 and bridge-connected to the DC power supply 11.

Here, a negative bias is applied to the IGBT 8 from the gate bias power source 7 to turn it off, and the IGBT is turned off.
It is also assumed that the current I _L is flowing in the diode 9 due to the inductance of the load 10 in the off state of T6 as well. In this state,
Next, FIG. 4B shows a state when the IGBT 6 is turned on.

At time t ₁ , when the gate signal V _G is changed from negative to positive, the gate voltage V _GE changes to the gate resistance 5 and the IG.
The gate rises at a slope determined by the gate-emitter capacitance C _GE of BT6, and the IGBT 6 starts to turn on at time t ₂ .

V _{CE of the} IGBT 6 is slightly lowered, and I _C is increased as the current I _{L of the} diode 9 shifts to the IGBT 6. When V _CE decreases, the charge of the capacitor of C _GC is discharged and C _GE is charged in the opposite direction, so the rise of V _GE becomes gentle. Shaded area of the I _C is the recovery current of the diode 9, V _CE Beyond is I _C begins rapidly lowering the potential of the C _GC V _GE the discharge also becomes steep will be almost unchanged. This limits the _fall of V _CE . At time t ₄ , the recovery current of the diode 9 becomes zero. Since the recovery current of the diode 9 decreases from time t _{3 to} t ₄ , A surge voltage is generated ( ₁₀ is stray inductance). During this period, a power loss P occurs during switching as shown in FIG. 4 (b).

[0006]

To reduce the switching losses at turn-on [0008] possible to shorten the t ₂ ~t _3, it is necessary to shorten the t ₃ ~t ₅ as well.

The turn-on time can be shortened by decreasing the resistance value of the gate resistor 5, but the diode 9
The voltage V _D generated between the terminals becomes large, and it becomes an oscillating voltage. This state is shown in FIG.
Shown in. Note that FIG. 5A shows a case where the gate resistance is usually appropriate for comparison.

If the turn-on is accelerated, the rate of change of I _C di
c / dt increases, the di / dt of the diode 9 increases I _C of the peak current (recovery peak current of the diode) is increased, at the same time also between t ₃ ~t ₄ Nari short t ₃ ~t ₄ between At the same time that the surge voltage of the voltage V _D of the diode 9 increases and the vibration starts. Therefore, the voltage margin of the diode 9 and the IGBT 8 is insufficient. In addition, this voltage oscillation causes a malfunction of the gate amplifier circuit. Therefore, conventionally, the gate resistance 5 is selected and used in a range in which switching loss at turn-on increases but a surge voltage of the diode does not occur.

The present invention eliminates the above-mentioned problems and reduces the loss at turn-on. That is, an object of the present invention is to provide a drive circuit for a MOS gate transistor that reduces switching loss while suppressing the surge voltage of the diode.

[0010]

[Means for Solving the Problems] To achieve the above object,
The present invention relates to a device for ON / OFF switching control of a MOS gate transistor such as an IGBT or a MOSFET, and a change rate limiting means for limiting the change rate of a switching command signal within a predetermined change rate and a signal with a limited change rate. An amplification means for power amplification is provided, and the MOS gate transistor is controlled via the low impedance gate resistor.

[0011]

Since the gate signal V _G is inclined by the rate-of-change limiting means, di / dt at the turn-on of the MOS gate transistor does not increase, and the collector current I _C passes the peak and the collector-emitter voltage V _CE. Rapidly starts to decrease, and even if the gate-emitter capacitance C _GE is reversely charged, the impedance of the gate resistance is small, so the gate voltage V _GE continues to increase, V _CE rapidly decreases, and the turn-on time shortens. , Switching loss is reduced.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1A shows the configuration of an embodiment of a MOS gate transistor drive circuit according to the present invention. Figure 1 (a)
In, the change rate limiting circuit 20 limits and outputs the change rate when the drive signal e _g is input stepwise. The amplifier 21 power-amplifies the output signal of the change rate control circuit 20, and drives the IGBT 6 via the gate resistor 5 having a resistance value smaller than that of the conventional one. Others are the same as the conventional ones, and the same reference numerals as those in FIG. 1B and 1C are examples in which FIG. 1A is embodied. First, FIG. 1B will be described in detail.

In FIG. 1B, the drive signal e _g is power-amplified by an amplifier composed of transistors 22 and 23, and its rate of change is limited by a first-order lag circuit composed of a resistor 24, a capacitor 25, and a resistor 26. The power is amplified by the amplifier. ( _If the internal impedance of e _g is low, the amplifier circuits of the transistors 22 and 23 can be omitted.)

In the above structure, the drive signal e is generated at time t _1.
FIG. 2 shows the state of each part when _g is switched from negative to positive and a step-like ON signal is applied. This e _g is power-amplified by the transistors 22 and 23 and added to one end of the resistor 24, and the gate voltage of the transistors 3 and 4 is obtained by adding a first-order delay determined by the resistor 24, the capacitor 25, and the resistor 26 and a step-like waveform. The waveform becomes a waveform, and the output voltage of the transistors 3 and 4, that is, the gate voltage V _G gradually increases to the positive side as shown in FIG. Since the gate resistance 5 has low impedance, the gate-emitter voltage V _GE of the IGBT 6 has a waveform close to V _G.

At time t ₂ , the IGBT 6 starts to turn on and V _CE starts to drop, and at the same time, the current I _C starts to rise. The increase rate of I _C is determined by the impedance decrease rate of the IGBT 6 and the stray inductance of the main circuit. Therefore, when the stray inductance is constant, the gate voltage V _GE
Affected by the rate of change of. That is, the faster the rising speed of V _GE, the faster the rising of I _C.

When the diode recovery current reaches a peak at time t ₃ , C _CE rapidly decreases, and FIG.
Although the C _GC is to try to decrease rapidly discharged V _GE, the on-resistance of the gate resistor 5 V _GE for low impedance has a waveform close to V _G IGBT 6 rapidly decrease. Therefore, the time period between t ₃ and t ₄ is shortened, and the switching loss P is significantly reduced.

Since the period between t _{2 and} t ₃ is not shortened, dIc / dt at the time of rising is the same as the conventional one, and the recovery current of the diode does not increase, so that the surge voltage at the time of diode recovery does not increase.

After time t _7, the turn-off waveform is
Although this is not adversely affected greatly by particularly high rate of change of V _GE case, since there is a point to consider surge of V _CE when it and turn-off gate current increases increases, the V _G It is easier to use a slope for the fall.

According to the present embodiment, the gate signal V _G is provided with a slope and the gate resistance is set to a low impedance to drive the IGBT with a gate signal close to the voltage source, thereby limiting the di / dt of the diode. Suppresses the surge voltage at the time of diode recovery, and at the same time the IGBT
Even if the collector voltage V _CE of the IC falls rapidly, the effect on the gate voltage V _GE is reduced, thereby significantly reducing the switching loss at turn-on, and reducing the temperature rise of the IGBT, resulting in high efficiency and high reliability. You can secure the sex.
Further, FIG. 1B can be modified as shown in FIG. 3A, and by connecting the diode 35 in parallel with the resistor 26, it is possible to shorten the delay at turn-on. Also, FIG.
In (b), the rate of change of rising and the rate of change of falling can be changed by connecting the diode 36 and the resistor 37 shown in FIG. 3 (c). In addition, as shown in FIG.
Even if a gate signal with a constant rate of change is created using the operational amplifier 30, the resistors 27 and 28, and the capacitor 29, the same effect is obtained.

It should be noted that the operation of FIG. 1C can be made equivalent to that of FIG. 1B by using a first-order delay circuit as shown in FIG. 3B. It is needless to say that FIG. 3B does not describe a modification such as inserting a resistor in series with the capacitor 29. Although the description has been made on the IGBT, it can be applied to all MOS gate transistors.

[0021]

As described above, according to the present invention, the gate signal is inclined and the gate resistance is selected to be low.
By driving the S gate transistor with a gate signal close to the voltage source, the turn-on delay due to the negative feedback of the gate-collector capacitance of the transistor to the gate voltage is reduced, and at the same time the switching loss at turn-on is reduced. By suppressing the rate of change of rising at the time of turn-on, it is possible to suppress the surge voltage for recovery of the diode, reduce the generation of noise, and provide a highly efficient and highly reliable MOS gate transistor drive circuit.

[Brief description of drawings]

FIG. 1 is an embodiment of a MOS gate transistor drive circuit according to the present invention.

FIG. 2 is a waveform diagram for explaining the operation of the above embodiment.

FIG. 3 is another embodiment of the present invention.

FIG. 4 is a conventional MOS gate transistor drive circuit and its operation waveform diagram.

FIG. 5 is a waveform diagram for explaining a problem during diode recovery.

[Explanation of symbols]

1, 2 ... Gate power supply, 3, 4 ... Transistor, 5 ... Gate resistance, 6 ... IGBT, 7 ... Gate bias power supply, 8 ...
IGBT, 9 ... Diode, 10 ... Load, 11 ... DC power supply, 20 ... Change rate limiting circuit, 21 ... Amplifier, 22, 23
... transistors, 24, 26 ... resistors, 25 ... capacitors, 27, 28 ... resistors, 29 ... capacitors, 30 ... operational amplifiers, 35, 36 ... diodes

Claims (1)

[Claims] 1. An MO such as an IGBT or a MOSFET.
An apparatus for controlling on / off switching of an S gate transistor is provided with a change rate limiting means for limiting a change rate of a switching command signal within a predetermined change rate and an amplifying means for power-amplifying a signal with a limited change rate. A drive circuit for a MOS gate transistor, wherein the MOS gate transistor is controlled via an impedance gate resistance.