JPH05144841A - Method of manufacturing thin film transistor - Google Patents

Abstract

PURPOSE:To make it possible to reduce the number of a plasma CVD processes by a method wherein after an Si film, which is used as an operating semiconductor film, is deposited a hydrogeneration treatment is performed on the whole surface of the Si film to form a hydrogenerated Si film and the like. CONSTITUTION:A gate electrode (a Ta film) 2, gate insulating films (a Ta2O5 film and an SiNx film) 3 and 4 and an operating semiconductor film 5 are laminated in that order on a transparent insulative substrate (a glass substrate) 1 and the film 5 has a channel part and has a source and a drain on both sides of the channel part. In the case where such a thin film transistor is manufactured, an Si film 5 is deposited on a gate insulating film 4 and a hydrogeneration treatment is performed on the while surface of the film 5 to form a hydrogenerated Si film 5a. Then, after an insulating film (an SiO2 film) 6 is formed on the film 5a, the film 6 is patterned and etched by a back exposure method using a gate electrode 2 as a mask to form a channel protective layer 6a. Then, a one conductivity type impurity is introduced in the film 5a using the layer 6a as a mask to form a source and a drain.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor. In recent years, a thin film transistor (hereinafter referred to as TFT) matrix has been used as a driving element for a liquid crystal display panel, electroluminescence, or the like. In such a TFT matrix, it is desired to manufacture hundreds of thousands of TFTs with high yield and at low cost.

[0002]

2. Description of the Related Art FIGS. 3 (a) to 3 (d) are sectional views showing a conventional example of manufacturing a liquid crystal driving TFT (step 1), and FIG.
(G) is a process order sectional view (2) which shows a prior art example.
Hereinafter, a conventional example will be described with reference to these drawings.

Referring to FIG. 3A, a Ta film 12 to be a gate electrode is formed on a glass substrate 1,
The surface is anodized to form a Ta ₂ O ₅ film 13.
The Ta ₂ O ₅ film 13 becomes a part of the gate insulating film.

See FIG. 3 (b). The entire surface is covered with Si to be a gate insulating film by plasma CVD.
An N _x film 14, an a-Si: H film 15 to be an operating semiconductor film, and a SiO ₂ film 16 to be a channel protective layer are formed.

Referring to FIG. 3C, a positive resist is applied on the SiO ₂ film 16 and the gate electrode 2 is formed.
Exposing the positive resist by backside exposure using
The resist mask 17 is formed by developing.

Referring to FIG. 3 (d), the SiO ₂ film 16 is etched using the resist mask 17 as a mask to form a channel protective layer 16a of the SiO ₂ film.

Referring to FIG. 4 (e), an n ⁺ -type a-Si film 18 serving as a source / drain is deposited on the entire surface by a plasma CVD method, and then a Ti film 19 serving as a source electrode and a drain electrode is deposited on the entire surface by a sputtering method. To do.

Referring to FIG. 4 (f), a Ti film 19, n ⁺ type a-Si film 18 and a-S are formed using a mask.
The i film 15 is etched to form a source 18a, a drain 18b, a source electrode 19a and a drain electrode 19b.

Referring to FIG. 4 (g), after depositing an ITO film on the entire surface by sputtering, it is etched using a mask to form a pixel electrode 20 connected to the source electrode 19a.

In the conventional example described above, there are four plasma CVD processes. In a normal mass production process, one plasma CVD device is required for each process, and therefore four plasma CVD devices are required in total. Further, in the plasma CVD apparatus, dust of deposits is generated in the reaction chamber, and management for maintaining the yield is complicated.

The plasma CVD apparatus is expensive, and it is desirable to reduce the number of plasma CVD processes in terms of cost and yield.

[0012]

SUMMARY OF THE INVENTION In view of the above problems, it is an object of the present invention to provide a method of manufacturing a TFT that can reduce the number of plasma CVD steps.

[0013]

1 (a) to 1 (d) are sectional views in order of steps showing an embodiment (No. 1), and FIGS. 2 (e) to 2 (g) are sectional views in order of steps showing an embodiment. (Part 2).

The above-mentioned problem is that the gate electrode 2, the gate insulating films 3 and 4, and the operating semiconductor film 5 are laminated in this order on the transparent insulating substrate 1, and the operating semiconductor film 5 is a source / drain on both sides of the channel portion. A step of depositing a silicon film 5 on the gate insulating film 4, a step of subjecting the entire surface of the silicon film 5 to a hydrogenation treatment to form a hydrogenated silicon film 5a, Forming an insulating film on the formed silicon film 5a, and then patterning and etching the insulating film by a backside exposure method using the gate electrode 2 as a mask to form a channel protective layer 6a;
This is solved by a method of manufacturing a thin film transistor, which includes a step of forming a source 5c and a drain 5d by introducing an impurity of one conductivity type into the hydrogenated silicon film 5a using the channel protection layer 6a as a mask.

In addition, the channel protection layer 6a is used as a mask to solve the problem by a method of manufacturing a thin film transistor in which a source 5c and a drain 5d are formed by introducing an impurity of one conductivity type into the hydrogenated silicon film 5a by a plasma doping method. To be done.

Further, the silicon film 5 is an amorphous silicon film, and the one conductivity type impurity is an n-type impurity, which is solved by a method of manufacturing a thin film transistor.

[0017]

In the present invention, the silicon film 5 serving as the operating semiconductor film is used.
Since the hydrogenated silicon film 5a is formed by depositing hydrogen, a vapor deposition method or a sputtering method, for example, can be applied as a method for forming the silicon film 5. Plasma CVD used for formation
The law does not have to be applied.

Further, also when forming the source 5c and the drain 5d in which one conductivity type impurity is introduced in the hydrogenated silicon film 5a, the plasma CVD method may not be applied. For example, plasma doping method can be applied, plasma CVD
Compared with the method, process control is easier and the reproducibility of characteristics is good.

Further, the method of the present invention can be very effectively applied to the manufacture of a thin film transistor in which an amorphous silicon film is used as an operating semiconductor film and one conductivity type impurity is an n type impurity.

[0020]

Embodiments FIGS. 1 (a) to 1 (d) are process sectional views showing the embodiment (No. 1), and FIGS. 2 (e) to 2 (g) are process sectional views showing the embodiment (No. 2). is there. Examples will be described below with reference to these drawings.

FIG. 1 (a) As a glass substrate 1 to be a transparent insulating substrate, for example, Corning # 7059 is used, Ta is sputtered thereon to a thickness of 300 nm, and it is etched using a mask to form a gate. The electrode 2 was formed. Anodizing the Ta surface to a thickness of 200n
A Ta ₂ O ₅ film 3 of m was formed. The Ta ₂ O ₅ film 3 becomes a part of the gate insulating film.

FIG. 1 (b) A silicon nitride film (SiN _x ) having a thickness of 150 nm was deposited on the entire surface by plasma CVD to form a gate insulating film 4. SiH ₄ + NH ₃ + H ₂ is used as the source gas,
The temperature was 250 ° C, the pressure was 0.8 Torr, and the power was 0.2 W / cm ² .

Amorphous silicon (a-Si) having a thickness of 20 nm is formed on the gate insulating film 4 by electron beam evaporation at room temperature.
The film 5 is deposited. The a-Si film 5 serves as an operating semiconductor film.

For example, by a parallel plate type high frequency discharge device,
Hydrogen plasma treatment was performed on the entire surface of the a-Si film 5 to form a hydrogenated a-Si film 5a. The conditions are temperature 250
℃, pressure 0.8 Torr, power 0.3 W / cm ² .

FIG. 1 (c) A SiO ₂ film 6 having a thickness of 200 nm is deposited on the hydrogenated a-Si film 5a by a plasma CVD method. Using 5% SiH ₄ + N ₂ O + H ₂ as the source gas, the temperature is 200 ℃
And

A positive resist is coated on the SiO ₂ film 6,
A positive resist was exposed from the back surface of the glass substrate 1 using the gate electrode 2 as a mask, and then developed to form a resist mask 7.

FIG. 1 (d) The SiO ₂ film 6 is etched using the resist mask 7 as a mask to self-align the channel protection layer 6a with the gate electrode 2.
Formed. After that, the resist mask 7 was peeled off.

FIG. 2 (e), for example, a parallel plate type high frequency discharge device is used to perform plasma doping treatment of impurities on the hydrogenated a-Si film 5a using the channel protection layer 6a as a mask. 10 as source gas
% PH ₃ + H ₂ was used, and the temperature was 250 ° C., the pressure was 0.8 Torr, and the power was 0.3 W / cm ² . A hydrogenated by this treatment
P (phosphorus) was introduced into the -Si film to form the n ⁺ -type a-Si film 5b.

FIG. 2 (f): After depositing a Mo film having a thickness of 150 nm on the entire surface by a sputtering method, a Mo film and an n ⁺ -type a- are formed by using a mask (not shown).
The Si film 5b is etched to form the n ⁺ type a-Si film source 5
c, drain 5d, source electrode 8a and drain electrode of Mo film
Formed 8b.

2G, an ITO film having a thickness of 200 nm is deposited on the entire surface by a sputtering method, the ITO film is patterned and etched using a mask (not shown), and the pixel electrode 9 connected to the source electrode 8a is formed. Formed.

In this way, a TFT having an amorphous Si film as an operating semiconductor film could be formed. As shown in this embodiment, in the present invention, the electron beam evaporation method is used to form the a-Si film, and the impurities are introduced into the a-Si film by the plasma doping method. The number of film forming steps using the CVD method can be reduced by two steps. Therefore, it was possible to avoid the problems of the plasma CVD method such as the expensive apparatus and the generation of dust in the apparatus to make the yield unstable.

[0032]

As described above, according to the present invention,
When forming a TFT using an a-Si film, it is possible to reduce the number of film depositions by the plasma CVD method as compared with the conventional method. Therefore, it is possible to reduce the number of installed plasma CVD devices during mass production and the maintenance man-hours of CVD devices. And T
It is effective in reducing the cost of FT.

[Brief description of drawings]

1A to 1D are cross-sectional views (part 1) in order of processes, showing an embodiment.

2 (e) to 2 (g) are process order cross-sectional views (No. 2) showing an embodiment.

3A to 3D are sectional views (No. 1) in the order of steps showing a conventional example.

4 (e) to 4 (g) are process order cross-sectional views (No. 2) showing a conventional example.

[Explanation of symbols]

Reference numeral 1 is a transparent insulating substrate, glass substrate 2 is a gate electrode, Ta film 3 is an oxide film, Ta ₂ O ₅ film, gate insulating film 4 is a gate insulating film, and SiN _x film 5 is A-Si film 5a is a hydrogenated a-Si film 5b is an n ⁺ type a-Si film 5c is a source 5d is a drain 6 is an insulating film and the SiO ₂ film 6a is a channel protective layer Numeral 7 is a resist mask, positive resist 8a is source electrode 8b, drain electrode 9 is pixel electrode 12, gate electrode, Ti film 13 is oxide film, Ta ₂ O ₅ film is gate insulating film 14 is gate The insulating film is the SiN _x film 15 is the operating semiconductor film, the a-Si: H 16 is the insulating film, the SiO ₂ film 16a is the channel protective layer 17 is the resist mask, and the positive resist 18 is the n ⁺ type. The a-Si film 18a is the source 18b, the drain 19 is the Ti film 19a, and the The drain electrode 20 is the pixel electrode

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H01L 27/12 8728-4M

Claims (3)

[Claims] 1. A gate electrode (2) on a transparent insulating substrate (1),
A gate insulating film (3, 4) and an operating semiconductor film (5) are laminated in this order, and the operating semiconductor film (5) is used for manufacturing a thin film transistor having a channel portion and source / drain on both sides of the gate insulating film (4). ) A step of depositing a silicon film (5) on the silicon film, a step of forming a hydrogenated silicon film (5a) by subjecting the entire surface of the silicon film (5) to a hydrogenation process, and the hydrogenated silicon film After forming an insulating film on (5a), the insulating film is patterned and etched by the back exposure method using the gate electrode (2) as a mask to form a channel protective layer (6a).
And a source (5c) by introducing an impurity of one conductivity type into the hydrogenated silicon film (5a) using the channel protection layer (6a) as a mask.
And a step of forming a drain (5d). 2. A source (5c) and a drain (5d) are formed by introducing one conductivity type impurity into the hydrogenated silicon film (5a) by a plasma doping method using the channel protection layer (6a) as a mask. The method of manufacturing a thin film transistor according to claim 1, wherein the thin film transistor is formed. 3. The method of manufacturing a thin film transistor according to claim 1, wherein the silicon film (5) is an amorphous silicon film, and the one conductivity type impurity is an n type impurity.