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JPH0456343A - Package for accommodating semiconductor element - Google Patents

Package for accommodating semiconductor element

Info

Publication number
JPH0456343A
JPH0456343A JP2167483A JP16748390A JPH0456343A JP H0456343 A JPH0456343 A JP H0456343A JP 2167483 A JP2167483 A JP 2167483A JP 16748390 A JP16748390 A JP 16748390A JP H0456343 A JPH0456343 A JP H0456343A
Authority
JP
Japan
Prior art keywords
external lead
lead terminal
thermal expansion
expansion coefficient
aluminum nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2167483A
Other languages
Japanese (ja)
Other versions
JP2764340B2 (en
Inventor
Ryuichi Imura
隆一 井村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2167483A priority Critical patent/JP2764340B2/en
Publication of JPH0456343A publication Critical patent/JPH0456343A/en
Application granted granted Critical
Publication of JP2764340B2 publication Critical patent/JP2764340B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To effectively prevent peeling of external lead terminals and ensure good thermal conductivity of a package by forming an insulating case with sintered material having aluminum property and forming external lead terminals with a metal having the predetermined thermal expansion coefficient. CONSTITUTION:An insulating substrate 1 consisting of a sintered material of aluminum nitride property allows additional mixing, for example, of powder of yttrium oxide, calcia, etc., as the sintering promoting agent and adequate organic solvent and other solvent to aluminum nitride powder as the main raw material to form a casting slip which may be formed thereafter as a green sheet. The green sheet is punched adequately and a plurality of sheets are stacked and baked under a low temperature. An external lead terminal 7 is formed, for example, by iron of 51.0 to 64.0wt.%, nickel of 29.0 to 34.0wt% and cobalt of 7.0 to 15.0wt.% and shows a thermal expansion coefficient of 4.0 to 4.0X10<-6>/ deg.C (20 to 400 deg.C). Thereby, a larter thermal stress resulting from difference in thermal expansion coefficient of both materials is no longer generated between the insulating substrate 1 and external lead terminal 7 at the time of brazing the external lead terminal 7 to a metallized layer 5.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は半導体集積回路素子を収容するための半導体素
子収納用パッケージの改良に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an improvement in a semiconductor element housing package for accommodating a semiconductor integrated circuit element.

(従来技術及びその課題) 従来、半導体素子、特にLSI等の半導体集積回路素子
を収容するための半導体素子収納用パッケージは、一般
にアルミナセラミックス等の電気絶縁材料から成り、そ
の上面中央部に半導体集積回路素子を収容するための空
所を有し、且つ上面にモリブデン(MO)、タングステ
ン(W)等の高融点金属粉末から成るメタライズ金属層
を有する絶縁基体と、半導体集積回路素子を外部回路に
電気的に接続するために前記メタライズ金属層に銀ロウ
等のロウ材を介し取着されたコバール(54,Owt%
Fe17.0wt%Co−29,0wt%Ni合金)か
ら成る外部リード端子と蓋体とから構成されており、絶
縁基体と蓋体とから成る容器内部に半導体集積回路素子
が収容され、気密封止されて半導体装置となる。
(Prior Art and its Problems) Conventionally, semiconductor element storage packages for accommodating semiconductor elements, particularly semiconductor integrated circuit elements such as LSI, are generally made of electrically insulating materials such as alumina ceramics, and have a semiconductor integrated circuit in the center of the upper surface. An insulating substrate having a cavity for accommodating a circuit element and having a metallized metal layer made of high-melting point metal powder such as molybdenum (MO) or tungsten (W) on the upper surface, and a semiconductor integrated circuit element connected to an external circuit. Kovar (54, Owt%) is attached to the metallized metal layer through a brazing material such as silver solder for electrical connection.
It is composed of an external lead terminal and a lid made of an alloy (Fe17.0wt%Co-29,0wt%Ni alloy), and a semiconductor integrated circuit element is housed inside the container consisting of an insulating base and a lid, and is hermetically sealed. and becomes a semiconductor device.

しかし乍ら、近時、半導体集積回路素子の高密度化、高
集積化が急激に進んでおり、半導体集積回路素子の作動
時に発する熱量が極めて大きなものとなってきている。
However, in recent years, the density and integration of semiconductor integrated circuit devices have rapidly increased, and the amount of heat generated during operation of semiconductor integrated circuit devices has become extremely large.

そのためこの半導体集積回路素子を上述した従来の半導
体素子収納用パッケージに収容した場合、パッケージの
絶縁基体を構成するアルミナセラミックスの熱伝導率が
約20W/m−にと低いため、該絶縁基体を介して半導
体集積回路素子が作動時に発する熱を大気中に良好に放
散させることができず、その結果、半導体集積回路素子
が該素子自身の発する熱によって高温と成り、半導体集
積回路素子に熱破壊を起こさせたり、特性に熱変化を与
え、誤動作を生じさせたりするという欠点を招来した。
Therefore, when this semiconductor integrated circuit element is housed in the above-mentioned conventional semiconductor element storage package, the thermal conductivity of the alumina ceramics that constitutes the insulating base of the package is as low as about 20 W/m-, The heat generated by semiconductor integrated circuit elements during operation cannot be properly dissipated into the atmosphere, and as a result, the semiconductor integrated circuit elements become hot due to the heat generated by the elements themselves, which can cause thermal damage to the semiconductor integrated circuit elements. This has led to the disadvantage that it can cause thermal deterioration, cause thermal changes in characteristics, and cause malfunctions.

そこで上記欠点を解消するために絶縁基体を熱伝導率が
80.0 W/m−に以上の極めて熱を伝え易い窒化ア
ルミニウム質焼結体で形成することが考えられる。
Therefore, in order to eliminate the above-mentioned drawbacks, it is conceivable to form the insulating substrate from an aluminum nitride sintered body having a thermal conductivity of 80.0 W/m- or more and which is extremely easy to conduct heat.

しかし乍ら、絶縁基体を窒化アルミニウム質焼結体で形
成した場合、該窒化アルミニウム質焼結体はその熱膨張
係数が4.2〜4,7 Xl0−@/ ”Cであり、外
部リード端子の熱膨張係数(5,6X to−’/ ”
C)と相違するため、絶縁基体に外部リード端子をロウ
付けするとロウ付は部に両者の熱膨張係数の相違に起因
する熱応力が内在し、その結果、外部リード端子に小さ
な外力が印加されても該外力は前記内在応力と相俊って
大きくなり、外部リード端子を絶縁基体より剥がれさせ
てしまうという欠点を誘発した。
However, when the insulating substrate is formed of an aluminum nitride sintered body, the aluminum nitride sintered body has a thermal expansion coefficient of 4.2 to 4.7 Thermal expansion coefficient (5,6X to-'/''
Because it is different from C), when an external lead terminal is brazed to an insulating base, there is inherent thermal stress in the brazed part due to the difference in coefficient of thermal expansion between the two, and as a result, a small external force is applied to the external lead terminal. However, the external force increases in conjunction with the internal stress, resulting in the disadvantage that the external lead terminal is peeled off from the insulating base.

(発明の目的) 本発明は上記諸欠点に鑑み案出されたもので、その目的
は外部リード端子の剥かれを有効に防止し、且つパッケ
ージの熱伝導を良好として内部に収容する半導体集積回
路素子か熱破壊したり、特性に熱変化を生じるような高
温となるのを皆無となし、半導体集積回路素子を常に正
常、安定に作動させることができる半導体素子収納用パ
ッケージを提供することにある。
(Object of the Invention) The present invention has been devised in view of the above-mentioned drawbacks, and its purpose is to effectively prevent external lead terminals from peeling off, and to provide a semiconductor integrated circuit housed inside the package with good heat conduction. An object of the present invention is to provide a package for storing semiconductor elements that can always operate normally and stably, without causing high temperatures that would cause thermal breakdown of the elements or thermal changes in their characteristics. .

(課題を解決するための手段) 本発明は絶縁容器に被着させたメタライズ金属層に外部
リード端子をロウ付けして成る半導体素子収納用パッケ
ージにおいて、前記絶縁容器を窒化アルミニウム質焼結
体で形成し、且つ外部リード端子を熱膨張係数が4.0
乃至5.OX 10−6/ ’C(20〜400℃)の
金属で形成したことを特徴とするものである。
(Means for Solving the Problems) The present invention provides a package for housing a semiconductor element in which external lead terminals are brazed to a metallized metal layer deposited on an insulating container, in which the insulating container is made of an aluminum nitride sintered body. and the external lead terminal has a thermal expansion coefficient of 4.0.
to 5. It is characterized by being made of a metal with a temperature of OX 10-6/'C (20 to 400°C).

(実施例) 次に本発明を添付図面に示す実施例に基づき詳細に説明
す。
(Example) Next, the present invention will be described in detail based on an example shown in the accompanying drawings.

第1図は本発明の半導体素子収納用パッケージの一実施
例を示す断面図であり、1は窒化アルミニウム質焼結体
から成る絶縁基体、2は蓋体である。この絶縁基体1と
蓋体2とで容器3が構成される。
FIG. 1 is a cross-sectional view showing one embodiment of a package for storing semiconductor elements according to the present invention, in which numeral 1 represents an insulating base made of an aluminum nitride sintered body, and numeral 2 represents a lid. The insulating base 1 and the lid 2 constitute a container 3.

前記絶縁基体1はその上面中央部に半導体集積回路素子
4を収容するための空所を形成する段状の凹部が設けて
あり、該凹部底面には半導体集積回路素子4が接着材を
介し取着される。
The insulating substrate 1 has a step-shaped recess formed in the center of its upper surface to form a cavity for accommodating the semiconductor integrated circuit element 4, and the semiconductor integrated circuit element 4 is attached to the bottom of the recess through an adhesive. It will be worn.

また前記絶縁基体lには凹部段状上面から容器3の外部
に導出するメタライズ金属層5が被着形成されており、
該メタライズ金属層5の凹部段状上面部には半導体集積
回路素子4の電極がボンディングワイヤ6を介し電気的
に接続され、また容器3の外部に導出された部位には外
部回路と接続される外部リード端子7が銀ロウ等のロウ
材8を介し取着されている。
Further, a metallized metal layer 5 is formed on the insulating base l and extends from the stepped upper surface of the recess to the outside of the container 3,
The electrodes of the semiconductor integrated circuit element 4 are electrically connected to the stepped upper surface of the recessed portion of the metallized metal layer 5 via bonding wires 6, and the portion led out to the outside of the container 3 is connected to an external circuit. External lead terminals 7 are attached via soldering material 8 such as silver solder.

前記窒化アルミニウム質焼結体から成る絶縁基体1は例
えば、主原料である窒化アルミニウム粉末に焼結助剤と
しての酸化イツトリウム、カルシア等の粉末及び適当な
有機溶剤、溶媒を添加混合して泥漿物を作るとともに該
泥漿物をドクターブレード法を採用することによってグ
リーンシート(生シート)と成し、しかる後、前記グリ
ーンシートに適当な打抜き加工を施すとともにこれを複
数枚積層し、約1800℃の高温で焼成することによっ
て製作される。
The insulating substrate 1 made of the aluminum nitride sintered body is made, for example, by adding and mixing powders of yttrium oxide, calcia, etc. as sintering aids and a suitable organic solvent to aluminum nitride powder as the main raw material to form a slurry. A green sheet is formed by using the doctor blade method, and then the green sheet is subjected to an appropriate punching process, a plurality of sheets are laminated, and the slurry is heated at approximately 1800°C. Manufactured by firing at high temperatures.

また前記メタライズ金属層5はタングステン、モリブデ
ン等の高融点金属粉末から成り、従来周知のスクリーン
印刷法等の厚膜手法を採用することによって絶縁基体1
の凹部段状上面から容器3の外部に導出するよう被着形
成される。
Further, the metallized metal layer 5 is made of high melting point metal powder such as tungsten or molybdenum, and is formed on the insulating substrate 1 by employing a thick film method such as a conventionally well-known screen printing method.
The recess is formed so as to be guided to the outside of the container 3 from the step-like upper surface thereof.

尚、前記絶縁基体lを構成する窒化アルミニウム質焼結
体は、その熱伝導率が80.0 W/m−に以上と高く
、熱を伝導し易いため絶縁基体1の凹部底面に半導体集
積回路素子4を取着し、作動させた場合、絶縁基体lは
半導体集積回路素子4の発する熱を直接伝導吸収すると
ともに該吸収した熱を大気中に良好に放散することが可
能となり、これによって半導体集積回路素子4は常に低
温として熱破壊したり、特性に熱変化を生じ、誤動作し
たりすることはなくなる。
The aluminum nitride sintered body constituting the insulating substrate 1 has a high thermal conductivity of 80.0 W/m or more and easily conducts heat. When the element 4 is mounted and operated, the insulating substrate l can directly conduct and absorb the heat generated by the semiconductor integrated circuit element 4, and can also dissipate the absorbed heat well into the atmosphere. The integrated circuit element 4 is always kept at a low temperature, so that it will not be thermally destroyed, its characteristics will change due to heat, and it will not malfunction.

また前記絶縁基体lに被着させたメタライズ金属層5に
ロウ付けされる外部リード端子7は内部に収容する半導
体集積回路素子4を外部回路に接続する作用を為し、外
部リード端子7を外部回路に接続することによって内部
に収容される半導体集積回路素子4は メタライズ金属
層5及び外部リード端子7を介し外部回路に電気的に接
続されることとなる。
Further, the external lead terminals 7 brazed to the metallized metal layer 5 deposited on the insulating substrate l function to connect the semiconductor integrated circuit element 4 housed inside to an external circuit, and connect the external lead terminals 7 to the external circuit. By connecting to the circuit, the semiconductor integrated circuit element 4 housed inside is electrically connected to the external circuit via the metallized metal layer 5 and the external lead terminals 7.

前記外部リード端子7は例えば、鉄51.0乃至64.
0重量%、ニッケル29.0乃至34.0重量%及びコ
バルト7.0乃至15.0重量%の合金より成り、その
熱膨張係数が4.0乃至5.OXl0−6/℃(20〜
400”C)のものとなっている。
The external lead terminal 7 is made of, for example, iron 51.0 to 64.0.
0% by weight, 29.0 to 34.0% by weight of nickel, and 7.0 to 15.0% by weight of cobalt, and has a coefficient of thermal expansion of 4.0 to 5.0% by weight. OXl0-6/°C (20~
400"C).

前記外部リード端子7はその熱膨張係数が4.0乃至5
.OXl0−’/’C(20〜400℃)であり、絶縁
基体1を構成する窒化アルミニウム質焼結体の熱膨張係
数(4,2〜4.7 Xl0−@/”C)と近似してい
ることから絶縁基体1に被着させたメタライズ金属層5
に外部リード端子7をロウ付けする際、絶縁基体1と外
部リード端子7との間には両者の熱膨張係数の相違に起
因する大きな熱応力が発生することはなく、両者のロウ
付は部に大きな応力が内在することもない。従って、ロ
ウ付は後、外部リード端子7に外力か印加されたとして
も該外力がロウ付は部に内在する応力と相俊って大とな
り、絶縁基体1より外部リード端子7を剥がれさせるこ
とはない。
The external lead terminal 7 has a thermal expansion coefficient of 4.0 to 5.
.. OXl0-'/'C (20 to 400°C), which approximates the thermal expansion coefficient (4.2 to 4.7 Xl0-@/'C) of the aluminum nitride sintered body constituting the insulating substrate 1. The metallized metal layer 5 deposited on the insulating substrate 1
When the external lead terminals 7 are brazed to the insulating base 1 and the external lead terminals 7, no large thermal stress is generated between the insulating base 1 and the external lead terminals 7 due to the difference in coefficient of thermal expansion between the two, and the brazing of the two is done without a problem. There is no large stress inherent in the structure. Therefore, even if an external force is applied to the external lead terminal 7 after brazing, the external force becomes large in combination with the stress inherent in the brazing part, causing the external lead terminal 7 to peel off from the insulating base 1. There isn't.

前記外部リード端子7は例えば、鉄51.0乃至64.
0重量%、ニッケル29.0乃至34.0重量%及びコ
バルト7.0乃至15.0重量%を加熱溶融し、合金化
させてインゴットを作るとともに該インゴットを従来周
知の圧延加工法及び打抜き加工法によって所望する厚み
、形状に形成される。
The external lead terminal 7 is made of, for example, iron 51.0 to 64.0.
0% by weight, 29.0 to 34.0% by weight of nickel, and 7.0 to 15.0% by weight of cobalt are heated and melted and alloyed to form an ingot, and the ingot is subjected to conventionally known rolling and punching processes. It is formed into a desired thickness and shape by a method.

尚、前記メタライズ金属層5にロウ材8を介してロウ付
けされた外部リード端子7はその外表面に耐蝕性に優れ
たニッケルや金等から成る被覆層9がメツキ等により被
着されており、該被覆層9によってメタライズ金属層5
、ロウ材8及び外部リード端子7は酸化腐食するのか有
効に防止されている。
Note that the external lead terminal 7 brazed to the metallized metal layer 5 via the brazing material 8 has a coating layer 9 made of nickel, gold, etc. with excellent corrosion resistance applied to its outer surface by plating or the like. , metallized metal layer 5 by said coating layer 9
, the brazing material 8 and the external lead terminals 7 are effectively prevented from being oxidized and corroded.

かくして前記絶縁基体1の凹部底面に半導体集積回路素
子4を接着材を介し取着するとともに半導体集積回路素
子4の各電極をメタライズ金属層5にボンディングワイ
ヤ6を介して電気的に接続し、しかる後、絶縁基体lの
上面に蓋体2をガラス、樹脂等の封止部材を介して取着
し、容器3を気密に封止することによって製品としての
半導体装置となる。
Thus, the semiconductor integrated circuit element 4 is attached to the bottom surface of the recess of the insulating substrate 1 via an adhesive, and each electrode of the semiconductor integrated circuit element 4 is electrically connected to the metallized metal layer 5 via the bonding wire 6. Thereafter, the lid 2 is attached to the upper surface of the insulating base 1 via a sealing member such as glass or resin, and the container 3 is hermetically sealed to form a semiconductor device as a product.

(実験例) 次に本発明の作用効果を以下に示す実験例に基づき説明
する。
(Experimental Example) Next, the effects of the present invention will be explained based on the experimental example shown below.

まず、ニッケル、コバルト及び鉄を第1表に示す値に秤
量し、これを合金化させて幅0.4mm、長さ20.0
mm、厚さ0.15mmの外部リード端子試料を得る。
First, nickel, cobalt, and iron were weighed to the values shown in Table 1, and then alloyed to give a width of 0.4 mm and a length of 20.0 mm.
An external lead terminal sample with a thickness of 0.15 mm and a thickness of 0.15 mm is obtained.

尚、試料番号21は本発明品と比較するための比較試料
であり、従来一般に外部リード端子として使用されてい
るコバール金属である。
Incidentally, sample number 21 is a comparative sample for comparison with the product of the present invention, and is made of Kovar metal, which has conventionally been generally used as an external lead terminal.

次に窒化アルミニウム質焼結体から成る基板の表面に幅
5.Omm、長さ2.0mm、厚さ20〜30μmのタ
ングステンから成るメタライズ金属層を多数個、被着形
成するとともに該メタライズ金属層上に前記外部リード
端子試料を各々20個ずつ、その一端を銀ロウ材(BA
g8:銀72.0重量%、銅28.0重量%)を介しロ
ウ付けする。
Next, the surface of the substrate made of aluminum nitride sintered body is coated with a width of 5. A large number of metallized metal layers made of tungsten with a length of 2.0 mm and a thickness of 20 to 30 μm are deposited, and 20 of each of the external lead terminal samples are placed on the metallized metal layers, one end of which is coated with silver. Brazing wood (BA
g8: brazing through silver (72.0% by weight, copper 28.0% by weight).

そして次に前記ロウ付けした外部リード端子試料の他端
(ロウ付けした側の端部とは反対の端部)をロウ付は面
に対し垂直方向に所定の力で引っ張り、外部リード端子
試料が窒化アルミニウム質焼結体から成る基板より剥か
れた個数を調べるとともにこれを外部リード端子のロウ
付は強度の評価とした。
Next, the other end of the brazed external lead terminal sample (the end opposite to the brazed end) is pulled with a predetermined force in a direction perpendicular to the brazed surface, and the external lead terminal sample is The number of pieces peeled off from the substrate made of aluminum nitride sintered body was examined, and this was used to evaluate the strength of external lead terminal brazing.

尚、前記外部リード端子試料のロウ付は面積は輻0.4
mm、長さ2.5mmとし、またタングステンメタライ
ズ金属層の外表面にはニッケルをメツキにより1.5〜
2.0μmの厚みに被着させておいた。
In addition, the area of the soldering of the external lead terminal sample is radius 0.4.
mm, length is 2.5 mm, and the outer surface of the tungsten metallized metal layer is plated with nickel to give a thickness of 1.5 mm to 2.5 mm.
It was deposited to a thickness of 2.0 μm.

上記の結果を第1表に示す。The above results are shown in Table 1.

(以下、余白) 第 表 *印を付した試料番号のものは本発明の範囲外のもので
ある。
(Hereinafter, blank space) Sample numbers marked with * in Table 1 are outside the scope of the present invention.

上記実験結果からも判るように、従来の使用されている
外部リード端子(試料番号21)は3Kgの力で引っ張
ると外部リード端子の全てが剥がれてしまい、窒化アル
ミニウム質焼結体から成る基板と外部リード端子とのロ
ウ付は強度が極めて低いものであるのに対し、本発明の
熱膨張係数が4.0乃至5.OXl0−”/ ”Cの外
部リード端子を使用したものは4Kgの力で引っ張って
も外部リード端子が剥がれることは殆どなく、窒化アル
ミニウム質焼結体から成る基板と外部リード端子とのロ
ウ付は強度が極めて高いものであることが判る。
As can be seen from the above experimental results, when the conventionally used external lead terminal (sample number 21) is pulled with a force of 3 kg, all of the external lead terminals peel off, and the board made of aluminum nitride sintered body peels off. While brazing with external lead terminals has extremely low strength, the thermal expansion coefficient of the present invention is 4.0 to 5. For those using external lead terminals of OXl0-"/"C, the external lead terminals hardly come off even if pulled with a force of 4 kg, and the soldering between the external lead terminals and the substrate made of aluminum nitride sintered body is easy. It can be seen that the strength is extremely high.

特に外部リード端子の熱膨張係数を4.46乃至4゜8
9X 10−”/ ”Cの範囲としたものは5Kgの力
で引っ張っても外部リード端子の剥がれはなく、外部リ
ード端子を窒化アルミニウム質焼結体か成る基板に強固
にロウ付けするには外部リード端子の熱膨張係数を4.
46乃至4.89xlO−@/ ’Cの範囲とすること
が好ましい。
In particular, the thermal expansion coefficient of the external lead terminal should be 4.46 to 4.8.
For those in the 9X 10-"/"C range, the external lead terminals do not peel off even when pulled with a force of 5 kg, and in order to firmly braze the external lead terminals to the substrate made of aluminum nitride sintered body, it is necessary to The thermal expansion coefficient of the lead terminal is 4.
It is preferably in the range of 46 to 4.89xlO-@/'C.

(発明の効果) 以上の通り、本発明の半導体素子収納用パッケ−ジによ
れば、窒化アルミニウム質焼結体から成る絶縁容器に被
着させたメタライズ金属層にロウ付けする外部リード端
子の熱膨張係数を4,0乃至5、OX10−”/ ”C
(20〜400″C)としたことから、絶縁容器と外部
リード端子の熱膨張係数を近似させることができ、その
結果、絶縁容器に被着させたメタライズ金属層に外部リ
ード端子をロウ付けする際、絶縁容器と外部リード端子
との間には両者の熱膨張係数の相違に起因する熱応力は
殆ど発生せず、絶縁容器に被着させたメタライズ金属層
に外部リード端子を極めて強固にロウ付けすることを可
能として高信頼性の半導体素子収納用パッケージを提供
することができる。
(Effects of the Invention) As described above, according to the semiconductor device storage package of the present invention, the external lead terminals that are brazed to the metallized metal layer coated on the insulating container made of aluminum nitride sintered body are heated. Expansion coefficient 4.0 to 5, OX10-”/”C
(20 to 400"C), the thermal expansion coefficients of the insulating container and the external lead terminal can be approximated, and as a result, the external lead terminal can be brazed to the metallized metal layer deposited on the insulating container. At this time, almost no thermal stress is generated between the insulating container and the external lead terminal due to the difference in coefficient of thermal expansion between the two, and the external lead terminal is extremely firmly soldered to the metallized metal layer adhered to the insulating container. It is possible to provide a highly reliable semiconductor element storage package.

また本発明の半導体素子収納用パッケージによれば、半
導体素子が収容される絶縁容器を熱伝導率が80.0W
/m −に以上の窒化アルミニウム質焼結体で形成した
ことから内部に収容する半導体集積回路素子の発する熱
は絶縁容器を介して大気中に良好に放散され、その結果
、半導体集積回路素子を高温とすることは一切なく、半
導体集積回路素子を長期間にわたり正常、且つ安定に作
動させることもてきる。
Further, according to the semiconductor device storage package of the present invention, the insulating container in which the semiconductor device is housed has a thermal conductivity of 80.0W.
Since it is made of an aluminum nitride sintered body with an aluminum nitride sintered body with a thickness of more than 100%, the heat generated by the semiconductor integrated circuit element housed inside is well dissipated into the atmosphere through the insulating container, and as a result, the semiconductor integrated circuit element is There is no need to raise the temperature at all, and the semiconductor integrated circuit device can operate normally and stably for a long period of time.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の半導体素子収納用パッケージの一実施
例を示す断面図であ。 1・・絶縁基体 2・・蓋体 3・・絶縁容器 5・・メタライズ金属層7・・外部リ
ード端子 8・・ロウ材
FIG. 1 is a cross-sectional view showing an embodiment of the semiconductor element storage package of the present invention. 1. Insulating base 2. Lid 3. Insulating container 5. Metallized metal layer 7. External lead terminal 8. Brazing material

Claims (2)

【特許請求の範囲】[Claims] (1)絶縁容器に被着させたメタライズ金属層に外部リ
ード端子をロウ付けして成る半導体素子収納用パッケー
ジにおいて、前記絶縁容器を窒化アルミニウム質焼結体
で形成し、且つ外部リード端子を熱膨張係数が4.0乃
至5.0×10^−^6/℃(20〜400℃)の金属
で形成したことを特徴とする半導体素子収納用パッケー
ジ。
(1) In a package for housing a semiconductor element in which external lead terminals are brazed to a metallized metal layer deposited on an insulating container, the insulating container is formed of an aluminum nitride sintered body, and the external lead terminals are heated. A package for housing a semiconductor element, characterized in that it is formed of a metal having an expansion coefficient of 4.0 to 5.0 x 10^-^6/°C (20 to 400°C).
(2)前記外部リード端子が鉄51.0乃至64.0重
量%、ニッテル29.0乃至34.0重量%及びコバル
ト7.0乃至15.0重量%の合金より成ることを特徴
とする特許請求の範囲第1項記載の半導体素子収納用パ
ッケージ。
(2) A patent characterized in that the external lead terminal is made of an alloy containing 51.0 to 64.0% by weight of iron, 29.0 to 34.0% by weight of nittel, and 7.0 to 15.0% by weight of cobalt. A semiconductor device storage package according to claim 1.
JP2167483A 1990-06-26 1990-06-26 Package for storing semiconductor elements Expired - Lifetime JP2764340B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2167483A JP2764340B2 (en) 1990-06-26 1990-06-26 Package for storing semiconductor elements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2167483A JP2764340B2 (en) 1990-06-26 1990-06-26 Package for storing semiconductor elements

Publications (2)

Publication Number Publication Date
JPH0456343A true JPH0456343A (en) 1992-02-24
JP2764340B2 JP2764340B2 (en) 1998-06-11

Family

ID=15850521

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2167483A Expired - Lifetime JP2764340B2 (en) 1990-06-26 1990-06-26 Package for storing semiconductor elements

Country Status (1)

Country Link
JP (1) JP2764340B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106631046A (en) * 2016-11-30 2017-05-10 莱鼎电子材料科技有限公司 Composite sintering aid for producing aluminum nitride ceramic substrate

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6232631A (en) * 1985-08-05 1987-02-12 Hitachi Ltd Integrated circuit package
JPS63314855A (en) * 1987-06-17 1988-12-22 Shinko Electric Ind Co Ltd Ceramic package

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6232631A (en) * 1985-08-05 1987-02-12 Hitachi Ltd Integrated circuit package
JPS63314855A (en) * 1987-06-17 1988-12-22 Shinko Electric Ind Co Ltd Ceramic package

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106631046A (en) * 2016-11-30 2017-05-10 莱鼎电子材料科技有限公司 Composite sintering aid for producing aluminum nitride ceramic substrate

Also Published As

Publication number Publication date
JP2764340B2 (en) 1998-06-11

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