JPH04245835A - Burst demodulator - Google Patents

Abstract

PURPOSE:To find out the starting timing of a BTR portion through processing in a burst demodulator in respect of the burst demodulator for receiving a burst communication signal containing a CR portion and the BTR portion following it in a preamble. CONSTITUTION:A first filter constant 24 to show different flow characteristics for the CR portion and the BTR portion is set in a filter means 10, and the amplitude of its output is calculated by an amplitude calculating means 12, and is compared with a first reference value 20 by a comparing means 14, and the timing at which the compared result of the comparing means 14 varies is made the timing of the start of the BTR portion.

Description

[Detailed description of the invention]

0001

[Industrial Field of Application] The present invention relates to a burst demodulator, particularly a CR (carrier recovery) portion for carrier recovery and a BT portion for subsequent bit timing recovery.
The present invention relates to a burst demodulator for receiving a burst communication signal that includes an R (bit timing recovery) portion in its preamble.

Burst communications, in which radio waves are transmitted in bursts from each radio, are widely used not only in satellite communications and mobile communications, but also in communications between fixed stations. usually,
In burst communication, each burst communication signal includes a CR portion and a subsequent BTR portion in its preamble in order to recover the carrier on the demodulator side and further recover the timing for sampling data from the baseband signal. . On the demodulator side, while sequentially receiving these signals, PLL loops for carrier recovery and bit timing recovery are respectively drawn in, and then data demodulation is started.

[0003] Therefore, the burst demodulator is required to be able to quickly complete the PLL loop pull-in within this limited time and to be resistant to noise.

0004

2. Description of the Related Art In large-scale TDMA (time division multiple access) satellite communications, a reference station is provided that transmits a reference burst, and each time slot is assigned based on this reference burst. Based on this reference burst, a burst demodulator installed in the receiving station calculates C
The period during which the R portion and BTR portion will be received can be known in advance.

[0005] Therefore, in such a system, the characteristics of the reception filter, the characteristics of the loop filter, the processing of the PLL loop for carrier regeneration, etc. can be switched to suit each of them during the receiving period of the CR portion and the BTR portion. , a method of improving the effective S/N ratio and improving the pull-in speed is known.

[0006]

[Problem to be Solved by the Invention] However, in a smaller scale system, there is a problem in that the above improvement measures cannot be implemented if a signal that serves as a reference for the entire system cannot be obtained from another source. . Further, in general, a PLL loop for bit timing recovery may cause a so-called hang-up depending on the initial state of the loop. This means that when the position of the maximum amplitude on the eye pattern should be sampled, the position of the minimum amplitude is sampled for a long time. As a method to escape from this hang-up state, when a hang-up state is detected, the phase of the clock representing the bit timing is changed to 180.
A technique known as "kick-off" in which the object is caused to jump. To achieve this, it is necessary to add a circuit to detect this hang-up condition.

[0007] Therefore, the first object of the present invention is to
To provide a burst demodulator that can know the timing of a portion start through processing within the demodulator even when the timing cannot be obtained from another source. A second object of the present invention is to provide a burst demodulator that can advantageously implement the above-described kickoff processing.

[0008]

[Means for Solving the Problems] FIG. 1 is a block diagram showing the principle configuration of the present invention, and FIG. 2 is a diagram showing a typical example of the format of a burst communication signal received by the burst demodulator of the present invention. It is. In the figure, the burst demodulator of the present invention receives and demodulates a burst communication signal including a preamble of a CR portion 50 for carrier recovery and a BTR portion 52 for bit timing recovery following the CR portion 50. filter means 10 to which the burst communication signal is input;
, an amplitude calculation means 12 for calculating the amplitude of the output signal of the filter means 10, and a comparison means 14 for comparing the amplitude value calculated by the amplitude calculation means 12 with a reference value; is the CR potion 50 and the B
A first filter constant 24 is set to exhibit a different pass characteristic from the TR portion 52, and the comparison means 1
4 is set with a first reference value 20, and the timing at which the comparison result of the comparing means 14 changes is set as the timing for starting the BTR portion.

This burst demodulator selects one of the first filter constant 24 and the second filter constant 26 so that the filter means 10 exhibits a pass characteristic that allows at least the signal of the BTR portion 52 to pass. filter constant switching means 18 to be set in the filter means 10, and selecting one of the first reference value 20 and the second reference value 22 for detecting the hang-up condition and sending the selected one to the comparison means 14. The filter constant switching means 18 and the reference value switching means 16 are further provided with a reference value switching means 16 for supplying a reference value for comparison, and after the BTR start timing is detected, the filter constant switching means 18 and the reference value switching means 16 respectively switch to the second reference value switching means 16. It is preferable to select the filter constant 26 and the second reference value 22, and use the comparison result of the comparing means 14 as the hang-up detection signal.

0010

[Operation] FIG. 3 is a diagram showing a frequency spectrum for explaining the operation of the burst demodulator of the present invention. At baseband, CR portion 50 is typically 111...
The BTR portion 52 has a pattern of 1010...
Since it has a pattern of , in the frequency spectrum,
The former has a frequency of 0, and the latter has a frequency of 1/2 of the baud rate B.
is concentrated at frequency B/2 (see column (a) of FIG. 3).

Therefore, the characteristics of the filter means 10 are expressed as (
If you set as shown in column b), CR potion 5
At 0, the signal passes (column (c)), but after that, B
Since the signal no longer passes through the TR portion 52 (column (d)), the amplitude of the output signal of the filter means (10) sharply decreases at the start timing of the BTR portion 52. Therefore, by comparing this with the first reference value 20, the start timing of the BTR portion 52 can be detected.

Furthermore, hang-up is detected by detecting that the amplitude of the signal has fallen below a predetermined value. Therefore, with the above-described configuration, the amplitude calculation means 12 and the comparison means 14 can be used in common for the detection of the start of the BTR section and the detection of hang-up, and the kickoff processing is advantageously realized.

[0013]

Embodiment FIG. 4 is a block diagram of a burst demodulator according to a first embodiment of the present invention. In the figure, as an example, 4-phase P
A demodulator for an SK (QPSK) modulated signal is shown, and a portion that performs processing after generating two orthogonal I-phase and Q-phase baseband signals is shown.

[0014] The I-phase signal and the Q-phase signal are each A/D
The signals are converted into digital signals by converters 500 and 502, and supplied to a carrier recovery section 300 and a bit timing recovery section 400 via digital transversal filters 504 and 506. The carrier recovery (CR) unit 300 has a function of canceling the local frequency shift component remaining in the baseband signal to make the signal stationary on the phase plane, and performs bit timing recovery (CR).
The BTR section 400 has a function of generating a clock for sampling the baseband signal at the position of the maximum amplitude of the eye pattern. The generated clock is A/
It is supplied as a sampling clock for the D converters 500, 502, thereby forming a PLL loop for bit timing recovery. In the figure, BTR section 40
The clock generated at 0 is the A/D converter 500, 5
Although it is supplied only as a sampling block of 02, it is actually supplied to each block as a basic clock for synchronization processing. In addition, in the figure, the BTR section
Although the input 400 is taken from the input side of the CR section 300, it may be configured to take it from the output side of the CR section 300. Although the PLL loop for carrier reproduction is configured within the CR unit 300, it may also be configured to vary the frequency of the local oscillation signal.

The BTR start detection section 100 detects the start position of the BTR portion based on changes in the amplitude of the signals passing through the digital transversal filters 504 and 506, and outputs a BTR start detection signal. The hang-up detection unit 200 detects a loop hang-up caused by the BTR unit 400, that is, a state in which the position of the minimum amplitude of the eye pattern is sampled has continued for a certain period or more, and outputs a hang-up detection signal to detect the loop hang-up of the BTR unit 400. The unit 400 sets the phase of the output clock to 180
A so-called "kickoff" process for shifting is performed. Hang-up detection is based on the BTR start detection signal.
This is done for input for a certain period of time after the start of the TR potion. Although the inputs of the BTR start detection section 100 and the hang-up detection section are taken from the output side of the CR section 300, the inputs may be taken from the input side of the CR section 300.

A DTF control unit 508 sets constants for the digital transversal filters 504 and 506 to provide desired characteristics. Digital transversal filters 504, 5 are controlled by the DTF control unit 508.
06 has the characteristic of first passing only the frequency around 0, and when the BTR start is detected, it has the characteristic of passing only the frequency around B/2, which is half of the bit rate B, and the BTR
After a predetermined number of clocks have elapsed since the start detection, the characteristics are switched to the normal reception filter characteristics immediately before the start of the unique word 54 (FIG. 2). This enables BTR start detection and improves the S/N ratio during reception of CR portions and BTR portions, improving pull-in speed.

FIG. 5 is a block diagram showing the detailed configuration of the CR section 300. The phase rotator 316 rotates the phase of the signal on the phase plane by multiplying the output of the digital VCO (voltage controlled oscillator) 304 by a signal whose phase has been shifted by 90 degrees by the phase shifter 302. QP
The SK phase comparator 310 compares the input signal to the fourth power with a reference phase and outputs the result. The BPSK phase comparator 312 squares the input signal and performs phase comparison. BPSK phase comparator 312 is CR
This is provided to improve the S/N ratio during the reception period of portions and BTR portions, thereby improving the pull-in of CR section 300. In other words, CR potion and BT
R potion is 111 each in baseband
...and 10101 ..., so B
It can be regarded as a PSK modulated signal, and if phase comparison is performed as BPSK, the S/N will be improved. selector 308
selects the output of the BPSK phase comparator 312 and supplies it to the loop filter 306 during the reception period of the CR portion and the BTR portion. selector 308
is controlled by a signal obtained by delaying the BTR start detection signal by a delay device 314 by the number of clocks corresponding to the length of the BTR portion. The output of loop filter 306 is provided to DVCO 304 as a control signal. Note that, as described above, it is also possible to adopt a configuration in which the output of the loop filter 306 directly controls the local oscillator.

FIG. 6 is a block diagram showing the detailed configuration of the BTR section 400. The phase comparator 412 is, for example, B
The amplitude of the input signal sampled by the clock output from the TR section 400 is calculated and output. Its output is passed through a loop filter 402 to the DVCO 40
4, and the output of the DVCO 404 and its inverted version by an inverter 406 are supplied to a selector 408. The selector 408 changes the phase of the clock by switching its selection according to the hang-up detection signal.
Shift by 0°. The band control unit 410 controls the cutoff frequency of the loop filter 402 to increase the cutoff frequency of the loop filter 402 when receiving a BTR portion to promote attraction. Bandwidth control unit 410 controls BTR in response to the BTR start detection signal.
After a certain period of time has elapsed after the start of TR, the cutoff frequency is gradually reduced, and control is performed so that it reaches the normal cutoff frequency just before the UW 54 (FIG. 2).

FIG. 7 is a block diagram showing the detailed configuration of the BTR start detection section 100. The amplitude calculation section 102 calculates the amplitude of the input signal and outputs it to the moving average section 104. The formula for calculating the amplitude is √(I2 +Q2), |I
Either |+|Q|, |I| or |Q| may be used. The moving average section 104 takes a predetermined number of moving averages for the input signal and supplies the moving averages to one input of the comparator 106. The other input of the comparator 106 is supplied with a reference value for BTR start detection. This BTR start detection reference value is the amplitude value of the output when the CR portion is input to the digital transversal filters 504, 506 whose characteristics are set when receiving the CR portion, and the amplitude value of the output when the BTR portion is input. is set to a value intermediate between Therefore, the output of the comparator 106 changes from the L level to the H level when the CR portion is switched to the BTR portion, and the rising timing thereof provides the start timing of the BTR portion.

FIG. 8 is a diagram showing the detailed configuration of the hang-up detection section 200. The amplitude calculation section 202 is equivalent to the amplitude calculation section 102 (FIG. 7), and supplies its output to the average value calculation section 204. The average value calculation unit 204 is B
From the detection of the start of TR, an average value of a predetermined number of samples is calculated and supplied to one input of the comparator 206. comparator
The other input of 206 is supplied with a reference value for hang-up detection. Therefore, the output of the comparator is the average value calculation unit 2
If the average value calculated by 04 is less than the reference value for hang-up detection, it becomes H level, indicating the detection of hang-up.

FIG. 9 is a block diagram of a burst demodulator according to a second embodiment of the present invention. The BTR start/hangup detection section 150 is configured so that the BTR detection section 100 and the hangup detection section 200 in FIG. 4 share a part of the circuit with each other. The other components are the same as those in FIG. 4. FIG. 10 is a block diagram showing the detailed configuration of this BTR start/hangup detection section 150. The amplitude calculation unit 152 is equivalent to the amplitude calculation unit 102 in FIG. 7 and the amplitude calculation unit 202 in FIG. 8. Moving average part 1
54 is similar to the moving average unit 104 in FIG. 7, but the number of moving averages can be given from the selector 162. A comparator 156 compares the output of the moving average section 154 with the reference value given from the selector 164 and outputs the result. D flip-flop 158 is a comparator 15
The JK flip-flop 160 is used to latch the output of the comparator 156 as a BTR start detection signal. The start detection signal latched by the JK flip-flop is supplied for switching selectors 162 and 164, and is also supplied to the enable input of a D flip-flop 158 via an m-bit delayer 166.

[0022] Initially, the selector 162 receives m as an input.
' and set it to moving average part 154, selector 1
64 selects the reference value for BTR start detection and comparator 1
56, where m' is the moving average section 10 in FIG.
This corresponds to the number of moving averages in 4. Therefore, in this state, the circuit of FIG. 10 operates as the BTR start detection section 100, and when the BTR portion starts, the BT
An R start detection signal is output.

As a result, the selector 162 selects m and the selector 164 selects the reference value for hang-up detection. After m clocks, D flip-flop 1
58 enable input becomes active and comparator 1
The output of 56 is latched. Here, m corresponds to the average number in the average value calculation unit 204 in FIG. Therefore, the operation of the circuit in FIG. 10 is equivalent to that of the hang-up detector 200, and the D flip-flop
The output becomes a hang-up detection signal.

[0024]

[Effects of the Invention] As described above, according to the present invention,
Even if the timing to start BTR potion cannot be known from external information, the timing can be found on one's own and various processes to improve the draw-in speed can be executed, and the kick-off process can be carried out advantageously. A burst demodulator is provided.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the principle configuration of the present invention.

FIG. 2 is a diagram representing a typical burst communication signal format.

FIG. 3 is a frequency spectrum diagram for proving the operation of the burst demodulator of the present invention.

FIG. 4 is a block diagram representing a first embodiment of the invention.

5 is a block diagram showing a detailed configuration of the CR unit 300 in FIG. 4. FIG.

6 is a block diagram showing a detailed configuration of the BTR unit 400 in FIG. 4. FIG.

7 is a block diagram showing a detailed configuration of the BTR start detection unit 100 in FIG. 4. FIG.

8 is a block diagram showing a detailed configuration of the hang-up detection section 200 of FIG. 4. FIG.

FIG. 9 is a block diagram representing a second embodiment of the invention.

[Figure 10] BTR start/hang-up detection unit 1 in Figure 9
50 is a block diagram showing the detailed configuration of 50. FIG.

[Explanation of symbols]

14...Comparison means 16...Reference value switching means 18...Filter constant switching means

Claims (2)

[Claims] 1. A burst receiving and demodulating a burst communication signal whose preamble includes a CR portion (50) for carrier regeneration and a BTR portion (52) for bit timing regeneration following the CR portion (50). In the demodulator, the filter means (10) to which the burst communication signal is input, the amplitude calculation means (12) for calculating the amplitude of the output signal of the filter means (10), and the amplitude calculation means (12) said filter means (10) includes said CR portion (50) and said BTR portion.
A first filter constant (24) is set for exhibiting a pass characteristic different from that of the portion (52), and a first reference value (20) is set for the comparison means (14). ) BT the timing when the comparison result changed.
A burst demodulator characterized in that the timing is the start of an R portion. 2. Any of the first filter constant (24) and a second filter constant (26) for causing the filter means (10) to exhibit a pass characteristic that allows at least the signal of the BTR portion (52) to pass. a filter constant switching means (18) for selecting one of them and setting it in the filter means (10); and the first reference value (20) and a second reference value (22) for detecting a hang-up state.
reference value switching means (16) which selects one of the above and supplies it to the comparison means (14) as a reference value for comparison;
further comprising, after the BTR start timing is detected, the filter constant switching means (18) and the reference value switching means (16) change the second filter constant (26) and the second reference value, respectively. Select the value (22),
2. A burst demodulator according to claim 1, wherein the comparison result of said comparing means (14) is used as a hang-up detection signal.