JP7581864B2 - OBJECT DETECTION DEVICE, MOVING BODY, OBJECT DETECTION METHOD, AND PROGRAM - Google Patents

Description

This application relates to an object detection device, a moving object, an object detection method, and a program.

Conventionally, object detection devices are known that detect object information including at least one of the presence or absence of an object and the distance to the object by receiving light that is reflected or scattered by an object after projecting light.

In addition, in order to expand the dynamic range of distance detection from the object detection device to the object, a configuration has been disclosed in which the threshold method is used when the intensity of the backscattered light signal from the object of the projected light is above the threshold of the threshold method, and the signal sampling method is used when the intensity of the backscattered light signal is below the saturation limit of the sampling unit for signal sampling (see, for example, Patent Document 1).

However, in the device of Patent Document 1, the accuracy of object detection may decrease depending on the time resolution of the sampling unit.

The objective of the present invention is to ensure high object detection accuracy.

An object detection device according to one aspect of the present invention is an object detection device that detects at least one of the presence or absence of an object or the distance to the object, and includes a light-projecting unit that projects light, a light-receiving unit that outputs a first analog signal including a light-receiving signal of at least one of the reflected light or scattered light of the light by the object, an expansion unit that expands the time width of the light-receiving signal, a conversion unit that converts a second analog signal including the light-receiving signal whose time width has been expanded by the expansion unit into a digital signal at a predetermined sampling frequency, and an output unit that outputs object information including at least one of the presence or absence of the object or the distance to the object obtained based on the digital signal.

The present invention ensures high object detection accuracy.

1 is a block diagram of an example of the overall configuration of an object detection device according to a first embodiment. FIG. 2 is a circuit diagram showing a configuration example of a TIA circuit. FIG. 2 is a circuit diagram showing a configuration example of an LPF circuit. FIG. 4 is a block diagram of another example of the configuration of the object detection device according to the first embodiment. FIG. 2 is a circuit diagram showing a configuration example of an AMP circuit. 2 is a block diagram of an example of a functional configuration of a signal processing circuit according to the first embodiment. FIG. FIG. 4 is a flowchart of an example of processing by the signal processing circuit according to the first embodiment. FIG. 4 is a diagram illustrating an example of the operation of an LPF circuit. FIG. 13 is a diagram illustrating an example of sampling by an ADC circuit. 11A and 11B are diagrams illustrating an example of an interpolation process performed by a signal processing circuit. 4A and 4B are diagrams showing an example of signals processed by the signal processing circuit according to the first embodiment, in which FIG. 4A shows an output of a CMP circuit, and FIG. 4B shows an output of an ADC circuit. FIG. 11 is a block diagram of an example of a functional configuration of a signal processing circuit according to a second embodiment. FIG. 11 is a flowchart of an example of processing by a signal processing circuit according to the second embodiment. 13A and 13B are diagrams illustrating an example of signals processed by a signal processing circuit according to the second embodiment. FIG. 13 is a block diagram of an example of a functional configuration of a signal processing circuit according to a third embodiment. FIG. 11 is a flowchart of an example of processing by a signal processing circuit according to the third embodiment. 13A and 13B are diagrams illustrating an example of signals processed by a signal processing circuit according to the third embodiment. FIG. 13 is a diagram illustrating an example of the overall configuration of a moving body according to a fourth embodiment. FIG. 13 is a diagram illustrating an example of a hardware configuration of a moving body according to a fourth embodiment.

Below, a description of the embodiment of the invention will be given with reference to the drawings. In each drawing, the same components are given the same reference numerals, and duplicate explanations may be omitted.

The embodiments shown below are illustrative of an object detection device for embodying the technical ideas of the present invention, and the present invention is not limited to the embodiments shown below. Unless otherwise specified, the dimensions, materials, shapes, relative positions, etc. of the components described below are intended as examples, and are not intended to limit the scope of the present invention. Furthermore, the sizes and positional relationships of the components shown in the drawings may be exaggerated for clarity of explanation.

The object detection device according to the embodiment detects at least one of the presence or absence of an object and the distance to the object. Examples of such object detection devices include a LIDAR (Light Detection and Ranging, Laser Imaging Detection and Ranging) device mounted on a moving object such as a vehicle.

The object here refers to an object that is detected by the object detection device. For example, in a device mounted on a moving object such as a vehicle, objects that hinder the movement of the moving object, such as people or obstacles, or signs or guides that guide the moving object, etc., can be included.

In the embodiment, light is projected, and the time width of at least one of the received light signals of the projected light reflected or scattered by an object is expanded, and then the analog signal including the received light signal is converted into a digital signal at a predetermined sampling frequency. Then, object information including at least one of the presence or absence of an object and the distance to the object obtained based on the digital signal is output. Note that the presence or absence of an object refers to information indicating whether or not an object is within the detection range of the object detection device. The distance of the object refers to information corresponding to the distance from a reference position of the object detection device or a moving body on which the object detection device is mounted.

The sampling frequency is the frequency at which an analog signal is sampled (sampled) when it is converted into a digital signal. The sampling period is the inverse of the sampling frequency and corresponds to the time interval at which the signals are sampled.

If a low-speed sampling unit with low time resolution, such as an ADC (Analog Digital Converter) that converts analog signals to digital signals, is used, the sampling period of the ADC becomes relatively long compared to the time width of the received light signal when converting the analog signal to a digital signal.

As a result, the number of samples of the digital signal corresponding to the received light signal decreases, and the detection accuracy of the time when the received light signal peaks, which involves interpolation processing of the digital signal, decreases, and the detection accuracy of object information may decrease.

In the embodiment, the time width of the received light signal is expanded, thereby shortening the sampling period of the ADC or the like relative to the time width of the received light signal. This increases the number of samples of the digital signal corresponding to the received light signal, and improves the detection accuracy of the time when the received light signal peaks, which involves interpolation processing of the digital signal, or the like. This makes it possible to ensure high detection accuracy of object information even when using a slow, low-cost ADC or the like.

The following describes an embodiment using an object detection device installed in an automobile as an example.

[First embodiment]
<Configuration example of object detection device 100>
(Overall configuration example)
First, an example of the overall configuration of an object detection device 100 according to the first embodiment will be described with reference to Fig. 1. Fig. 1 is a block diagram illustrating an example of the overall configuration of the object detection device 100.

The object detection device 100 is a device that is mounted on an automobile and detects object information including at least one of the presence or absence of an object 200 present in the Z-axis direction corresponding to the direction of movement of the automobile and the distance to the object.

As shown in FIG. 1, the object detection device 100 has a light projection unit 1, a light receiving unit 2, a TIA (Trans Impedance Amp) circuit 3, an LPF (Low Pass Filter) circuit 4, an ADC circuit 5, a CMP circuit 6, and a signal processing circuit 7. Each component is fixed within a housing and constitutes the object detection device 100. However, some of the components may be disposed outside the housing.

The light-projecting unit 1 projects a pulsed laser beam 101 in the direction of movement of the vehicle. For example, the light-projecting unit 1 has a light-emitting unit that emits light and a scanning unit that scans the light. The light-emitting unit is composed of an LD (Laser Diode), an LED (Light Emitting Diode), a laser, or the like. The scanning unit is composed of a MEMS (Micro Electro Mechanical System) mirror, a polygon mirror, a galvanometer mirror, or the like.

However, there are no particular limitations on the configuration of the light-projecting unit 1 as long as it can project light in the direction of movement of the vehicle, and it may be configured without a scanning unit, or may be configured with a projection lens, etc. Having a projection lens provides the advantage of being able to project light more efficiently onto a desired area in the direction of movement of the vehicle. The light to be projected is not limited to coherent light such as laser light, and may be incoherent light.

The light receiving unit 2 receives return light 102, which is at least one of the reflected light and scattered light by the object 200 of the laser light 101 projected by the light projecting unit 1, and outputs an analog current signal including this received light signal. The analog current signal output by the light receiving unit 2 is an example of a first analog signal.

The light receiving unit 2 includes an APD (Avalanche Photo Diode) as a light receiving element that photoelectrically converts the light intensity of the return light 102 into an electrical signal such as a current or voltage. In this embodiment, the APD is used with a multiplication factor of 50 to 100 by applying a reverse bias of about 150 [V] to 200 [V], similar to the general use of APDs.

However, the light receiving element is not limited to an APD, but may be a PD (Photo Diode), a SiPM (Silicon Photomultiplier), or a SPAD (Single Photo Avalanch Photo Diode), which is a Geiger mode APD.

When the light receiving unit 2 is not receiving the return light 102, it outputs an analog current signal in a low current state (low level) that does not include a light receiving signal, and when it receives the return light 102, it outputs an analog current signal that includes the light receiving signal.

The light receiving signal is a current signal corresponding to the light intensity of the return light 102 photoelectrically converted by the light receiving element. More specifically, the light receiving signal is a signal during the period when the voltage signal output by the light receiving element increases from a low level as the light receiving element receives the return light 102, and the current decreases after the period during which the return light 102 is incident on the light receiving element has elapsed, and the signal returns to the original low level. When the light receiving element receives the return light 102, the current signal starts to increase toward the low level, and as the return light 102 decreases, the current signal decreases, and the period until the current signal eventually returns to the original low level corresponds to the time width of the light receiving signal.

The received light signal is often a pulsed current waveform signal, but is not limited to this and may be a signal with various voltage waveforms depending on the state of the return light 102.

The light receiving unit 2 may include an optical element such as a lens, a mirror, or a prism, and the light receiving element may receive the return light 102 reflected or transmitted by the optical element. By including an optical element, the light receiving unit 2 can increase the light receiving efficiency and facilitate the arrangement of each part constituting the object detection device 100.

The TIA circuit 3 is an electric circuit that converts the current signal output by the light receiving unit 2 into a voltage signal so that it can be processed by the ADC circuit 5 and CMP circuit 6 provided in the subsequent stage (downstream). The analog voltage signal output by the TIA circuit 3 is branched into two directions, one of which is input to the ADC circuit 5 via the LPF circuit 4, and the other is input to the CMP circuit 6.

The LPF circuit 4 is provided between the TIA circuit 3 and the ADC circuit 5, and is an example of an expansion section that expands the time width of the light receiving signal included in the analog voltage signal output by the TIA circuit 3, and is also an example of a low-pass filter. The analog voltage signal output by the LPF circuit 4 is an example of a second analog signal. The light receiving signal included in the analog voltage signal after passing through the LPF circuit 4 has a longer time width than before it was input to the LPF circuit 4.

The ADC circuit 5 is an electric circuit that converts the analog voltage signal output by the LPF circuit 4 into a digital voltage signal at a predetermined sampling frequency, and is an example of a conversion unit. The ADC circuit 5 samples the analog voltage signal input at a predetermined sampling frequency, and converts it into a digital voltage signal by quantizing it.

In the embodiment, the sampling frequency of the ADC circuit 5 is, for example, 500 [Msps; Mega samples per second] or less. Preferably, it is 200 [Msps] or less. These are relatively low sampling frequencies, and the ADC circuit 5 according to the embodiment can be said to be a low-speed ADC.

The lower the sampling frequency, the lower the time resolution of the ADC circuit 5. However, since low-speed ADCs are cheaper than high-speed ADCs, the cost of the object detection device 100 is reduced by using a low-speed ADC 5. There are no particular restrictions on the voltage resolution of the ADC circuit 5 as long as it is greater than 1 bit, but a resolution of, for example, 8 to 12 bits is preferable.

The ADC circuit 5 may not only be a single-chip component, but may also be a composite IC (Integrated Circuit) that combines ADC functions with other functions. The ADC circuit 5 may also be configured using multiple differential input terminals of an FPGA (Field Programmable Gate Array).

The ADC circuit 5 can output the converted digital voltage signal to the signal processing circuit 7.

The CMP circuit 6 is an example of a comparison unit that compares the analog voltage signal output by the TIA circuit 3 with a predetermined threshold and converts it into a digital voltage signal. The CMP circuit 6 is a comparator that compares two voltages and switches the output depending on which is greater. The CMP circuit 6 compares the voltage of the input analog voltage signal with a predetermined threshold and outputs a signal indicating whether it is equal to or greater than the threshold, so it can also be called a 1-bit ADC. The threshold of the CMP circuit 6 is preferably set to three times the floor noise or more to suppress false detection. Note that the floor noise refers to the noise level of the input part of the CMP circuit 6, including the noise level generated by the CMP circuit 6 itself.

It is preferable to use a high-speed comparator for the CMP circuit 6, for example a comparator with a propagation delay of about several ns. In addition, the CMP circuit 6 can be configured using multiple differential input terminals of the FPGA.

The CMP circuit 6 can output a digital voltage signal to the signal processing circuit 7 that indicates whether the voltage of the input analog voltage signal is higher or lower than the reference voltage.

The signal processing circuit 7 is an electric circuit that acquires object information including at least one of the presence or absence of an object and the distance to the object based on the digital voltage signals input from the ADC circuit 5 and the CMP circuit 6, and outputs the acquired object information to an external device. The function of this signal processing circuit 7 will be described in detail later with reference to FIG. 6.

The external device may be, for example, an engine ECU (Electronic Control Unit), a display device, a brake ECU, or a steering ECU provided in an automobile equipped with the object detection device 100. These external devices control the automobile and display information to the driver based on object information detected by the object detection device 100. For example, if the external device is a display device, the display unit of the display device displays the distance to the object based on the distance to the object detected by the object detection device 100. If the external device is a brake ECU or a steering ECU, the brakes or steering are controlled based on at least one of the presence or absence of an object or the distance to the object detected by the object detection device 100. However, the external device is not limited to these, and may be a PC (Personal Computer) or an external server, etc.

Here, when the distance from the object detection device 100 to the object is short, the attenuation of the light intensity of the return light 102 is small, and the voltage of the received light signal becomes relatively high according to the light intensity of the return light 102. On the other hand, when the distance from the object detection device 100 to the object is long, the attenuation of the light intensity of the return light 102 becomes large, and the voltage of the received light signal becomes relatively low according to the light intensity of the return light 102.

When the voltage of the received light signal is low, if the voltage resolution is low when converting the analog voltage signal into a digital voltage signal, the accuracy of detecting object information based on the digital voltage signal decreases.

Therefore, in this embodiment, when the distance from the object detection device 100 to the object is long and the voltage of the light receiving signal is equal to or lower than the threshold of the CMP circuit 6, the object information is obtained using the digital voltage signal output by the ADC circuit 5, which has a higher voltage resolution than the CMP circuit 6. On the other hand, when the distance from the object detection device 100 to the object is short and the voltage of the light receiving signal is higher than the threshold of the CMP circuit 6, the object information is obtained using the digital voltage signal output by the CMP circuit 6, which has a lower voltage resolution than the ADC circuit 5.

By selectively using the digital voltage signals output by the ADC circuit 5 and the CMP circuit 6 depending on the voltage of the received light signal, the detection accuracy is compensated for when the distance from the object detection device 100 to the object is long, and the dynamic range of distance detection by the object detection device 100 is expanded.

In addition, in this embodiment, the cost of the object detection device 100 is reduced by using a slow and inexpensive ADC circuit 5, so the time resolution of the ADC circuit 5 is low. As a result, the number of samples of the digital voltage signal corresponding to the received light signal is reduced, and the detection accuracy of the object information based on the digital voltage signal output by the ADC circuit 5 may be reduced.

Therefore, in this embodiment, an LPF circuit 4 is provided between the TIA circuit 3 and the ADC circuit 5, and the LPF circuit 4 expands the time width of the received light signal, thereby increasing the number of samples of the digital signal corresponding to the received light signal. This makes it possible to ensure high detection accuracy of object information based on the digital voltage signal output by the ADC circuit 5.

On the other hand, many CMP circuits 6 have high time resolution regardless of the price. For this reason, there is no LPF circuit 4 between the TIA circuit 3 and the CMP circuit 6, and the analog voltage signal output by the TIA circuit 3 is input directly to the CMP circuit 6.

In this embodiment, a configuration in which an analog voltage signal is converted into a digital voltage signal and object information is acquired based on the digital voltage signal is illustrated, but the present invention is not limited to this. A configuration in which an analog current signal is converted into a digital current signal and object information is acquired based on the digital current signal may also be used.

In addition, in this embodiment, a configuration is shown in which the functions of the TIA circuit 3, the LPF circuit 4, the ADC circuit 5, the CMP circuit 6, and the signal processing circuit 7 are realized by electrical circuits, but the present invention is not limited to this.

For example, some or all of the above functions may be realized by an integrated circuit such as an FPGA or an ASIC (Application Specific Integrated Circuit), or an IC (Integrated Circuit) equipped with an ADC or other functions. Also, some of the above functions may be realized by the CPU executing a program expanded from ROM onto RAM.

Although FIG. 1 shows the main components of the object detection device 100, the object detection device 100 may have a configuration other than that shown in FIG. 1. For example, a filter for cutting noise may be provided after the light receiving unit 2.

In addition, an electrical element that functions as a buffer to improve at least one of the impedance matching or current driving capability can be provided at least between the TIA circuit 3 and the ADC circuit 5, or between the TIA circuit 3 and the CMP circuit 6.

(Example of the configuration of the TIA circuit 3)
Fig. 2 is a circuit diagram illustrating an example of the configuration of the TIA circuit 3. As shown in Fig. 2, the TIA circuit 3 has an operational amplifier OP1, a phase compensation capacitor Cf1, and a feedback resistor Rf1.

The TIA circuit 3 has a phase compensation capacitor Cf1 and a feedback resistor Rf1 between the output and inverting input terminal of the operational amplifier OP1. The feedback resistor Rf1 has a resistance of anywhere from several kΩ to several tens of kΩ. The phase compensation capacitor Cf1 has a capacitance of anywhere from several pF to several tens of pF.

The operational amplifier OP1 is an operational amplifier having a GBW (Gain Bandwidth Product) of, for example, several hundred [Msps] or more. By using such an operational amplifier OP1, a received light signal with a time width of several [ns] required by the object detection device 100 can be converted from a current signal to a voltage signal.

The TIA circuit 3 can also be equipped with an ASIC instead of the operational amplifier OP1.

(Example of the configuration of the LPF circuit 4)
3 is a circuit diagram illustrating an example of the configuration of the LPF circuit 4. As shown in FIG. 3, the LPF circuit 4 is an RC filter having a resistor R2 and a capacitor C2. The cutoff frequency _Fc1 of the LPF circuit 4 follows the formula below.
Fc ₁ = 1/(2・π・r ₁・c ₁ )
Here, π represents the circular constant, _r1 represents the resistance value [Ω], and _c1 represents the capacitance value [F]. The cutoff frequency refers to the frequency that is the boundary between the pass band and the transition band in a filter circuit.

The cutoff frequency _Fc1 of the LPF circuit 4 can be appropriately set according to the time width of the light receiving signal included in the analog voltage signal output by the TIA circuit 3. However, it is more preferable that the cutoff frequency _Fc1 is in the range from 1/10 of the frequency corresponding to the inverse of the time width T of the light receiving signal to twice the frequency corresponding to the inverse of the time width T of the light receiving signal. In other words, it is more preferable to satisfy the condition expressed by the following formula (1). If the cutoff frequency _Fc1 is lower than the range of formula (1), the signal amplitude (peak voltage) of the light receiving signal will decrease, causing a problem of low detection accuracy. Also, if the cutoff frequency _Fc1 is higher than the range of formula (1), the time width T of the light receiving signal cannot be sufficiently expanded, and the number of samples of the ADC will be insufficient, resulting in low detection accuracy.

It is even more preferable if the following formula (2) is satisfied.

When the condition of formula (1) is satisfied, the time width T of the received light signal can be increased, so that even if an ADC circuit 5 with a low sampling frequency and low time resolution is used, a higher detection accuracy of object information can be ensured. Furthermore, when the condition of formula (2) is satisfied, an even higher detection accuracy of object information can be ensured.

In addition, it is desirable that the time width of the light receiving signal input to the ADC circuit 5 is three or more times the reciprocal of the sampling frequency of the ADC circuit 5. In this way, when the ADC circuit 5 performs analog-to-digital conversion, the number of samples of the light receiving signal can be three or more, so that the time at which the maximum value or the local maximum value is reached can be obtained from the three or more sampled values. Furthermore, since the light receiving signal can be sampled at three or more points, it is possible to ensure high detection accuracy of object information involving interpolation processing and fitting processing of the digital voltage signal in the signal processing circuit 7. The higher the sampling frequency of the ADC circuit 5, the higher the detection accuracy, but the higher the cost of the ADC circuit 5 and the higher the device cost. It is preferable to select the sampling frequency based on the cost and the required detection accuracy, and a sampling frequency of 500 [Msps] or less can achieve both detection accuracy and low cost.

In addition, the LPF circuit 4 can be configured using an operational amplifier instead of an RC filter.

(Another example of the overall configuration)
Next, another example of the object detection device according to the first embodiment will be described with reference to Fig. 4. Note that the same components as those already described will be given the same part numbers, and duplicated descriptions will be omitted as appropriate.

Figure 4 is a block diagram illustrating the overall configuration of an object detection device 100c, which is another example of the object detection device according to the first embodiment. As shown in Figure 4, the object detection device 100c has an AMP circuit 4c between the TIA circuit 3 and the ADC circuit 5.

The object detection device 100c expands the time width of the light receiving signal included in the analog voltage signal output by the TIA circuit 3 by lowering the frequency characteristics of the AMP circuit 4c. In other words, the AMP circuit 4c functions in the same way as the LPF circuit 4 in FIG. 1. This AMP circuit 4c corresponds to an example of an expansion unit that expands the time width of the light receiving signal included in the analog voltage signal output by the TIA circuit 3.

In addition, by providing an AMP circuit 4c instead of the LPF circuit 4, the dynamic range of distance detection by the object detection device 100c can be expanded.

In addition, since noise can be reduced by averaging the digital voltage signal output by the ADC circuit 5, it is more preferable to input a signal with low signal strength and low SNR (Signal to Noise Ratio) to the ADC circuit 5 and input a signal with a high SNR to the CMP circuit 6.

(Example of the configuration of the AMP circuit 4c)
5 is a circuit diagram illustrating an example of the configuration of the AMP circuit 4c. As shown in FIG. 5, the AMP circuit 4c includes an operational amplifier _OP2 , a phase compensation capacitor _Cf2 , a feedback resistor _Rf2 , a resistor Rs, and a capacitor Cs.

The AMP circuit 4c has a phase compensation capacitor _Cf2 and a feedback resistor _Rf2 provided between the output and inverting input terminal of an operational amplifier _OP2 . In addition, a resistor Rs and a capacitor Cs are connected in series between the phase compensation capacitor _Cf2 and the feedback resistor _Rf2 and ground GND.

According to the configuration of FIG. 5, the signal amplification factor Ga of the AMP circuit 4c can be calculated approximately by the following formula, and therefore the signal amplification factor Ga can be set by referring to the following formula.
Ga=1+(rf ₂ /rs)
Here, rf2 represents the resistance value [Ω] of the feedback resistor _Rf2 , and rs represents the resistance value [Ω] of the resistor Rs.

Furthermore, the cutoff frequency _Fc2 can be approximately calculated by the following formula, and therefore the cutoff frequency _Fc2 can be set by referring to the following formula.
Fc ₂ = 1/(2・π・rf ₂・cf ₂ )
Here, _cf2 is the electrostatic capacitance value [F] of the phase compensation capacitor _Cf2 .

For example, the resistance value rs can be set to 50 [Ω], the resistance value _rf2 can be set to 200 [Ω], and the capacitance value _cf2 can be set to 10 [pF]. The preferable range of the cutoff frequency _Fc2 is the same as that of the cutoff frequency _Fc1 described above.

<Example of functional configuration of signal processing circuit 7>
Next, the functional configuration of the signal processing circuit 7 will be described with reference to Fig. 6. Fig. 6 is a block diagram illustrating an example of the functional configuration of the signal processing circuit 7. As shown in Fig. 6, the signal processing circuit 7 has an interpolation unit 71, an acquisition unit 72, and an output unit 73.

Of these, the interpolation unit 71 outputs to the acquisition unit 72 the interpolated data obtained by interpolating the digital voltage signal converted by the ADC circuit 5.

For example, let V(n) be the voltage of the digital voltage signal converted by the ADC circuit 5 at time t(n), and let V(n+1) be the voltage of the digital voltage signal converted by the ADC circuit 5 at the next time t(t+1). Note that n is an integer (n=0, 1, 2, 3, ...). Time t(t+1) is the time after the sampling period Δs of the ADC circuit 5 has elapsed since time t(n).

The interpolation unit 71 can obtain the interpolation data, for example, by calculating the voltage {V(n)+V(n+1)}/2 at the time {t(n)+t(n+1)}/2 between time t(n) and time t(n+1).

The interpolation performed by the interpolation unit 71 includes interpolation and extrapolation. In addition to the method of calculating the average value between digital voltage signals as described above, various other interpolation methods such as linear interpolation, Lagrange interpolation, and spline interpolation can be applied.

When the peak voltage of the light receiving signal is equal to or greater than the threshold, the acquisition unit 72 acquires object information based on the digital voltage signal converted by the CMP circuit 6. On the other hand, when the peak voltage of the light receiving signal is not equal to or greater than the threshold, the acquisition unit 72 acquires object information based on the interpolated data output by the interpolation unit 71.

When the peak voltage of the received light signal is equal to or greater than the threshold, the CMP circuit 6 outputs a digital voltage signal corresponding to the received light signal to the acquisition unit 72, and when the peak voltage of the received light signal is not equal to or greater than the threshold, the CMP circuit 6 does not output a digital voltage signal corresponding to the received light signal to the acquisition unit 72. Therefore, the acquisition unit 72 can determine whether the peak voltage of the received light signal is equal to or greater than the threshold by determining whether the digital voltage signal output by the CMP circuit 6 includes a digital signal corresponding to the received light signal.

The output unit 73 can output the object information acquired by the acquisition unit 72 to an external device.

<Example of Processing by Signal Processing Circuit 7>
Next, the processing by the signal processing circuit 7 will be described with reference to Fig. 7. Fig. 7 is a flowchart showing an example of the processing by the signal processing circuit 7. Fig. 7 shows the processing triggered by the time when the signal processing circuit 7 receives the digital voltage signals converted by the ADC circuit 5 and the CMP circuit 6.

First, in step S71, the acquisition unit 72 determines whether the digital voltage signal output by the CMP circuit 6 includes a digital signal corresponding to the received light signal.

If it is determined in step S71 that the signal is included (step S71, Yes), in step S72, the interpolation unit 71 outputs to the acquisition unit 72 the interpolated data obtained by interpolating the digital voltage signal converted by the ADC circuit 5.

Next, in step S73, the acquisition unit 72 acquires object information based on the interpolation data input from the interpolation unit 71.

On the other hand, if it is determined in step S71 that the object does not include the digital voltage signal (step S71, No), in step S74, the acquisition unit 72 acquires the object information based on the digital voltage signal converted by the CMP circuit 6.

Next, in step S75, the output unit 73 outputs the object information acquired by the acquisition unit 72 to an external device.

In this way, the signal processing circuit 7 can output object information acquired based on the digital voltage signal.

<Example of Operation of Object Detection Device 100>
Next, the operation of the object detection device 100 will be described with reference to FIGS.

(Example of operation of LPF circuit 4)
First, the operation of the LPF circuit 4 will be described with reference to Fig. 8. Fig. 8 is a diagram for explaining an example of the operation of the LPF circuit 4. The horizontal axis of Fig. 8 indicates time [ns], and the vertical axis indicates normalized analog voltage. Fig. 8 shows four graphs corresponding to the waveforms of analog voltage signals. Note that the graphs shown in Fig. 8 show simulation results.

The analog voltage signal 81 is an analog voltage signal when the cutoff frequency Fc1 of the LPF circuit 4 is 50 [MHz]. In the analog voltage signal 81, the period from when the pulse-shaped voltage signal starts to increase from a low level to when it finishes decreasing to a low level corresponds to the time width 81p of the received light signal.

The analog voltage signal 82 is an analog voltage signal when the cutoff frequency _Fc1 of the LPF circuit 4 is 100 [MHz]. In the analog voltage signal 82, the period from when the pulse-shaped voltage signal starts to increase from a low level to when it finishes decreasing to a low level corresponds to the time width 82p of the light receiving signal.

The analog voltage signal 83 is an analog voltage signal when the cutoff frequency _Fc1 of the LPF circuit 4 is 200 [MHz]. In the analog voltage signal 83, the period from when the pulse-shaped voltage signal starts to increase from a low level to when it finishes decreasing to a low level corresponds to the time width 83p of the light receiving signal.

Analog voltage signal 84 is an analog voltage signal that does not pass through LPF circuit 4. In analog voltage signal 84, the period from when the pulse-shaped voltage signal starts to increase from a low level to when it finishes decreasing to a low level corresponds to the time width 84p of the received light signal.

8, the time width 84p of the light receiving signal is the shortest, and as the value of the cutoff frequency _Fc1 of the LPF circuit 4 decreases, the time widths of the light receiving signal become longer in the order of time widths 83p, 82p, and 81p. In this way, the LPF circuit 4 can expand the time width of the light receiving signal in accordance with the cutoff frequency _Fc1 .

(Example of Sampling by ADC Circuit 5)
Next, sampling by the ADC circuit 5 will be described with reference to Fig. 9. Fig. 9 is a diagram for explaining an example of sampling by the ADC circuit 5. The horizontal axis of Fig. 9 indicates time [ns], and the vertical axis indicates normalized digital voltage. Fig. 9 shows four graphs corresponding to the waveforms of digital voltage signals. Note that the graphs shown in Fig. 9 show simulation results.

The digital voltage signal 91 is a digital voltage signal converted when the cutoff frequency _Fc1 of the LPF circuit 4 is 50 [MHz]. In the digital voltage signal 91, the period from when the pulse-shaped voltage signal starts to increase from a low level to when it finishes decreasing to a low level corresponds to the digital time width 91p of the digital light reception signal.

The digital voltage signal 92 is a digital voltage signal converted when the cutoff frequency Fc1 of the LPF circuit 4 is 100 [MHz]. In the digital voltage signal 92, the period from when the pulse-shaped voltage signal starts to increase from a low level to when it finishes decreasing to a low level corresponds to the digital time width 92p of the digital light receiving signal.

The digital voltage signal 93 is a digital voltage signal converted when the cutoff frequency _Fc1 of the LPF circuit 4 is 200 [MHz]. In the digital voltage signal 93, the period from when the pulse-shaped voltage signal starts to increase from a low level to when it finishes decreasing to a low level corresponds to the digital time width 93p of the digital light receiving signal.

The digital voltage signal 94 is a digital voltage signal that is converted when it does not pass through the LPF circuit 4. In the digital voltage signal 94, the period from when the pulse-shaped voltage signal starts to increase from a low level to when it finishes decreasing to a low level corresponds to the digital time width 94p of the digital light receiving signal.

9, in the digital voltage signal 94, the digital time width 94p is short, and the number of samples of the digital voltage signal is 5. In contrast, in the digital voltage signal 93, the digital time width 93p is longer than the digital time width 94p, and the number of samples of the digital voltage signal increases to 9. In this way, as the cutoff frequency _Fc1 of the LPF circuit 4 becomes smaller, the time width of the received light signal becomes longer, and the number of samples of the digital voltage signal increases.

(Example of Interpolation Processing by Signal Processing Circuit 7)
Next, the interpolation process by the signal processing circuit 7 will be described with reference to Fig. 10. Fig. 10 is a diagram for explaining an example of the interpolation process by the signal processing circuit 7. The horizontal axis of Fig. 10 indicates time [ns], and the vertical axis indicates normalized digital voltage.

The open circle plots 105 in FIG. 10 represent digital voltage signals converted from analog voltage signals. Note that the open circle plots 105 are a collective notation for multiple open circle plots. The distance along the horizontal axis between adjacent open circle plots 105 corresponds to the sampling period Δs of the ADC circuit 5.

The black circle plots 106 in FIG. 10 show data in which digital voltage signals have been interpolated. Note that the black circle plots 106 are a collective term for multiple black circle plots. The black circle plots 106 are used to interpolate between adjacent white circle plots 105.

An example of interpolated data is the combination of the white circle plot 105 and the black circle plot 106, or a formula such as a quadratic curve that approximates the white circle plot 105 and the black circle plot 106.

The signal processing circuit 7 can obtain object information based on the time when the voltage in the interpolated data peaks. Furthermore, the signal processing circuit 7 can calculate the distance to the object by determining the difference between the time when the light projector 1 projects light and the time when the voltage in the interpolated data peaks, and can obtain the distance to the object as object information. If the speed of light is c, the time when the light projector 1 projects light is t0, and the time when the voltage in the interpolated data peaks is t1, then the distance L to the object can be calculated as L = c x (t1 - t0) / 2.

(Example of signal according to processing by signal processing circuit 7)
Next, a signal corresponding to the processing by the signal processing circuit 7 will be described with reference to Fig. 11. Fig. 11 is a diagram for explaining an example of a signal corresponding to the processing by the signal processing circuit 7. Fig. 11(a) is a diagram showing the output of the CMP circuit 6, and Fig. 11(b) is a diagram showing the output of the ADC circuit 5.

The threshold value Th in graph 111 of FIG. 11(a) is the threshold value that the CMP circuit 6 compares with the analog voltage signal 112. Because the peak voltage of the light receiving signal in the analog voltage signal 112 is greater than the threshold value Th, as shown in graph 113, the CMP circuit 6 outputs a digital voltage signal 114 including a digital signal corresponding to the light receiving signal to the signal processing circuit 7. The signal processing circuit 7 determines that the digital voltage signal 114 output by the CMP circuit 6 includes a light receiving signal. Then, it outputs the object information acquired based on the time when the light receiving signal included in the digital voltage signal 114 peaks.

On the other hand, in graph 115 of FIG. 11(b), the peak voltage of the light receiving signal in analog voltage signal 116 is smaller than threshold value Th, so as shown in graph 117, CMP circuit 6 outputs a digital voltage signal that does not include a digital signal corresponding to the light receiving signal to signal processing circuit 7. The signal processing circuit 7 determines that the digital voltage signal output by CMP circuit 6 does not include a light receiving signal. Then, it interpolates digital voltage signal 119 output by ADC circuit 5 shown in graph 118, and outputs object information acquired based on the time when the light receiving signal included in the interpolated data peaks.

Here, as shown in FIG. 11, the bandwidth of the received light signal contained in the digital voltage signal 114 converted by the CMP circuit 6 is wider than the bandwidth of the received light signal contained in the digital voltage signal 119 converted by the ADC circuit 5 from the signal that passed through the LPF circuit 4. Note that the bandwidth means the width of the frequency.

Furthermore, the time width tt ₂ of the light receiving signal contained in the digital voltage signal 119 converted by the ADC circuit 5 is wider than the time width of the light receiving signal contained in the digital voltage signal 114 converted by the CMP circuit 6 .

Moreover, the falling time width _td2 of the light receiving signal included in the digital voltage signal 114 converted by the CMP circuit 6 is shorter than the falling time width of the light receiving signal included in the digital voltage signal 119 converted by the ADC circuit 5. The falling time width means the time width from when the signal starts to decrease to when the decrease ends.

On the other hand, if the gain of the ADC circuit 5 is made larger than the gain of the CMP circuit 6, the attenuation of the return light 102 from the object 200 located at a long distance from the object detection device 100 can be compensated for. This is more preferable because it expands the dynamic range of distance detection by the object detection device 100. Note that gain refers to the electrical signal amplification rate.

<Effects of the object detection device 100>
Next, the effects of the object detection device 100 will be described.

Conventionally, object detection devices are known that project light such as laser light, receive light returned from an object, and detect object information from the time difference between the time the light is projected and the time it is received. The light projected is often pulsed light with a pulse width of several ns to several tens of ns. For this reason, the light receiving unit that receives the returned light is required to use an ADC or comparator that can detect the time when pulsed light of several ns to several tens of ns is received.

In addition, in order to expand the dynamic range of distance detection to an object, a configuration has been disclosed in which a threshold method using a comparator is performed when the intensity of the backscattered light signal from the object of the projected light is above the threshold of the threshold method, and a signal sampling method using an ADC is performed when the intensity of the backscattered light signal is below the saturation limit of a sampling unit such as an ADC for signal sampling (see, for example, Patent Document 1).

However, in the configuration of Patent Document 1, when a low-speed ADC is used, the time resolution is insufficient, and it may not be possible to ensure high detection accuracy of object information. As a result, it may not be possible to reduce the cost of the object detection device by using a low-speed ADC.

Specifically, if a slow ADC with low time resolution is used, the sampling period Δs of the ADC becomes relatively long compared to the time width of the received light signal when converting the analog signal to a digital signal. As a result, the number of samples of the digital signal corresponding to the received light signal decreases, and the detection accuracy of the time when the received light signal peaks, which involves interpolation processing of the digital signal, decreases, and the detection accuracy of the object information decreases.

For example, when a high-speed ADC with a sampling frequency of 1 Gsps and a time resolution of 1 ns is used, the distance detection resolution is 1/2 the round trip distance when light travels at the speed of light (=3×10 ⁸ m/s) at a time resolution of 1 ns, resulting in a distance detection resolution of 15 cm, whereas when a low-speed ADC with a sampling frequency of 200 Msps and a time resolution of 5 ns is used, the detection resolution is 75 cm. As a result of the lower detection resolution, the detection accuracy of object information is reduced compared to when a high-speed ADC is used.

To improve detection accuracy, it is possible to use the reflected light from multiple light projections at different times, but this would result in a lower detection rate (detection frequency) for object information.

In addition, in object detection devices that use conventional low-speed ADCs, the upsampling process is heavy and the calculation speed is slow, making it impossible to apply complex algorithms to improve the detection accuracy of object information, resulting in reduced detection accuracy.

On the other hand, using a high-speed ADC to improve the accuracy of detecting object information significantly increases the cost of the object detection device.

In this embodiment, the time width of the received light signal that receives the return light 102 from the object 200 of the projected laser light 101 (light) is expanded. Then, an analog voltage signal (analog signal) including the received light signal is converted into a digital voltage signal (digital signal) at a predetermined sampling frequency, and object information of the object 200 acquired based on the digital voltage signal is output.

By expanding the time width of the received light signal, the sampling period Δs of the ADC circuit 5 (conversion unit) becomes shorter relative to the time width of the received light signal. This increases the number of samples of the digital voltage signal corresponding to the received light signal, and improves the detection accuracy of the time when the received light signal reaches its peak, which involves interpolation processing of the digital voltage signal, etc. As a result, even if a low-speed, low-cost ADC circuit 5 is used, high detection accuracy of object information can be ensured.

The sampling frequency of the ADC circuit 5 used by the object detection device 100 according to this embodiment is, for example, 500 [Msps] or less. In this case, the distance detection resolution based on the sampling frequency is 30 [cm], but by applying the LPF circuit 4 and signal processing circuit 7 of this embodiment, even with an ADC circuit 5 having a sampling frequency of 500 [Msps], it is possible to improve the distance detection resolution to the same level as 15 [cm], which is the distance detection resolution when a sampling frequency of 1 [Gsps] is used.

The sampling frequency of the ADC circuit 5 can also be set to 200 [Msps] or less. In this case, the distance detection resolution is 75 [cm], but by applying the LPF circuit 4 and the signal processing circuit 7 of this embodiment, the distance detection resolution can be improved to 15 [cm], even if the ADC circuit 5 has a sampling frequency of 200 [Msps] as described above.
For example, the detection resolution can be improved by setting the sampling frequency of the ADC to 200 [Msps], the time width of the light receiving signal to 6 ns, and the cutoff frequency of the LPF circuit 4 to 30 to 50 [MHz].

In addition, this embodiment has an interpolation unit 71 that outputs interpolated data obtained by interpolating the digital voltage signal, and outputs object information acquired based on the interpolated data. This makes it possible to improve the detection accuracy of the time when the light receiving signal included in the digital voltage signal reaches its peak, and ensures higher detection accuracy of object information.

In addition, in this embodiment, the cutoff frequency of the LPF circuit 4 (enlargement section) is 1/10 or more of the frequency corresponding to the reciprocal of the time width of the received light signal. Alternatively, the time width of the received light signal after passing through the LPF circuit 4 is 3 times or less the reciprocal of the sampling frequency of the ADC circuit 5. By satisfying these conditions, high detection accuracy of object information can be ensured even when a low-speed, low-cost ADC circuit 5 is used.

This embodiment also has a CMP circuit 6 (comparison unit) that compares the analog voltage signal with a threshold value Th (predetermined threshold value) and converts it into a digital voltage signal. When the peak voltage of the received light signal is equal to or greater than the threshold value Th, the CMP circuit 6 outputs object information acquired based on the converted digital voltage signal. On the other hand, when the peak voltage of the received light signal is not equal to or greater than the threshold value Th, the output unit 73 outputs object information acquired based on the converted digital voltage signal by the ADC circuit 5.

This enables the ADC circuit 5 to detect object information with high voltage resolution even when the distance from the object detection device 100 is long and the light intensity of the return light 102 is low, thereby expanding the dynamic range of distance detection by the object detection device 100.

In this embodiment, the bandwidth of the received light signal converted by the CMP circuit 6 is narrower than the bandwidth of the received light signal converted by the ADC circuit 5. The time width _tt2 of the received light signal converted by the ADC circuit 5 is wider than the time width of the received light signal converted by the CMP circuit 6. Alternatively, the falling time width of the received light signal converted by the CMP circuit 6 is shorter than the falling time width _td2 of the received light signal converted by the converter.

This increases the number of samples of the digital voltage signal corresponding to the received light signal converted by the ADC circuit 5, and increases the detection accuracy of the time when the received light signal reaches its peak, which involves interpolation processing of the digital voltage signal. Even if a low-speed, low-cost ADC circuit 5 is used, high detection accuracy of object information can be ensured.

In addition, in this embodiment, by making the gain of the ADC circuit 5 larger than the gain of the CMP circuit 6, it is possible to compensate for the attenuation of the return light 102 from an object 200 located far away from the object detection device 100, and to expand the dynamic range of distance detection by the object detection device 100.

Here, when the analog voltage signal output by the TIA circuit 3 passes through the LPF circuit 4, the peak voltage of the received light signal corresponding to the frequency components equal to or lower than the cutoff frequency of the LPF circuit 4 decreases, which may affect the accuracy of detecting object information.

In this embodiment, the received light signal, which has a sufficiently high cutoff frequency, is converted by the CMP circuit 6, and object information is obtained based on the converted digital voltage signal. Therefore, object information can be obtained without being affected by the peak voltage drop of the received light signal due to passing through the LPF circuit 4.

[Second embodiment]
Next, an object detection device 100a according to a second embodiment will be described. Note that the same components as those already described will be given the same part numbers, and duplicated descriptions will be omitted as appropriate. This also applies to the following embodiments.

In this embodiment, based on the comparison result by the CMP circuit 6 (comparison unit), information on the target period during which the light receiving signal included in the analog voltage signal (analog signal) is equal to or greater than the threshold value Th is obtained. Then, the ADC circuit 5 (conversion unit) outputs object information obtained based on the digital voltage signal (digital signal) converted during this target period.

This reduces the processing load required to detect the time when the received light signal peaks, and also shortens the processing time.

<Example of functional configuration of signal processing circuit 7a>
The functional configuration of the signal processing circuit 7a included in the object detection device 100a will be described. Fig. 12 is a block diagram illustrating an example of the functional configuration of the signal processing circuit 7a. As shown in Fig. 12, the signal processing circuit 7a has a period acquisition unit 74 and an interpolation unit 71a.

Based on the comparison result by the CMP circuit 6, the period acquisition unit 74 acquires information on the target period during which the light receiving signal included in the analog voltage signal output by the TIA circuit 3 (see FIG. 1) is equal to or greater than the threshold value Th.

The interpolation unit 71a performs an interpolation process using the digital voltage signal converted from the analog voltage signal by the ADC circuit 5 during the target period acquired by the period acquisition unit 74, and outputs the interpolated data to the acquisition unit 72. The acquisition unit 72 outputs the object information acquired based on this interpolated data to an external device via the output unit 73.

<Example of processing by signal processing circuit 7a>
Next, the processing by the signal processing circuit 7a will be described with reference to Fig. 13. Fig. 13 is a flowchart showing an example of the processing by the signal processing circuit 7a. Fig. 13 shows the processing triggered by the time when the digital voltage signals converted by the ADC circuit 5 and the CMP circuit 6 are input to the signal processing circuit 7a.

First, in step S131, the period acquisition unit 74 determines whether the digital voltage signal output by the CMP circuit 6 includes a digital signal corresponding to the light receiving signal.

If it is determined in step S131 that it does (step S131, Yes), in step S132, the period acquisition unit 74 acquires information on the target period during which the light receiving signal included in the analog voltage signal output by the TIA circuit 3 is equal to or greater than the threshold value Th, based on the comparison result by the CMP circuit 6.

Next, in step S133, the interpolation unit 71a performs an interpolation process using the digital voltage signal converted from the analog voltage signal by the ADC circuit 5 during the target period acquired by the period acquisition unit 74, and outputs the interpolated data to the acquisition unit 72.

On the other hand, if it is determined in step S131 that the signal does not include the digital voltage signals (step S131, No), in step S134, the interpolation unit 71a performs an interpolation process using all the digital voltage signals converted from the analog voltage signals by the ADC circuit 5, and outputs the interpolated data to the acquisition unit 72.

Next, in step S135, the acquisition unit 72 acquires object information based on the interpolation data input from the interpolation unit 71a.

Next, in step S136, the output unit 73 outputs the object information acquired by the acquisition unit 72 to an external device.

In this way, the signal processing circuit 7a can output object information acquired based on the digital voltage signal.

(Example of signal processed by signal processing circuit 7a)
Next, a signal corresponding to the processing by the signal processing circuit 7a will be described with reference to Fig. 14. Fig. 14 is a diagram for explaining an example of a signal corresponding to the processing by the signal processing circuit 7a. Fig. 14 illustrates a case where the peak voltage of the light receiving signal in the analog voltage signal output by the TIA circuit 3 is equal to or higher than the threshold value Th.

The threshold value Th in graph 141 of FIG. 14 is the threshold value that the CMP circuit 6 compares with the analog voltage signal 142. Graph 143 shows the digital voltage signal 144 that the CMP circuit 6 outputs as a result of comparing the analog voltage signal 142 with the threshold value Th.

As shown in graph 143, the CMP circuit 6 outputs a digital voltage signal 144 including information on the target period To during which the analog voltage signal 142 is equal to or greater than the threshold value Th. The period acquisition unit 74 can acquire information on the target period To based on the digital voltage signal 144, which is the comparison result by the CMP circuit 6.

Graph 145 shows the analog voltage signal 146 output by the TIA circuit 3 and input to the ADC circuit 5 after passing through the LPF circuit 4. The interpolation unit 71a performs the interpolation process using only the digital voltage signal corresponding to the target period To among the digital voltage signals converted from the analog voltage signal 146 by the ADC circuit 5. In other words, the interpolation unit 71a does not perform the interpolation process on the digital voltage signal corresponding to the period Tno outside the target period.

In this way, the signal processing circuit 7a can interpolate the digital voltage signal converted by the ADC circuit 5 within the target period To and obtain object information based on the interpolated data.

<Functions and Effects of Object Detection Device 100a>
As described above, in this embodiment, information on the target period To during which the light receiving signal included in the analog voltage signal 142 (analog signal) is equal to or greater than the threshold value Th is obtained based on the comparison result by the CMP circuit 6 (comparison unit). Then, the ADC circuit 5 (conversion unit) outputs object information obtained based on the digital voltage signal (digital signal) converted during this target period To.

By limiting the digital voltage signal on which the interpolation process is performed to within the target period To, the amount of data on which the interpolation process is performed can be reduced. This reduces the processing load for detecting the time when the light receiving signal reaches its peak, and also shortens the processing time. In addition, the cost of the object detection device 100a can be reduced compared to when an expensive calculator capable of handling a large processing load is used.

Note that effects other than those described above are the same as those described in the first embodiment.

[Third embodiment]
Next, an object detection device 100b according to a third embodiment will be described.

Here, depending on how the object to be detected by the object detection device is present, the return light 102 from multiple objects may overlap, and multiple overlapping light receiving signals may be included in the analog voltage signal output by the TIA circuit 3 (see FIG. 1). For example, a light receiving signal having multiple maximum voltage values may be included in the analog voltage signal.

In this case, it is preferable to detect object information at each of a number of times acquired corresponding to a number of local maximum voltages.

However, if the digital voltage signal converted by the ADC circuit 5 is approximated by, for example, a quadratic function, then only object information based on the time corresponding to one peak voltage can be detected. Furthermore, since object information is detected based on the time corresponding to a peak voltage resulting from the overlap of multiple maximum voltage values, accurate object information cannot be obtained.

In this embodiment, based on the comparison result by the CMP circuit 6 (comparison unit), information is obtained on the number of times that the light receiving signal included in the analog voltage signal (analog signal) becomes equal to or greater than the threshold value Th within a predetermined period. Then, the interpolation processing method for the digital voltage signal (digital signal) converted by the ADC circuit 5 (conversion unit) is determined according to the number of times.

For example, when the analog voltage signal contains a light receiving signal having two maximum voltage values, the method of approximating the digital voltage signal converted by the ADC circuit 5 with a quartic function is determined as the interpolation processing method. Then, using the interpolated data, object information is detected for each of a plurality of times acquired corresponding to the two maximum voltage values.

This makes it possible to accurately detect object information even when the return light 102 from multiple objects 200 overlaps and the analog voltage signal output by the TIA circuit 3 contains multiple overlapping light receiving signals.

<Example of functional configuration of signal processing circuit 7b>
The functional configuration of the signal processing circuit 7b included in the object detection device 100b will be described. Fig. 15 is a block diagram illustrating an example of the functional configuration of the signal processing circuit 7b. As shown in Fig. 15, the signal processing circuit 7b has a count acquisition unit 75, a determination unit 76, and an interpolation unit 71b.

The count acquisition unit 75 acquires information on the number of times that the light receiving signal included in the analog voltage signal output by the TIA circuit 3 becomes equal to or greater than the threshold value Th within a predetermined period of time based on the comparison result by the CMP circuit 6.

The determination unit 76 determines the interpolation processing method to be used by the interpolation unit 71b depending on the number of times information acquired by the number of times acquisition unit 75.

The interpolation unit 71b uses the interpolation processing method determined by the determination unit 76 to interpolate the analog voltage signal converted by the ADC circuit 5, and outputs the interpolated data to the acquisition unit 72.

The acquisition unit 72 outputs the object information acquired based on the interpolation data input from the interpolation unit 71b to an external device via the output unit 73.

<Example of processing by signal processing circuit 7b>
Next, the processing by the signal processing circuit 7b will be described with reference to Fig. 16. Fig. 16 is a flowchart showing an example of the processing by the signal processing circuit 7b. Fig. 16 shows the processing triggered by the time when the digital voltage signals converted by the ADC circuit 5 and the CMP circuit 6 are input to the signal processing circuit 7b.

First, in step S161, the count acquisition unit 75 determines whether the digital voltage signal output by the CMP circuit 6 includes a digital signal corresponding to the light receiving signal.

If it is determined in step S161 that it does (step S161, Yes), in step S162, the count acquisition unit 75 acquires information on the number of times that the light receiving signal included in the analog voltage signal output by the TIA circuit 3 became equal to or greater than the threshold value Th within a predetermined period based on the comparison result by the CMP circuit 6.

Next, in step S163, the determination unit 76 determines whether the number of times acquired by the number acquisition unit 75 is two or more.

If it is determined in step S163 that the number of times is two or more (Yes in step S163), the determination unit 76 determines the second interpolation processing method. Then, in step S164, the interpolation unit 71b uses the second interpolation processing method to interpolate the digital voltage signal into which the ADC circuit 5 has converted the analog voltage signal, and outputs the interpolated data to the acquisition unit 72. The second interpolation processing method is, for example, a method of approximating the digital voltage signal with an even-order function of fourth degree or higher.

On the other hand, if it is determined in step S163 that the number of times is not two or more (step S163, No), the determination unit 76 determines the first interpolation processing method. Then, in step S165, the interpolation unit 71b uses the first interpolation processing method to interpolate the digital voltage signal into which the ADC circuit 5 has converted the analog voltage signal, and outputs the interpolated data to the acquisition unit 72. The first interpolation processing method is, for example, a method of approximating the digital voltage signal with a quadratic function.

Next, in step S166, the acquisition unit 72 acquires object information based on the interpolation data input from the interpolation unit 71b.

Next, in step S167, the output unit 73 outputs the object information acquired by the acquisition unit 72 to an external device.

In this way, the signal processing circuit 7b can output object information acquired based on the digital voltage signal.

(Example of signal according to processing by signal processing circuit 7b)
Next, a signal corresponding to the processing by the signal processing circuit 7b will be described with reference to Fig. 17. Fig. 17 is a diagram for explaining an example of a signal corresponding to the processing by the signal processing circuit 7b. Fig. 17 illustrates a case where the peak voltage of the light receiving signal in the analog voltage signal output by the TIA circuit 3 is equal to or higher than the threshold value Th.

The threshold value Th in graph 171 of FIG. 17 is the threshold value that the CMP circuit 6 compares with the analog voltage signal 172. Graph 173 shows the digital voltage signal 174 that the CMP circuit 6 outputs as a result of comparing the analog voltage signal 172 with the threshold value Th.

As shown in graph 173, CMP circuit 6 outputs digital voltage signal 174 including information on the number of times analog voltage signal 172 becomes equal to or greater than threshold value Th within a predetermined period Tp. In the example shown in FIG. 17, analog voltage signal 172 becomes equal to or greater than threshold value Th twice within the predetermined period Tp, so digital voltage signal 174 includes two pulse-shaped voltage signals. Note that the predetermined period Tp is a period determined in advance according to the period during which light projecting unit 1 (see FIG. 1) projects laser light 101, etc.

The number acquisition unit 75 can acquire information on the number of times, ie, 2 times, based on the digital voltage signal 174, which is the comparison result by the CMP circuit 6. The determination unit 76 determines a method of approximation using a quartic function as the interpolation processing method, based on the number of times information acquired by the number acquisition unit 75, ie, 2 times.

Graph 175 shows the analog voltage signal 176 that is output by the TIA circuit 3 and input to the ADC circuit 5 after passing through the LPF circuit 4. The interpolation unit 71b performs an interpolation process that approximates the digital voltage signal into which the ADC circuit 5 converts the analog voltage signal 176 using a quartic function.

The interpolation unit 71b can use any function other than a quartic function in accordance with the waveform of the analog signal input to the ADC circuit 5. The analog voltage signal 176 input to the ADC circuit 5 can be considered as the sum of two analog signals with different times and amplitudes. Here, the analog signal input to the ADC circuit 5 based on the light reception signal from a single object becomes a signal like the graph 145 in FIG. 14, as shown in the second embodiment. The analog voltage signal 176 input to the ADC circuit 5 based on the light reception signals from two objects in the graph 175 in FIG. 17 is an analog signal obtained by adding up the light reception signals from the two objects.

When approximating the analog voltage signal resulting from the light reception signal from an object at a distance of 0 with a function f(t) (t is the time elapsed since the light was projected), the analog voltage signal resulting from the light reception signals from two objects can be expressed as a function g(t) = Af(t - τ ₁ ) + Bf(t - τ ₂ ), where τ ₁ and τ ₂ are the rise times of the two pulse-like voltage signals output by the CMP circuit _6, respectively, and A and _B are amounts corresponding to the ratio at which the intensity of the projected light is reduced due to the reflectance and distance of each of the two objects.

The function f(t) can be selected based on the analog voltage signal input to the ADC circuit 5 and the frequency characteristics of the LPF circuit 4, and can be, for example, a Gaussian function, a parabolic function, a sine function, or a function obtained by adding or multiplying these functions. Furthermore, it is effective to use a power series or a Fourier series, as this allows for more accurate approximation.

The interpolation unit 71b approximates the digital voltage signal (corresponding to the white circle in the graph 175 in FIG. 17) output by the ADC circuit 5 to a function g(t). The approximation can use a known calculation method such as the least squares method. At that time, the interpolation unit 71b uses τ ₁ and τ ₂ detected by the CMP circuit 6 as initial values for the approximation calculation, thereby improving the processing speed of the approximation calculation.

The interpolation unit 71b performs an interpolation process based on the function g(t) obtained by the approximation calculation. The interpolation unit 71b can output the interpolation data including the two maximum values 177 and 178 contained in the analog voltage signal 176 to the acquisition unit 72. Note that although the method of approximating a function has been described as a method of calculating the maximum values, center of gravity calculation or the like can be used as a simpler method of detecting the peak voltage.

The acquisition unit 72 can acquire two pieces of object information based on the times corresponding to the two maximum voltage values.

In this manner, the signal processing circuit 7b can interpolate the digital voltage signal, which is converted by the ADC circuit 5 and contains a plurality of maximum voltage values, and obtain object information based on the interpolated data.
<Functions and Effects of Object Detection Device 100b>

As described above, in this embodiment, based on the comparison result by the CMP circuit 6 (comparison unit), information is obtained on the number of times that the light receiving signal included in the analog voltage signal (analog signal) becomes equal to or greater than the threshold value Th within a predetermined period. Then, depending on this number, an interpolation processing method for the digital voltage signal (digital signal) converted by the ADC circuit 5 (conversion unit) is determined.

For example, when the analog voltage signal contains a light receiving signal having two maximum voltage values, the ADC circuit 5 determines an interpolation processing method that approximates the converted digital voltage signal with a quartic function, and detects object information at each of multiple times acquired corresponding to the two maximum voltage values.

This makes it possible to accurately detect object information even when the return light 102 from multiple objects 200 overlaps and the analog voltage signal output by the TIA circuit 3 contains multiple overlapping light receiving signals.

Other effects are the same as those of the above-mentioned embodiment.

[Fourth embodiment]
Next, a description will be given of a moving body according to the fourth embodiment. Here, the moving body refers to an object that can move.

Figure 18 is a diagram showing an example of the configuration of a moving body 400 equipped with an object detection device 100. The moving body 400 is an automated guided vehicle that automatically transports luggage to a destination. In Figure 18, the Z-axis direction indicates the direction of movement of the moving body 400, the X-axis direction indicates a specific direction in a plane perpendicular to the Z-axis, and the Y-axis direction indicates a direction perpendicular to the X-axis in a plane perpendicular to the Z-axis.

The object detection device 100 is attached to the front (positive Z-axis side) of the moving body 400 and acquires object information on the positive Z-axis side of the moving body 400. The output of the object detection device 100 makes it possible to detect object information such as obstacles on the positive Z-axis side of the moving body 400.

Next, FIG. 19 is a block diagram showing an example of the hardware configuration of a moving body 400. As shown in FIG. 19, the moving body 400 has an object detection device 100, a display device 30, a position control device 40, a memory 50, and a voice/alarm generation device 60. These are electrically connected via a bus 70 capable of transmitting signals and data.

In this embodiment, the travel management device 401 is configured by the object detection device 100, the display device 30, the position control device 40, the memory 50, and the voice/alarm generating device 60. The travel management device 401 is mounted on the moving body 400. The travel management device 401 is also electrically connected to the main controller 80 of the moving body 400.

The display device 30 is a display such as an LCD (Liquid Crystal Display) that displays the object information acquired by the object detection device 100 and various setting information related to the moving body 400. The position control device 40 is a calculation device such as a CPU that controls the position of the moving body 400 based on the object information acquired by the object detection device 100. The voice/alarm generation device 60 is a device such as a speaker that determines whether an obstacle can be avoided based on the object information acquired by the object detection device 100 and notifies surrounding personnel if it is determined that the obstacle cannot be avoided.

In this way, a moving body having the object detection device 100 can be provided. Other effects are the same as those described in the above-mentioned embodiment.

Movements on which the object detection device 100 is mounted are not limited to automated guided vehicles. For example, the moving objects include land moving objects capable of moving on land, such as automobiles, vehicles, trains, steam trains, or forklifts, aerial moving objects capable of moving in the air, such as airplanes, balloons, or drones, and water moving objects capable of moving on water, such as ships, marine vessels, steamships, or boats. The object detection device 100 can also be mounted not only on moving objects, but also on information terminals such as smartphones and tablets.

Although the embodiments have been described above, the present invention is not limited to the specifically disclosed embodiments above, and various modifications and variations are possible without departing from the scope of the claims.

The light projected by the object detection device 100 is not limited to laser light, but may be non-directional light. Electromagnetic waves with long wavelengths, such as radar, may also be used.

The embodiment also includes an object detection method. For example, the object detection method is an object detection method using an object detection device that detects at least one of the presence or absence of an object and the distance to the object, and includes the steps of projecting light, outputting an analog signal including a light reception signal of at least one of the reflected light or scattered light of the light by the object, expanding the time width of the light reception signal, converting the analog signal into a digital signal at a predetermined sampling frequency, and outputting object information including at least one of the presence or absence of the object and the distance to the object obtained based on the digital signal. Such an object detection method can achieve the same effect as the object detection device described above.

The embodiment also includes a program. For example, the program is a program that operates in an object detection device that detects at least one of the presence or absence of an object and the distance to the object, and causes a computer to execute a process of projecting light, outputting an analog signal including a light reception signal of at least one of the reflected light or scattered light of the light by the object, expanding the time width of the light reception signal, converting the analog signal into a digital signal at a predetermined sampling frequency, and outputting object information including at least one of the presence or absence of the object and the distance to the object obtained based on the digital signal. Such a program can provide the same effect as the object detection device described above.

The programs include not only those that run on an object detection device, but also those that run on a moving body equipped with an object detection device.

The ordinal numbers, quantities, and other numbers used in the description of the embodiments are all provided as examples to specifically explain the technology of the present invention, and the present invention is not limited to the exemplified numbers. In addition, the connections between the components are provided as examples to specifically explain the technology of the present invention, and do not limit the connections that realize the functions of the present invention.

The division of blocks in the functional block diagram is just one example, and multiple blocks may be realized as one block, one block may be divided into multiple blocks, and/or some functions may be transferred to other blocks. Furthermore, the functions of multiple blocks having similar functions may be processed in parallel or in a time-shared manner by a single piece of hardware or software.

1 Light-emitting unit 2 Light-receiving unit 3 TIA circuit 4 LPF circuit (an example of a magnifying unit, an example of a low-pass filter)
4c AMP circuit (an example of an enlarged section)
5. ADC circuit (an example of a conversion unit)
6 CMP circuit (an example of a comparison unit)
7 Signal processing circuit 71 Interpolation unit 72 Acquisition unit 73 Output unit 74 Period acquisition unit 75 Number acquisition unit 76 Determination unit 81p, 82p, 83p, 84p Time width of received light signal (an example of time width)
100 Object detection device 101 Laser light 102 Return light 200 Object Δs Sampling period T Time width td of received light signal ₂ Time width tt of received light signal converted by ADC circuit ₂ Fall time width Th of received light signal converted by ADC circuit Threshold To Target period Tp Predetermined period 400 Moving object

Patent No. 5590884

Claims (15)

An object detection device that detects at least one of the presence or absence of an object and the distance to the object,
a light projection unit that projects light;
a light receiving unit that outputs a first analog signal including a light receiving signal of at least one of reflected light and scattered light of the light by the object;
an expansion unit that expands a time width of the received light signal;
a conversion unit that converts a second analog signal including the light receiving signal whose time width has been expanded by the expansion unit into a digital signal at a predetermined sampling frequency;
and an output unit that outputs object information including at least one of the presence or absence of the object and the distance to the object obtained based on the digital signal. an interpolation unit that outputs interpolated data obtained by interpolating the digital signal;
The object detection device according to claim 1 , wherein the output unit outputs the object information acquired based on the interpolated data. the expansion unit has a low-pass filter having a predetermined cutoff frequency;
3. The object detection device according to claim 1, wherein the cutoff frequency is equal to or lower than twice the frequency corresponding to the reciprocal of the time width of the received light signal. the expansion unit has a low-pass filter having a predetermined cutoff frequency;
4. The object detection device according to claim 1, wherein a time width of the received light signal after passing through the low-pass filter is three times or more the reciprocal of the sampling frequency. a comparison unit that compares the first analog signal with a predetermined threshold and converts it into a digital signal;
5. The object detection device according to any one of claims 1 to 4, wherein the output unit outputs the object information obtained based on the digital signal converted by the comparison unit when the peak of the received light signal is greater than or equal to the threshold, and outputs the object information obtained based on the digital signal converted by the conversion unit when the peak is not greater than or equal to the threshold. a comparison unit that compares the first analog signal with a predetermined threshold and converts it into a digital signal;
a period acquisition unit that acquires information on a target period during which the light receiving signal is equal to or greater than the threshold value based on a comparison result by the comparison unit,
The object detection device according to claim 1 , wherein the output unit outputs the object information acquired based on the digital signal converted by the conversion unit during the target period. a comparison unit that compares the first analog signal with a predetermined threshold and converts it into a digital signal;
a count acquiring unit that acquires information on the number of times that the light receiving signal becomes equal to or greater than the threshold within a predetermined period based on a comparison result by the comparing unit;
an interpolation unit that outputs interpolated data obtained by interpolating the digital signal converted by the conversion unit;
a determination unit that determines an interpolation processing method to be performed by the interpolation unit in accordance with the number of times;
The object detection device according to claim 1 , wherein the output unit outputs the object information acquired based on the interpolated data. The object detection device according to any one of claims 5 to 7, wherein the bandwidth of the received light signal converted by the comparison unit is narrower than the bandwidth of the received light signal converted by the conversion unit. The object detection device according to any one of claims 5 to 7, wherein the time width of the light reception signal converted by the conversion unit is wider than the time width of the light reception signal converted by the comparison unit. The object detection device according to any one of claims 5 to 7, wherein the fall time width of the light receiving signal converted by the comparison unit is shorter than the fall time width of the light receiving signal converted by the conversion unit. The object detection device according to any one of claims 5 to 7, wherein the gain of the conversion unit is greater than the gain of the comparison unit. A moving body having an object detection device according to any one of claims 1 to 11. An object detection method using an object detection device that detects at least one of the presence or absence of an object and the distance to the object, the object detection device comprising:
projecting light;
outputting a first analog signal including a light receiving signal of at least one of reflected light and scattered light of the light by the object;
Expanding a time width of the received light signal;
converting a second analog signal including the light receiving signal expanded in the expanding step into a digital signal at a predetermined sampling frequency;
and outputting object information including at least one of the presence or absence of the object and the distance to the object, which is obtained based on the digital signal. A program that operates on an object detection device that detects at least one of the presence or absence of an object and the distance to the object,
Scattering light,
outputting a first analog signal including a light receiving signal of at least one of reflected light and scattered light of the light by the object;
Expanding the time width of the received light signal;
a step of converting a second analog signal including the expanded light receiving signal into a digital signal at a predetermined sampling frequency;
A program that causes a computer to execute a process of outputting object information including at least one of the presence or absence of the object and the distance to the object, which is obtained based on the digital signal. Outputting interpolated data obtained by interpolating the digital signal;
The program according to claim 14 , further comprising: outputting the object information obtained based on the interpolated data.

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