JP7450081B1 - Nitride semiconductor light emitting device - Google Patents

Abstract

The present invention provides a nitride semiconductor light emitting device that can improve light emission output when silicon is included in an active layer. A nitride semiconductor light emitting device has an n-type semiconductor layer containing Al, Ga and N, and a plurality of well layers containing Al, Ga and N formed on one side of the n-type semiconductor layer. The device includes an active layer having a multi-quantum well structure, and a p-type semiconductor layer formed on the side of the active layer opposite to the n-type semiconductor layer. Silicon is contained within the active layer. The half width of the X-ray rocking curve for the (10-12) plane of the n-type semiconductor layer is 812 arcsec or less. [Selection diagram] Figure 2

Description

The present invention relates to a nitride semiconductor light emitting device.

Patent Document 1 discloses a nitride semiconductor element having an n-type cladding layer formed of n-type AlGaN and an active layer formed of AlGaN. Patent Document 1 discloses that the light emitting output of a nitride semiconductor device is improved by setting the n-AlGaN mix value, which is the half width of the X-ray rocking curve for the (10-12) plane of the n-type cladding layer, to 500 arcsec or less. It has been disclosed that

JP 2019-121655 Publication

It has been newly discovered that when the active layer has a prerequisite configuration in which silicon is included, the relationship between the n-AlGaN mix value and the light emission output is different compared to the case where silicon is not included in the active layer. .

The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a nitride semiconductor light emitting device that can improve light emission output when silicon is included in the active layer.

In order to achieve the above object, the present invention includes an n-type semiconductor layer containing Al, Ga, and N, and a plurality of well layers containing Al, Ga, and N formed on one side of the n-type semiconductor layer. an active layer having a multi-quantum well structure, and a p-type semiconductor layer formed on a side of the active layer opposite to the n-type semiconductor layer, the active layer containing silicon; The half width of the X-ray rocking curve for the (10-12) plane of the n-type semiconductor layer is 812 arcsec or less, and the well layers of the plurality of well layers of the active layer are closer to the n-type semiconductor layer. A nitride semiconductor light emitting device having a high silicon concentration is provided.

According to the present invention, it is possible to provide a nitride semiconductor light emitting device that can improve light emission output when silicon is included in the active layer.

FIG. 1 is a schematic diagram schematically showing the configuration of a nitride semiconductor light emitting device in an embodiment. 7 is a graph showing the relationship between n-AlGaN mix value and light emission output in an experimental example.

[Embodiment]
An embodiment of the present invention will be described with reference to FIG. The embodiments described below are shown as preferred specific examples for carrying out the present invention, and some portions specifically illustrate various technical matters that are technically preferable. However, the technical scope of the present invention is not limited to this specific embodiment.

(Nitride semiconductor light emitting device 1)
FIG. 1 is a schematic diagram schematically showing the configuration of a nitride semiconductor light emitting device 1. As shown in FIG. Note that in FIG. 1, the dimensional ratio of each layer in the stacking direction of the nitride semiconductor light emitting device 1 (hereinafter also simply referred to as "light emitting device 1") does not necessarily match the actual one. Hereinafter, the stacking direction of each layer of the light emitting element 1 will be referred to as the vertical direction. Further, one side in the vertical direction, on which each semiconductor layer of the substrate 2 is grown (for example, the upper side in FIG. 1), is referred to as an upper side, and the opposite side (for example, the lower side in FIG. 1) is referred to as a lower side. Note that the expression "up and down" is for convenience, and does not limit the posture of the light emitting element 1 with respect to the vertical direction, for example, when the light emitting element 1 is used.

The light emitting element 1 is, for example, a light emitting diode (LED) or a semiconductor laser (LD). In this embodiment, the light emitting element 1 is a light emitting diode that emits light with a wavelength in the ultraviolet region. In particular, the light emitting element 1 of this embodiment emits ultraviolet light having a center wavelength of 250 nm or more and 365 nm or less. The light emitting element 1 can be used, for example, in fields such as sterilization (for example, air purification, water purification, etc.), medical care (for example, phototherapy, measurement/analysis, etc.), UV curing, and the like.

The light emitting device 1 includes, on a substrate 2, a buffer layer 3, an n-type cladding layer 4, a compositionally graded layer 5, an active layer 6, an electron block layer 7, and a p-type semiconductor layer 8 in this order. Furthermore, the light emitting element 1 includes an n-side electrode 11 provided on the n-type cladding layer 4 and a p-side electrode 12 provided on the p-type semiconductor layer 8.

As the semiconductor constituting the light emitting element 1, for example, Al _a Ga _b In _1-a-b N (0≦a≦1, 0≦b≦1, 0≦a+b≦1) 2 to 4 An element-based group III nitride semiconductor can be used. In this embodiment, a binary or ternary group III nitride semiconductor represented by Al _c Ga _1-c N (0≦c≦1) is used as a semiconductor constituting the light emitting element 1. . Some of these group III elements may be replaced with boron (B), thallium (Tl), or the like. Further, a portion of nitrogen may be replaced with phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), or the like.

The substrate 2 is made of a material that transmits the light emitted by the active layer 6. The substrate 2 is, for example, a sapphire (Al ₂ O ₃ ) substrate. The upper surface of the substrate 2 (that is, the surface on the side where each semiconductor layer of the light emitting element 1 is laminated) is a c-plane. This c-plane may have an off angle. Further, as the substrate 2, for example, an aluminum nitride (AlN) substrate, an aluminum gallium nitride (AlGaN) substrate, or the like may be used.

Buffer layer 3 is formed on substrate 2 . In this embodiment, the buffer layer 3 is made of aluminum nitride. Note that when the substrate 2 is an aluminum nitride substrate or an aluminum gallium nitride substrate, the buffer layer 3 does not necessarily need to be provided. Further, the buffer layer 3 may include a semiconductor layer made of undoped Al _p Ga _1-p N (0≦p≦1) formed on a semiconductor layer made of aluminum nitride.

The n-type cladding layer 4 is an n-type semiconductor layer formed on the buffer layer 3. The n-type cladding layer 4 is formed of, for example, Al _q Ga _1-q N (0≦q≦1) doped with an n-type impurity. In this embodiment, silicon (Si) is used as the n-type impurity. Note that germanium (Ge), selenium (Se), tellurium (Te), or the like may be used as the n-type impurity. The Al composition ratio q of the n-type cladding layer 4 is preferably, for example, 20% or more, and more preferably 25% or more and 70% or less. Note that the Al composition ratio is also referred to as the AlN mole fraction. The thickness of the n-type cladding layer 4 can be, for example, 1 μm or more and 4 μm or less.

Half-width of an X-ray rocking curve obtained by ω scanning of X-ray diffraction for the (10-12) plane of the n-type AlGaN crystal constituting the n-type cladding layer 4 (hereinafter also referred to as "n-AlGaN mix value") is less than or equal to 812 arcsec. The n-AlGaN mix value is an index indicating the crystal quality of the n-type cladding layer 4, and the lower the value, the better the crystal quality of the n-type cladding layer 4. As shown in the experimental examples described later, in the light emitting element 1 in which the active layer 6 includes silicon, the light emitting output is improved by setting the n-AlGaN mix value to 812 arcsec or less. From the viewpoint of further improving the light emission output, the n-AlGaN mix value is preferably 760 arcsec or less.

In this embodiment, the n-type cladding layer 4 has a single layer structure, but may have a multilayer structure. When the n-type cladding layer 4 has a multilayer structure, the n-AlGaN mix value of the semiconductor layer closest to the active layer 6 among the semiconductor layers constituting the n-type cladding layer 4 is 812 arcsec or less (preferably 760 arcsec). (below). The emission intensity of the active layer 6 depends on the crystallinity of the active layer 6, and the crystallinity of the active layer 6 depends on the crystallinity of the semiconductor layer closest to the active layer 6 among the plurality of semiconductor layers of the n-type cladding layer 4. This is because it is thought to depend on the

The compositionally graded layer 5 is formed on the n-type cladding layer 4 . The compositionally graded layer 5 is made of Al _r Ga _1-r N (0≦r≦1) doped with silicon. The Al composition ratio at each position in the vertical direction of the composition gradient layer 5 increases as the position approaches the active layer 6 side. Incidentally, in the composition gradient layer 5, the Al composition ratio does not increase toward the active layer 6 side, for example, in a very small region in the vertical direction (for example, 5% or less of the entire region in the vertical direction of the composition gradient layer 5). May include areas.

The composition gradient layer 5 has an Al composition ratio at its end on the n-type cladding layer 4 side that is approximately the same as the Al composition ratio at the end of the n-type cladding layer 4 on the composition gradient layer 5 side (for example, the difference is within 5%). ) is preferable. Further, the Al composition ratio of the end of the active layer 6 side of the composition gradient layer 5 is approximately the same as the Al composition ratio of the end of the active layer 6 on the composition gradient layer 5 side (for example, the difference is within 5%). It is preferable that there be. The thickness of the compositionally graded layer 5 can be, for example, 5 nm or more and 50 nm or less.

The active layer 6 is formed on the compositionally graded layer 5. The active layer 6 has a multiple quantum well structure having a plurality of well layers 621 to 623. The active layer 6 has a band gap adjusted so that it can emit ultraviolet light having a center wavelength of 250 nm or more and 365 nm or less.

In this embodiment, the active layer 6 has three barrier layers 61 and three well layers 621 to 623, and the barrier layers 61 and the well layers 621 to 623 are alternately stacked. In the active layer 6, a barrier layer 61 is located at the end on the composition gradient layer 5 side, and a well layer 623 is located at the end on the electron block layer 7 side. Note that the number of barrier layers 61 and the number of well layers 621 to 623 in the active layer 6 are not particularly limited as long as there are two or more well layers.

Each barrier layer 61 is formed of Al _s Ga _1-s N (0<s<1). The Al composition ratio s of each barrier layer 61 is, for example, 75% or more and 95% or less. Further, the thickness of each barrier layer 61 is, for example, 2 nm or more and 50 nm or less.

The well layers 621 to 623 are formed of Al _t Ga _1-t N (0<t<1). The Al composition ratio t of each well layer 621 to 623 is smaller than the Al composition ratio s of the barrier layer 61 (ie, t<s).

The three well layers 621 to 623 will be referred to as a first well layer 621, a second well layer 622, and a third well layer 623 in order from the compositionally graded layer 5 side. The thickness of the first well layer 621 is greater than the thickness of each of the second well layer 622 and the third well layer 623 by 1 nm or more. This flattens each layer of the active layer 6 and improves the monochromaticity of output light. The difference between the thickness of the first well layer 621 and the thickness of each of the second well layer 622 and the third well layer 623 is preferably 2 nm or more and 4 nm or less. In this embodiment, each of the second well layer 622 and the third well layer 623 has a thickness of 2 nm or more and 4 nm or less, and the first well layer 621 has a thickness of 4 nm or more and 6 nm or less.

Further, the Al composition ratio of the first well layer 621 is 2% or more higher than the Al composition ratio of each of the second well layer 622 and the third well layer 623. By making the Al composition ratio of the first well layer 621 larger than the Al composition ratio of each of the second well layer 622 and the third well layer 623, the crystallinity of the first well layer 621 is improved. This is because the difference in Al composition ratio between the first well layer 621 and the n-type cladding layer 4 becomes smaller. By improving the crystallinity of the first well layer 621, the crystallinity of each semiconductor layer formed on the first well layer 621 in the active layer 6 also improves. This improves carrier mobility in the active layer 6 and improves light emission output. This effect becomes more pronounced as the thickness of the first well layer 621 increases, but from the viewpoint of suppressing an increase in the electrical resistance value of the entire light emitting device 1, the thickness of the first well layer 621 is set to be less than or equal to a predetermined value. It is designed to be.

In this embodiment, each of the second well layer 622 and the third well layer 623 has an Al composition ratio of 25% to 45%, and the first well layer 621 has an Al composition ratio of 35% to 55%. has. The plurality of well layers 621 to 623 may be configured such that, for example, the closer to the composition gradient layer 5 the Al composition ratio becomes larger.

Active layer 6 contains silicon. As described later, in this embodiment, a silicon source is not supplied during the formation of the active layer 6, and the silicon present in each layer of the active layer 6 is diffused from the substrate 2 side rather than the active layer 6 of the light emitting element 1. It is something that Silicon in the active layer 6 is particularly easily incorporated into the positions in the vertical direction of the active layer 6 where the Al composition ratio is small, and also in the layers near the compositionally graded layer 5 among the layers of the active layer 6. They tend to be easily captured.

The silicon concentration of each barrier layer 61 increases as the layer is closer to the compositionally graded layer 5, and similarly, the silicon concentration of each well layer 621 to 623 increases as the layer is closer to the compositionally graded layer 5. In this embodiment, among the silicon concentrations of each layer of the active layer 6, the first well layer 621, which is the well layer closest to the n-type semiconductor layer among the plurality of well layers 621 to 623, has the highest silicon concentration. The maximum value of the silicon concentration distribution in the active layer 6 in the vertical direction is preferably 8.0×10 ¹⁸ atoms/cm ³ or more, and 1.0×10 ¹⁹ atoms/cm ³ or more and 6.0×10 ¹⁹ atoms/cm ³ The following are preferred. It has been confirmed that when the maximum value of the silicon concentration distribution of the active layer 6 in the vertical direction is within the above numerical range, the light emitting output of the light emitting element 1 is likely to be improved.

A plurality of pits (for example, so-called V pits) (not shown) are formed in the active layer 6. As will be described later, when manufacturing the light emitting device 1, a silicon source is supplied into the chamber before the active layer 6 is formed (specifically, after the composition gradient layer 5 is formed and before the active layer 6 is formed). As a result, the growth mode of the parent phase of the semiconductor layer changes, and pits are formed in the active layer 6. It is considered that the formation of pits in the active layer 6 facilitates the supply of holes from the p-type semiconductor layer 8 to the active layer 6 via the pits, thereby improving the light emission output of the light emitting element 1. Furthermore, it is considered that the inclusion of silicon in the active layer 6 tends to induce the formation of pits in the active layer 6.

An electron block layer 7 is formed on the active layer 6. The electron blocking layer 7 improves the efficiency of electron injection into the active layer 6 by suppressing the occurrence of an overflow phenomenon in which electrons leak from the active layer 6 to the p-type semiconductor layer 8 side (hereinafter also referred to as electron blocking effect). have a role. In this embodiment, the electron block layer 7 is formed of undoped Al _u Ga _1-u N (0.7≦u≦1). That is, the electron block layer 7 is composed of a semiconductor layer having an Al composition ratio u of 70% or more. The electron block layer 7 has a laminated structure in which a first electron block layer 71 and a second electron block layer 72 are laminated in order from the active layer 6 side. Note that the electronic block layer 7 may be formed of three or more layers.

The first electron blocking layer 71 is provided in contact with the active layer 6 . Among the plurality of semiconductor layers (the first electron block layer 71 and the second electron block layer 72 in this embodiment) that constitute the electron block layer 7 , the first electron block layer 71 is the same as the other semiconductor layers that constitute the electron block layer 7 . The Al composition ratio is higher than that of the semiconductor layer (ie, the second electron block layer 72) and the barrier layer 61. The Al composition ratio of the first electron block layer 71 is, for example, 90% or more, and may be 100% (that is, the first electron block layer 71 may be made of AlN). The thickness of the first electron block layer 71 is, for example, 0.5 nm or more and 5.0 nm or less.

The Al composition ratio of the second electron block layer 72 is smaller than the Al composition ratio of the first electron block layer 71, for example, 70% or more and 90% or less. The thickness of the second electron block layer 72 is larger than the thickness of the first electron block layer 71, and is, for example, 15 nm or more and 100 nm or less.

Since a semiconductor layer with a higher Al composition ratio has a higher electrical resistance value, if the thickness of the first electron blocking layer 71 having a relatively high Al composition ratio is made too thick, the overall electrical resistance value of the light emitting element 1 will increase excessively. invite. Therefore, it is preferable that the thickness of the first electron blocking layer 71 be reduced to some extent. On the other hand, if the thickness of the first electron blocking layer 71 is reduced, the probability that electrons will pass through the first electron blocking layer 71 from the active layer 6 side to the p-type semiconductor layer 8 side may increase due to the tunnel effect. Therefore, in the light emitting device 1 of this embodiment, the second electron block layer 72 is formed on the first electron block layer 71 to suppress electrons from passing through the entire electron block layer 7.

Each of the first electron blocking layer 71 and the second electron blocking layer 72 includes an undoped layer, a layer containing an n-type impurity, a layer containing a p-type impurity, or a layer containing both an n-type impurity and a p-type impurity. It can be a layer. Magnesium (Mg) can be used as the p-type impurity, but in addition to magnesium, zinc (Zn), beryllium (Be), calcium (Ca), strontium (Sr), barium (Ba), or carbon (C ) etc. may be used. The same applies to other semiconductor layers containing p-type impurities. In the case where each electron block layer 7 contains an impurity, the impurity contained in each electron block layer 7 may be contained in the entirety of each electron block layer 7, or may be contained in a part of each electron block layer 7. It may be Moreover, the electronic block layer 7 may be formed of a single layer, may be formed of three or more layers, or may be omitted.

Silicon may be included between the electron block layer 7 and the p-type semiconductor layer 8. Magnesium is easily attracted to silicon, and hydrogen is easily bonded to magnesium, but the presence of silicon between the electron blocking layer 7 and the p-type semiconductor layer 8 prevents the flow from the p-type semiconductor layer 8 to the active layer 6. Diffusion of magnesium and hydrogen is suppressed, and the life of the light emitting element 1 is extended. Furthermore, since silicon is included between the electron block layer 7 and the p-type semiconductor layer 8, a layer in which pits exist can be formed between the electron block layer 7 and the p-type semiconductor layer 8. Since pits are formed by supplying a silicon source to locations where dislocations exist, the formation of pits suppresses the propagation of dislocations above the pits, resulting in a long life of the light emitting element 1. will be promoted.

P-type semiconductor layer 8 is formed on electron block layer 7 . The p-type semiconductor layer 8 is formed of p-type Al _v Ga _1-v N (0≦v<0.7). That is, the p-type semiconductor layer 8 is composed of a semiconductor layer having an Al composition ratio of less than 70%.

P-type semiconductor layer 8 has a p-type contact layer. The p-type contact layer is a layer to which the p-side electrode 12 is connected, and is formed of Al _v Ga _1-v N (0≦v<0.7) doped with a high concentration of p-type impurities. The p-type contact layer is configured to have a low Al composition ratio in order to realize ohmic contact with the p-side electrode 12, and from this point of view, it is preferably formed of p-type gallium nitride (GaN). Since a p-type semiconductor layer made of gallium nitride easily absorbs ultraviolet light, the thickness of the p-type contact layer is preferably 30 nm or less in order to prevent absorption of ultraviolet light and improve the light emitting output of the light emitting element 1. preferable. Further, from the viewpoint of suppressing the occurrence of short circuits, the thickness of the p-type contact layer is preferably 5 nm or more.

The p-type semiconductor layer 8 may further include a p-type cladding layer on the electron block layer 7 side of the p-type contact layer. The p-type cladding layer is made of p-type AlGaN with an Al composition ratio of less than 70%. The p-type cladding layer may be composed of, for example, a single layer or a plurality of layers. When the p-type cladding layer is composed of multiple layers, for example, the p-type cladding layer includes a first p-type cladding layer formed on the second electron block layer 72 side, and a first p-type cladding layer and a p-type contact layer. A second p-type cladding layer may be formed between the first and second p-type cladding layers. The Al composition ratio at each position in the vertical direction of the second p-type cladding layer may be made smaller as the position approaches the p-type contact layer. The second p-type cladding layer has, for example, a very small region in the vertical direction (for example, 5% or less of the entire region in the vertical direction of the second p-type cladding layer), and the Al composition ratio increases toward the p-type contact layer. It may also include an area that does not grow. The Al composition ratio of the end of the second p-type cladding layer on the first p-type cladding layer side is approximately the same as the Al composition ratio of the end of the first p-type cladding layer on the second p-type cladding layer side (for example, the difference is 5 % or less) is preferable. Further, the Al composition ratio of the end of the second p-type cladding layer on the p-type contact layer side is approximately the same as the Al composition ratio of the end of the p-type contact layer on the second p-type cladding layer side (for example, the difference is 5 % or less) is preferable.

In the light emitting element 1, the total optical film thickness of the semiconductor layers (i.e., the electron block layer 7 and the p-type semiconductor layer 8) existing above the active layer 6 is the same as the total optical thickness of the semiconductor layers (i.e., the electron block layer 7 and the p-type semiconductor layer 8) that are emitted upward from the active layer 6 and It is preferable to design the optical film thickness such that the light reflected by the active layer 12 and directed downward and the light directly emitted downward from the active layer 6 strengthen each other. When the center wavelength of the light emitted from the active layer 6 is the wavelength λ [nm], for example, the total optical thickness of the semiconductor layers present above the active layer 6 is 0.5λ or more and 1.4λ or less. It is preferably 0.5λ or more and 0.8λ or less, more preferably 1.0λ or more and 1.3λ or less, even more preferably 0.5λ or more and 0.8λ or less.

The n-side electrode 11 is formed on an exposed surface 41 formed above the n-type cladding layer 4 and exposed from the active layer 6 . The n-side electrode 11 can be, for example, a multilayer film in which titanium (Ti), aluminum, titanium, and gold (Au) are laminated in this order on the n-type cladding layer 4. Further, when the light emitting element 1 is flip-chip mounted as described below, the n-side electrode 11 may be made of a material that can reflect ultraviolet light emitted by the active layer 6.

The p-side electrode 12 is formed on the upper surface of the p-type semiconductor layer 8. The p-side electrode 12 can be made of, for example, indium tin oxide (ITO). Furthermore, when the light emitting element 1 is flip-chip mounted as described below, the p-side electrode 12 may be made of a material that can reflect ultraviolet light emitted by the active layer 6.

The light emitting element 1 can be used by being flip-chip mounted on a package substrate (not shown). That is, in the light emitting element 1, the side on which the n-side electrode 11 and the p-side electrode 12 are provided in the vertical direction faces the package substrate side, and each of the n-side electrode 11 and the p-side electrode 12 is connected through a gold bump or the like. Mounted on the package board. Light is extracted from the flip-chip mounted light emitting element 1 from the substrate 2 side. Note that the present invention is not limited to this, and the light emitting element 1 may be mounted on the package substrate by wire bonding or the like. Further, in this embodiment, the light emitting element 1 is a so-called horizontal light emitting element 1 in which both the n-side electrode 11 and the p-side electrode 12 are provided above the light emitting element 1, but the invention is not limited to this, and the light emitting element 1 is a vertical type. The light emitting element 1 may be the same. The vertical light emitting element 1 is a light emitting element 1 in which an active layer 6 is sandwiched between an n-side electrode 11 and a p-side electrode 12. Note that when the light emitting element 1 is of a vertical type, the substrate 2 and the buffer layer 3 are preferably removed by laser lift-off or the like.

(Method for manufacturing light emitting element 1)
Next, an example of a method for manufacturing the light emitting element 1 of this embodiment will be described.
In this embodiment, a buffer layer 3, an n-type cladding layer 4, a compositionally graded layer 5, and an active layer 6 are formed on a disk-shaped substrate 2 by metal organic chemical vapor deposition (MOCVD). , an electron block layer 7 and a p-type semiconductor layer 8 are epitaxially grown in sequence. That is, in this embodiment, a disk-shaped substrate 2 is placed in a pocket of a susceptor placed in a chamber, and source gases for each semiconductor layer to be formed on the substrate 2 are introduced into the chamber. Each semiconductor layer is formed thereon. Note that the MOCVD method is sometimes called metal organic vapor phase epitaxy (MOVPE).

Raw material gases for epitaxial growth of each layer include trimethylaluminum (TMA) as an aluminum source, trimethylgallium (TMG) as a gallium source, ammonia (NH ₃ ) as a nitrogen source, tetramethylsilane (TMSi) as a silicon source, and magnesium source. As such, biscyclopentadienylmagnesium (Cp ₂ Mg) can be used.

In the method for manufacturing the light emitting device 1 of this embodiment, a silicon source is not supplied into the chamber during the formation of the active layer 6, and the silicon supplied before the formation of the active layer 6 is diffused into the active layer 6. In this embodiment, for example, when forming the n-type cladding layer 4, when forming the compositionally graded layer 5, and immediately before forming the active layer 6 (that is, after forming the compositionally graded layer 5 and forming the active layer 6), (before), a silicon source is supplied into the chamber. Immediately before forming the active layer 6, only a silicon source is supplied as a raw material gas into the chamber, and this step is hereinafter referred to as a "silicon source supply step." In the silicon source supply step, it is sufficient that only the silicon source is supplied into the chamber as the raw material gas, and a gas other than the raw material gas (for example, a carrier gas such as hydrogen) may be introduced into the chamber. For example, by adjusting the amount of silicon source supplied in the silicon source supply step, the amount of silicon contained in each layer of the active layer 6 is adjusted. Furthermore, in the silicon source supply step, by supplying a silicon source to a location where dislocations exist, the growth mode of the parent phase of the semiconductor layer changes, and pits are formed when the active layer 6 is formed.

In addition, as for manufacturing conditions such as growth temperature, growth pressure, and growth time for epitaxially growing each semiconductor layer of the wafer, conditions depending on the configuration of each semiconductor layer can be appropriately adopted.

Note that when epitaxially growing each semiconductor layer on the substrate 2, other epitaxial growth methods such as molecular beam epitaxy (MBE) and hydride vapor phase epitaxy (HVPE) may also be used. It is possible.

After each semiconductor layer is formed on the disk-shaped substrate 2, a mask is formed on a portion of the p-type semiconductor layer 8, that is, a portion other than the portion that will become the exposed surface 41 of the n-type cladding layer 4. Then, the region where the mask is not formed is removed by etching from the upper surface of the p-type semiconductor layer 8 to the middle of the n-type cladding layer 4 in the vertical direction. As a result, an exposed surface 41 exposed upward is formed in the n-type cladding layer 4. After forming the exposed surface 41, the mask is removed.

Next, an n-side electrode 11 is formed on the exposed surface 41 of the n-type cladding layer 4, and a p-side electrode 12 is formed on the p-type semiconductor layer 8. The n-side electrode 11 and the p-side electrode 12 may be formed, for example, by a well-known method such as an electron beam evaporation method or a sputtering method. By cutting the product completed as described above into desired dimensions, a plurality of light emitting devices 1 as shown in FIG. 1 are manufactured from one wafer.

(Actions and effects of embodiments)
In the light emitting device 1 of this embodiment, the half-width of the X-ray rocking curve for the (10-12) plane of the n-type cladding layer 4 (that is, the n-AlGaN mix value) is 812 arcsec or less, and in the active layer 6, Contains silicon. As a result, the light emitting output of the light emitting element 1 is improved, as shown in an experimental example described later. Thus, it is a new finding that in the light emitting element 1 in which silicon is included in the active layer 6, the light emitting output is improved by setting the n-AlGaN mix value to 812 arcsec or less.

Further, it is preferable that the n-AlGaN mix value satisfies 760 arcsec or less. In this case, as shown in the experimental examples described later, it is easier to improve the light emission output.

Furthermore, among the plurality of well layers 621 to 623 of the active layer 6, the closer the well layers 621 to 623 are to the n-type cladding layer 4, the higher the silicon concentration. It has been confirmed that with such a configuration, the light emission output of the light emitting element 1 can be easily improved. Such a configuration can be easily realized by forming a compositionally graded layer 5 containing silicon between the n-type cladding layer 4 and the active layer 6. That is, since silicon is diffused from the compositionally graded layer 5 toward the active layer 6 side, it is easier to realize a structure in which the well layers 621 to 623 closer to the n-type cladding layer 4 have a higher silicon concentration.

Further, the maximum value of the silicon concentration distribution in the active layer 6 in the vertical direction is 8.0×10 ¹⁸ atoms/cm ³ or more. It has been confirmed that this makes it easier to improve the light emission output of the light emitting element 1.

Further, the p-type semiconductor layer 8 has a p-type contact layer formed of p-type GaN, and the film thickness of the p-type contact layer is 30 nm or less. The p-type contact layer made of p-type GaN easily absorbs ultraviolet light, but by reducing the thickness of the p-type contact layer to 30 nm or less, the absorption of ultraviolet light is suppressed and the light emission output of the light emitting element 1 is reduced. This will lead to improvements in

As described above, according to this embodiment, it is possible to provide a nitride semiconductor light emitting device that can improve light emission output when silicon is included in the active layer.

[Experiment example]
This experimental example shows the n-AlGaN mix value and the light emitting output in Comparative Examples 1 to 14, which involve wafers that do not contain silicon in the active layer, and Examples 1 to 461, which involve wafers that contain silicon in the active layer. This is an example of evaluating the relationship between Note that, among the terms used in this experimental example and later, the same terms as those used in the previous embodiments represent the same content as in the previous embodiments, unless otherwise specified.

Comparative Examples 1 to 14 are wafers having the same basic configuration as the light emitting element shown in the embodiment mode, except that the composition gradient layer is not included and the active layer does not contain silicon. Comparative Examples 1 to 14 have the same basic configurations except that the n-AlGaN mix values are different.

Examples 1 to 344 of Examples 1 to 461 are wafers having the same basic configuration as Comparative Examples 1 to 14 except that the active layer contains silicon. Examples 1 to 344 have similar configurations except that the n-AlGaN mix values are different from each other.

Among Examples 1 to 461, Examples 345 to 461 are different from Examples 1 to 344 in that silicon is contained between the electron block layer and the p-type semiconductor layer, and the structure of the p-type semiconductor layer is different. It's a wafer. Examples 345 to 461 have similar configurations except that the n-AlGaN mix values are different.

The structures of Comparative Examples 1 to 14, the film thickness of each layer, the Al composition ratio of each layer, and the silicon concentration of each layer are shown in Table 1 below. Further, the structures of Examples 1 to 344, the film thickness of each layer, the Al composition ratio of each layer, and the silicon concentration of each layer are shown in Table 2 below. Further, the structure of Examples 345 to 461, the film thickness of each layer, the Al composition ratio of each layer, and the silicon concentration of each layer are shown in Table 3 below.

The film thickness of each layer listed in Tables 1 to 3 was measured using a transmission electron microscope (TEM). Further, the Al composition ratio of each layer listed in Tables 1 to 3 is a value estimated from the secondary ion intensity of Al measured by secondary ion mass spectrometry (SIMS). The Al composition ratio column of the compositionally graded layer in Tables 2 and 3 shows that the Al composition ratio at each position in the vertical direction of the compositionally graded layer varies from 55% to 85% from the n-type cladding layer side to the active layer side. It represents what you are doing. Similarly, the Al composition ratio column of the second p-type cladding layer in Table 3 shows that the Al composition ratio at each position in the vertical direction of the second p-type cladding layer is as follows from the first p-type cladding layer side to the p-type contact layer side. This shows that it fluctuates from 55% to 0%. Furthermore, the silicon concentrations of each layer listed in Tables 1 to 3 were obtained using secondary ion mass spectrometry. In each of Tables 1 to 3, the locations marked with "*" in the Si concentration column mean that the semiconductor layer is thin and it is difficult to accurately measure the silicon concentration. Furthermore, in the column of Si concentration in Tables 1 to 3, the notation "BG" means the background level. The background level silicon concentration is the silicon concentration that would be detected without doping silicon.

In this experimental example, the light emission output was measured for each of Comparative Examples 1 to 14 and Examples 1 to 461 when a current of 20 mA was applied in an on-wafer state. The light emission output was measured using a photodetector installed on the substrate side of each wafer of Comparative Examples 1 to 14 and Examples 1 to 461. FIG. 2 shows the relationship between the n-AlGaN mix value and the light emission output for each of Comparative Examples 1 to 14 and Examples 1 to 461. In FIG. 2, the results of Comparative Examples 1 to 14 are plotted with triangle symbols, the results of Examples 1 to 344 are plotted with square symbols, and the results of Examples 345 to 461 are plotted with circle symbols. plotting. In FIG. 2, the plots with square symbols overlap and the plots with circle symbols overlap, but the results of Examples 1 to 344 (i.e., the plots with square symbols) show that the light emission output is 1.00 [ a. u. ] ~ 1.50 [a. u. ], and the results of Examples 345 to 461 (that is, plots with circle symbols) show that the luminescence output is 1.50 [a. u. ] The above requirements are met.

As can be seen from FIG. 2, looking at the results of Comparative Examples 1 to 14 in which silicon is not included in the active layer, it can be seen that it is preferable to set the n-AlGaN mix value to 500 arcsec or less from the viewpoint of improving light emission output. This result is similar to the result shown in FIG. 3 of JP-A-2019-121655. In other words, it can be seen that the experimental example related to FIG. 3 of JP-A-2019-121655 is a result of using a light emitting element in which the active layer does not contain silicon.

On the other hand, as can be seen from FIG. 2, looking at the results of Examples 1 to 461 in which silicon was included in the active layer, it was found that high light emitting output was obtained in the region where the n-AlGaN mix value was 812 arcsec or less. I understand. In other words, in a light emitting device containing silicon in the active layer, unlike Comparative Examples 1 to 14, even if the n-AlGaN mix value exceeds 500 arcsec, the n-AlGaN mix value is 812 arcsec or less. It can be seen that high light emission output can be obtained if the following conditions are satisfied.

Here, among the plots with circle symbols in FIG. 2 (that is, the results of Examples 345 to 461), plot P1 with the highest n-AlGaN mix value has an n-AlGaN mix value of 812.1 arcsec, and regarding this result It can be seen that the light emission output is relatively low. Therefore, it can be seen that in the configurations in which silicon is included in the active layer (ie, Examples 1 to 461), it is necessary to set the n-AlGaN mix value to 812 arcsec or less in order to improve the light emission output.

Plot P2 among the plots with square symbols (ie, the results of Examples 1 to 344) is the result with the highest n-AlGaN mix value among the plots with square symbols that have high luminous output. Since the n-AlGaN value in plot P2 was 760.0 arcsec, it can be seen that in a configuration in which silicon is included in the active layer, it is more preferable to set the n-AlGaN mix value to 760 arcsec or less.

Further, when the results of Examples 1 to 344 are compared with the results of Examples 345 to 461, it can be seen that Examples 345 to 461 have higher light emission output. The main reason for this is thought to be that the thickness of the p-type contact layer in Examples 345-461 was thinner than in Examples 1-344, and the absorption of ultraviolet light by the p-type contact layer was suppressed. It will be done.

Note that among Examples 1 to 344, the one with the smallest n-AlGaN mix value was 394.2 arcsec, and among Examples 345 to 461, the one with the smallest n-AlGaN mix value was 406.5 arcsec. . The smaller the n-AlGaN mix value (that is, the higher the crystal quality of the n-type cladding layer), the higher the light emission output tends to be. It is assumed that the light emission output will be the same or improved compared to No. 1 to No. 461.

(Summary of embodiments)
Next, technical ideas understood from the embodiments described above will be described using reference numerals and the like in the embodiments. However, each reference numeral in the following description does not limit the constituent elements in the claims to those specifically shown in the embodiments.

[1] The first embodiment of the present invention includes an n-type semiconductor layer 4 containing Al, Ga, and N, and a plurality of layers containing Al, Ga, and N formed on one side of the n-type semiconductor layer 4. an active layer 6 having a multi-quantum well structure having well layers 621 to 623; and a p-type semiconductor layer 8 formed on a side of the active layer 6 opposite to the n-type semiconductor layer 4, The half width of the X-ray rocking curve for the (10-12) plane of the semiconductor layer 4 is 812 arcsec or less, and the active layer 6 includes silicon in the nitride semiconductor light emitting device 1.
Thereby, in the nitride semiconductor light emitting device 1 in which silicon is included in the active layer 6, the light emitting output can be improved.

[2] A second embodiment of the present invention is that in the first embodiment, the half width is 760 arcsec or less.
Thereby, in the nitride semiconductor light emitting device 1 in which silicon is included in the active layer 6, the light emission output is further improved.

[3] In the third embodiment of the present invention, in the first or second embodiment, the plurality of well layers 621 to 623 of the active layer 6 are the well layers 621 to 623 close to the n-type semiconductor layer 4. The higher the number is 623, the higher the silicon concentration.
This further improves the light emission output of the nitride semiconductor light emitting device 1.

[4] A fourth embodiment of the present invention is a silicon concentration distribution of the active layer 6 in the stacking direction of the n-type semiconductor layer 4, the active layer 6, and the p-type semiconductor layer 8 in the third embodiment. The maximum value of is 8.0×10 ¹⁸ atoms/cm ³ or more.
This further improves the light emission output of the nitride semiconductor light emitting device 1.

[5] In the fifth embodiment of the present invention, in the third or fourth embodiment, the Al composition is increased between the n-type semiconductor layer 4 and the active layer 6, the closer the position is to the active layer 6 side. As the ratio becomes higher, a compositionally graded layer 5 containing silicon is formed.
Thereby, the configuration of the third embodiment can be easily realized.

[6] In a sixth embodiment of the present invention, in any one of the first to fifth embodiments, the p-type semiconductor layer 8 has a p-type contact layer formed of p-type GaN. , the p-type contact layer has a thickness of 30 nm or less.
This further improves the light emission output of the nitride semiconductor light emitting device 1.

(Additional note)
Although the embodiments of the present invention have been described above, the embodiments described above do not limit the invention according to the claims. Furthermore, it should be noted that not all combinations of features described in the embodiments are essential for solving the problems of the invention. Moreover, the present invention can be implemented with appropriate modifications within a range that does not depart from the spirit thereof.

1...Nitride semiconductor light emitting device 4...n-type cladding layer (n-type semiconductor layer)
5... Gradient composition layer 6... Active layer 621... First well layer 622... Second well layer 623... Third well layer 8... P-type semiconductor layer

Claims (5)

an n-type semiconductor layer containing Al, Ga and N;
an active layer having a multi-quantum well structure formed on one side of the n-type semiconductor layer and having a plurality of well layers containing Al, Ga, and N;
a p-type semiconductor layer formed on a side opposite to the n-type semiconductor layer side of the active layer,
The active layer contains silicon,
The half width of the X-ray rocking curve for the (10-12) plane of the n-type semiconductor layer is 812 arcsec or less,
In the plurality of well layers of the active layer, the closer the well layer is to the n-type semiconductor layer, the higher the silicon concentration.
Nitride semiconductor light emitting device. The half width is 760 arcsec or less,
The nitride semiconductor light emitting device according to claim 1. The maximum value of the silicon concentration distribution of the active layer in the stacking direction of the n-type semiconductor layer, the active layer, and the p-type semiconductor layer is 8.0×10 ¹⁸ atoms/cm ³ or more,
The nitride semiconductor light emitting device according to claim 1 or 2 . A composition gradient layer is formed between the n-type semiconductor layer and the active layer, the Al composition ratio increases toward the active layer, and the composition gradient layer contains silicon.
The nitride semiconductor light emitting device according to claim 1 or 2 . The p-type semiconductor layer has a p-type contact layer formed of p-type GaN,
The p-type contact layer has a thickness of 30 nm or less,
The nitride semiconductor light emitting device according to claim 1 or 2.

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