JP2024121935A - Nitride semiconductor light emitting device - Google Patents

Abstract

The present invention provides a nitride semiconductor light emitting device capable of improving the light emission output when silicon is contained in an active layer.
[Solution] The nitride semiconductor light emitting element includes an n-type semiconductor layer containing Al, Ga, and N, an active layer formed on one side of the n-type semiconductor layer and having a multiple quantum well structure with a plurality of well layers containing Al, Ga, and N, and a p-type semiconductor layer formed on the active layer opposite to the n-type semiconductor layer side. Silicon is contained in the active layer. The half width of the X-ray rocking curve for the (10-12) plane of the n-type semiconductor layer is 812 arcsec or less.
[Selected figure] Figure 2

Description

The present invention relates to a nitride semiconductor light-emitting device.

Patent Document 1 discloses a nitride semiconductor device having an n-type cladding layer formed of n-type AlGaN and an active layer formed of AlGaN. Patent Document 1 discloses that the light emission output of the nitride semiconductor device is improved by setting the n-AlGaN mix value, which is the half-width of the X-ray rocking curve for the (10-12) plane of the n-type cladding layer, to 500 arcsec or less.

JP 2019-121655 A

It has been newly discovered that when the active layer has a prerequisite configuration in which silicon is included, the relationship between the n-AlGaN mix value and the light emission output is different compared to when the active layer does not contain silicon.

The present invention has been made in consideration of the above circumstances, and aims to provide a nitride semiconductor light-emitting element that can improve the light emission output when silicon is contained in the active layer.

To achieve the above object, the present invention provides a nitride semiconductor light-emitting device comprising an n-type semiconductor layer containing Al, Ga, and N, an active layer having a multiple quantum well structure formed on one side of the n-type semiconductor layer and having multiple well layers containing Al, Ga, and N, and a p-type semiconductor layer formed on the active layer opposite to the n-type semiconductor layer side, in which the half-width of the X-ray rocking curve for the (10-12) plane of the n-type semiconductor layer is 812 arcsec or less, and the active layer contains silicon.

The present invention makes it possible to provide a nitride semiconductor light-emitting element that can improve the light emission output when silicon is contained in the active layer.

1 is a schematic diagram illustrating a configuration of a nitride semiconductor light emitting device according to an embodiment. 1 is a graph showing the relationship between the n-AlGaN mix value and the light emission output in an experimental example.

[Embodiment]
An embodiment of the present invention will be described with reference to Fig. 1. Note that the embodiment described below is shown as a preferred specific example for carrying out the present invention, and while there are some parts that specifically exemplify various technical matters that are technically preferable, the technical scope of the present invention is not limited to this specific embodiment.

(Nitride Semiconductor Light Emitting Device 1)
FIG. 1 is a schematic diagram showing the configuration of a nitride semiconductor light-emitting element 1. In FIG. 1, the dimensional ratio of each layer in the stacking direction of the nitride semiconductor light-emitting element 1 (hereinafter, also simply referred to as "light-emitting element 1") does not necessarily match the actual one. Hereinafter, the stacking direction of each layer of the light-emitting element 1 is referred to as the up-down direction. Also, one side in the up-down direction, on which each semiconductor layer of the substrate 2 is grown (e.g., the upper side in FIG. 1), is referred to as the upper side, and the opposite side (e.g., the lower side in FIG. 1) is referred to as the lower side. Note that the expressions up and down are for convenience and do not limit the attitude of the light-emitting element 1 with respect to the vertical direction, for example, when the light-emitting element 1 is used.

The light-emitting element 1 is, for example, a light-emitting diode (LED) or a semiconductor laser (LD). In this embodiment, the light-emitting element 1 is a light-emitting diode that emits light with a wavelength in the ultraviolet region. In particular, the light-emitting element 1 in this embodiment emits ultraviolet light with a central wavelength of 250 nm or more and 365 nm or less. The light-emitting element 1 can be used in fields such as sterilization (e.g., air purification, water purification, etc.), medical care (e.g., phototherapy, measurement/analysis, etc.), UV curing, etc.

The light-emitting element 1 includes a buffer layer 3, an n-type cladding layer 4, a composition-graded layer 5, an active layer 6, an electron blocking layer 7, and a p-type semiconductor layer 8, which are arranged in this order on a substrate 2. The light-emitting element 1 also includes an n-side electrode 11 provided on the n-type cladding layer 4, and a p-side electrode 12 provided on the p-type semiconductor layer 8.

As the semiconductor constituting the light-emitting element 1, for example, a binary to quaternary group III nitride semiconductor represented by Al _a Ga _b In _1-a-b N (0≦a≦1, 0≦b≦1, 0≦a+b≦1) can be used. In this embodiment, as the semiconductor constituting the light-emitting element 1, a binary or ternary group III nitride semiconductor represented by Al _c Ga _1-c N (0≦c≦1) is used. Some of these group III elements may be replaced with boron (B), thallium (Tl), or the like. In addition, some of the nitrogen may be replaced with phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), or the like.

The substrate 2 is made of a material that transmits the light emitted by the active layer 6. The substrate 2 is, for example, a sapphire (Al ₂ O ₃ ) substrate. The upper surface of the substrate 2 (i.e., the surface on which the semiconductor layers of the light-emitting element 1 are stacked) is a c-plane. This c-plane may have an off-angle. Alternatively, for example, an aluminum nitride (AlN) substrate or an aluminum gallium nitride (AlGaN) substrate may be used as the substrate 2.

The buffer layer 3 is formed on the substrate 2. In this embodiment, the buffer layer 3 is made of aluminum nitride. When the substrate 2 is an aluminum nitride substrate or an aluminum gallium nitride substrate, the buffer layer 3 does not necessarily have to be provided. The buffer layer 3 may also include a semiconductor layer made of undoped Al _p Ga _1-p N (0≦p≦1) formed on a semiconductor layer made of aluminum nitride.

The n-type cladding layer 4 is an n-type semiconductor layer formed on the buffer layer 3. The n-type cladding layer 4 is formed of, for example, Al _q Ga _1-q N (0≦q≦1) doped with n-type impurities. In this embodiment, silicon (Si) is used as the n-type impurity. Note that germanium (Ge), selenium (Se), tellurium (Te), or the like may also be used as the n-type impurity. The Al composition ratio q of the n-type cladding layer 4 is preferably, for example, 20% or more, and more preferably, 25% or more and 70% or less. Note that the Al composition ratio is also referred to as the AlN mole fraction. The thickness of the n-type cladding layer 4 can be, for example, 1 μm or more and 4 μm or less.

The half-width of the X-ray rocking curve obtained by ω-scanning of X-ray diffraction for the (10-12) plane of the n-type AlGaN crystal constituting the n-type cladding layer 4 (hereinafter also referred to as the "n-AlGaN mix value") is 812 arcsec or less. The n-AlGaN mix value is an index showing the crystal quality of the n-type cladding layer 4, and the lower the value, the better the crystal quality of the n-type cladding layer 4. As shown in the experimental example described later, in a light-emitting device 1 containing silicon in the active layer 6, the light emission output is improved by setting the n-AlGaN mix value to 812 arcsec or less. From the viewpoint of further improving the light emission output, the n-AlGaN mix value is preferably 760 arcsec or less.

In this embodiment, the n-type cladding layer 4 has a single-layer structure, but may have a multi-layer structure. When the n-type cladding layer 4 has a multi-layer structure, the n-AlGaN mix value of the semiconductor layer that is closest to the active layer 6 among the semiconductor layers that make up the n-type cladding layer 4 is set to 812 arcsec or less (preferably 760 arcsec or less). This is because it is considered that the emission intensity of the active layer 6 depends on the crystallinity of the active layer 6, and that the crystallinity of the active layer 6 depends on the crystallinity of the semiconductor layer that is closest to the active layer 6 among the multiple semiconductor layers of the n-type cladding layer 4.

The composition gradient layer 5 is formed on the n-type cladding layer 4. The composition gradient layer 5 is made of silicon-doped Al _r Ga _1-r N (0≦r≦1). The Al composition ratio at each position in the vertical direction of the composition gradient layer 5 increases toward the active layer 6. Note that the composition gradient layer 5 may include a region in which the Al composition ratio does not increase toward the active layer 6, for example, in a very small region in the vertical direction (for example, a region of 5% or less of the entire vertical direction of the composition gradient layer 5).

It is preferable that the Al composition ratio of the end of the composition gradient layer 5 on the n-type cladding layer 4 side is approximately the same (e.g., within 5% difference) as the Al composition ratio of the end of the composition gradient layer 5 side in the n-type cladding layer 4. It is also preferable that the Al composition ratio of the end of the composition gradient layer 5 on the active layer 6 side is approximately the same (e.g., within 5% difference) as the Al composition ratio of the end of the composition gradient layer 5 side in the active layer 6. The film thickness of the composition gradient layer 5 can be, for example, 5 nm or more and 50 nm or less.

The active layer 6 is formed on the compositionally graded layer 5. The active layer 6 has a multiple quantum well structure having multiple well layers 621-623. The band gap of the active layer 6 is adjusted so that it can emit ultraviolet light with a central wavelength of 250 nm or more and 365 nm or less.

In this embodiment, the active layer 6 has three barrier layers 61 and three well layers 621 to 623, and the barrier layers 61 and the well layers 621 to 623 are alternately stacked. In the active layer 6, the barrier layer 61 is located at the end on the composition gradient layer 5 side, and the well layer 623 is located at the end on the electron blocking layer 7 side. The number of barrier layers 61 and the number of well layers 621 to 623 in the active layer 6 are not particularly limited as long as there are two or more well layers.

Each barrier layer 61 is made of Al _s Ga _1-s N (0<s<1). The Al composition ratio s of each barrier layer 61 is, for example, 75% to 95%. The thickness of each barrier layer 61 is, for example, 2 nm to 50 nm.

The well layers 621 to 623 are made of Al _t Ga _1-t N (0<t<1). The Al composition ratio t of each of the well layers 621 to 623 is smaller than the Al composition ratio s of the barrier layer 61 (that is, t<s).

The three well layers 621 to 623 are referred to as the first well layer 621, the second well layer 622, and the third well layer 623, in that order from the composition gradient layer 5 side. The film thickness of the first well layer 621 is 1 nm or more larger than the film thicknesses of the second well layer 622 and the third well layer 623. This flattens each layer of the active layer 6, improving the monochromaticity of the output light. It is preferable that the difference between the film thickness of the first well layer 621 and the film thicknesses of the second well layer 622 and the third well layer 623 is 2 nm or more and 4 nm or less. In this embodiment, each of the second well layer 622 and the third well layer 623 has a film thickness of 2 nm or more and 4 nm or less, and the first well layer 621 has a film thickness of 4 nm or more and 6 nm or less.

The Al composition ratio of the first well layer 621 is 2% or more greater than the Al composition ratios of the second well layer 622 and the third well layer 623. By making the Al composition ratio of the first well layer 621 greater than the Al composition ratios of the second well layer 622 and the third well layer 623, the crystallinity of the first well layer 621 is improved. This is because the difference in the Al composition ratio between the first well layer 621 and the n-type cladding layer 4 is reduced. By improving the crystallinity of the first well layer 621, the crystallinity of each semiconductor layer formed on the first well layer 621 of the active layer 6 is also improved. This improves the mobility of carriers in the active layer 6 and improves the light emission output. This effect is more pronounced as the film thickness of the first well layer 621 increases, but the film thickness of the first well layer 621 is designed to be equal to or less than a predetermined value in order to suppress an increase in the electrical resistance value of the entire light-emitting element 1.

In this embodiment, the second well layer 622 and the third well layer 623 each have an Al composition ratio of 25% to 45%, and the first well layer 621 has an Al composition ratio of 35% to 55%. The multiple well layers 621 to 623 may be configured such that the Al composition ratio is greater on the composition gradient layer 5 side, for example.

The active layer 6 contains silicon. As described below, in this embodiment, no silicon source is supplied during the formation of the active layer 6, and the silicon present in each layer of the active layer 6 is diffused from the substrate 2 side of the active layer 6 of the light-emitting element 1. Silicon in the active layer 6 is particularly likely to be incorporated into positions in the active layer 6 in the vertical direction where the Al composition ratio is small, and also tends to be incorporated into layers of the active layer 6 that are close to the composition gradient layer 5.

The silicon concentration of each barrier layer 61 is greater in the layer closer to the composition gradient layer 5, and similarly, the silicon concentration of each well layer 621-623 is greater in the layer closer to the composition gradient layer 5. In this embodiment, among the silicon concentrations of each layer of the active layer 6, the first well layer 621, which is the well layer closest to the n-type semiconductor layer among the multiple well layers 621-623, has the highest silicon concentration. The maximum value of the silicon concentration distribution of the active layer 6 in the vertical direction is preferably 8.0×10 ¹⁸ atoms/cm ³ or more, and preferably 1.0×10 ¹⁹ atoms/cm ³ or more and 6.0×10 ¹⁹ atoms/cm ³ or less. It has been confirmed that when the maximum value of the silicon concentration distribution of the active layer 6 in the vertical direction is in the above-mentioned numerical range, the light emission output of the light emitting element 1 is likely to be improved.

In the active layer 6, a plurality of pits (for example, so-called V pits) (not shown) are formed. As described later, when manufacturing the light-emitting element 1, a silicon source is supplied into the chamber before the active layer 6 is formed (specifically, after the composition gradient layer 5 is formed and before the active layer 6 is formed), which changes the growth mode of the parent phase of the semiconductor layer and forms pits in the active layer 6. The formation of pits in the active layer 6 makes it easier for holes to be supplied from the p-type semiconductor layer 8 to the active layer 6 through the pits, which is thought to improve the light emission output of the light-emitting element 1. In addition, the inclusion of silicon in the active layer 6 is thought to make it easier to induce the formation of pits in the active layer 6.

The electron blocking layer 7 is formed on the active layer 6. The electron blocking layer 7 has a role of improving the efficiency of electron injection into the active layer 6 by suppressing the occurrence of an overflow phenomenon in which electrons leak from the active layer 6 to the p-type semiconductor layer 8 side (hereinafter, also referred to as the electron blocking effect). In this embodiment, the electron blocking layer 7 is formed of undoped Al _u Ga _1-u N (0.7≦u≦1). That is, the electron blocking layer 7 is composed of a semiconductor layer with an Al composition ratio u of 70% or more. The electron blocking layer 7 has a layered structure in which a first electron blocking layer 71 and a second electron blocking layer 72 are layered in this order from the active layer 6 side. The electron blocking layer 7 may be formed of three or more layers.

The first electron block layer 71 is provided so as to be in contact with the active layer 6. Of the multiple semiconductor layers (in this embodiment, the first electron block layer 71 and the second electron block layer 72) constituting the electron block layer 7, the first electron block layer 71 has a higher Al composition ratio than the other semiconductor layers (i.e., the second electron block layer 72) constituting the electron block layer 7 and the barrier layer 61. The Al composition ratio of the first electron block layer 71 is, for example, 90% or more, and may be 100% (i.e., the first electron block layer 71 may be composed of AlN). The film thickness of the first electron block layer 71 is, for example, 0.5 nm or more and 5.0 nm or less.

The Al composition ratio of the second electron blocking layer 72 is smaller than that of the first electron blocking layer 71, for example, 70% to 90%. The film thickness of the second electron blocking layer 72 is larger than that of the first electron blocking layer 71, for example, 15 nm to 100 nm.

Since the electrical resistance value increases with the Al composition ratio of the semiconductor layer, if the thickness of the first electron blocking layer 71, which has a relatively high Al composition ratio, is made too thick, the overall electrical resistance value of the light-emitting element 1 will increase excessively. Therefore, it is preferable to make the thickness of the first electron blocking layer 71 small to a certain extent. On the other hand, if the thickness of the first electron blocking layer 71 is made small, the probability that electrons will pass through the first electron blocking layer 71 from the active layer 6 side to the p-type semiconductor layer 8 side due to the tunnel effect may increase. Therefore, in the light-emitting element 1 of this embodiment, the second electron blocking layer 72 is formed on the first electron blocking layer 71 to prevent electrons from passing through the entire electron blocking layer 7.

Each of the first electron block layer 71 and the second electron block layer 72 can be an undoped layer, a layer containing n-type impurities, a layer containing p-type impurities, or a layer containing both n-type impurities and p-type impurities. Magnesium (Mg) can be used as the p-type impurity, but zinc (Zn), beryllium (Be), calcium (Ca), strontium (Sr), barium (Ba), carbon (C), etc. can also be used. The same applies to other semiconductor layers containing p-type impurities. When each electron block layer 7 contains an impurity, the impurity contained in each electron block layer 7 may be contained in the entirety of each electron block layer 7, or may be contained in a part of each electron block layer 7. In addition, the electron block layer 7 may be formed as a single layer, may be formed as three or more layers, or may be omitted.

Silicon may be included between the electron blocking layer 7 and the p-type semiconductor layer 8. Magnesium is easily attracted to silicon, and hydrogen is easily bonded to magnesium. The presence of silicon between the electron blocking layer 7 and the p-type semiconductor layer 8 suppresses the diffusion of magnesium and hydrogen from the p-type semiconductor layer 8 to the active layer 6, thereby extending the life of the light-emitting element 1. Furthermore, the presence of silicon between the electron blocking layer 7 and the p-type semiconductor layer 8 may form a layer in which pits exist between the electron blocking layer 7 and the p-type semiconductor layer 8. The pits are formed by supplying a silicon source to a location where dislocations exist, and the formation of the pits suppresses the progression of dislocations above the pits, thereby extending the life of the light-emitting element 1.

The p-type semiconductor layer 8 is formed on the electron blocking layer 7. The p-type semiconductor layer 8 is made of p-type Al _v Ga _1-v N (0≦v<0.7). That is, the p-type semiconductor layer 8 is composed of a semiconductor layer with an Al composition ratio of less than 70%.

The p-type semiconductor layer 8 has a p-type contact layer. The p-type contact layer is a layer to which the p-side electrode 12 is connected, and is formed of Al _v Ga _1-v N (0≦v<0.7) doped with a high concentration of p-type impurities. The p-type contact layer is configured to have a low Al composition ratio in order to realize ohmic contact with the p-side electrode 12, and from this viewpoint, it is preferable to form the p-type contact layer from p-type gallium nitride (GaN). Since a semiconductor layer made of p-type gallium nitride is prone to absorbing ultraviolet light, from the viewpoint of preventing the absorption of ultraviolet light and improving the light emission output of the light-emitting element 1, the thickness of the p-type contact layer is preferably 30 nm or less. Moreover, from the viewpoint of suppressing the occurrence of a short circuit, the thickness of the p-type contact layer is preferably 5 nm or more.

The p-type semiconductor layer 8 may further include a p-type cladding layer on the electron block layer 7 side of the p-type contact layer. The p-type cladding layer is composed of p-type AlGaN with an Al composition ratio of less than 70%. The p-type cladding layer may be composed of, for example, a single layer, or may be composed of multiple layers. When the p-type cladding layer is composed of multiple layers, for example, the p-type cladding layer may have a first p-type cladding layer formed on the second electron block layer 72 side, and a second p-type cladding layer formed between the first p-type cladding layer and the p-type contact layer. The Al composition ratio at each position in the vertical direction of the second p-type cladding layer may be smaller toward the p-type contact layer side. In addition, the second p-type cladding layer may include a region in which the Al composition ratio does not increase toward the p-type contact layer, for example, in a very small region in the vertical direction (for example, a region of 5% or less of the entire vertical direction of the second p-type cladding layer). It is preferable that the Al composition ratio of the end of the second p-type cladding layer on the first p-type cladding layer side is approximately the same (e.g., within 5% difference) as the Al composition ratio of the end of the first p-type cladding layer on the second p-type cladding layer side. It is also preferable that the Al composition ratio of the end of the second p-type cladding layer on the p-type contact layer side is approximately the same (e.g., within 5% difference) as the Al composition ratio of the end of the p-type contact layer on the second p-type cladding layer side.

It is preferable to design the total optical thickness of the semiconductor layers (i.e., the electron blocking layer 7 and the p-type semiconductor layer 8) present above the active layer 6 in the light-emitting element 1 so that the light emitted from the active layer 6 to the upper side and reflected by the p-side electrode 12 to the lower side and the light emitted directly from the active layer 6 to the lower side are mutually intensified. When the central wavelength of the light emitted from the active layer 6 is the wavelength λ [nm], for example, the total optical thickness of the semiconductor layers present above the active layer 6 is preferably 0.5λ or more and 1.4λ or less, more preferably 0.5λ or more and 0.8λ or less, or more preferably 1.0λ or more and 1.3λ or less, and even more preferably 0.5λ or more and 0.8λ or less.

The n-side electrode 11 is formed on the surface of the exposed surface 41 that is formed on the upper side of the n-type cladding layer 4 and is exposed from the active layer 6. The n-side electrode 11 can be, for example, a multilayer film in which titanium (Ti), aluminum, titanium, and gold (Au) are laminated in this order on the n-type cladding layer 4. In addition, when the light-emitting element 1 is flip-chip mounted as described below, the n-side electrode 11 may be made of a material that can reflect ultraviolet light emitted by the active layer 6.

The p-side electrode 12 is formed on the upper surface of the p-type semiconductor layer 8. The p-side electrode 12 can be made of, for example, indium tin oxide (ITO). In addition, when the light-emitting element 1 is flip-chip mounted as described below, the p-side electrode 12 may be made of a material capable of reflecting ultraviolet light emitted by the active layer 6.

The light-emitting element 1 can be used by being flip-chip mounted on a package substrate (not shown). That is, the side of the light-emitting element 1 on which the n-side electrode 11 and the p-side electrode 12 are provided in the vertical direction faces the package substrate, and each of the n-side electrode 11 and the p-side electrode 12 is mounted on the package substrate via a gold bump or the like. In the flip-chip mounted light-emitting element 1, light is extracted from the substrate 2 side. However, this is not limited to this, and the light-emitting element 1 may be mounted on the package substrate by wire bonding or the like. In this embodiment, the light-emitting element 1 is a so-called horizontal light-emitting element 1 in which both the n-side electrode 11 and the p-side electrode 12 are provided on the upper side of the light-emitting element 1, but this is not limited to this, and the light-emitting element 1 may be a vertical light-emitting element 1. The vertical light-emitting element 1 is a light-emitting element 1 in which the active layer 6 is sandwiched between the n-side electrode 11 and the p-side electrode 12. When the light-emitting element 1 is a vertical type, it is preferable to remove the substrate 2 and the buffer layer 3 by laser lift-off or the like.

(Method of manufacturing light-emitting element 1)
Next, an example of a method for manufacturing the light-emitting element 1 of this embodiment will be described.
In this embodiment, a buffer layer 3, an n-type cladding layer 4, a composition gradient layer 5, an active layer 6, an electron blocking layer 7, and a p-type semiconductor layer 8 are epitaxially grown in sequence on a disk-shaped substrate 2 by metal organic chemical vapor deposition (MOCVD). That is, in this embodiment, the disk-shaped substrate 2 is placed in a pocket of a susceptor disposed in a chamber, and the source gases of each semiconductor layer formed on the substrate 2 are introduced into the chamber to form each semiconductor layer on the substrate 2. The MOCVD method is sometimes called metal organic chemical vapor phase epitaxy (MOVPE).

The source gases for epitaxially growing each layer can be trimethylaluminum (TMA) as an aluminum source, trimethylgallium (TMG) as a gallium source, ammonia ( _NH3 ) as a nitrogen source, tetramethylsilane (TMSi) as a silicon source, and biscyclopentadienylmagnesium ( _Cp2Mg ) as a magnesium source.

In the manufacturing method of the light-emitting element 1 of this embodiment, the silicon source is not supplied into the chamber when the active layer 6 is formed, and silicon supplied before the active layer 6 is diffused into the active layer 6. In this embodiment, for example, the silicon source is supplied into the chamber when the n-type cladding layer 4 is formed, when the composition gradient layer 5 is formed, and immediately before the active layer 6 is formed (i.e., after the composition gradient layer 5 is formed and before the active layer 6 is formed). Just before the active layer 6 is formed, only the silicon source is supplied into the chamber as a raw material gas, and this process is hereinafter referred to as the "silicon source supply process". In the silicon source supply process, it is sufficient that only the silicon source is supplied into the chamber as a raw material gas, and gases other than the raw material gas (e.g., carrier gas such as hydrogen) may be introduced into the chamber. For example, the amount of silicon source supplied in the silicon source supply process is adjusted to adjust the amount of silicon contained in each layer of the active layer 6. In addition, in the silicon source supply process, the silicon source is supplied to a location where dislocations exist, changing the growth mode of the mother phase of the semiconductor layer, and pits are formed when the active layer 6 is formed.

Other manufacturing conditions, such as growth temperature, growth pressure, and growth time for epitaxially growing each semiconductor layer of the wafer, can be appropriately selected according to the configuration of each semiconductor layer.

When epitaxially growing each semiconductor layer on the substrate 2, other epitaxial growth methods such as molecular beam epitaxy (MBE) and hydride vapor phase epitaxy (HVPE) can also be used.

After each semiconductor layer is formed on the disk-shaped substrate 2, a mask is formed on a portion of the p-type semiconductor layer 8, i.e., on the portion other than the portion that will become the exposed surface 41 of the n-type cladding layer 4. The area where the mask is not formed is then removed by etching from the top surface of the p-type semiconductor layer 8 to the middle of the n-type cladding layer 4 in the vertical direction. As a result, an exposed surface 41 that is exposed toward the upper side is formed on the n-type cladding layer 4. After the exposed surface 41 is formed, the mask is removed.

Next, an n-side electrode 11 is formed on the exposed surface 41 of the n-type cladding layer 4, and a p-side electrode 12 is formed on the p-type semiconductor layer 8. The n-side electrode 11 and the p-side electrode 12 may be formed by a well-known method such as an electron beam deposition method or a sputtering method. The above completed product is cut into desired dimensions, and multiple light-emitting elements 1 as shown in FIG. 1 are manufactured from one wafer.

(Functions and Effects of the Embodiments)
In the light-emitting device 1 of this embodiment, the half-width of the X-ray rocking curve for the (10-12) plane of the n-type cladding layer 4 (i.e., the n-AlGaN mix value) is 812 arcsec or less, and silicon is contained in the active layer 6. This improves the light emission output of the light-emitting device 1, as shown in the experimental example described later. In this way, it is a new finding that the light emission output is improved by setting the n-AlGaN mix value to 812 arcsec or less in the light-emitting device 1 containing silicon in the active layer 6.

In addition, it is preferable that the n-AlGaN mix value is 760 arcsec or less. In this case, it is easier to improve the light emission output, as shown in the experimental example described later.

In addition, among the multiple well layers 621-623 of the active layer 6, the closer the well layers 621-623 are to the n-type cladding layer 4, the higher the silicon concentration. It has been confirmed that this configuration makes it easier to improve the light output of the light-emitting element 1. This configuration can be easily realized by forming a compositionally graded layer 5 containing silicon between the n-type cladding layer 4 and the active layer 6. In other words, because silicon is diffused from the compositionally graded layer 5 to the active layer 6 side, it is easier to realize a configuration in which the well layers 621-623 closer to the n-type cladding layer 4 have a higher silicon concentration.

Moreover, the maximum value of the silicon concentration distribution in the active layer 6 in the vertical direction is 8.0×10 ¹⁸ atoms/cm ³ or more. It has been confirmed that this makes it easier to improve the light emission output of the light emitting element 1 .

The p-type semiconductor layer 8 also has a p-type contact layer made of p-type GaN, and the thickness of the p-type contact layer is 30 nm or less. A p-type contact layer made of p-type GaN is prone to absorbing ultraviolet light, so by making the thickness of the p-type contact layer thin, to 30 nm or less, the absorption of ultraviolet light is suppressed, and the light output of the light-emitting element 1 is improved.

As described above, according to this embodiment, when silicon is contained in the active layer, it is possible to provide a nitride semiconductor light-emitting element that can improve the light emission output.

[Experimental Example]
This experimental example is an example in which the relationship between the n-AlGaN mix value and the light emission output is evaluated in Comparative Examples 1 to 14 relating to wafers not containing silicon in the active layer and Examples 1 to 461 relating to wafers containing silicon in the active layer. Note that, among the terms used in this experimental example and the following, those that are the same as those used in the above-mentioned embodiments have the same meanings as those in the above-mentioned embodiments, unless otherwise specified.

Comparative examples 1 to 14 are wafers that have the same basic configuration as the light-emitting device shown in the embodiment, except that they do not have a composition gradient layer and the active layer does not contain silicon. Comparative examples 1 to 14 have the same basic configuration, except that they have different n-AlGaN mix values.

Of Examples 1 to 461, Examples 1 to 344 are wafers with the same basic configuration as Comparative Examples 1 to 14, except that the active layer contains silicon. Examples 1 to 344 have the same configuration, except that the n-AlGaN mix values are different.

Among Examples 1 to 461, Examples 345 to 461 are wafers in which silicon is included between the electron blocking layer and the p-type semiconductor layer and the configuration of the p-type semiconductor layer is different from Examples 1 to 344. Examples 345 to 461 have similar configurations to each other, except that the n-AlGaN mix values are different.

The structures, thicknesses of each layer, Al composition ratios of each layer, and silicon concentrations of each layer for Comparative Examples 1 to 14 are shown in Table 1 below. The structures, thicknesses of each layer, Al composition ratios of each layer, and silicon concentrations of each layer for Examples 1 to 344 are shown in Table 2 below. The structures, thicknesses of each layer, Al composition ratios of each layer, and silicon concentrations of each layer for Examples 345 to 461 are shown in Table 3 below.

The thickness of each layer listed in Tables 1 to 3 was measured by a transmission electron microscope (TEM). The Al composition ratio of each layer listed in Tables 1 to 3 is a value estimated from the secondary ion intensity of Al measured by secondary ion mass spectrometry (SIMS). The column of Al composition ratio of the composition gradient layer in Tables 2 and 3 indicates that the Al composition ratio at each position in the vertical direction of the composition gradient layer varies from 55% to 85% from the n-type cladding layer side to the active layer side. Similarly, the column of Al composition ratio of the second p-type cladding layer in Table 3 indicates that the Al composition ratio at each position in the vertical direction of the second p-type cladding layer varies from 55% to 0% from the first p-type cladding layer side to the p-type contact layer side. The silicon concentration of each layer listed in Tables 1 to 3 was obtained using secondary ion mass spectrometry. In each of Tables 1 to 3, the "*" mark in the Si concentration column indicates that the semiconductor layer is thin and accurate measurement of the silicon concentration is difficult. In addition, in the Si concentration columns of Tables 1 to 3, the notation "BG" means background level. The background level silicon concentration is the silicon concentration detected when silicon is not doped.

In this experimental example, the light output was measured for each of Comparative Examples 1 to 14 and Examples 1 to 461 when a current of 20 mA was applied in an on-wafer state. The light output was measured using a photodetector installed on the substrate side of each of the wafers of Comparative Examples 1 to 14 and Examples 1 to 461. The relationship between the n-AlGaN mix value and the light output for each of Comparative Examples 1 to 14 and Examples 1 to 461 is shown in FIG. 2. In FIG. 2, the results of Comparative Examples 1 to 14 are plotted with triangular symbols, the results of Examples 1 to 344 are plotted with square symbols, and the results of Examples 345 to 461 are plotted with circle symbols. Note that in FIG. 2, the plots of square symbols overlap each other, and the plots of circle symbols overlap each other, but the results of Examples 1 to 344 (i.e., the plots of square symbols) show a light output of 1.00 [a.u.] to 1.50 [a.u.]. ] range, and the results of Examples 345 to 461 (i.e., the plots with circles) meet the light output of 1.50 [a.u.] or more.

As can be seen from Figure 2, the results of Comparative Examples 1 to 14, in which the active layer does not contain silicon, show that setting the n-AlGaN mix value to 500 arcsec or less is preferable from the perspective of improving light emission output. This result is similar to the result shown in Figure 3 of JP 2019-121655 A. In other words, it can be seen that the experimental example related to Figure 3 of JP 2019-121655 A is the result of using a light-emitting device that does not contain silicon in the active layer.

On the other hand, as can be seen from Figure 2, looking at the results of Examples 1 to 461 in which silicon was included in the active layer, it can be seen that high light emission output was obtained in the region in which the n-AlGaN mix value was 812 arcsec or less. In other words, unlike Comparative Examples 1 to 14, it can be seen that in light-emitting devices that contain silicon in the active layer, even if the n-AlGaN mix value exceeds 500 arcsec, high light emission output can be obtained as long as the n-AlGaN mix value is 812 arcsec or less.

Here, among the plots marked with circles in Figure 2 (i.e., the results of Examples 345 to 461), plot P1, which has the highest n-AlGaN mix value, has an n-AlGaN mix value of 812.1 arcsec, and it can be seen that this result results in a relatively low light output. Therefore, in configurations in which silicon is included in the active layer (i.e., Examples 1 to 461), it can be seen that in order to improve the light output, it is necessary to set the n-AlGaN mix value to 812 arcsec or less.

Furthermore, among the plots marked with square symbols (i.e., the results of Examples 1 to 344), plot P2 is the result with the highest n-AlGaN mix value among the plots marked with square symbols that have high light output. Since the n-AlGaN value of plot P2 was 760.0 arcsec, it can be seen that in configurations in which silicon is included in the active layer, it is more preferable to set the n-AlGaN mix value to 760 arcsec or less.

In addition, when comparing the results of Examples 1 to 344 with the results of Examples 345 to 461, it can be seen that Examples 345 to 461 achieved higher light emission output. This is thought to be largely due to the fact that, compared to Examples 1 to 344, Examples 345 to 461 had a thinner p-type contact layer, which reduced the absorption of ultraviolet light by the p-type contact layer.

Among Examples 1 to 344, the smallest n-AlGaN mix value was 394.2 arcsec, and among Examples 345 to 461, the smallest n-AlGaN mix value was 406.5 arcsec. Since there is a tendency for the light emission output to improve as the n-AlGaN mix value decreases (i.e., the crystal quality of the n-type cladding layer increases), it is expected that those with a smaller n-AlGaN mix value than Examples 1 to 461 will have the same or improved light emission output compared to Examples 1 to 461.

(Summary of the embodiment)
Next, the technical ideas grasped from the above-described embodiment will be described by using the reference numerals and the like in the embodiment. However, the reference numerals and the like in the following description do not limit the components in the claims to the members and the like specifically shown in the embodiment.

[1] A first embodiment of the present invention is a nitride semiconductor light-emitting element 1 comprising an n-type semiconductor layer 4 containing Al, Ga, and N, an active layer 6 of a multiple quantum well structure formed on one side of the n-type semiconductor layer 4 and having a plurality of well layers 621-623 containing Al, Ga, and N, and a p-type semiconductor layer 8 formed on the active layer 6 opposite to the n-type semiconductor layer 4 side, wherein a half-width of an X-ray rocking curve for a (10-12) plane of the n-type semiconductor layer 4 is 812 arcsec or less, and silicon is contained within the active layer 6.
This makes it possible to improve the light emission output in the nitride semiconductor light emitting device 1 in which silicon is contained in the active layer 6 .

[2] A second embodiment of the present invention is the first embodiment, in which the half width is 760 arcsec or less.
This further improves the light emission output in the nitride semiconductor light emitting device 1 in which silicon is contained in the active layer 6 .

[3] A third embodiment of the present invention is the first or second embodiment, wherein the multiple well layers 621-623 of the active layer 6 have a higher silicon concentration as the well layers 621-623 are closer to the n-type semiconductor layer 4.
This further improves the light emission output of the nitride semiconductor light emitting element 1 .

[4] A fourth embodiment of the present invention is the third embodiment, wherein a maximum value of the silicon concentration distribution in the active layer 6 in the stacking direction of the n-type semiconductor layer 4, the active layer 6, and the p-type semiconductor layer 8 is 8.0× ¹⁰ atoms/ ^cm3 or more.
This further improves the light emission output of the nitride semiconductor light emitting element 1 .

[5] A fifth embodiment of the present invention is the third or fourth embodiment, in which a composition gradient layer 5 is formed between the n-type semiconductor layer 4 and the active layer 6, the composition gradient layer 5 having an Al composition ratio that increases toward the active layer 6 and that contains silicon.
This makes it possible to easily realize the configuration of the third embodiment.

[6] A sixth embodiment of the present invention is any one of the first to fifth embodiments, in which the p-type semiconductor layer 8 has a p-type contact layer formed of p-type GaN, and the thickness of the p-type contact layer is 30 nm or less.
This further improves the light emission output of the nitride semiconductor light emitting element 1 .

(Additional Note)
Although the embodiment of the present invention has been described above, the invention according to the claims is not limited to the above embodiment. It should be noted that not all of the combinations of features described in the embodiment are essential to the means for solving the problems of the invention. The present invention can be modified and implemented as appropriate without departing from the spirit of the invention.

1...Nitride semiconductor light emitting element 4...n-type cladding layer (n-type semiconductor layer)
5... composition gradient layer 6... active layer 621... first well layer 622... second well layer 623... third well layer 8... p-type semiconductor layer

In order to achieve the above-mentioned object, the present invention provides a nitride semiconductor light-emitting device comprising: an n-type semiconductor layer containing Al, Ga, and N; an active layer of a multiple quantum well structure formed on one side of the n-type semiconductor layer and having a plurality of well layers containing Al, Ga, and N; and a p-type semiconductor layer formed on the active layer on the side opposite to the n-type semiconductor layer, wherein the active layer contains silicon, a half-width of an X-ray rocking curve for a (10-12) plane of the n-type semiconductor layer is 812 arcsec or less, and the plurality of well layers of the active layer have a higher silicon concentration the closer they are to the n-type semiconductor layer .

Claims (6)

an n-type semiconductor layer containing Al, Ga, and N;
an active layer having a multiple quantum well structure formed on one side of the n-type semiconductor layer and having a plurality of well layers containing Al, Ga, and N;
a p-type semiconductor layer formed on the active layer on the opposite side to the n-type semiconductor layer side,
Silicon is included in the active layer,
The half-width of the X-ray rocking curve for the (10-12) plane of the n-type semiconductor layer is 812 arcsec or less.
Nitride semiconductor light emitting element. The half width is 760 arcsec or less.
The nitride semiconductor light emitting device according to claim 1 . the plurality of well layers of the active layer have a higher silicon concentration as the well layer is closer to the n-type semiconductor layer;
The nitride semiconductor light emitting device according to claim 1 . a maximum value of the silicon concentration distribution in the active layer in a stacking direction of the n-type semiconductor layer, the active layer, and the p-type semiconductor layer is 8.0×10 ¹⁸ atoms/cm ³ or more;
The nitride semiconductor light emitting device according to claim 3 . Between the n-type semiconductor layer and the active layer, a composition gradient layer is formed in which the Al composition ratio increases toward the active layer side and silicon is also included.
The nitride semiconductor light emitting device according to claim 3 . the p-type semiconductor layer has a p-type contact layer formed of p-type GaN,
The thickness of the p-type contact layer is 30 nm or less.
The nitride semiconductor light emitting device according to claim 1 .

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