JP7444537B2 - Method for manufacturing a phosphor substrate, method for manufacturing a light emitting substrate, and method for manufacturing a lighting device - Google Patents

Description

The present invention relates to a method for manufacturing a phosphor substrate, a method for manufacturing a light emitting substrate, and a method for manufacturing a lighting device.

Patent Document 1 discloses an LED lighting fixture that includes a substrate on which a light emitting element (LED element) is mounted. This LED lighting equipment improves luminous efficiency by providing a reflective material on the surface of the substrate.

China Patent Publication No. 106163113

In the first place, the LED lighting device disclosed in Patent Document 1 cannot use a reflective material to adjust the light emitted by the LED lighting equipment to light of a different color from the light emitted by the light emitting element. Furthermore, Patent Document 1 does not clearly disclose the specific configuration of the LED lighting equipment.

An object of the present invention is to provide a method for manufacturing a phosphor substrate on which a plurality of light emitting elements are mounted on one surface.

A method for manufacturing a phosphor substrate according to a first aspect of the present invention is a method for manufacturing a phosphor substrate in which a plurality of light emitting elements are mounted on one surface, wherein the plurality of light emitting elements are bonded to one surface of an insulating substrate. a forming step of forming a circuit pattern; and after the forming step, a coating step of applying a phosphor paint to one surface of the insulating substrate so as to cover a portion of the circuit pattern other than the portion to be bonded to the plurality of light emitting elements. and, including.

A method for manufacturing a phosphor substrate according to a second aspect of the present invention is the method for manufacturing a phosphor substrate according to the first aspect, in which the surfaces of the circuit pattern facing outward in the thickness direction are the same plane.

The method for manufacturing a phosphor substrate according to the third aspect of the present invention is the method for manufacturing the phosphor substrate according to the first or second aspect, in which the coating step is performed by a screen printing method.

A method for manufacturing a phosphor substrate according to a fourth aspect of the present invention is a method for manufacturing a phosphor substrate in which a plurality of light emitting elements are mounted on one surface, wherein the plurality of light emitting elements are bonded to one surface of an insulating substrate. a forming step of forming a circuit pattern having a plurality of electrode pairs; a coating step of applying a phosphor paint to one surface of the insulating substrate so as to cover the circuit pattern after the forming step; and after the coating step, The method includes an exposing step of removing the phosphor paint on the plurality of electrode pairs to expose upper surfaces of the plurality of electrode pairs.

The method for manufacturing a phosphor substrate according to a fifth aspect of the present invention is the method for manufacturing a phosphor substrate according to the fourth aspect, wherein after the forming step and before the coating step, the circuit pattern is coated on the outside in the thickness direction of the circuit pattern. The method includes etching the circuit pattern so that a portion of the facing surface other than the upper surface is closer to the insulating substrate than the upper surface.

The method for manufacturing a phosphor substrate according to the sixth aspect of the present invention is the method for manufacturing a phosphor substrate according to the fourth or fifth aspect, wherein in the exposure step, a photodevelopment method using a mask on which an image is formed is used. The phosphor paint on the plurality of electrode pairs is removed to expose the upper surface.

A method for manufacturing a phosphor substrate according to a seventh aspect of the present invention is a method for manufacturing a phosphor substrate according to the fourth or fifth aspect, wherein in the pre-exposure step, a laser irradiation device is used to irradiate the phosphor substrate on the plurality of electrode pairs. The phosphor paint is removed by irradiating it with laser light to expose the upper surface.

The method for manufacturing a phosphor substrate according to an eighth aspect of the present invention is the method for manufacturing a phosphor substrate according to the fourth or fifth aspect, wherein in the exposing step, the phosphor paint on the plurality of electrode pairs is polished. is removed to expose the upper surface.

A method for manufacturing a phosphor substrate according to a ninth aspect of the present invention is a method for manufacturing a phosphor substrate according to any one of the first to eighth aspects, wherein the light emitting element has an LED incorporated therein, and the light emitting element has a chip size. It is said to be a packaged CSP.

A method for manufacturing a phosphor substrate according to a tenth aspect of the present invention is a method for manufacturing a phosphor substrate according to any one of the first to ninth aspects, wherein in the forming step, the other surface of the insulating substrate is conductive. Form sexual patterns.

In the method for manufacturing a light emitting substrate according to the first aspect of the present invention, after manufacturing the phosphor substrate by the method for manufacturing a phosphor substrate according to any one of the first to tenth aspects, The method includes a mounting step of bonding a plurality of light emitting elements to the upper surface and mounting the plurality of light emitting elements on the phosphor substrate.

A method for manufacturing a light emitting substrate according to a second aspect of the present invention is a method for manufacturing a light emitting substrate according to the first aspect, wherein the insulating substrate has a temperature of 1.0×10 ¹⁰ Pa or higher in a temperature range of 100° C. or higher and 300° C. or lower. The storage elastic modulus is also large and smaller than 1.0×10 ¹¹ Pa, and in the mounting process, a plurality of light emitting elements are bonded to the upper surfaces of the plurality of electrode pairs, respectively, by a reflow process.

The method for manufacturing a lighting device according to the present invention provides power for causing the light-emitting elements to emit light so that the light-emitting elements of the light-emitting substrate manufactured by the method for manufacturing a light-emitting substrate according to the first or second aspect can emit light. The method includes a step of attaching a power supply to the light emitting substrate.

The method for manufacturing a phosphor substrate according to the first to tenth aspects of the present invention can manufacture a phosphor substrate on which a plurality of light emitting elements are mounted on one surface.

Further, the first and second light emitting substrate manufacturing methods of the present invention can manufacture a phosphor substrate on which a plurality of light emitting elements are mounted on one surface.

FIG. 2 is a plan view of the light emitting substrate of the first embodiment. FIG. 3 is a bottom view of the light emitting substrate and the phosphor substrate of the first embodiment. 1C is a partial cross-sectional view of the light emitting substrate of the first embodiment taken along the line 1C-1C in FIG. 1A. FIG. FIG. 2 is a plan view of a phosphor substrate (a phosphor layer is omitted) of the first embodiment. FIG. 2 is a plan view of the phosphor substrate of the first embodiment. FIG. 3 is an explanatory diagram of a first step in the method for manufacturing a light emitting substrate according to the first embodiment. FIG. 3 is an explanatory diagram of a second step in the method for manufacturing a light emitting substrate according to the first embodiment. FIG. 3 is an explanatory diagram of a third step in the method for manufacturing a light emitting substrate according to the first embodiment. It is an explanatory view of the 4th process in the manufacturing method of the light emitting board of a 1st embodiment. It is an explanatory view of the 5th process in the manufacturing method of the light emitting board of a 1st embodiment. FIG. 3 is a diagram for explaining the light emitting operation of the light emitting substrate of the first embodiment. FIG. 6 is a diagram for explaining the light emitting operation of the light emitting substrate of the first comparative embodiment. 1C is a partial cross-sectional view of the light emitting substrate of the second embodiment taken along the line 1C-1C in FIG. 1A. FIG. FIG. 7 is an explanatory diagram of a first step in a method for manufacturing a light emitting substrate according to a second embodiment. It is an explanatory view of the 2nd process in the manufacturing method of the light emitting board of a 2nd embodiment. It is an explanatory view of the 3rd process in the manufacturing method of the light emitting board of a 2nd embodiment. It is an explanatory view of the 4th process in the manufacturing method of the light emitting board of a 2nd embodiment. It is a bottom view of the light emitting board and fluorescent substance board of a 1st modification. It is a bottom view of the light emitting board and fluorescent substance board of a 2nd modification. It is a bottom view of the light emitting board and fluorescent substance board of a 3rd modification. It is a bottom view of the light emitting board and fluorescent substance board of a 4th modification.

≪Overview≫
Hereinafter, an example of this embodiment will be described separately into a first embodiment and a second embodiment. First, a first embodiment will be described. Next, a second embodiment will be described. Next, modifications of each embodiment will be described. Note that in all the drawings referred to in the following description, similar components are denoted by the same reference numerals, and descriptions thereof will be omitted as appropriate.

≪First embodiment≫
The first embodiment will be described below. First, the structure and function of the light emitting substrate 10 manufactured by the method for manufacturing the light emitting substrate 10 of this embodiment, that is, as a manufacturing object, will be described with reference to FIGS. 1A to 1C. Next, a method for manufacturing the light emitting substrate 10 of this embodiment will be described with reference to FIGS. 3A to 3E. Next, the light emitting operation of the light emitting substrate 10 of this embodiment will be explained with reference to FIG. 4. Next, the effects of this embodiment will be explained with reference to FIG. 4 and the like.

<Structure and function of light emitting substrate as manufacturing object of first embodiment>
FIG. 1A is a plan view (view from the front surface 31) of the light emitting substrate 10 of this embodiment, and FIG. 1B is a bottom view (view from the back surface 33) of the light emitting substrate 10 of the present embodiment. FIG. 1C is a partial cross-sectional view of the light emitting substrate 10 taken along the line 1C-1C in FIG. 1A.
The light emitting substrate 10 of this embodiment has a rectangular shape, for example, when viewed from the front surface 31 and the back surface 33. Further, the light emitting board 10 of this embodiment includes a plurality of light emitting elements 20, a phosphor substrate 30, and electronic components (not shown) such as a connector and a driver IC. That is, the light-emitting substrate 10 of this embodiment has a plurality of light-emitting elements 20 and the above-mentioned electronic components mounted on a phosphor substrate 30.
The light emitting board 10 of this embodiment has a function of emitting light when supplied with power from an external power source (not shown) via a connector. Therefore, the light emitting substrate 10 of this embodiment is used as a main optical component in, for example, a lighting device (not shown).

[Multiple light emitting elements]
Each of the plurality of light emitting elements 20 is, for example, a CSP (Chip Scale Package) in which a flip chip LED 22 (hereinafter referred to as LED 22) is incorporated (see FIG. 1C). As shown in FIG. 1A, the plurality of light emitting elements 20 are arranged regularly on the surface 31 (an example of one surface) of the phosphor substrate 30 over the entire surface 31. It is installed. Note that the correlated color temperature of the light emitted by each light emitting element 20 of this embodiment is, for example, 3,018K. In addition, during the light emitting operation, the plurality of light emitting elements 20 use a heat sink (not shown) and a cooling fan (not shown) to dissipate heat (using the phosphor substrate 30 as an example) so that the temperature ranges from room temperature to 50°C to 100°C. cooling). Here, to supplement the meaning of "~" used in numerical ranges in this specification, for example, "50°C to 100°C" means "50°C to 100°C". In this specification, "~" used in numerical ranges means "from the part written before '~' to the part written after '~'".

[Phosphor substrate]
FIG. 2A is a diagram of the phosphor substrate 30 of this embodiment, and is a plan view (view from the front surface 31) in which the phosphor layer 36 is omitted. FIG. 2B is a plan view (view from the front surface 31) of the phosphor substrate 30 of this embodiment. Note that the bottom view of the phosphor substrate 30 of this embodiment is the same as the view of the light emitting substrate 10 viewed from the back surface 33. Further, a partial cross-sectional view of the phosphor substrate 30 of this embodiment is the same as the partial cross-sectional view of FIG. 1C with the light emitting element 20 removed. That is, the phosphor substrate 30 of this embodiment has a rectangular shape, for example, when viewed from the front surface 31 and the back surface 33.

The phosphor substrate 30 of this embodiment includes an insulating layer 32 (an example of an insulating substrate), an electrode layer 34 (an example of a circuit pattern), a phosphor layer 36, and a back pattern layer 38 (an example of a conductive pattern). (See FIGS. 1B, 1C, 2A, and 2B). Note that although the phosphor layer 36 is omitted in FIG. 2A, the phosphor layer 36 may include a plurality of electrodes, which will be described later, on the surface 31 of the insulating layer 32 and the electrode layer 34, as shown in FIG. 2B. It is arranged in a part other than pair 34A.

Further, as shown in FIGS. 1B and 2A, through holes 39 are formed in the phosphor substrate 30 at six locations: four locations near the four corners and two locations near the center. The six through holes 39 are used as positioning holes when manufacturing the phosphor substrate 30 and the light emitting substrate 10. In addition, the six through-holes 39 are used as screw holes for mounting to ensure a heat removal effect (preventing board warping and floating) to the (light-emitting) lamp casing. As will be described later, the phosphor substrate 30 of this embodiment is made by processing (e.g., etching) a double-sided board (hereinafter referred to as motherboard MB, see FIG. 3A) in which copper foil layers are provided on both sides of an insulating board. Manufactured.

<Insulating layer>
The main features of the insulating layer 32 of this embodiment will be explained below.
As described above, the shape is, for example, a rectangle when viewed from the front surface 31 and the back surface 33.
The material is an insulating material including bismaleimide resin and glass cloth, for example. Further, the insulating material does not contain halogen or phosphorus (halogen-free, phosphorus-free).
The thickness is, for example, 100 μm to 200 μm.
The coefficient of thermal expansion (CTE) in the longitudinal direction and in the transverse direction is, for example, 10 ppm/°C or less in the range of 50°C to 100°C, respectively. From another perspective, the longitudinal and transverse coefficients of thermal expansion (CTE) are each 6 ppm/K, for example. This value is almost the same as that of the light emitting element 20 of this embodiment (90% to 110%, ie, within ±10%).
The glass transition temperature is, for example, higher than 300°C.
As an example, the storage modulus is greater than 1.0×10 ¹⁰ Pa and smaller than 1.0×10 ¹¹ Pa in the range of 100° C. to 300° C.
The bending modulus in the longitudinal direction and in the transverse direction is, by way of example, 35 GPa and 34 GPa, respectively, under normal conditions.
The hot bending modulus in the longitudinal and transverse directions is, for example, 19 GPa at 250°C.
As an example, the water absorption rate is 0.13% when left for 24 hours in a temperature environment of 23°C.
The dielectric constant is, for example, 4.6 at 1 MHz normal state.
The dielectric loss tangent is, for example, 0.010 at a normal frequency of 1 MHz.
Note that the insulating layer 32 of this embodiment corresponds to the insulating layer portion of the motherboard MB, and as an example, CS-3305A manufactured by Risho Kogyo Co., Ltd. is used for the motherboard MB.

<Electrode layer>
The electrode layer 34 of this embodiment is a metal layer provided on the surface 31 side of the insulating layer 32. The electrode layer 34 of this embodiment is, for example, a copper foil layer (layer made of Cu). In other words, the electrode layer 34 of this embodiment is formed so that at least its surface contains copper.
The electrode layer 34 is a pattern provided on the insulating layer 32, and is electrically connected to a terminal 37 to which a connector (not shown) is connected. The electrode layer 34 is configured to supply power supplied from an external power source (not shown) via the connector to the plurality of light emitting elements 20 when the light emitting board 10 is configured. Therefore, a part of the electrode layer 34 is made into a plurality of electrode pairs 34A to which the plurality of light emitting elements 20 are respectively bonded. That is, the electrode layer 34 of the light emitting substrate 10 of this embodiment is arranged on the insulating layer 32 and connected to each light emitting element 20.

Further, as described above, since the plurality of light emitting elements 20 in the light emitting substrate 10 of this embodiment are regularly arranged over the entire surface 31, the plurality of electrode pairs 34A are also arranged over the entire surface 31. They are arranged regularly (see Figure 2A). A portion of the electrode layer 34 other than the plurality of electrode pairs 34A is referred to as a wiring portion 34B. In this embodiment, as shown in FIG. 1C, for example, the plurality of electrode pairs 34A protrude outward in the thickness direction of the insulating layer 32 (phosphor substrate 30) beyond the wiring portion 34B. In other words, in the surface of the electrode layer 34 facing outward in the thickness direction of the insulating layer 32, the top surface (bonding surface 34A1) to which each light emitting element 20 is bonded is higher than the top surface other than the bonding surface 34A1 (non-bonding surface 34B1). are also located on the outside of the insulating layer 32 in the thickness direction.
The region (defined as a first arrangement region) on the surface 31 of the insulating layer 32 where the electrode layer 34 is arranged is, for example, a region (area) that is 60% or more of the surface 31 of the insulating layer 32. (See Figure 2A). Further, 80% or more of the first arrangement region overlaps the region of the insulating layer 32 where the back pattern layer 38 is arranged (defined as a second arrangement region) in the thickness direction of the insulating layer 32. .

<Phosphor layer>
In the phosphor layer 36 of this embodiment, as shown in FIG. 2B, for example, the phosphor layer 36 is arranged in a portion other than the plurality of electrode pairs 34A on the surface 31 of the insulating layer 32 and the electrode layer 34. ing. That is, the phosphor layer 36 is arranged in a region of the electrode layer 34 other than the plurality of electrode pairs 34A. In other words, at least a portion of the phosphor layer 36 is arranged so as to surround the entire circumference of each bonding surface 34A1 when viewed from the front surface 31 side (see FIGS. 1C and 2B). In this embodiment, the region on the surface 31 of the insulating layer 32 where the phosphor layer 36 is arranged is, for example, 80% or more of the surface 31 of the insulating layer 32.
Note that the surface of the phosphor layer 36 on the outer side in the thickness direction of the insulating layer 32 is located on the outer side in the thickness direction than the bonding surface 34A1 of the electrode layer 34 (see FIG. 1C).

The phosphor layer 36 of this embodiment is, for example, an insulating layer containing a phosphor and a binder, which will be described later. The phosphor contained in the phosphor layer 36 is made into fine particles that are held in a dispersed state in a binder, and has the property of exciting the light emitted from each light emitting element 20 as excitation light. Specifically, the phosphor of this embodiment has a property that the emission peak wavelength is in the visible light region when the emission from the light emitting element 20 is used as excitation light. Note that the binder may be, for example, an epoxy-based, acrylate-based, silicone-based, etc., as long as it has the same insulation properties as the binder contained in the solder resist.

(Specific example of phosphor)
Here, the phosphors included in the phosphor layer 36 of this embodiment include, for example, an α-sialon phosphor containing Eu, a β-sialon phosphor containing Eu, a CASN phosphor containing Eu, and an Eu-containing sialon phosphor. At least one type of phosphor selected from the group consisting of SCASN phosphors containing Note that the above-mentioned phosphor is an example of this embodiment, and phosphors other than the above-mentioned phosphor may be used, such as YAG, LuAG, BOS, and other visible light-excited phosphors.

The α-type sialon phosphor containing Eu is represented by the general formula: M _x Eu _y Si _12-(m+n) Al _(m+n) O _n N _16-n . In the above general formula, M is one or more elements containing at least Ca selected from the group consisting of Li, Mg, Ca, Y, and lanthanide elements (excluding La and Ce), and the valence of M is When a, ax+2y=m, x satisfies 0<x≦1.5, 0.3≦m<4.5, and 0<n<2.25.

The β-sialon phosphor containing Eu is a β-sialon expressed by the general formula: Si _6-z Al _z O _z N _8-z (z = 0.005 to 1) and divalent europium as a luminescent center. It is a phosphor containing (Eu ²⁺ ) as a solid solution.

Examples of the nitride phosphor include a CASN phosphor containing Eu and a SCASN phosphor containing Eu.

A CASN phosphor containing Eu (an example of a nitride phosphor) is, for example, represented by the formula CaAlSiN ₃ :Eu ²⁺ , in which Eu ²⁺ is used as an activator and crystals made of alkaline earth silicon nitride are used as a matrix. A red phosphor. Note that the definition of CASN phosphor containing Eu in this specification excludes SCASN phosphor containing Eu.

A SCASN phosphor containing Eu (an example of a nitride phosphor) is, for example, represented by the formula (Sr,Ca)AlSiN ₃ :Eu ²⁺ , using Eu ²⁺ as an activator, and consisting of an alkaline earth silicon nitride. A red phosphor that has a crystal matrix.

<Back pattern layer>
The back pattern layer 38 of this embodiment is a metal layer provided on the back surface 33 side of the insulating layer 32. The back pattern layer 38 of this embodiment is, for example, a copper foil layer (layer made of Cu).

As shown in FIG. 1B, the back pattern layer 38 includes a plurality of rectangular portions 38A (an example of a plurality of electrodes, hereinafter referred to as a plurality of portions 38A) arranged in a straight line along the longitudinal direction of the insulating layer 32. ) are arranged adjacently so that they are out of phase in the transverse direction. That is, the back pattern layer 38 of this embodiment forms a pattern in which a plurality of portions 38A are arranged.

Note that the back pattern layer 38 is, for example, an independent floating layer. That is, the back pattern layer 38 (the plurality of portions 38A constituting the back pattern layer 38) of this embodiment is a dummy electrode that is not electrically connected to the plurality of electrode pairs 34A of the electrode layer 34 on the front surface 31 side. . Furthermore, although the area of the second arrangement region in this embodiment is set larger than the area of the first arrangement region (see FIG. 1B and FIG. 2A), the area of the second arrangement region is 90% to 110% of the area of the first arrangement region. It is set to area.

The above is a description of the configurations of the light emitting substrate 10 and the phosphor substrate 30 as manufacturing objects of this embodiment.

<Method for manufacturing light emitting substrate of first embodiment>
Next, a method for manufacturing the light emitting substrate 10 of this embodiment will be described with reference to FIGS. 3A to 3E. The method for manufacturing the light emitting substrate 10 of this embodiment includes a first step, a second step, a third step, a fourth step, and a fifth step, and each step is performed in the order described.

[First step]
FIG. 3A is a diagram showing the start and end of the first step. The first step is a step of forming a pattern 34C (another example of a circuit pattern) that is the same as the electrode layer 34 when viewed from the thickness direction on the front surface 31 of the motherboard MB, and a back pattern layer 38 on the back surface 33. That is, this step is a step (forming step) of forming an electrode layer 34 and a back pattern layer 38 having a plurality of electrode pairs 34A to be joined to a plurality of light emitting elements 20 on the front surface 31 of the insulating layer 32. This step is performed, for example, by etching using a mask pattern (not shown).

[Second step]
FIG. 3B is a diagram showing the start and end of the second step. The second step is a step in which a part of the pattern 34 is half hatched (etched halfway in the thickness direction). When this step is completed, the electrode layer 34 having a plurality of electrode pairs 34A and wiring portions 34B is formed as a result. That is, in this step, after the first step and before the coating step to be described later, a portion (wiring portion 34B) other than the upper surface (joint surface 34A1) of the surface facing outward in the thickness direction of the electrode layer 34 is lower than the joint surface 34A1. This is a step of etching the electrode layer 34 so that it is closer to the insulating layer 32 side. When this step is completed, a plurality of bonding surfaces 34A1 and a plurality of non-bonding surfaces 34B1 are formed on the electrode layer 34. This step is performed, for example, by etching using a mask pattern (not shown).

[Third step]
FIG. 3C is a diagram showing the start and end of the third step. The third step is a step of applying phosphor paint 36C to the entire surface 31 of the insulating layer 32, that is, the surface on which the electrode layer 34 is formed. In other words, this step is a step (coating step) of applying the phosphor paint 36C to the surface 31 of the insulating layer 32 so as to cover the electrode layer 34 after the second step. In this step, for example, the fluorescent paint 36C is applied by printing. In this case, the phosphor paint 36C is applied thicker than all the electrode pairs 34A. In other words, in this case, the phosphor paint 36C is applied in the thickness direction of the insulating layer 32 so as to cover each joint surface 34A1 from the outside in the thickness direction (so that each joint surface 34A1 is hidden by the phosphor paint 36C). .

[4th step]
FIG. 3D is a diagram showing the start and end of the fourth step. The fourth step is a step in which a part of the phosphor layer 36 on which the phosphor paint 36C has been cured is removed to expose the bonding surfaces 34A1 of all the electrode pairs 34A. That is, this step is a step (exposure step) in which, after the third step, the phosphor paint 36C on the plurality of electrode pairs 34A is removed to expose each bonding surface 34A1 of the plurality of electrode pairs 34A.

Here, when the binder of the phosphor paint 36C is a thermosetting resin, for example, the phosphor paint 36C is cured by heating, and then a laser irradiation device (not shown) capable of two-dimensional scanning is used to form the phosphor layer 36. A portion on each joint surface 34A1 is selectively irradiated with laser light. As a result, a portion of the phosphor layer 36 on each bonding surface 34A1 and a portion of the electrode pair 34A near each bonding surface 34A1 are ablated (removed), and each bonding surface 34A1 is exposed. As a result of the above, the phosphor substrate 30 of this embodiment is manufactured. That is, the process of performing the first to fourth steps of this embodiment in the order described is the method of manufacturing the phosphor substrate 30 of this embodiment.

Note that this step may be performed, for example, by the following method in addition to the method described above.
When the binder of the phosphor paint 36C is, for example, a UV curable resin (photosensitive resin), a mask pattern is applied to the portions (paint openings) that overlap with each bonding surface 34A1, and UV light is exposed to remove the parts other than the mask pattern. is cured with UV light, and the non-exposed portions (uncured portions) are removed with a resin removal liquid to expose each bonding surface 34A1. After that, generally heat is applied to perform after-cure (photographic development method).
Further, when the binder of the phosphor paint 36C is, for example, a thermosetting resin, the surface of the phosphor layer 36 is polished after the phosphor paint 36C is cured by heating. As a result, a portion of the phosphor layer 36 on each bonding surface 34A1 is removed, and each bonding surface 34A1 is exposed (polishing method). Note that when the fourth step is performed using this method (polishing method), each bonding surface 34A1 is flush with the upper surface of the phosphor layer 36. Therefore, when the fourth step is performed using this method, a phosphor substrate (not shown) is manufactured in which each bonding surface 34A1 and the upper surface of the phosphor layer 36 are flush with each other.
As a result of the above, according to these methods, the phosphor substrate 30 of this embodiment is manufactured.

[5th step]
FIG. 3E is a diagram showing the start and end of the fifth step. The fifth step is a step of mounting a plurality of light emitting elements 20 on the phosphor substrate 30. That is, in this step, after manufacturing the phosphor substrate 30 in the first to fourth steps, a plurality of light emitting elements 20 are bonded to each bonding surface 34A1 of the plurality of electrode pairs 34A, and a plurality of light emitting elements 20 are bonded to the phosphor substrate 30. This is a step of mounting the light emitting element 20 (mounting step).
In this step, solder paste SP is printed on each bonding surface 34A1 of the plurality of electrode pairs 34A of the phosphor substrate 30, and each electrode of the plurality of light emitting elements 20 is aligned with each bonding surface 34A1. Melt the solder paste in an environment of °C. Thereafter, when the solder paste SP is cooled and solidified, each light emitting element 20 is joined to each electrode pair 34A. That is, this process is performed by a reflow process, for example.

The above is a description of the method for manufacturing the light emitting substrate 10 of this embodiment.

<Light-emitting operation of the light-emitting substrate of the first embodiment>
Next, the light emitting operation of the light emitting substrate 10 of this embodiment will be described with reference to FIG. 4. Here, FIG. 4 is a diagram for explaining the light emitting operation of the light emitting substrate 10 of this embodiment.

First, when an activation switch (not shown) for activating the plurality of light emitting elements 20 is turned on, power supply from an external power source (not shown) to the electrode layer 34 is started via a connector (not shown), and the plurality of light emitting elements 20 20 emits light L in a radial and divergent manner, and a portion of the light L reaches the surface 31 of the phosphor substrate 30. Hereinafter, the behavior of the emitted light L will be explained in terms of the traveling direction of the emitted light L.

A portion of the light L emitted from each light emitting element 20 is emitted to the outside without entering the phosphor layer 36. In this case, the wavelength of the light L remains the same as the wavelength of the light L emitted from each light emitting element 20.

Further, the light of the LED 22 itself in a portion of the light L emitted from each light emitting element 20 enters the phosphor layer 36. Here, the above-mentioned "light of the LED 22 itself in a part of the light L" refers to the light that has not been color-converted by the phosphor of each light emitting element 20 (CSP itself) out of the emitted light L, that is, the light of the LED 22 itself in a part of the light L. It means its own light (for example, blue light (wavelength near 470 nm)). When the light L of the LED 22 itself collides with the phosphor dispersed in the phosphor layer 36, the phosphor is excited and emits excitation light. Here, the reason why the phosphor is excited is that the phosphor dispersed in the phosphor layer 36 is a phosphor having an excitation peak in blue light (visible light excited phosphor). Along with this, part of the energy of the light L is used to excite the phosphor, and the light L loses part of its energy. As a result, the wavelength of the light L is converted (wavelength conversion is performed). For example, depending on the type of phosphor in the phosphor layer 36 (for example, when red CASN is used as the phosphor), the wavelength of the light L becomes long (for example, 650 nm). Further, some of the excitation light in the phosphor layer 36 is emitted from the phosphor layer 36 as it is, but some of the excitation light is directed toward the lower electrode layer 34 . Then, a part of the excitation light is reflected by the electrode layer 34 and emitted to the outside. As described above, when the wavelength of the excitation light from the phosphor is 600 nm or more, a reflection effect can be expected even if the electrode layer 34 is made of Cu. Although the wavelength of the light L differs from the above example depending on the type of phosphor in the phosphor layer 36, the wavelength of the light L is converted in any case. For example, when the wavelength of the excitation light is less than 600 nm, a reflective effect can be expected if the electrode layer 34 or its surface is made of Ag (plated), for example.

As described above, the light L emitted by each light emitting element 20 (the light L radially emitted by each light emitting element 20) is irradiated to the outside together with the excitation light through the plurality of optical paths as described above. . Therefore, when the emission wavelength of the phosphor included in the phosphor layer 36 is different from the emission wavelength of the phosphor that seals (or covers) the LED 22 in the light emitting element 20 (CSP), the light emitting substrate 10 of this embodiment , a bundle of light L emitted by each light emitting element 20 is irradiated together with the excitation light as a bundle of light L including light L having a wavelength different from the wavelength of light L emitted by each light emitting element 20. For example, the light emitting substrate 10 of this embodiment emits a composite light of the light (wavelength) emitted by the light emitting element 20 and the light (wavelength) emitted from the phosphor layer 36.

The above is a description of the light emitting operation of the light emitting substrate 10 of this embodiment.

<Effects of the first embodiment>
Next, the effects of this embodiment will be explained with reference to the drawings.

[First effect]
The first effect will be explained by comparing this embodiment with a first comparison mode (see FIG. 5) described below. Here, in the description of the first comparison mode (and the second comparison mode below), when the same components as in this embodiment are used, the same names, symbols, etc. as in the case of this embodiment will be used for the components, etc. We will use it. FIG. 5 is a diagram for explaining the light emitting operation of the light emitting substrate 10A of the first comparative embodiment. The light emitting substrate 10A (substrate 30A on which a plurality of light emitting elements 20 are mounted) of the first comparative embodiment has the same configuration as the light emitting substrate 10 (phosphor substrate 30) of the present embodiment, except that it does not include the phosphor layer 36. It is said that

In the case of the light emitting substrate 10A of the first comparative embodiment, the light L emitted from each light emitting element 20 and incident on the surface 31 of the substrate 30A is reflected or scattered without having its wavelength converted. Therefore, in the case of the substrate 30A of the first comparative embodiment, it is not possible to adjust the light emission color to be different from the light emitted by the light emitting element 20 when the light emitting element 20 is mounted. That is, in the case of the light emitting substrate 10A of the first comparative embodiment, it is not possible to adjust the emitted light color to be different from the light emitted by the light emitting element 20.

On the other hand, in the case of the present embodiment, the phosphor layer 36 is provided on the surface 31 of the insulating layer 32 and around each bonding surface 34A1 with each light emitting element 20 when viewed from the thickness direction of the insulating layer 32. It is located. Therefore, a part of the light L emitted radially from each light emitting element 20 enters the phosphor layer 36, is wavelength-converted by the phosphor layer 36, and is irradiated to the outside. In this case, a portion of the light L radially emitted from each light emitting element 20 enters the phosphor layer 36 to excite the phosphor included in the phosphor layer 36 to generate excitation light.

Therefore, in the phosphor substrate 30 manufactured by the method for manufacturing the phosphor substrate 30 of this embodiment, when the light emitting element 20 is mounted, the light emitting element 20 emits the light L emitted from the phosphor substrate 30. It is possible to adjust the emitted light color to be different from the light L. Accordingly, the light emitting substrate 10 manufactured by the method for manufacturing the light emitting substrate 10 of the present embodiment converts the light L emitted from the phosphor substrate 30 into light L of a different color from the light L emitted by the light emitting element 20. Can be adjusted. From another perspective, the light emitting substrate 10 manufactured by the method for manufacturing the light emitting substrate 10 of this embodiment can irradiate the outside with light L of a different color from the light L emitted by the light emitting element 20.

[Second effect]
In the case of the first comparative embodiment, as shown in FIG. 5, spots occur in the light L irradiated to the outside due to the arrangement spacing of each light emitting element 20. Here, it is said that the larger the speckles of the light L, the greater the glare.
On the other hand, in the case of this embodiment, as shown in FIG. 2B, each bonding surface 34A1 is surrounded (over the entire circumference) by the phosphor layer 36, and then the adjacent light emitting element 20 A phosphor layer 36 is also provided between them. Therefore, excitation light is also emitted from around each bonding surface 34A1 (around each light emitting element 20).
Therefore, the light emitting substrate 10 manufactured by the method for manufacturing the light emitting substrate 10 of this embodiment can have less glare than the first comparative embodiment.
In particular, this effect is achieved when the phosphor layer 36 is provided over the entire surface of the insulating layer 32, specifically, when the phosphor layer 36 is disposed on the surface 31 of the insulating layer 32, the region on the surface 13 This is effective in cases where the area is 80% or more.

[Third effect]
As described above, the phosphor substrate 30 of this embodiment and the plurality of light emitting elements 20 arranged on the phosphor substrate 30 are heated to 250° C., for example, during the fifth step during manufacturing (reflow step as a mounting step). (see Figure 3E). Therefore, the phosphor substrate 30 thermally expands, and each light emitting element 20 also thermally expands. Then, due to the difference in coefficient of thermal expansion between the former and the latter, warpage occurs in the insulating layer 32 (phosphor substrate 30). As a result, there is a possibility that mounting defects of the plurality of light emitting elements 20 may occur.
However, the storage modulus of the insulating layer 32 is greater than 1.0×10 ¹⁰ Pa and smaller than 1.0×10 ¹¹ Pa in a range of 100° C. to 300° C., including the temperature at which the reflow process is performed. That is, the storage modulus of the insulating layer 32 (phosphor substrate 30) of this embodiment is set to be relatively high at the temperature at which the reflow process is performed.
Therefore, the phosphor substrate 30 of this embodiment can suppress the occurrence of warpage due to heating during manufacturing. Accordingly, according to this embodiment, manufacturing defects are less likely to occur.

The above is a description of the effects of this embodiment. Moreover, the above is the description of the first embodiment.

≪Second embodiment≫
Next, a second embodiment will be described. Hereinafter, only the parts of this embodiment that are different from the first embodiment will be described. In addition, in the description of this embodiment, when equivalent parts, structures, etc. of 1st Embodiment are used in this embodiment, the same name, code|symbol, etc. as the case of 1st Embodiment will be used.

<Structure and function of light emitting substrate as manufacturing object of second embodiment>
A plan view of the light emitting substrate 10 manufactured by the method for manufacturing the light emitting substrate 10 of the present embodiment is equivalent to a diagram incorporating FIG. 1A, which is a plan view of the first embodiment. Moreover, the bottom view of the light emitting substrate 10 and the phosphor substrate 30 of this embodiment is equivalent to the bottom view of FIG. 1B of the first embodiment.
However, a partial cross-sectional view of the light emitting substrate 10 of this embodiment taken along the line 1C-1C in FIG. 1A is different from that of the first embodiment, as shown in FIG. In the case of this embodiment, the top surface (bonding surface 34A1) of each electrode pair 34A that constitutes the electrode layer 34 of this embodiment and the top surface (non-bonding surface 34B1) of the wiring portion 34B form the same plane. There is.
The light emitting substrate 10 of this embodiment differs from the first embodiment in the above points.

<Method for manufacturing light emitting substrate of second embodiment>
Next, a method for manufacturing the light emitting substrate 10 of this embodiment will be described with reference to FIGS. 7A to 7D. The method for manufacturing the light emitting substrate 10 of this embodiment includes a first step, a second step, a third step, and a fourth step, and each step is performed in the order described.

[First step]
FIG. 7A is a diagram showing the start and end of the first step. The first step is a step of forming a pattern 34C (another example of a circuit pattern) that is the same as the electrode layer 34 when viewed from the thickness direction on the front surface 31 of the motherboard MB, and a back pattern layer 38 on the back surface 33. That is, this step is a step (forming step) of forming an electrode layer 34 and a back pattern layer 38 having a plurality of electrode pairs 34A to be joined to a plurality of light emitting elements 20 on the front surface 31 of the insulating layer 32. This step is performed, for example, by etching using a mask pattern (not shown).

[Second step]
FIG. 7B is a diagram showing the start and end of the second step. The second step is a step of applying phosphor paint 36C to the entire surface 31 of the insulating layer 32, that is, the surface on which the electrode layer 34 is formed. In other words, this step is a step (coating step) of applying the phosphor paint 36C to the surface 31 of the insulating layer 32 so as to cover the electrode layer 34 after the first step. In this step, for example, the fluorescent paint 36C is applied by printing. In this case, the phosphor paint 36C is applied thicker than the electrode layer 34.

[Third step]
FIG. 7C is a diagram showing the start and end of the third step. The third step is a step in which a part of the phosphor layer 36 on which the phosphor paint 36C has been cured is removed to expose all the bonding surfaces 34A1. That is, this step is a step (exposure step) in which, after the third step, the phosphor paint 36C on the plurality of electrode pairs 34A is removed to expose each bonding surface 34A1 of the plurality of electrode pairs 34A.

Here, when the binder of the phosphor paint 36C is a thermosetting resin, for example, the phosphor paint 36C is cured by heating, and then a laser irradiation device (not shown) capable of two-dimensional scanning is used to form the phosphor layer 36. A portion on each joint surface 34A1 is selectively irradiated with laser light. As a result, a portion of the phosphor layer 36 on each bonding surface 34A1 and a portion of the electrode pair 34A near each bonding surface 34A1 are ablated (removed), and each bonding surface 34A1 is exposed. As a result of the above, the phosphor substrate 30 of this embodiment is manufactured. That is, the process of performing the first to fourth steps of this embodiment in the order described is the method of manufacturing the phosphor substrate 30 of this embodiment.

In addition to the method described above, this step may be performed, for example, by the following method. When the binder of the phosphor paint 36C is, for example, a UV curable resin (photosensitive resin), after curing the phosphor paint 36C by drying, it is exposed to UV light using a mask pattern (not shown) and then unexposed. Parts are removed with an etching solution (photographic development).

In the above description, it has been explained that the phosphor substrate 30 is manufactured by performing the first step, second step, and third step in the order described, but the phosphor substrate 30 may be manufactured by the following method. For example, after the first step (see FIG. 7A), without performing the second step (see FIG. 7B) and the third step (see FIG. 7C), a screen mask (not shown) in which openings are set in advance is used. The phosphor paint 36C may be applied by screen printing. In this case, the openings of the phosphor paint in the portion of the screen mask that overlaps with the bonding surface 34A1 may be closed.

[4th step]
FIG. 7D is a diagram showing the start and end of the fourth step. The fourth step is a step of mounting a plurality of light emitting elements 20 on the phosphor substrate 30. That is, in this step, after manufacturing the phosphor substrate 30 in the first to fourth steps, a plurality of light emitting elements 20 are bonded to each bonding surface 34A1 of the plurality of electrode pairs 34A, and a plurality of light emitting elements 20 are bonded to the phosphor substrate 30. This is a step of mounting the light emitting element 20 (mounting step).
In this step, solder paste SP is printed on each bonding surface 34A1 of the phosphor substrate 30, and the solder paste is melted with each electrode of the plurality of light emitting elements 20 aligned with each bonding surface 34A1. Thereafter, when the solder paste SP is cooled and solidified, each light emitting element 20 is joined to each electrode pair 34A (each joining surface 34A1). That is, this process is performed by a reflow process, for example.

The above is a description of the method for manufacturing the light emitting substrate 10 of this embodiment.

<Light-emitting operation of the light-emitting substrate of the second embodiment>
The light emitting operation of the light emitting substrate 10 of this embodiment is the same as that of the first embodiment (see FIG. 4).

<Effects of the second embodiment>
The effects of this embodiment are similar to those of the first embodiment.

The above is the description of the second embodiment.

As mentioned above, although the present invention has been described using the above-described first and second embodiments as examples, the present invention is not limited to these embodiments and examples. The technical scope of the present invention also includes, for example, the following forms (modifications).

For example, in the description of each embodiment, an example of the light emitting element 20 is a CSP. However, an example of the light emitting element 20 may be other than CSP. For example, it may simply be equipped with a flip chip. It can also be applied to the substrate itself of a COB device.

In addition, in the description of each embodiment, it is assumed that the surface of the phosphor layer 36 on the outer side in the thickness direction of the insulating layer 32 is located on the outer side in the thickness direction than the bonding surface 34A1 of the electrode layer 34 (FIG. 1C and FIG. (see 6). However, in consideration of the mechanism of explanation of the first and third effects described above, the surface of the phosphor layer 36 on the outside in the thickness direction of the insulating layer 32 is the same as the bonding surface 34A1 of the electrode layer 34 in the thickness direction. It is clear that the first effect can be achieved even if the position is on the inner side in the thickness direction than 34A1.

Furthermore, in the description of each embodiment, it is assumed that the phosphor layer 36 is arranged in a portion of the surface 31 of the insulating layer 32 and the electrode layer 34 other than the plurality of electrode pairs 34A (see FIG. 2B). However, considering the mechanism explaining the first and third effects described above, the first effect can be achieved even if the electrodes are not arranged over the entire area other than the plurality of electrode pairs 34A on the surface 31 of the phosphor substrate 30. It is clear that it will play. Therefore, even if the form differs from the phosphor substrate 30 and light emitting substrate 10 of this embodiment only in that the phosphor layer 36 is disposed in a range of the surface 31 that is different from that of the present embodiment, the form is It can be said that it belongs to the technical scope of the present invention.

Furthermore, in each embodiment, it has been explained that CS-3305A manufactured by Risho Kogyo Co., Ltd. is used as the motherboard MB in manufacturing the phosphor substrate 30 and the light emitting substrate 10. However, this is just an example, and a different motherboard MB may be used. For example, the standard specifications of the insulating layer thickness, copper foil thickness, etc. of CS-3305A manufactured by Risho Kogyo Co., Ltd. are not limited, and in particular, a thicker copper foil may be used.

Furthermore, using the light-emitting substrate 10 (including variations thereof) manufactured by the manufacturing method of the first and second embodiments, the light-emitting element 20 is manufactured so that the light-emitting element 20 of the light-emitting substrate 10 can emit light. A lighting device may be manufactured by performing a step of attaching a power source that supplies power for emitting light to the light emitting substrate 10.

Furthermore, in each embodiment, the back pattern layer 38 has been described as a dummy electrode that is not electrically connected to the plurality of electrode pairs 34A of the electrode layer 34 on the front surface 31 side. However, the back pattern layer 38 is connected to the electrode layer 34 on the front surface 31 through, for example, through holes (not shown), and the back pattern layer 38 is configured as part of an electrical path for supplying power to the electrode layer 34. It's okay.

Further, the back pattern layer 38 of this embodiment has been described as being as shown in FIG. 1B as an example. However, the conductive pattern on the back surface 33 may be a different pattern from the back pattern layer 38 of this embodiment.
For example, like the back pattern layer 38B of the phosphor substrate 30B (light-emitting substrate 10B) of the first modified example of FIG. 8A, the second electrode group of the present invention is arranged along the length of the phosphor substrate 30B. It may be a combination of ulnar bodies (a plurality of parts 38B1).
Further, for example, like the back pattern layer 38C of the phosphor substrate 30C (light emitting substrate 10C) of the second modified example of FIG. 8B, the second electrode group of the present invention may It may be a combination of elongated bodies (a plurality of portions 38C1) arranged along the edges.
Further, for example, as in the back pattern layer 38D of the phosphor substrate 30D (light emitting substrate 10D) of the third modified example of FIG. A combination of a shaped lump and a part other than a plurality of island-shaped lumps (a mesh-like part 30D2 extending from one end of the phosphor substrate 30D in the longitudinal direction to the other end, and from one end of the phosphor substrate 30D in the transverse direction to the other end). There may be.
As described above, the second electrode group of the present invention may have any pattern.

Furthermore, the explanation has been made assuming that the back surface pattern layer 38 is disposed on the back surface 33 of the phosphor substrate 30 of this embodiment. However, like the modified phosphor substrate 30A (light emitting substrate 10A) in FIG. 8D, the back surface pattern layer 38 may not be provided on the back surface 33.

10 Light emitting substrate 20 Light emitting element 30 Phosphor substrate 31 Surface (an example of one surface)
32 Insulating layer (an example of an insulating substrate)
33 Back side (an example of the other side)
34 Electrode layer (an example of the first electrode group)
34A Electrode pair (an example of multiple electrodes)
34A1 Bonding surface 34B Wiring portion 34B1 Non-bonding surface 36 Phosphor layer 38 Back pattern layer (an example of the second electrode group)
38A Multiple rectangular parts (an example of multiple electrodes)
L Optical MB Motherboard SP Solder Paste

Claims (12)

A method for manufacturing a phosphor substrate on which a plurality of light emitting elements are mounted on one surface, the method comprising:
a formation step of forming a circuit pattern to be bonded to the plurality of light emitting elements on one surface of the insulating substrate;
After the forming step, a coating step of applying a phosphor paint to one surface of the insulating substrate so as to cover a portion of the circuit pattern other than the portion to be bonded to the plurality of light emitting elements;
including;
In the coating step, the phosphor paint is also applied to an area that will be an area between the light emitting element and the insulating substrate when the light emitting element is mounted, except for the part to be bonded to the plurality of light emitting elements. Also, a method for manufacturing a phosphor substrate, wherein the phosphor paint is applied so that the upper surface of the electrode pair is lower than the upper surface of the phosphor paint provided adjacent to the periphery of the electrode pair. The surfaces of the circuit pattern facing outward in the thickness direction are the same plane,
A method for manufacturing a phosphor substrate according to claim 1. The coating step is performed by a screen printing method,
A method for manufacturing a phosphor substrate according to claim 1 or 2. A method for manufacturing a phosphor substrate on which a plurality of light emitting elements are mounted on one surface, the method comprising:
a formation step of forming a circuit pattern having a plurality of electrode pairs bonded to the plurality of light emitting elements on one surface of the insulating substrate;
After the forming step, a coating step of applying a fluorescent paint to one surface of the insulating substrate so as to cover the circuit pattern;
After the coating step, an exposing step of removing the phosphor paint on the plurality of electrode pairs to expose the upper surfaces of the plurality of electrode pairs;
including;
In the coating step, the phosphor paint is also applied to an area that will be a region between the light emitting element and the insulating substrate when the light emitting element is mounted,
In the exposing step, the phosphor paint provided in the area between the light emitting element and the insulating substrate except on the plurality of electrode pairs is not removed, and the upper surface of the electrode pair is provided around the electrode pair. A method for manufacturing a phosphor substrate, wherein the phosphor paint is removed so that the phosphor paint is lower than the upper surface of the phosphor paint. After the forming step and before the coating step, the circuit pattern is etched so that a portion of the surface of the circuit pattern facing outward in the thickness direction other than the top surface is closer to the insulating substrate side than the top surface. process,
The method for manufacturing a phosphor substrate according to claim 4, comprising: In the exposure step, the phosphor paint on the plurality of electrode pairs is removed by a photodevelopment method using a mask on which an image is formed, and the upper surface is exposed.
The method for manufacturing a phosphor substrate according to claim 4 or 5. In the exposure step, a laser irradiation device irradiates the phosphor paint on the plurality of electrode pairs with laser light to remove it and expose the upper surface.
The method for manufacturing a phosphor substrate according to claim 4 or 5. The light emitting element is a CSP in which an LED is incorporated and packaged in a chip size.
A method for manufacturing a phosphor substrate according to any one of claims 1 to 7 . In the forming step, a conductive pattern is formed on the other surface of the insulating substrate.
A method for manufacturing a phosphor substrate according to any one of claims 1 to 8 . After manufacturing the phosphor substrate by the method according to any one of claims 1 to 9 , a plurality of light emitting elements are bonded to the upper surfaces of the plurality of electrode pairs, respectively, and the plurality of light emitting elements are bonded to the phosphor substrate. The mounting process of mounting the light emitting element of
A method for manufacturing a light emitting substrate, including: The insulating substrate has a storage modulus of greater than 1.0×10 ¹⁰ Pa and less than 1.0×10 ¹¹ Pa in the range of 100° C. or higher and 300° C. or lower,
In the mounting step, a plurality of light emitting elements are respectively bonded to the upper surfaces of the plurality of electrode pairs by a reflow step.
The method for manufacturing a light emitting substrate according to claim 10 . A power supply that supplies power for causing the light emitting element to emit light is attached to the light emitting substrate so that the light emitting element of the light emitting substrate manufactured by the method for manufacturing a light emitting board according to claim 10 or 11 can emit light. process,
A method of manufacturing a lighting device including:

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