JP6984171B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device having a semiconductor element.

When the inductance in a semiconductor device having a semiconductor element such as a transistor is large, a large surge voltage may be generated. This surge voltage may adversely affect the operation of the semiconductor element. Therefore, the inductance in the semiconductor device should be as small as possible. Conventionally, semiconductor devices having been devised in various ways have been proposed in order to reduce the inductance.

Patent Document 1 describes a first connecting conductor (positive electrode connection terminal) that supplies a high potential to an upper arm on which a power semiconductor element is mounted, and a second connecting conductor (negative electrode) that supplies a low potential to a lower arm on which a power semiconductor element is mounted. Disclosed is a semiconductor device (power module) in which connection terminals) are laminated and arranged via an insulating sheet. According to the semiconductor device described in Patent Document 1, since the first connecting conductor and the second connecting conductor are laminated and arranged, the inductance can be reduced. Further, since the first connecting conductor and the second connecting conductor are arranged close to each other via the insulating sheet, the inductance can be reduced.

Japanese Unexamined Patent Publication No. 2011-15460

(Problems to be solved by the invention)
According to Patent Document 1, since a complicated process such as laminating and arranging the first connecting conductor and the second connecting conductor with the insulating sheet sandwiched between them is required, the manufacturing man-hours increase and the productivity deteriorates.

An object of the present invention is to provide a semiconductor device that is manufactured without deteriorating productivity and has a reduced inductance.

The semiconductor device according to the present invention is composed of a semiconductor element (171, 172) having an electrode forming surface (171a, 172b) on which an electrode is formed and a conductive metal, and is electrically connected to the electrode of the semiconductor element. A conductive plate (14, 15) having a surface (141, 151) on which a contact surface (S1, S2) in contact with the electrode forming surface is formed is provided. Further, on the surface of the conductive plate, a power supply connection portion mounting area (14c, 15c) to which the power supply connection portion (11, 12) connected to the power supply (V) is mounted is provided, which is the surface of the conductive plate. In the vicinity of the conductive path of the current flowing through the conductive plate and toward the electrode, or the conductive path of the current flowing from the electrode to the conductive plate, a surface area expansion portion (152) having an expanded surface surface is provided.

According to the present invention, a portion having an enlarged surface area is provided on the surface of the conductive plate in a region near the conductive path of the current flowing through the conductive plate. When a portion having an enlarged surface area is provided on the surface of the conductive plate in a region near the conductive path, the inductance of the conductive plate is reduced. Therefore, by manufacturing the semiconductor device using the conductive plate provided with the surface area expansion portion, the complicated manufacturing process of laminating the two conductive members with the insulating sheet sandwiched between them as in Patent Document 1 is not performed. It is possible to manufacture a semiconductor device having a reduced inductance. As described above, according to the present invention, it is possible to provide a semiconductor device that is manufactured without deteriorating productivity and has a reduced inductance.

Further, the surface area enlargement part is configured to open to a surface of the conductive plate, Ru recess der bottomed with side erected from the periphery of the bottom surface so as to surround the bottom surface and a bottom surface. If the surface area enlarged portion is a convex portion, the size of the semiconductor device is increased. On the other hand, if the surface area expansion portion is a recess, the inductance of the conductive plate can be reduced without inviting an increase in size of the semiconductor device.

Also, Table area enlargement part may be provided at the region near the line segment connecting the contact surfaces with the power connection attachment area. When a current flows from the power supply to the semiconductor element, the current flows linearly from the power supply connection portion mounting area where the power supply connection portion is attached to the contact surface in contact with the electrode forming surface of the semiconductor element. It is thought to flow. Further, when a current flows from the semiconductor element to the power supply, it is considered that the current flows linearly through the conductive plate from the contact surface in contact with the electrode forming surface of the semiconductor element toward the power supply connection portion mounting region. Therefore, by providing the surface area expansion portion in the vicinity of the line segment connecting the power supply connection portion mounting region and the contact surface in contact with the electrode forming surface of the semiconductor element on the surface of the conductive plate, the surface area expansion portion is sure to be the conductive plate. It will be provided in the vicinity of the conductive path of the current flowing through. Therefore, the inductance of the conductive plate can be reliably reduced.

Further, the surface area expansion portion may be provided in a region adjacent to the contact surface in contact with the electrode forming surface of the semiconductor element. The current flowing through the conductive plate passes through the contact surface in contact with the electrode forming surface of the semiconductor element. Therefore, by providing the surface area expansion portion in the region adjacent to the contact surface, the surface area expansion portion is always provided in the vicinity of the conductive path of the current flowing through the conductive plate. Therefore, the inductance of the conductive plate can be reliably reduced.

It is a top view of the semiconductor device which concerns on this embodiment. It is a top view which shows the arrangement relation of the positive electrode plate, the negative electrode plate, and a conductive plate embedded and fixed in the bottom surface of a case. It is a top view of the arm unit. FIG. 3 is a sectional view taken along line IV-IV of FIG. FIG. 6 is a sectional view taken along line VV of FIG. It is a top view of the divided bus bar. It is a side view of a split bus bar. It is a figure which shows the fragment. It is a figure which shows the terminal piece. It is a circuit diagram which shows the inverter circuit which is composed of the 1st semiconductor module, the 2nd semiconductor module, and the 3rd semiconductor module. It is a figure which shows the positive electrode conductive plate used for the calculation of the inductance. It is a figure which shows the negative electrode conductive plate used for calculation of inductance. It is a top view of the positive electrode conductive plate which showed the conductive path of electric current. It is a top view of the negative electrode conductive plate which showed the conductive path of electric current.

Hereinafter, the semiconductor device according to the embodiment of the present invention will be described with reference to the drawings. In this embodiment, a semiconductor device used as an inverter circuit of a three-phase DC brushless motor will be described. FIG. 1 is a plan view of the semiconductor device 1 according to the present embodiment. As shown in FIG. 1, the semiconductor device 1 includes a first semiconductor module 10A, a second semiconductor module 10B, a third semiconductor module 10C, and a case 40 accommodating these semiconductor modules.

The case 40 is made of an insulating material such as resin. Further, the case 40 includes a bottom wall 41 having a circular shape in a plan view, and a ring-shaped side wall 42 extending upward from the peripheral end of the bottom wall 41 along the central axis direction of the bottom wall 41. The tip of the side wall 42 is open. A control board or the like can be placed on this opening surface.

The first semiconductor module 10A, the second semiconductor module 10B, and the third semiconductor module 10C are arranged on the bottom wall 41 of the case 40. As can be seen from FIG. 1, the structures of the first semiconductor module 10A, the second semiconductor module 10B, and the third semiconductor module 10C are the same, and the respective semiconductor modules are arranged around the center of the bottom wall 41 at intervals of 120 °. Will be done.

The first semiconductor module 10A, the second semiconductor module 10B, and the third semiconductor module 10C have a positive electrode terminal 11, a negative electrode terminal 12, an output terminal 13, a positive electrode conductive plate 14, a negative electrode conductive plate 15, and output conductivity, respectively. A plate 16 and an arm unit 17 including five arm circuits (17a, 17b, 17c, 17d, 17e) are provided. The positive electrode conductive plate 14 and the negative electrode conductive plate 15 correspond to the conductive plate of the present invention.

Each of the positive electrode terminals 11, each negative electrode terminal 12, each output terminal 13, each positive electrode conductive plate 14, each negative electrode conductive plate 15, and each output conductive plate 16 included in the respective semiconductor modules 10A, 10B, 10C are made of conductive metal. It is composed. Examples of the conductive metal include copper, aluminum, molybdenum, and composite materials thereof. In this embodiment, they are formed of copper.

Each positive electrode terminal 11 included in each of the semiconductor modules 10A, 10B, and 10C has a cylindrical shape extending in a direction orthogonal to the paper surface of FIG. 1, and one end (upper end) thereof is the power supply side of the DC power supply. It is connected in parallel to the positive electrode terminal via the positive electrode line. Further, each negative electrode terminal 12 included in each of the semiconductor modules 10A, 10B, 10C has a cylindrical shape extending in a direction orthogonal to the paper surface of FIG. 1, and one end (upper end) thereof is a DC power supply. It is connected in parallel to the negative electrode terminal on the power supply side via the negative electrode line. Therefore, each positive electrode terminal 11 is connected to the positive electrode side of the DC power supply, and each negative electrode terminal 12 is connected to the negative electrode side of the DC power supply. The positive electrode terminal 11 and the negative electrode terminal 12 correspond to the power supply connection portion of the present invention. Further, the DC power supply can be any device that has a power supply side positive electrode terminal and a power supply side negative electrode terminal and can apply a DC voltage between the power supply side positive electrode terminal and the power supply side negative electrode terminal. good. For example, as a DC power source, a battery, a battery, or the like can be exemplified. Further, electric power smoothed by a smoothing capacitor after full-wave rectification or half-wave rectification of alternating current such as commercial alternating current, so-called intermediate direct current power, can also be used as a direct current power source.

Further, the other end (lower end) of the positive electrode terminal 11 is electrically connected to the positive electrode conductive plate 14, and the other end (lower end) of the negative electrode terminal 12 is electrically connected to the negative electrode conductive plate 15. Therefore, each positive electrode conductive plate 14 included in each of the semiconductor modules 10A, 10B, 10C is electrically connected to the power supply side positive electrode terminal of the DC power supply via each positive electrode terminal 11 and the positive electrode line, and each semiconductor module 10A, Each of the negative electrode conductive plates 15 included in the 10B and 10C is electrically connected to the power supply side negative electrode terminal of the DC power supply via each negative electrode terminal 12 and the negative electrode line.

Further, each output terminal 13 included in each of the semiconductor modules 10A, 10B, and 10C has a cylindrical shape extending in a direction orthogonal to the paper surface of FIG. 1, like each positive electrode terminal 11 and each negative electrode terminal 12. There is. Further, one end (upper end) of the output terminal 13 included in the first semiconductor module 10A is electrically connected to the U-phase coil of the 3-phase DC brushless motor via an output line, and the output terminal included in the second semiconductor module 10B is provided. One end (upper end) of 13 is electrically connected to the V-phase coil of the 3-phase DC brushless motor via an output line, and one end (upper end) of the output terminal 13 included in the third semiconductor module 10C is an output line. It is electrically connected to the W-phase coil of the 3-phase brushless motor via. Further, the other end (lower end) of each output terminal 13 included in each of the semiconductor modules 10A, 10B, 10C is connected to each output conductive plate 16.

Each of the positive electrode conductive plates 14, the negative electrode conductive plates 15, and the output conductive plates 16 included in the respective semiconductor modules 10A, 10B, and 10C are embedded and fixed in the bottom wall 41 of the case 40. FIG. 2 is a plan view showing the arrangement relationship of the positive electrode conductive plate 14, the negative electrode conductive plate 15, and the output conductive plate 16 embedded and fixed in the bottom wall 41 of the case 40. The positive electrode conductive plate 14 embedded in the bottom wall 41 of the case 40 is exposed from the bottom wall 41 at one end surface thereof. Similarly, the negative electrode conductive plate 15 embedded in the bottom wall 41 of the case 40 is exposed from the bottom wall 41 at one end surface thereof, and the output conductive plate 16 embedded in the bottom wall 41 of the case 40 is one end surface thereof. Is exposed from the bottom wall 41. The exposed surface of the positive electrode conductive plate 14 constitutes the positive electrode surface 141, and the exposed surface of the negative electrode conductive plate 15 constitutes the negative electrode surface 151. Therefore, FIG. 2 shows the positive electrode surface 141 of the positive electrode conductive plate 14, the negative electrode surface 151 of the negative electrode conductive plate 15, and the exposed surface 161 from the bottom wall 41 of the output conductive plate 16, respectively. The positive electrode surface 141 and the negative electrode surface 151 correspond to the "surface" of the conductive plate in the present invention.

As shown in FIG. 2, the positive electrode surface 141 of the positive electrode conductive plate 14 is composed of a trapezoidal region 14a and a rectangular region 14b connected to the lower bottom of the trapezoidal region 14a. In the trapezoidal region 14a, a positive electrode terminal mounting region 14c to which the other end of the positive electrode terminal 11 is connected is formed. Further, the negative electrode surface 151 of the negative electrode conductive plate 15 is also composed of a trapezoidal region 15a and a rectangular region 15b connected to the lower bottom of the trapezoidal region 15a. A negative electrode terminal mounting region 15c to which the other end of the negative electrode terminal 12 is connected is formed in the trapezoidal region 15a. The positive electrode terminal mounting area 14c and the negative electrode terminal mounting area 15c correspond to the power supply connection portion mounting area of the present invention.

Further, in the positive electrode conductive plate 14 and the negative electrode conductive plate 15, the end side 14d of the rectangular region 14b of the positive electrode surface 141 and the end side 15d of the rectangular region 15b of the negative electrode surface 151 face each other with a certain minute distance α. It is embedded in the bottom wall 41 of the case 40. The minute distance α between the end side 14d and the end side 15d corresponds to the distance between the positive electrode conductive plate 14 and the negative electrode conductive plate 15. The smaller the minute distance α is, the better. For example, the minute distance α can be set to 0.05 mm to 1.0 mm. In this way, the positive electrode conductive plate 14 and the negative electrode conductive plate 15 are arranged adjacent to each other (closely arranged) with a minute distance α in a state of being embedded in the bottom wall 41 of the case 40.

Here, for convenience of explanation, the left-right direction in the plan view of FIG. 2 is defined as the X direction, the right side is defined as the X1 direction, and the left side is defined as the X2 direction. Further, the vertical direction (that is, the direction orthogonal to the X direction) in the plan view of FIG. 2 is defined as the Y direction. Further, the direction orthogonal to the X direction and the Y direction, that is, the vertical vertical direction is defined as the Z direction. When the direction is defined in this way, as can be seen from FIG. 2, the minute distance α represents the distance between the positive electrode conductive plate 14 and the negative electrode conductive plate 15 along the Y direction. Further, the positive electrode conductive plate 14 and the negative electrode conductive plate 15 are arranged adjacent to each other with the rectangular regions 14b and 15b facing each other at a minute distance α along the Y direction.

Further, the positive electrode surface 141 of the positive electrode conductive plate 14 and the negative electrode surface 151 of the negative electrode conductive plate 15 are formed in line symmetry with respect to the straight line L passing through the midpoint of the minute distance α in the Y direction and along the X direction. .. Further, the exposed surface 161 of the output conductive plate 16 is formed in a region on the X1 direction side of the positive electrode surface 141 of the positive electrode conductive plate 14 and the negative electrode surface 151 of the negative electrode conductive plate 15 and in a region through which the straight line L passes. To.

Further, the first transistor 171 provided in each of the five arm circuits described later is connected to the rectangular region 14b of the positive electrode surface 141 of the positive electrode conductive plate 14, and the rectangular region 15b of the negative electrode surface 151 of the negative electrode conductive plate 15 is connected to the rectangular region 15b. A second transistor 172 included in each of the five arm circuits described later is connected. As can be seen from FIG. 2, the first transistor 171 included in each of the five arm circuits is connected to the rectangular region 14b of the positive electrode surface 141 so as to be linearly aligned along the X direction. Similarly, the second transistor 172 included in each of the five arm circuits is also connected to the rectangular region 15b of the negative electrode surface 151 so as to be linearly aligned along the X direction.

Next, the arm unit 17 will be described. FIG. 3 is a plan view of the arm unit 17. In FIG. 3, the left-right direction is the X direction, the right side is the X1 direction, the left side is the X2 direction, and the vertical direction is the Y direction. As described above, the arm unit 17 is composed of five arm circuits (first arm circuit 17a, second arm circuit 17b, third arm circuit 17c, fourth arm circuit 17d, fifth arm circuit 17e). .. As can be seen from FIG. 3, each arm circuit is arranged so as to be aligned along the X direction. Specifically, the first arm circuit 17a, the second arm circuit 17b, the third arm circuit 17c, the fourth arm circuit 17d, and the fifth arm circuit 17e are arranged in this order in the X1 direction. .. The configuration of each arm circuit is basically the same. Typically, the configuration of the first arm circuit 17a will be described.

FIG. 4 is a sectional view taken along line IV-IV of FIG. 3, showing a sectional view taken along the Y direction of the first arm circuit 17a. The left-right direction in FIG. 4 is the Y direction, and the vertical direction is the Z direction (vertical direction). Further, of the Z directions, the upward direction is defined as the Z1 direction, and the downward direction is defined as the Z2 direction. As shown in FIG. 4, the first arm circuit 17a includes a first transistor 171 and a second transistor 172, and a first division piece 51a of the division bus bar 50 described later. The first transistor 171 and the second transistor 172 correspond to the semiconductor element of the present invention.

The first transistor 171 and the second transistor 172 are N-channel type power MOSFETs in this embodiment. The first transistor 171 has a thin plate shape, and one surface 171a and the other surface 171b facing the opposite side to the one surface 171a are formed along the plate thickness direction. The drain electrode D is formed on one surface 171a, and the source electrode S and the gate electrode G are formed on the other surface 171b. Similarly, the second transistor 172 also has a thin plate shape, and one surface 172a and the other surface 172b facing the opposite side to the one surface 172a are formed along the plate thickness direction. The drain electrode D is formed on one surface 172a, and the source electrode S and the gate electrode G are formed on the other surface 172b.

The first transistor 171 is arranged on the rectangular region 14b of the positive electrode surface 141 of the positive electrode conductive plate 14 embedded in the bottom wall 41 of the case 40, and is bonded to the positive electrode conductive plate 14 via a bonding material 191 such as solder. Will be done. In this case, the first transistor 171 is a positive electrode in a state where one surface 171a of the first transistor 171, that is, the surface on which the drain electrode D is formed, is arranged facing the rectangular region 14b of the positive electrode surface 141 of the positive electrode conductive plate 14. It is joined to the conductive plate 14. At this time, of the positive electrode surface 141 of the positive electrode conductive plate 14, the portion shown as the region S1 in FIG. 4 comes into contact with one surface 171a of the first transistor 171 via the bonding material 191. One surface 171a of the first transistor 171 corresponds to the electrode forming surface of the present invention, and the drain electrode D formed on the one surface 171a corresponds to the electrode of the present invention. Further, in the positive electrode surface 141 of the positive electrode conductive plate 14, the region S1 corresponds to the contact surface of the present invention. Hereinafter, the region S1 may be referred to as a contact surface S1. At the contact surface S1, the drain electrode D of the first transistor 171 is electrically connected to the positive electrode conductive plate 14.

The second transistor 172 is arranged on the rectangular region 15b of the negative electrode surface 151 of the negative electrode conductive plate 15 embedded in the bottom wall 41 of the case 40, and is bonded to the negative electrode conductive plate 15 via a bonding material 192 such as solder. Will be done. In this case, the second surface 172b of the second transistor 172, that is, the surface on which the source electrode S and the gate electrode G are formed, is arranged facing the rectangular region 15b of the negative electrode surface 151 of the negative electrode conductive plate 15. The transistor 172 is bonded to the negative electrode conductive plate 15. At this time, of the negative electrode surface 151 of the negative electrode conductive plate 15, the portion shown as the region S2 in FIG. 4 comes into contact with the other surface 172b of the second transistor 172 via the bonding material 192. The other surface 172b of the second transistor 172 corresponds to the electrode forming surface of the present invention, and the source electrode S formed on the other surface 172b corresponds to the electrode of the present invention. Further, in the negative electrode surface 151 of the negative electrode conductive plate 15, the region S2 corresponds to the contact surface of the present invention. Hereinafter, the region S2 may be referred to as a contact surface S2. At the contact surface S2, the source electrode S of the second transistor 172 is electrically connected to the negative electrode conductive plate 15.

As shown in FIG. 4, since the positive electrode surface 141 of the positive electrode conductive plate 14 and the negative electrode surface 151 of the negative electrode conductive plate 15 are both exposed surfaces from the bottom wall 41, they are the same plane as the bottom surface (surface) of the bottom wall 41. Inside, that is, they are formed in the same plane and face the same direction. In FIG. 4, the positive electrode surface 141 of the positive electrode conductive plate 14 and the negative electrode surface 151 of the negative electrode conductive plate 15 face the Z1 direction (upward). One of the two surfaces (141, 151) facing the same direction (for example, the positive electrode surface 141 of the positive electrode conductive plate 14) faces the surface on which the drain electrode D of one transistor (for example, the first transistor 171) is formed. One transistor is arranged so as to be arranged, and the source electrode S and the gate electrode G of the other transistor (for example, the second transistor 172) are formed on the other surface (for example, the negative electrode surface 151 of the negative electrode conductive plate 15). The other transistor is arranged so that the two faces face each other. That is, the two transistors (171 and 172) are arranged on the respective conductive plates (positive electrode conductive plate 14 and negative electrode conductive plate 15) so as to face each other in opposite directions. In other words, both transistors are arranged in a state where the other transistor is inverted with respect to one transistor. Therefore, the orientation of the surface (one surface 171a) on which the drain electrode D of the first transistor 171 is formed and the orientation of the surface (the other surface 172b) on which the source electrode S and the gate electrode G of the second transistor 172 are formed are different. The same direction, that is, downward (Z2 direction). Further, the orientation of the surface on which the source electrode S and the gate electrode G of the first transistor 171 are formed (the other surface 171b) and the orientation of the surface on which the drain electrode D of the second transistor 172 is formed (one surface 172a) are the same. The direction, that is, the upward direction (Z1 direction direction).

As can be seen from FIG. 4, the first transistor 171 and the second transistor 172 are electrically connected via the first partition piece 51a. As described above, the first divided piece 51a constitutes a part of the divided bus bar 50 which is a lead frame. Here, the divided bus bar 50 will be described.

FIG. 6 is a plan view of the divided bus bar 50, and FIG. 7 is a side view of the divided bus bar 50. In FIGS. 6 and 7, the left-right direction is the X direction, the right side is the X1 direction, and the left side is the X2 direction. Further, the vertical direction in FIG. 6 is the Y direction. Further, the vertical direction in FIG. 7 is the Z direction, the upper direction is the Z1 direction, and the lower direction is the Z2 direction. As shown in FIGS. 6 and 7, the divided bus bar 50 includes four divided pieces (first divided piece 51a, second divided piece 51b, third divided piece 51c, fourth divided piece 51d) and one. It has a terminal piece 52 and is configured by connecting these. The shape of each piece is the same. Each divided piece is generically referred to as a divided piece 51.

8A and 8B are views showing the divided pieces 51, FIG. 8A is a plan view of the divided pieces 51, and FIG. 8B is a side view of the divided pieces 51. 9A and 9B are views showing the terminal piece 52, FIG. 9A is a plan view of the terminal piece 52, and FIG. 9B is a side view of the terminal piece 52. The orientation of the split piece 51 shown in FIG. 8 (a) and the orientation of the terminal piece 52 shown in FIG. 9 (a) coincide with the orientation of the split piece 51 and the terminal piece 52 shown in FIG. The orientation of the divided piece 51 shown and the orientation of the terminal piece 52 shown in FIG. 9B coincide with the orientation of the divided piece 51 and the terminal piece 52 shown in FIG. 7. That is, the left-right direction of FIGS. 8A and 9A is the X direction, the right side is the X1 direction, the left side is the X2 direction, and the vertical direction is the Y direction. Further, in FIGS. 8 (b) and 9 (b), the left-right direction is the X direction, the right side is the X1 direction, the left side is the X2 direction, the vertical direction is the Z direction, the upper direction is the Z1 direction, and the lower side is the Z2 direction. be.

As is well shown in FIG. 8A, the split piece 51 has a first joint portion 511, a second joint portion 512, an in-arm connection portion 513, and an arm-to-arm connection portion 514, and has elasticity of copper or the like. It is composed of a conductive metal with a high coefficient. Further, as is well shown in FIG. 9A, the terminal piece 52 has a first joint portion 521, a second joint portion 522, an in-arm connection portion 523, and a terminal connection portion 524, and is made of copper or the like. It is composed of a conductive metal having a high elastic modulus.

FIG. 4 shows a cross section of the first divided piece 51a as the divided piece 51. The divided piece 51 extends in the Y direction when viewed from the cross-sectional direction (X direction) shown in FIG. Further, an upwardly convex (convex in the Z1 direction) convex portion is formed at the central portion of the divided piece 51 in the Y direction. The portion extending to the left in the Y direction of FIG. 4 from the left lower end of the convex portion constitutes the first joint portion 511, and the portion extending to the right in the Y direction of FIG. 4 from the right lower end of the convex portion constitutes the second joint. The portion 512 is formed, and the convex portion constitutes the connecting portion 513 in the arm. Therefore, the first joint portion 511, the in-arm connection portion 513, and the second joint portion 512 are formed in this order along the Y direction.

Further, as can be seen from FIG. 8A, the arm-to-arm connection portion 514 extends from the in-arm connection portion 513 in the X1 direction. Further, as can be seen from FIG. 8B, an inclined portion 515 is formed between the in-arm connection portion 513 and the arm-to-arm connection portion 514. The inclined portion 515 is configured to be inclined diagonally upward from the in-arm connecting portion 513 toward the arm-to-arm connecting portion 514 along the X direction. Then, the upper end portion of the convex in-arm connection portion 513 is connected to the lower end (left end) of the inclined portion 515, and the arm-to-arm connection portion 514 is connected to the upper end (right end) of the inclined portion 515. .. Therefore, the vertical position (Z-direction position) of the arm-to-arm connecting portion 514 when the divided piece 51 is viewed from the side surface is higher than the vertical position of the upper side portion of the connecting portion 513 in the arm. Specifically, the vertical position (Z direction position) of the lower surface 514a of the arm-to-arm connecting portion 514 is substantially equal to the vertical position of the upper surface 513b of the connecting portion 513 in the arm.

As shown in FIG. 6, in the four divided pieces 51 having the above structure, each first joint portion 511 is arranged on a straight line along the X direction, and each second joint portion 512 is X. They are aligned so that they are arranged on a straight line along the direction. At this time, as shown in FIG. 7, the arm-to-arm connection portion 514 of the first division piece 51a is overlapped directly above the in-arm connection portion 513 of the second division piece 51b, and the arm-to-arm connection portion 514 of the second division piece 51b is superposed. Is overlapped directly above the in-arm connection portion 513 of the third division piece 51c, and the inter-arm connection portion 514 of the third division piece 51c is overlapped directly above the in-arm connection portion 513 of the fourth division piece 51d. The four split pieces 51 are aligned along the X direction. Then, the arm-to-arm connection portion 514 of one split piece 51 and the in-arm connection portion 513 of the other split pieces 51 are joined by a joining material such as solder. In this way, the four divided pieces 51 are connected. Further, of the four divided pieces 51 connected, the terminal piece 52 is connected to the arm-to-arm connection portion 514 of the fourth divided piece 51d.

The shapes of the first joint portion 521, the second joint portion 522, and the in-arm connection portion 523 of the terminal piece 52 are the first joint portion 511, the second joint portion 512, and the in-arm connection portion 513 of the split piece 51, respectively. It is almost the same as the shape of. That is, the terminal piece 52 extends in the Y direction when viewed from the X direction, like the divided piece 51 shown in FIG. 4, and an upwardly convex convex portion is formed in the central portion thereof. This convex portion constitutes the in-arm connection portion 523, the first joint portion 521 extends to the left from the left lower end of the in-arm connection portion 523, and the second joint portion 522 extends from the right lower end of the in-arm connection portion 523. Is extended to the right. Further, as shown in FIG. 9A, the terminal connection portion 524 of the terminal piece 52 extends in the X1 direction from the connection portion 523 in the arm. Further, as can be seen from FIG. 9B, a vertical portion 525 is formed between the in-arm connection portion 523 and the terminal connection portion 524. The vertical portion 525 extends in the vertical direction (Z direction), the upper end portion of the convex in-arm connection portion 523 is connected to the upper end thereof, and the terminal connection portion 524 is connected to the lower end portion thereof. Therefore, the vertical position (Z-direction position) of the terminal connection portion 524 when the terminal piece 52 is viewed from the side surface is lower than the vertical position of the upper side portion of the connection portion 513 in the arm. The vertical position (Z direction position) of the lower surface 524a of the terminal connection portion 524 is equal to the vertical position of the lower surface 521a (and the lower surface of the second joint portion 522) of the first joint portion 521.

The terminal pieces 52 are aligned with the four divided pieces 51 connected as shown in FIG. At this time, the terminal piece 52 is arranged with the first joint portion 521 together with the first joint portion 511 of the four connected split pieces 51 on a straight line along the X direction, and the second joint portion 522 , Together with the second joint 512 of the four connected pieces 51, are arranged with respect to the four connected pieces 51 so as to be arranged on a straight line along the X direction. Further, as shown in FIG. 7, the in-arm connection portion 523 of the terminal piece 52 is connected to the four division pieces 51 so as to be overlapped directly under the arm-to-arm connection portion 514 of the fourth division piece 51d. It is arranged against the other. Then, the in-arm connection portion 523 of the terminal piece 52 and the arm-to-arm connection portion 514 of the fourth divided piece 51d arranged immediately above the terminal piece 52 are joined via a joining material such as solder. In this way, the in-arm connection portion 523 of the terminal piece 52 is connected to the fourth division piece 51d.

As shown in FIG. 6, in the divided bus bar 50 having the above configuration, the first divided piece 51a, the second divided piece 51b, the third divided piece 51c, the fourth divided piece 51d, and the terminal piece 52 are arranged along the X direction. It is configured to be aligned in a row. Then, as shown in FIG. 3, in the divided bus bar 50, the connecting direction of each divided piece 51 and the terminal piece 52 (that is, the alignment direction of each divided piece 51 and the terminal piece 52) coincides with the X direction, and the divided bus bar 50 is in the X direction. It is arranged in the case 40 so as to cross the five arm circuits (17a, 17b, 17c, 17d, 17e) arranged in the same manner. By disposing the split bus bar 50 for the five arm circuits in this way, the first split piece 51a is assigned to the first arm circuit 17a, and the second split piece 51b is assigned to the second arm circuit 17b. The third division piece 51c is assigned to the third arm circuit 17c, the fourth division piece 51d is assigned to the fourth arm circuit 17d, and the terminal piece 52 is assigned to the fifth arm circuit 17e.

As shown in FIG. 4, the source electrode S and the gate electrode G of the first transistor 171 are formed in the first junction portion 511 of the division piece 51 (first division piece 51a) assigned to the first arm circuit 17a. It faces the other surface 171b, which is a surface, and the second junction 512 of the divided piece 51 faces the one surface 172a, which is the surface on which the drain electrode D of the second transistor 172 is formed. Then, the first joint portion 511 of the divided pieces 51 arranged face-to-face and the other surface 171b of the first transistor 171 are joined via a bonding material 193 such as solder, and the second joint portion 512 of the divided pieces 51 arranged facing each other. One side 172a of the second transistor 172 is joined via a bonding material 194 such as solder.

The connection configuration of the dividing piece 51 and the terminal piece 52 assigned to the second to fifth arm circuits and the first transistor 171 and the second transistor 172 is the same as described above.

5 is a VV cross-sectional view of FIG. 3, showing a cross-sectional view of the split bus bar 50 along the Y direction. As shown in FIG. 5, the arm-to-arm connection portion 514 of the first partition piece 51a assigned to the first arm circuit 17a is connected to the in-arm connection portion 513 of the second partition piece 51b assigned to the second arm circuit 17b. Be connected. Further, the arm-to-arm connection portion 514 of the second division piece 51b assigned to the second arm circuit 17b is connected to the in-arm connection portion 513 of the third division piece 51c assigned to the third arm circuit 17c. Further, the arm-to-arm connection portion 514 of the third division piece 51c assigned to the third arm circuit 17c is connected to the in-arm connection portion 513 of the fourth division piece 51d assigned to the fourth arm circuit 17d. Then, the arm-to-arm connection portion 514 of the fourth division piece 51d assigned to the fourth arm circuit 17d is connected to the in-arm connection portion 523 of the terminal piece 52 assigned to the fifth arm circuit 17e. Further, the terminal connection portion 524 of the terminal piece 52 assigned to the fifth arm circuit 17e is connected to the exposed surface 161 of the output conductive plate 16 embedded in the bottom wall 41 of the case 40. The output terminal 13 is connected to the output conductive plate 16 as described above. Therefore, the divided bus bar 50 is connected to the output terminal 13 via the output conductive plate 16.

Further, as shown in FIG. 4, a first junction portion is formed in a part of the other surface 171b of the first transistor 171 where the gate electrode G is formed and the part where the source electrode S is formed. 511 (521) is not joined. Then, one end of the flexible wiring 61, which is a flexible electric wire, is connected to the portion of the other surface 171b of the first transistor 171 where the gate electrode G is formed, and the other surface 171b of the first transistor 171 is connected. One end of the flexible wiring 63, which is a flexible electric wire, is connected to the portion where the source electrode S is formed. Further, one end of the flexible wiring 62, which is a flexible electric wire, is also connected to the portion of the other surface 172b of the second transistor 172 where the gate electrode G is formed, and the other surface 172b of the second transistor 172 is connected. One end of the flexible wiring 64, which is a flexible electric wire, is also connected to a portion of the portion where the source electrode S is formed. Here, the other surface 172b of the second transistor 172 is a downward surface, and when the entire surface thereof is in face-to-face contact with the negative electrode surface 151 of the negative electrode conductive plate 15, the flexible wirings 62 and 64 are connected to the other of the second transistor 172. Cannot connect to direction 172b. In this regard, in the present embodiment, the negative electrode surface 151 of the negative electrode conductive plate 15 faces the gate electrode G and the source electrode S adjacent to the contact surface S2 and formed on the other surface 172b of the second transistor 172. A recess 152 communicating with the internal space of the case 40 is formed in the portion, and one end of the flexible wirings 62 and 64 is connected to the other surface 172b (lower surface) of the second transistor 172 via the recess 152. Ru. Here, since the flexible wirings 62 and 64 have flexibility, by folding the flexible wirings 62 and 64 in the recess 152 as shown in FIG. 4, one end of the flexible wirings 62 and 64 is surely seconded. It can be connected to the gate electrode G and the source electrode S formed on the other surface 172b of the transistor 172. The other end of the flexible wiring 61, 62, 63, 64 is connected to a control board (not shown). The recess 152 corresponds to the surface area expansion portion of the present invention.

FIG. 10 is a circuit diagram showing an inverter circuit composed of a first semiconductor module 10A, a second semiconductor module 10B, and a third semiconductor module 10C having the above configuration. As shown in FIG. 10, the positive electrode terminals 11 of the semiconductor modules 10A, 10B, and 10C are connected in parallel to the positive electrode line P connected to the power supply side positive electrode terminal VP of the DC power supply V, and each semiconductor module 10A, The negative electrode terminals 12 of the 10B and 10C are connected in parallel to the negative electrode line N connected to the power supply side negative electrode terminal VN of the DC power supply V. Therefore, the semiconductor device 1 (inverter circuit) according to the present embodiment includes a positive electrode line P connected to the power supply side positive electrode terminal VP of the DC power supply V and a negative electrode line N connected to the power supply side negative electrode terminal VN of the DC power supply V. It is a semiconductor device including a plurality of semiconductor modules (first semiconductor module 10A, second semiconductor module 10B, third semiconductor module 10C) connected in parallel between the semiconductors.

Further, the five arm circuits (first arm circuit 17a, second arm circuit 17b, third arm circuit 17c, fourth arm circuit 17d, fifth arm circuit 17e) included in each semiconductor module 10A, 10B, 10C are The positive electrode conductive plate 14 connected to the positive electrode terminal 11 and the negative electrode conductive plate 15 connected to the negative electrode terminal 12 are connected in parallel. Further, the divided pieces 51 and the terminal pieces 52 assigned to the five arm circuits connected in parallel are connected in series to the output conductive plate 16 connected to the output terminal 13. Then, the output terminal 13 of the first semiconductor module 10A is connected to the U-phase coil of the 3-phase DC brushless motor M via the first output line 71, and the output terminal 13 of the second semiconductor module 10B is connected to the second output line. It is connected to the V-phase coil of the 3-phase DC brushless motor M via 72, and the output terminal 13 of the third semiconductor module 10C is connected to the W-phase coil of the 3-phase DC brushless motor M via the third output line 73. To.

The five first transistors 171 and the five second transistors 172 provided in the semiconductor modules 10A, 10B, and 10C, respectively, function as switching elements. In this case, when a signal is input from the control board 60 to the gate electrodes G of the transistors 171 and 172 in a predetermined pattern, the transistors 171 and 172 are switched. Further, in the present embodiment, the five first transistors 171 included in each of the semiconductor modules 10A, 10B, and 10C operate at the same time. That is, the ON operation and the OFF operation of the five first transistors 171 are all performed at the same timing. Similarly, the five second transistors 172 included in each of the semiconductor modules 10A, 10B, and 10C operate simultaneously. That is, the ON operation and the OFF operation of the five second transistors 172 are all performed at the same timing.

In the inverter circuit shown in FIG. 10, for example, when the first transistor 171 of the first semiconductor module 10A and the second transistor 172 of the third semiconductor module 10C are turned on and the other transistors are turned off, the inside of the inverter circuit The current flows as follows. That is, the current from the positive electrode line P flows in this order to the positive electrode terminal 11, the positive electrode conductive plate 14, the first transistor 171 and the split bus bar 50, the output conductive plate 16, and the output terminal 13 of the first semiconductor module 10A. Then, a current is supplied from the output terminal 13 of the first semiconductor module 10A to the U-phase coil of the three-phase DC brushless motor M via the first output line 71. Further, the current from the W-phase coil of the 3-phase DC brushless motor M flows to the output terminal 13 of the third semiconductor module 10C via the third output line 73, and further, the output conductive plate 16 of the third semiconductor module 10C. , The split bus bar 50, the second transistor 172, the negative electrode conductive plate 15, and the negative electrode terminal 12, in this order. Then, a current flows from the negative electrode terminal 12 of the third semiconductor module 10C to the negative electrode line N.

Further, for example, when the first transistor 171 of the second semiconductor module 10B and the second transistor 172 of the first semiconductor module 10A are turned on and the other transistors are turned off, the current in the inverter circuit is as follows. Flow like. That is, the current from the positive electrode line P flows in this order to the positive electrode terminal 11, the positive electrode conductive plate 14, the first transistor 171 and the split bus bar 50, the output conductive plate 16, and the output terminal 13 of the second semiconductor module 10B. Then, a current is supplied from the output terminal 13 of the second semiconductor module 10B to the V-phase coil of the three-phase DC brushless motor M via the second output line 72. Further, the current from the U-phase coil of the 3-phase DC brushless motor M flows to the output terminal 13 of the first semiconductor module 10A via the first output line 71, and further, the output conductive plate 16 of the first semiconductor module 10A. , The split bus bar 50, the second transistor 172, the negative electrode conductive plate 15, and the negative electrode terminal 12, in this order. Then, a current flows from the negative electrode terminal 12 of the first semiconductor module 10A to the negative electrode line N.

As in the above example, when the first transistor 171 of each semiconductor module 10A, 10B, 10C is turned on, a current flows from the positive electrode conductive plate 14 to the first transistor 171. On the other hand, when the second transistor 172 of each semiconductor module 10A, 10B, 10C is turned on, a current flows from the second transistor 172 to the negative electrode conductive plate 15. When the flow of these currents is shown in FIG. 4, the direction of the current flowing through the positive electrode conductive plate 14 is upward (Z1 direction) as shown by arrow A, and the direction of the current flowing through the negative electrode conductive plate 15 is indicated by arrow B. As shown, it is downward (Z2 direction). That is, the direction of the current flowing through the positive electrode conductive plate 14 and the direction of the current flowing through the negative electrode conductive plate 15 are opposite.

Mutual inductance increases when members in which currents flow in opposite directions are placed close to each other. Therefore, the inductances cancel each other out, and the inductance can be reduced. According to the present embodiment, the positive electrode surface 141 (the surface connected to one surface 171a of the first transistor 171) of the positive electrode conductive plate 14 and the negative electrode surface 151 (the other surface 172b of the second transistor 172) of the negative electrode conductive plate 15 are connected. By making the surface to be oriented in the same direction, it is realized that the positive electrode conductive plate 14 and the negative electrode conductive plate 15 in which the current flows in opposite directions are arranged side by side in parallel. Therefore, the distance (minute distance α) between the positive electrode conductive plate 14 and the negative electrode conductive plate 15 arranged adjacent to each other can be made as small as possible. As a result, the inductance of the positive electrode conductive plate 14 and the negative electrode conductive plate 15 can be reduced.

Further, the positive electrode surface 141 of the positive electrode conductive plate 14 (the surface connected to one surface 171a of the first transistor 171) and the negative electrode surface 151 of the negative electrode conductive plate 15 (the surface connected to the other surface 172b of the second transistor 172). In order to make the same direction, the direction of the first transistor 171 and the direction of the second transistor 172 are reversed. As a result, the other surface 171b of the first transistor 171 and the one surface 172a of the second transistor 172 are oriented in the same direction (upward). Therefore, the other surface 171b of the first transistor 171 and the one surface 172a of the second transistor 172 can be linearly connected, and therefore, the other surface 171b of the first transistor 171 and the one surface 172a of the second transistor 172 can be connected to each other. It is possible to shorten the length of the connecting portion (connecting portion 513, 523 in the arm) for connecting the above. As a result, the inductance of the connection portion can be reduced.

Further, in the semiconductor device 1 according to the present embodiment, as shown well in FIG. 4, a recess 152 is formed on the negative electrode surface 151 of the negative electrode conductive plate 15. As described above, the recess 152 is provided with flexible wirings 62 and 64 connected to the other surface 172b of the second transistor 172. Further, the recess 152 is provided in a region of the negative electrode surface 151 of the negative electrode conductive plate 15 adjacent to the contact surface S2 which is in contact with the other surface 172b of the second transistor 172 via the bonding material 192.

Since the recess 152 is provided adjacent to the contact surface S2, the current flowing from the source electrode S formed on the other surface 172b of the second transistor 172 to the negative electrode conductive plate 15 passes in the vicinity of the recess 152. Become. In other words, the recess 152 is provided on the negative electrode surface 151 of the negative electrode conductive plate 15 in a region near the conductive path of the current flowing from the source electrode S of the second transistor 172 to the negative electrode conductive plate 15.

In the present embodiment, the shape of the space in the recess 152 is a rectangular parallelepiped shape. Therefore, as shown in FIG. 4, the surface of the recess 152 is composed of a rectangular (or square) bottom surface 152a and four side surfaces 152b erected from the four sides of the bottom surface 152a. Therefore, the surface area of the recess 152 is represented by the sum of the area of the bottom surface 152a and the area of the four side surfaces 152b. Further, the opening area of the recess 152 is equal to the area of the bottom surface 152a of the recess 152.

The opening area of the recess 152 is the area of the negative electrode surface 151 of the negative electrode conductive plate 15 in which the recess 152 is provided. Further, the surface area of the recess 152 (the sum of the area of the bottom surface 152a and the area of the four side surfaces 152b) is larger than the opening area of the recess 152. Therefore, by providing the recess 152, the surface area of the negative electrode conductive plate 15 is expanded. That is, the recess 152 is a surface area expansion portion.

When a portion such as a recess that expands the surface area is provided on the surface of the conductive substrate in the vicinity of the conductive path of the current flowing through the conductive substrate, the inductance of the conductive substrate may be reduced. Recent studies have revealed. Therefore, the inductance of the negative electrode conductive plate 15 can be reduced by the recess 152. Hereinafter, a verification experiment on reduction of inductance due to the presence of recesses will be described.

A shape model of the first semiconductor module 10A included in the semiconductor device 1 shown in FIG. 1 was produced. Please refer to FIG. 2 for the arrangement of the first and second transistors 171.172. Next, in the produced shape model, the positive electrode conductive plate 14 when a current is passed from the positive electrode terminal 11 to the output terminal 13 when the five first transistors 171 are on and the five second transistors 172 are off. Inductance was calculated by computer simulation. As a result, the inductance of the positive electrode conductive plate 14 was 3.17 nanohenry. The simulation software used to calculate the inductance is Q3D manufactured by Ansys Japan Co., Ltd.

Further, in the shape model of the first semiconductor module 10A described above, when a current is passed from the output terminal 13 to the negative electrode terminal 12 when the five first transistors 171 are off and the five second transistors 172 are on. The inductance of the negative electrode conductive plate 15 in the above was calculated using the above software. As a result, the inductance of the negative electrode conductive plate 15 was 2.53 nanohenry.

FIG. 11 is a diagram showing a positive electrode conductive plate 14 used for calculating the inductance. Here, FIG. 11A is a front view of the positive electrode conductive plate 14, FIG. 11B is a side view of the positive electrode conductive plate 14, and FIG. 11C is a bottom view of the positive electrode conductive plate 14. Further, FIG. 12 is a diagram showing a negative electrode conductive plate 15 used for calculating the inductance. Here, FIG. 12A is a front view of the negative electrode conductive plate 15, FIG. 12B is a side view of the negative electrode conductive plate 15, and FIG. 12C is a bottom view of the negative electrode conductive plate 15. The unit of dimensions shown in FIGS. 11 and 12 is millimeters.

As can be seen by comparing FIGS. 11 and 12, the outer shape of the positive electrode conductive plate 14 and the outer shape of the negative electrode conductive plate 15 are symmetrical. However, as shown in FIGS. 4 and 12, the negative electrode surface 151 of the negative electrode conductive plate 15 has a region adjacent to the contact surface S2 with the other surface 172b of the second transistor 172, that is, the current flowing through the negative electrode conductive plate 15. While the recess 152 is formed in the vicinity of the conductive path, such a recess is not formed on the positive electrode surface 141 of the positive electrode conductive plate 14. From this, it can be seen that the inductance is reduced by providing the recess 152.

As described above, the semiconductor device 1 according to the present embodiment is composed of the second transistor 172 (semiconductor element) having the other surface 172b (electrode forming surface) on which the source electrode S (electrode) is formed, and the conductive metal. A negative electrode conductive plate 15 (conductive plate) having a negative electrode surface 151 (surface) on which a contact surface S2 in contact with the other surface 172b is formed so as to be electrically connected to the source electrode S of the second transistor 172. Be prepared. A recess 152 on the negative electrode surface 151 of the negative electrode conductive plate 15 as a surface area expansion portion in which the surface area is expanded in the vicinity of the conductive path of the current flowing from the source electrode S of the second transistor 172 to the negative electrode conductive plate 15. Is provided.

According to the present embodiment, the presence of the recess 152 reduces the inductance of the negative electrode conductive plate 15. Therefore, by manufacturing the semiconductor device 1 using the negative electrode conductive plate 15 provided with the recess 152, it is possible to provide a semiconductor device that is manufactured without causing deterioration in productivity and has a reduced inductance. ..

Further, the recess 152 is provided in a region of the negative electrode surface 151 of the negative electrode conductive plate 15 adjacent to the contact surface S2 in contact with the other surface 172b of the second transistor 172. The current flowing through the negative electrode conductive plate 15 passes through the contact surface S2 in contact with the other surface 172b of the second transistor 172. Therefore, by providing the recess 152 in the region adjacent to the contact surface S2, the recess 152 is always provided in the vicinity of the conductive path of the current flowing through the negative electrode conductive plate 15. Therefore, the inductance of the negative electrode conductive plate 15 can be reliably reduced.

Although the embodiments of the present invention have been described above, the present invention should not be limited to the above embodiments. For example, in the above embodiment, the negative electrode surface 151 of the negative electrode conductive plate 15 is provided with the recess 152 as the surface area expansion portion, but the positive electrode surface 141 of the positive electrode conductive plate 14 may be provided with the surface area expansion portion. .. In this case, the positive electrode surface 141 of the positive electrode conductive plate 14 has a recess or the like in a region near the conductive path of the current flowing through the positive electrode conductive plate 14 and toward the drain electrode D formed on one surface 171a of the first transistor 171. It is good to provide a surface area expansion part of. Further, in the above embodiment, the concave portion 152 is exemplified as the surface area expansion portion, but the concave portion may not be used as long as the shape is such that the surface area is expanded. For example, as the surface area expanding portion, a convex portion, an uneven portion, or a portion formed like a wavy shape is formed on the surface (positive electrode surface 141 or negative electrode surface 151) of the conductive plate (positive electrode conductive plate 14 or negative electrode conductive plate 15). ) May be provided.

Further, in the above embodiment, the example in which the recess 152 is provided adjacent to the contact surface S2 of the negative electrode conductive plate 15 is shown, but the surface area of the recess or the like is expanded adjacent to the contact surface S1 of the positive electrode conductive plate 14. A portion may be provided, or may be provided adjacent to both the contact surfaces S1 and S2. Further, among the positive electrode surface 141 of the positive electrode conductive plate 14 and the negative electrode surface 151 of the negative electrode conductive plate 15, if the region is considered to be a region near the conductive path of the current flowing through each conductive plate, the contact surface S1 and the contact surface S2 A surface area expansion portion such as a recess may be formed in a region other than the adjacent region.

For example, the positive electrode surface 141 of the positive electrode conductive plate 14 is provided with a positive electrode terminal mounting area 14c (power supply connection portion mounting area) to which a positive electrode terminal 11 (power supply connection portion) connected to the power supply side positive electrode terminal VP of the power supply V is attached. Be done. Therefore, the current from the power supply V to the positive electrode terminal mounting region 14c via the positive electrode terminal 11 flows linearly from the positive electrode terminal mounting region 14c toward the contact surface S1 with the one surface 171a of the first transistor 171. it is conceivable that. The conductive path L1 of the current in such a positive electrode conductive plate 14 is shown in FIG. Therefore, as shown in FIG. 13, the conductive path L1 is represented by a line segment connecting the center of the positive electrode terminal mounting region 14c and the center of the contact surface S1. Therefore, the surface area expansion portion P can be provided in an arbitrary region near the line segment (L1) connecting the positive electrode terminal mounting region 14c and the contact surface S1. Even when the surface area expanding portion P is provided in this way, the inductance of the positive electrode conductive plate 14 can be reduced.

Further, the negative electrode surface 151 of the negative electrode conductive plate 15 is provided with a negative electrode terminal mounting area 15c (power supply connection portion mounting area) to which the negative electrode terminal 12 (power supply connection portion) connected to the power supply side negative electrode terminal VN of the power supply V is mounted. Be done. Therefore, it is considered that the current reaching the contact surface S2 from the second transistor 172 to the other surface 172b of the second transistor 172 flows linearly from the contact surface S2 toward the negative electrode terminal mounting region 15c. The conductive path L2 of the current in such a negative electrode conductive plate 15 is shown in FIG. Therefore, as shown in FIG. 14, the conductive path L2 is represented by a line segment connecting the center of the contact surface S2 and the center of the negative electrode terminal mounting region 15c. Therefore, the surface area expansion portion P can be provided in an arbitrary region in the vicinity of the line segment (L2) connecting the contact surface S2 and the negative electrode terminal mounting region 15c. Even when the surface area expanding portion P is provided in this way, the inductance of the negative electrode conductive plate 15 can be reduced.

Further, in the above embodiment, the transistor is exemplified as the semiconductor element, but the present invention can also be applied to a semiconductor device having other semiconductor elements. However, when the semiconductor element is a transistor having a switching function, the effect of reducing the inductance is large when the semiconductor element switches operates in a high frequency region. Therefore, the present invention exerts a great effect when the transistor having a switching function is a semiconductor element. As described above, the present invention can be modified as long as it does not deviate from the gist thereof.

1 ... Semiconductor device, 10A, 10B, 10C ... Semiconductor module, 11 ... Positive electrode terminal (power supply connection), 12 ... Negative electrode terminal (power supply connection), 13 ... Output terminal, 14 ... Positive electrode conductive plate (conductive plate), 14c ... Positive electrode terminal mounting area (power supply connection portion mounting area), 141 ... Positive electrode surface (surface), 15 ... Negative electrode conductive plate (conductive plate), 15c ... Negative electrode terminal mounting area (power supply connection portion mounting area), 151 ... Negative electrode surface ( Surface), 152 ... Recessed portion (expanded surface area), 152a ... Bottom surface, 152b ... Side surface, 16 ... Output conductive plate, 17 ... Arm unit, 171 ... First transistor (semiconductor element), 171a ... One side (electrode forming surface) , 171b ... other side, 172 ... second transistor (semiconductor element), 172a ... one side, 172b ... other side (electrode forming surface), 40 ... case, 50 ... divided bus bar, 60 ... control board, 61, 62, 63. , 64 ... Flexible wiring, D ... Drain electrode (electrode), S ... Source electrode (electrode), L1, L2 ... Conductive path, P ... Surface expansion part, S1, S2 ... Contact surface, V ... DC power supply (power supply)

Claims (3)

A semiconductor device having an electrode-forming surface on which an electrode is formed,
A conductive plate composed of a conductive metal and having a surface having a contact surface in contact with the electrode forming surface so as to be electrically connected to the electrode of the semiconductor element.
Equipped with
A power supply connection portion mounting area to which a power supply connection portion connected to the power supply is mounted is provided on the surface of the conductive plate.
The surface area of the surface of the conductive plate is expanded to a region near the conductive path of the current flowing through the conductive plate and toward the electrode, or a region near the conductive path of the current flowing from the electrode to the conductive plate. There is a surface area expansion part ,
The surface area enlarged portion is a bottomed recess having an opening to the surface of the conductive plate and a side surface erected from the periphery of the bottom surface so as to surround the bottom surface and the bottom surface .
Semiconductor device. In the semiconductor device according to claim 1,
The recess is provided in a region near a line segment connecting the power supply connection portion mounting region and the contact surface.
Semiconductor device. In the semiconductor device according to claim 1 or 2.
A semiconductor device in which the recess is provided in an area adjacent to the contact surface.

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