JP6700119B2 - Power semiconductor device and method of manufacturing power semiconductor device - Google Patents

Description

  The present invention relates to a power semiconductor device including a semiconductor module bonded to a heat sink via a conductive bonding layer, and a method for manufacturing the power semiconductor device.

  In recent years, power semiconductor devices have come to be widely used not only for general industries and electric railways but also for vehicles. In automobiles, miniaturization of each component in a limited space is directly linked to vehicle performance. Therefore, miniaturization is demanded especially for in-vehicle power semiconductor devices. Further, in general, power semiconductor devices are required to have high output density.

  Along with the increase in power density of power semiconductor devices, specifically, the increase in current density of semiconductor elements, the temperature of the semiconductor elements during energization also rises. Therefore, in a vehicle-mounted power semiconductor device, a heat sink is attached to the lower surface of a semiconductor module including one or more semiconductor elements via a solder material to improve heat dissipation.

  Generally, as a method for melting a solder material, Patent Document 1 describes using induction heating, and Patent Document 2 describes using laser light.

JP, 2005-222964, A

JP, 2010-51988, A

  By the way, as a method for heating a conductive bonding material such as a solder material, there is a radiant heat method using infrared rays in addition to the methods described in Patent Documents 1 and 2. When the semiconductor module is arranged on the heat sink via the conductive bonding material and the conductive bonding material is heated by irradiating infrared rays, if the temperature of the surface of the heat sink varies, There is a problem that the quality deteriorates and the reliability of the joint between the heat sink and the semiconductor module deteriorates. In particular, in a vehicle-mounted power semiconductor device, the surface area of the heat sink becomes large, and this problem becomes remarkable.

  The present invention has been made to solve the above problems, and in a power semiconductor device including a semiconductor module bonded to a heat sink via a conductive bonding layer, the reliability of the bonding portion has been conventionally improved. The challenge is to improve rather than technology.

In order to achieve the above object, a power semiconductor device according to the present invention,
A heat sink having a front surface and a back surface,
A semiconductor module bonded to the surface of the heat sink via a conductive bonding layer,
On the back surface of the heat sink, a first surface portion having a first emissivity with respect to infrared rays having a predetermined wavelength, and a smooth second surface having a second emissivity smaller than the first emissivity with respect to infrared rays having the predetermined wavelength. And a face portion are provided,
A high emissivity portion for temperature monitoring is provided on the surface of the heat sink.

  According to the present invention, since the high emissivity portion for temperature monitoring is provided on the surface of the heat sink, it is possible to provide a high-quality conductive joining layer, thereby improving the reliability of the joining portion. be able to.

1 is a perspective view showing a power semiconductor device according to a first embodiment of the present invention. It is a perspective view which shows the semiconductor module of the power semiconductor device which concerns on Embodiment 1 of this invention. It is a perspective view which shows a part of semiconductor module of the power semiconductor device which concerns on Embodiment 1 of this invention. FIG. 3 is a side view showing the power semiconductor device according to the first embodiment of the present invention. It is the sectional view on the AA line of FIG. It is a figure which shows the inverter circuit which the power semiconductor device which concerns on embodiment of this invention comprises. 3 is a flowchart showing a method for manufacturing the power semiconductor device according to the first embodiment of the present invention. FIG. 3 is a diagram showing a method for manufacturing the power semiconductor device according to the first embodiment of the present invention. It is a perspective view which shows the power semiconductor device which concerns on Embodiment 5 of this invention. It is a side view which shows the power semiconductor device which concerns on Embodiment 5 of this invention.

  Hereinafter, embodiments of the present invention will be specifically described with reference to the drawings. In the following description, terms indicating specific directions (upper, lower, etc.) are used as necessary, but these terms are used for facilitating understanding of the present invention. It should not be understood that the scope of the invention is limited. In the following description, the direction with the symbol “X” is referred to as the width direction, the direction with the symbol “Y” is referred to as the length direction, and the direction with the symbol “Z” is referred to as the height direction. The X direction, the Y direction and the Z direction are orthogonal to each other.

Embodiment 1.
1 is a perspective view showing a power semiconductor device 1000 according to a first embodiment of the present invention. The power semiconductor device 1000 includes six semiconductor modules 101, 102, 103, 104, 105 and 106. The semiconductor modules 101 to 106 are bonded onto the surface 120 of the heat sink 110. Main circuit wirings 51 to 55 extending in the length direction Y are arranged on the heat sink 110.

  The six semiconductor modules 101 to 106 are arranged three by three with the main circuit wirings 51 to 55 interposed therebetween. The semiconductor module sets 101 to 103 and the semiconductor module sets 104 to 106 are arranged side by side in the length direction Y, respectively.

[Semiconductor module 101]
FIG. 2 is a perspective view showing the semiconductor module 101 of the power semiconductor device 1000 according to the first embodiment of the present invention. As shown in FIG. 2, the semiconductor module 101 includes a substrate 10, semiconductor elements 21 and 22 arranged on the substrate 10, first main terminals 30 and second main terminals 40 for wiring the semiconductor elements, A frame member 70 surrounding the semiconductor elements 21, 22 and a control terminal 80 fixed to the frame member 70 are provided. FIG. 3 shows a state in which the frame member 70 and the like are removed from the semiconductor module 101.

  The semiconductor modules 102 to 106 have substantially the same configuration as the semiconductor module 101 except for the first and second main terminals 30 and 40. Therefore, the configuration of the semiconductor module 101 will be described below. Only parts different from the module 101 will be described.

(Substrate 10)
The substrate 10 has an insulating layer 11, a front surface conductor layer 12, and a back surface conductor layer 13 (see FIGS. 3 and 5). The back surface of the substrate 10 is bonded to the front surface 120 of the heat sink 110 via the first bonding layer 61 (see FIGS. 4 and 5).

The insulating layer 11 is preferably made of a material having an insulating property and a high thermal conductivity. Examples of the material forming the insulating layer 11 include ceramic materials (AlN (aluminum nitride), Si ₃ N ₄ (silicon nitride), Al ₂ O ₃ (aluminum oxide), etc.), BN (boron nitride) filler, and the like. It is an epoxy resin insulating layer containing. The exemplary thickness of the insulating layer 11 is about 0.3 mm or more and about 1 mm or less. Examples of the material forming the front surface conductor layer 12 and the back surface conductor layer 13 are Cu (copper), Al (aluminum), and a laminated body of Cu and Al. An exemplary thickness of the front surface conductor layer 12 and the back surface conductor layer 13 is about 0.2 mm or more and about 1 mm or less.

(Semiconductor elements 21, 22)
In the first embodiment, the semiconductor element 21 is an IGBT (insulated gate bipolar transistor), and the semiconductor element 22 is an FWD (free wheel diode). The semiconductor elements 21 and 22 may be other semiconductor elements such as MOSFET (metal oxide semiconductor field effect transistor).

  The semiconductor elements 21 and 22 are arranged side by side in the width direction X. The semiconductor elements 21 and 22 are mounted by being bonded to the surface of the surface conductor layer 12 of the substrate 10 via the second bonding layer 62, respectively. The material of the semiconductor elements 21 and 22 may be Si (silicon), or may be a semiconductor material having a large band gap such as GaN (gallium nitride), SiC (silicon carbide), or diamond.

  Although not shown, an emitter that is a main electrode and a gate that is a control electrode are provided on the front surface 21a of the semiconductor element 21, which is an IGBT, and the back surface (no reference numeral) of the semiconductor element 21 is a main electrode. A collector is provided. The gate receives a gate current from the control terminal 80. Although not shown, the semiconductor element 22 that is an FWD has electrodes provided on the front surface 22a and the back surface (no reference numeral). In the present specification, the FWD electrode is also referred to as a main electrode. Hereinafter, the main electrodes provided on the front and back surfaces of the semiconductor elements 21 and 22 are referred to as the front main electrode and the back main electrode, respectively. The main electrodes of the semiconductor elements 21 and 22, the first main terminal 30, the second main terminal 40, and the main circuit wirings 51 to 55 form a main circuit of the power semiconductor device 1000.

(First and second main terminals 30, 40)
The first and second main terminals 30 and 40 are plate-shaped. The first main terminal 30 has an electrode portion 31 and a wiring portion 32. The electrode portion 31 of the first main terminal 30 extends in the width direction X and is bonded to the surfaces 21a and 22a of the semiconductor elements 21 and 22 via the third bonding layer 63, whereby the surfaces of the semiconductor elements 21 and 22. It is electrically connected to the main electrode. The wiring portion 32 of the first main terminal 30 is joined to the main circuit wiring 51. The second main terminal 40 has an electrode portion 41 and a wiring portion 42. The electrode portion 41 of the second main terminal 40 is bonded to the front surface conductor layer 12 of the substrate 10 via the fourth bonding layer 64, and thereby electrically connected to the back surface main electrodes of the semiconductor elements 21 and 22. The wiring portion 42 of the second main terminal 40 is joined to the main circuit wiring 54. An exemplary thickness of the first and second main terminals 30, 40 is about 0.2 mm or more and about 1.0 mm or less.

  The electrode portion 31 of the first main terminal 30 has a recess 33. The recess 39 is formed by cutting out the vicinity of the center of the first main terminal 30 in the width direction X. The function of the recess 33 will be described later. The first main terminal 30 also has a protrusion 34 and a through hole 35 extending along the thickness direction (height direction Z) of the first main terminal 30 and facing the surfaces 21a and 22a of the semiconductor elements 21 and 22. The protrusion 34 has a function of defining the minimum thickness of the third bonding layer 63. The through hole 35 has a function of absorbing the bonding material when the third bonding layer 63 is formed (when the bonding material is melted) and suppressing the inclination of the semiconductor elements 21 and 22.

  The first and second main terminals 30 and 40 may be a single layer of Cu, or may be, for example, a laminated body including a Cu layer/Invar (Fe-36%Ni alloy) layer/Cu layer. By changing the thickness of each layer, the apparent linear expansion coefficient of the first and second main terminals 30, 40 can be changed. The first and second main terminals 30 and 40 may be made of a Cu-Mo (copper-molybdenum) alloy or a Cu-W (copper-tungsten) alloy.

(Main circuit wiring 51-55)
The main circuit wirings 51 to 55 are led out to the outside of the power semiconductor device 1000. As described above, the first main terminals 30 of the semiconductor modules 101 to 103 are joined to the main circuit wiring 51 (see FIG. 5). The second main terminals 40 of the semiconductor modules 103, 101, 103 are joined to the main circuit wirings 52, 53, 54, respectively. Although not shown, the second main terminals 40 of the semiconductor modules 106, 104, 105 are also joined to the main circuit wirings 52, 53, 54. The first main terminals 30 of the semiconductor modules 104 to 106 are joined to the main circuit wiring 55.

  As a result, the six semiconductor modules 101 to 106 configure the inverter circuit 600 shown in FIG. Each semiconductor module constitutes one arm of the inverter circuit 600. The pair of semiconductor modules 101 and 104, the pair of semiconductor modules 102 and 105, and the pair of semiconductor modules 103 and 106, which are provided with the main circuit wirings 51 to 55 sandwiched therebetween, respectively form legs of the inverter circuit 600. The inverter circuit 600 is used as, for example, a drive circuit that drives a cage-type three-phase induction motor. At this time, one of the main circuit wirings 51 and 55 is connected to the positive electrode of the external power source and the other is connected to the negative electrode of the external power source. The main circuit wirings 52 to 54 are connected to the motor.

(Frame member 70, control terminal 80)
The frame member 70 has a housing portion 71 and a convex portion 72 protruding from the housing portion 71 in the length direction Y. The casing 71 of the frame member 70 is provided so as to surround the semiconductor elements 21 and 22. The main circuit wiring side of the casing 71 in the width direction Y is cut out so as not to interfere with the wiring portions 32, 42 of the first and second main terminals 30, 40.

  The convex portion 72 of the frame member 70 has a shape complementary to the concave portion 33 formed in the electrode portion 31 of the first main terminal 30. The convex portion 72 of the frame member 70 has substantially the same size as the concave portion 33 of the first main terminal 30, and both are configured to engage with each other. Since the convex portion 72 of the frame member 70 fixed to the substrate 10 and the concave portion 33 of the first main terminal 30 are engaged with each other, the main terminal 30 is connected to the semiconductor elements 21 and 22 via the third bonding layer 63. The positional displacement of the main terminal 30 that occurs when the main terminal 30 is joined to the main circuit wiring 51 is suppressed.

  A projecting portion 73 extending toward the heat sink 110 is provided outside the wall surface of the frame member 70. The protruding portion 73 is fitted in the recessed portion 116 provided in the heat sink 110. By fitting the protrusion 73 into the recess 116, positional deviation of the semiconductor module 101 during manufacturing of the power semiconductor device 1000 is suppressed.

  The frame member 70 is made of, for example, resin that is injection moldable and has high heat resistance. The frame member 70 may be made of PPS (polyphenylene sulfide), liquid crystal resin, or fluorine resin. Although not shown, a sealing resin is injected inside the frame member 70, and the semiconductor elements 21, 22 and the electrode portions 31, 41 of the first and second main terminals 30, 40 are resin-sealed. The frame member 70 is bonded to the surface of the surface conductor layer 12 of the substrate 10 via a fifth bonding layer (not shown). The joining material forming the fifth joining layer may be a silicone-based soft adhesive.

  The control terminal 80 extends from the frame member 70 so as to project in the height direction Z. The control terminal 80 is joined to the gate provided on the surface 21a of the semiconductor element 21 via a bonding wire 81 (see FIG. 2) or a bonding ribbon.

[Heat sink 110]
(overall structure)
Although not limited to this, the heat sink 110 has a roughly rectangular parallelepiped shape. The heat sink 110 has a top plate 111 joined to the back surface of the substrate 10 via the first joining layer 61, a plurality of heat radiation fins 112 attached to the top plate 111, and a coolant jacket 113 through which a coolant flows. The refrigerant jacket 113 has an inlet 114 and an outlet 115 for circulating the refrigerant to an external radiator.

  The heat sink 110 preferably has high thermal conductivity and is easily available, and may be made of Cu or Al, for example. When the power semiconductor device 10000 is used in a vehicle, the heat sink 110 is preferably made of Al in order to reduce the weight and thus improve the fuel consumption. When the power semiconductor device 1000 is used to drive a large capacity motor, the coolant flowing through the coolant jacket 113 is preferably water. When the coolant is water, the heat sink 110 is preferably made of Al from the viewpoint of corrosion resistance.

  In the power semiconductor device 1000, the coolant jacket 113 has a large thickness so as to function as a structural member. Further, the coolant jacket 113 needs to be provided with a hole for passing a wiring path or the like depending on the design of the semiconductor modules 101 to 106. Therefore, it is preferable that the refrigerant jacket 113 is manufactured by molding such as an aluminum die casting method.

  The refrigerant jacket 113 is fixed to the top plate 111 so that the airtightness between the top plate 111 and the refrigerant jacket 113 is ensured and the leakage of the refrigerant to the outside of the heat sink is prevented.

  The coolant jacket 113 and the top plate 111 may be fixed by aluminum brazing. Specifically, the top plate 111, the radiating fins 112, the coolant jacket 113, the inlet 114 and the outlet 115 are prepared as separate members, and an AlSi brazing material or the like is placed between the members to raise the temperature to about 600°C. Then, the brazing material is melted and joined to Al.

  Alternatively, the refrigerant jacket 113 and the top plate 111 may be fixed by a rubber O-ring and screwing, or by applying a sealing material and screwing. Specifically, the top plate 111, the radiating fins 112, the refrigerant jacket 113, the inlet 114 and the outlet 115 are prepared as separate members, grooves are provided in the outer peripheral portions of the top 111 and the refrigerant jacket 113, and a rubber O You may screw it in the state filled with the ring and the sealing material.

  Alternatively, the refrigerant jacket 113 and the top plate 111 may be fixed by friction stir welding. At this time, the top plate 111 and the radiation fin 112 are previously integrated by cutting or the like, and Ni (nickel) plating necessary for soldering is applied. Then, the Ni-plated top plate 111 and the radiation fins 112 are friction stir welded together with the refrigerant jacket 113, and the inlet 114 and the outlet 115 are press-fitted into the refrigerant jacket 113.

(Backside 130 of heat sink 110)
As shown in FIGS. 4 and 5, the back surface 130 of the heat sink 110 is provided with a first surface portion 131 and a second surface portion 132. The first surface portion 131 is a rough surface having irregularities formed by die casting, for example, and has a first emissivity for infrared rays having a predetermined wavelength. For example, the first surface portion 131 has a first emissivity of, for example, 0.2 or more and less than 0.3 with respect to infrared rays having a wavelength of 1 μm or more and 10 μm. However, the first surface portion 131 is a surface formed during manufacturing, and the emissivity may not be uniform over the entire first surface portion 131. Therefore, the magnitude of the first emissivity may vary. You may. The second surface portion 132 is, for example, a smooth surface formed by cutting a rough surface formed by die casting, and has a second emissivity with respect to infrared rays having the predetermined wavelength. The second surface portion 132 may be a glossy surface.

  Here, in general, when irradiating the surface of an object with light, the emissivity of the object changes not only according to the material forming the object and the wavelength of the light to be irradiated, but also according to the smoothness of the surface to be irradiated with light. The smaller the surface smoothness, ie the rougher the surface, the greater the emissivity of the object. Therefore, on the back surface 130 of the heat sink 110, the first emissivity of the rough first surface portion 131 is larger than the second emissivity of the smooth second surface portion 132.

  Electronic components such as a reactor 310 and a step-down converter 320 are mounted on the second surface portion 132 of the back surface 130 of the heat sink 110 (see FIGS. 9 and 10). The shape of the second surface portion 132 may be changed according to the shape of the electronic component to be mounted.

  Reactor 310 is incorporated in, for example, a booster circuit (or boost converter) for increasing the voltage from a high-voltage battery (DC power supply) mounted on an automobile. The reactor 310 is a large-sized coil component, and performs a boosting function by switching a switching element incorporated in a booster circuit and repeating accumulation and release of magnetic energy of the reactor 310. In the reactor 310, copper loss is generated by energizing the coil, and magnetic flux is generated in the core, so iron loss is generated and heat is generated. Therefore, in order to downsize the entire power semiconductor device, in addition to downsizing the reactor 310, it is necessary to efficiently process heat generated by the loss of the reactor 310.

  In the first embodiment, the inverter circuit 600 (semiconductor modules 101 to 106), which is a power conversion unit, is provided on the front surface 120 of the heat sink 110, and the reactor 310 is brought into close contact with the back surface 130 of the heat sink 110. As a result, the heat generated by the loss of the reactor 310 is efficiently radiated to the outside of the device via the heat sink 110.

  The step-down converter 320 functions as, for example, a DC/DC converter that is a conversion device from a high-voltage battery (e.g., a rated voltage of 288V) to an auxiliary battery (e.g., 12V). By incorporating the step-down converter 320 in the power semiconductor device, it is possible to reduce costs and size by reducing wiring paths.

  The step-down converter 320 incorporates electronic circuit components that require high heat dissipation. Since the step-down converter 320 is also brought into close contact with the back surface 130 of the heat sink 110, the heat generated from the step-down converter 320 is also efficiently radiated to the outside of the device via the heat sink 110 as described above.

(The surface 120 of the heat sink 110)
A high emissivity portion 121 is provided on the surface 120 of the heat sink 110. On the surface 120 of the heat sink 110 that is not joined to the semiconductor modules 101 to 106, the high emissivity portion 121 has a higher emissivity than other regions. The high emissivity portion 121 preferably has an emissivity of 0.3 or more for infrared rays having a wavelength of 1 μm or more and 10 μm.

  Although not limited to this, the high emissivity portion 121 has a circular shape in plan view and is provided at four corners of the rectangular surface 120. The high emissivity portion 121 is preferably provided immediately outside the semiconductor modules 101 to 106. The shape and arrangement of the high emissivity portion 121 are not limited to those shown in FIG. 1, and may be provided in a linear shape or a frame shape along the four sides of the rectangular surface 120, for example.

By reducing the area of the high emissivity portion 121 and disposing the high emissivity portion 121 close to the semiconductor modules 101 to 106, the power semiconductor device 1000 can be downsized in the in-plane direction. The area of the high emissivity portion 121 may be, for example, 3 mm ² or less per location.

  A high emissivity tape is attached to the high emissivity portion 121. The emissivity of the high emissivity tape is preferably large in order to improve the detection accuracy described later. The high emissivity tape may be a black body tape with high emissivity. The high emissivity tape preferably has high heat resistance. As will be described later, the high emissivity portion 121 can be provided by other means.

[First to Fourth Bonding Layers 61 to 64]
The first bonding layer 61 is provided between the heat sink 110 and the substrate 10. The bonding material forming the bonding layer 61 may be an Al—Si brazing material that can be directly bonded to the heat sink 110 made of Al, or may be a Sn-based solder material. Here, in this specification, the Sn-based solder material is a solder material containing Sn (tin) as a main component, and includes, for example, Ag (silver), Cu (copper), Bi (bismuth), In (indium), It means that Sb (antimony) or Pb (lead) is added. Hereinafter, for example, a Sn-based solder material in which Cu is added to Sn is referred to as a Sn-Cu solder material.

  If the bonding material that forms the first bonding layer 61 is a Sn-based solder material and the material that forms the heat sink 110 is Al, the Sn-based solder material can be obtained by applying Ni plating or Sn plating to the heat sink 110 in advance. By alloying with solder, it becomes easy to directly bond the both. It is known that if the thickness of the plating layer is about 2 μm or more and about 10 μm or less, the wettability of the solder material and the reliability of the joint can be sufficiently satisfied.

Here, the material forming the heat sink 110 is Al, the insulating layer 11 of the substrate 10 is Si ₃ N _{4 with} a thickness of 0.32 mm, and the front surface conductor layer 12 and the back surface conductor layer 13 are Cu with a thickness of 0.5 mm, respectively. Suppose While the linear expansion coefficient of Al constituting the heat sink 110 is 23 ppm/K, the apparent linear expansion coefficient of the substrate 10 is about 7 ppm/K or more and about 8 ppm/K or less, and the difference in linear expansion coefficient between the two is large. Become. As described above, when the difference in the linear expansion coefficient between the material forming the heat sink 110 and the material forming the substrate 10 is large, the bonding material forming the first bonding layer 61 has a large yield stress or a large 0.2% proof stress. It is preferable to reduce the crack growth rate (the amount of crack growth per load cycle) of the first bonding layer 61 by using the material.

  Further, as will be described later, the bonding material forming the first bonding layer 61 may be a fluxless solder material.

  The second bonding layer 62 is provided between the substrate 10 and the semiconductor elements 21 and 22. The third bonding layer 63 is provided between the surfaces 21 a and 22 a of the semiconductor elements 21 and 22 and the first main terminal 30. The fourth bonding layer 64 is provided between the surface conductor layer 12 of the substrate 10 and the second main terminal 40.

  The bonding material forming the second to fourth bonding layers 62 to 64 may be a solder material. The bonding material may be an epoxy resin-based adhesive mixed with a conductive filler (silver or graphite). A low melting point material such as a solder material has an advantage that it is easy to use because the heating temperature at the time of joining is low.

  In addition, the bonding material forming the second to fourth bonding layers 62 to 64 may be a sinterable bonding material such as an Ag-based sintering material, a Cu-based sintering material, and a CuSn (copper-tin alloy)-based sintering material. . Here, the sinterable metal bonding material is a bonding material in which fine metal particles as an aggregate are dispersed in an organic component to form a paste, and the fine metal particles are sintered at a temperature lower than the melting point of the metal. It utilizes the phenomenon. In the sinterable metal joining material, the melting point of the joining material after joining rises up to the original melting point as a metal, so that the heat resistant temperature of the joining portion can be increased.

  Generally, when a metal is used at a temperature higher than the recrystallization temperature, the grain boundaries move due to diffusion, the crystal grains become coarse, and the metal becomes weak against metal fatigue. Therefore, particularly from the viewpoint of long-term reliability, the bonding material forming the second and third bonding layers 62 and 63 provided at the positions directly contacting the semiconductor elements 21 and 22 is a sinterable metal bonding material. Preferably.

[Method of Manufacturing Power Semiconductor Device 1000]
An exemplary method of manufacturing the power semiconductor device 1000 includes a step 1100 of preparing a heat sink 110, a step 1200 of bonding the semiconductor modules 101 to 106 to the front surface 120 of the heat sink 110, and mounting an electronic component on the back surface 130 of the heat sink 110. Step 1300 of performing.

(Step 1100 of preparing the heat sink 110)
In step 1100, the coolant jacket 113 of the heat sink 110 is manufactured by die casting in order to reduce the manufacturing cost (step 1110). The top plate 111, the radiation fins 112, the inlet 114, and the outlet 115 of the heat sink 110 are manufactured by, for example, extrusion molding.

  The back surface of the die-cast molded coolant jacket 113 (the back surface 130 of the heat sink 110) is a rough surface having irregularities. When an electronic component is joined to the back surface 130 of the heat sink 110, the unevenness of the back surface 130 impairs the stability of the electronic component. Therefore, in step 1100, a part of the back surface 130 of the heat sink 110 (the portion to which the electronic components are joined) is cut to form a smooth second surface portion 132 suitable for joining the electronic components (step 1120). Further, the high emissivity tape 121 is attached to the surface 120 of the heat sink 110 to provide the high emissivity portion 121 on the surface 120 of the heat sink 110 (step 1130).

  In step 1130 of providing the high emissivity portion 121, instead of applying the high emissivity tape, the high emissivity coating may be applied, for example, using a spray. Further, the degree of oxidation of the material forming the top plate 111 of the heat sink 110 may be increased at the portion where the high emissivity portion 121 is provided. Further, a cutting tool may be brought into contact with the portion to roughen the surface. Alternatively, a durable white heat-resistant solder resist ink may be printed and cured to be in close contact with the portion. Alternatively, heat-resistant polyimide may be supplied by a method such as printing or dispensing, and may be cured to be brought into close contact with the relevant portion.

(Step 1200 of joining the semiconductor modules 101 to 106 to the surface 120 of the heat sink 110)
In step 1200, for example, the main circuit wirings 51 to 55 are fixed to the surface of the heat sink 110, the substrate 10 is bonded to the surface of the heat sink 110 using a bonding material, and the semiconductor element 21 is bonded to the surface of the substrate 10 using a bonding material. , 22 are joined, the frame member 70 is joined to the surface of the substrate 10 using a joining material, and the first main terminal 30 is attached to the surfaces 21a and 22a of the semiconductor elements 21 and 22 and the main circuit wiring 51 using the joining material. Then, the second main terminal 40 is joined to the surface conductor layer 12 of the substrate 10 and the main circuit wiring 54 by using a joining material.

  In each step of using the bonding material, if the bonding material is a solder material, the bonding material is heated to melt and cool, and if the bonding material is a sinterable bonding material, the bonding material is heated and burned. The bonding layer is formed by binding. You may arrange|position a solder material in several joint parts, and may form several joint layers collectively by a well-known reflow process.

  In step 1200, joining may be performed using a fluxless solder material. Specifically, the reducing atmosphere is made to have a low oxygen concentration without using a flux, and is replaced with a gas having a reducing power such as formic acid and hydrogen, and further vacuuming is performed during melting of the solder.

  There are three methods for heating the fluxless solder material: 1) an atmosphere heating method that sends hot air into the reflow bath, 2) a heat transfer method from the heating block to the work, and 3) a radiant heat method that uses infrared rays such as a halogen lamp. Is mainly present.

  When using a fluxless solder material, it is common to use a reducing gas such as formic acid or hydrogen, which has a reducing power, instead of the flux. In the case of the atmosphere heating method, it is necessary to install a reflow tank that sends hot air efficiently.However, when using formic acid or hydrogen gas, the reflow tank is used to prevent an offensive odor due to a gas containing acidic formic acid or a hydrogen explosion It is necessary to have airtightness in. However, it is difficult to efficiently send hot air while ensuring the airtightness of the reflow tank, or the manufacturing cost of the reflow tank increases.

  Next, in the case of the heat transfer method, when soldering the heat sink 110, which is larger than other components, and the substrate 10 as a solder joint component, depending on the amount of warpage of the heat sink 110, an air layer may be formed in the heat dissipation path. Will intervene. Since air has a low thermal conductivity, it is possible that the temperature difference between the surfaces to be joined and the variation in the temperature within the surfaces to be joined cannot be eliminated.

  Next, in the case of the radiant heat method, insufficient heat transfer and heat transfer distribution due to a shape factor such as warpage of the heat sink 110 do not occur. Further, unlike the atmosphere heating method, it is not necessary to provide a reflow tank that ensures airtightness and can efficiently send hot air.

  Therefore, in the first embodiment, the radiant heat method is adopted in step 1200 of joining the semiconductor modules 101 to 106 to the surface 120 of the heat sink 110. Specifically, the infrared heater device 230 is used to radiate infrared rays 232 having a predetermined wavelength onto the back surface 130 of the heat sink 110 (step 1210).

  The infrared ray 232 may have a single wavelength, but generally has a predetermined wavelength range. When the infrared ray 232 has a predetermined wavelength range, the “wavelength of the infrared ray to be irradiated” refers to the peak wavelength in the predetermined wavelength range.

  The infrared heater device 230 includes a plurality of bar heaters 231 arranged side by side in the length direction Y. Each bar heater 231 emits infrared rays having a wavelength of 1 μm or more and 10 μm or less, for example. The intensity of infrared rays emitted from each rod heater 231 is controlled by the control device 220 including a microcomputer, a memory, and the like.

  By radiating infrared rays 232 to the back surface 130 of the heat sink 110, the fluxless solder material arranged on the front surface 120 of the heat sink 110 is heated and melted.

  At this time, the temperature of the high emissivity part 121 is measured in a non-contact manner using the radiation thermometer 210 while irradiating the infrared ray 232 in step 1210 (step 1220). The radiation thermometer 210 detects the infrared radiation energy emitted from the high emissivity portion 121 using an infrared sensor. The infrared radiation energy emitted from the high emissivity portion 121 is approximately proportional to the fourth power of the absolute temperature with the emissivity of the high emissivity portion 121 as a proportional constant. Based on this relationship, the radiation thermometer 210 measures the temperature of the high emissivity portion 121. The emissivity of the high emissivity portion 121 may be measured in advance to correct the radiation thermometer 210.

  The temperature of each high emissivity part 121 measured by the radiation thermometer 210 is fed back from the radiation thermometer 210 to the control device 220 (step 1230). The control device 220 controls the intensity of the infrared rays 232 emitted from each rod heater 231 based on the fed back temperature of the high emissivity portion 121 (step 1240). For example, when the temperature of the high emissivity portion 121 provided at a certain position is low, control is performed to increase the intensity of infrared rays emitted from the bar heater 231 below (and optionally around) that position.

  After irradiating the infrared rays 232 for a certain period of time, the fluxless solder material is cooled and solidified, so that the semiconductor module 101 is bonded to the surface 120 of the heat sink 110.

(Step 1300 of mounting electronic component on back surface 130 of heat sink 110)
In order to reduce the thermal resistance between the heat sink 110 and the electronic components, heat between the heat sink 110 and the electronic components, such as the front surface 120 of the heat sink 110 and the semiconductor modules 101 to 106, is not required. It is preferable to provide a thin bonding layer using a conductive bonding material having high conductivity. However, when solder bonding is performed on both the front surface 120 and the back surface 130 of the heat sink 110, it is necessary to provide a means for preventing the solder material from overflowing due to its own weight on the back surface side. Furthermore, it is necessary to carry out solder bonding while holding the electronic component on the back surface side. Thus, if the solder joining process is performed on both surfaces of the heat sink 110, the process becomes complicated. Even if the front surface side is once soldered and then inverted, and the back surface side is soldered, the same problem occurs.

  Therefore, in the first embodiment, first, the heat sink 110 and the semiconductor modules 101 to 106 are solder-bonded on the front surface side where higher heat dissipation is required, and the heat sink 110 and the electronic component are connected on the back surface side. Join by a method other than soldering. For example, the electronic component may be screwed to the back surface of the heat sink 110 via heat dissipation grease, or may be fixed to the back surface of the heat sink 110 using a resin adhesive sheet.

[effect]
The effect of the first embodiment will be specifically described. First, a problem assumed in the power semiconductor device 1000 according to the first embodiment will be described.

  As described above, in the first embodiment, the coolant jacket 113 of the heat sink 110 is manufactured by die casting. Further, the back surface of the coolant jacket 113 (the back surface 130 of the heat sink 110) where the electronic component is mounted is smoothed by cutting to form the second surface portion 132.

  In the first embodiment, the fluxless solder material is heated and melted by the radiant heat method using infrared rays. However, on the back surface 130 of the heat sink 110, the smooth second surface portion 132 and the rough first surface portion 131 have different emissivities with respect to the infrared rays 232 having a predetermined wavelength. Therefore, the back surface 130 of the heat sink 110 has a higher absorption rate of the infrared rays 232 in the first surface portion 131 than in the second surface portion 132. As a result, when heat is conducted from the back surface 130 of the heat sink 110 to the front surface 120, the temperature of the front surface 120 may vary.

  If the temperature of the surface 120 of the heat sink 110 varies, the fluxless solder material does not spread evenly over the entire surface, and shrinkage cavities and voids occur in the bonding layer formed by cooling the fluxless solder material. Therefore, the reliability of the joint between the heat sink 110 and the semiconductor modules 101 to 106 decreases.

  In the first embodiment, in step 1200 (1210 to 1240) of joining the semiconductor modules 101 to 106 to the surface 120 of the heat sink 110, the temperature of each high emissivity part 121 measured by the radiation thermometer 210 is fed back, and The intensity of infrared rays emitted from each rod heater 231 is controlled based on the temperature of the high emissivity portion 121. As a result, the fluxless solder material arranged on the surface 120 of the heat sink 110 can be uniformly heated, and the fluxless solder material can be evenly spread over the entire surface. In this way, the reliability of the joint between the heat sink 110 and the semiconductor modules 101 to 106 can be improved as compared with the conventional technique.

Embodiment 2.
In the description of the second embodiment, configurations that are the same as or correspond to those of the first embodiment are denoted by the same reference numerals, and description of the configuration is omitted.

  In the power semiconductor device according to the second embodiment, the Sn-based solder material is used as the bonding material forming the first, third, and fourth bonding layers 61, 63, 64, and the bonding material forming the second bonding layer 62. As the material, a sinterable joint material having a yield stress or 0.2% proof stress larger than that of the Sn-based solder material is used.

  In the method for manufacturing a power semiconductor device according to the second embodiment, the first, third, and fourth bonding layers 61, 63, 64 are collectively formed by the known reflow process as described in the first embodiment. ..

  Next, the effect of the second embodiment will be described. The second bonding layer 62 that bonds the surface conductor layer 12 of the substrate 10 and the semiconductor elements 21 and 22 has a higher sensitivity to cracks than other bonding layers. Therefore, according to the second embodiment, the sinterable bonding material is used as the bonding material forming the second bonding layer 62, and the bonding forming the first, third, and fourth bonding layers 61, 63, 64 is performed. By forming these joint layers at once by using an Sn-based solder material as a material, it is possible to secure high reliability of each joint while improving productivity.

Embodiment 3.
In the description of the third embodiment, configurations that are the same as or correspond to those of the first and second embodiments are given the same reference numerals, and description of the configurations is omitted.

  In the power semiconductor device according to the third embodiment, the yield stress or the 0.2% proof stress constitutes the third and fourth bonding layers 63 and 64 as the bonding material constituting the first and second bonding layers 61 and 62. The Sn-Sb solder material larger than the joining material is used. As the bonding material forming the third and fourth bonding layers 63, 64, for example, Pb-free Sn—Cu solder material is used.

  In the method for manufacturing a power semiconductor device according to the third embodiment, the first to fourth bonding layers 61 to 64 are collectively formed by the known reflow process as described in the first embodiment.

  Next, the effect of the third embodiment will be described. In the first bonding layer 61, the difference in thickness and the difference in linear expansion coefficient between the bonding members (heat sink 110 and substrate 10) are large. The second bonding layer 62 that bonds the substrate 10 and the semiconductor elements 21 and 22 has high sensitivity to cracks, as described above.

  In the third embodiment, Sn-Sb solder material is used as the bonding material forming the first and second bonding layers 61 and 62, and Sn-based solder is used as the bonding material forming the first to fourth bonding layers 61 to 64. By forming these joint layers at once using a solder material, it is possible to improve productivity and ensure high reliability of each joint.

Embodiment 4.
9 and 10 are a perspective view and a side view showing a power semiconductor device according to a fifth embodiment of the present invention. In the description of the fourth embodiment, configurations that are the same as or correspond to those of the first to third embodiments are denoted by the same reference numerals, and description of the configurations is omitted.

  In the fourth embodiment, a resin sheet 133 having high thermal conductivity and flexibility is attached to the first surface portion 131 of the back surface 130 of the heat sink 110, through which electronic components, specifically, the reactor 310, are connected. A step-down converter 320 is mounted.

  The flexible resin sheet 133 is made of, for example, a silicone resin. An exemplary thermal conductivity of the resin sheet 133 is 2 W/m·K or more and 10 W/m·K or less.

  Next, the effect of the fourth embodiment will be described. As mentioned above, the coolant jacket 113 of the heat sink 110 is preferably manufactured by die casting. The rear surface of the die-cast molded coolant jacket 113 (rear surface 130 of the heat sink 110) has a large roughness, and strain accumulated during solidification contraction may be released over time and warp may occur.

  If the warp generated on the back surface 130 of the heat sink 110 is, for example, about 0.1 mm, it is absorbed by the resin sheet 133, so that the electronic component can be stably held on the second surface portion 132. When the resin sheet is attached to the rough surface, the contact heat resistance increases, and the second surface portion 132 to which the resin sheet 133 is attached is smoothed. Therefore, by sticking the resin sheet 133 to the second surface portion 132 of the back surface 130 of the heat sink 110, it is possible to reduce the size of the power semiconductor device 1000 by improving the heat dissipation while ensuring the retention of the electronic components. .

  In the fourth embodiment, heat dissipation grease may be applied instead of the resin sheet 133. The heat dissipation grease may be a mixture of a filler of an insulating material having hydrophilicity (polarity) and an oily oil (nonpolarity). An exemplary thermal conductivity of the heat dissipation grease is 0.5 W/m·K or more and 5 W/m·K or less.

  When using the heat dissipation grease, the thickness is determined along the convex portions of the irregularities formed on the surface, so that the thermal resistance increases due to the increase in the thickness. Further, when the heat sink 1190 is contaminated with a hydrophilic substance, a problem such as poor compatibility with the heat dissipation grease occurs. Therefore, it is preferable to use a heat-dissipating grease having wettability and viscosity capable of following the change in the gap. Preferably, the die-cast molded surface is subjected to lipophilic coating or surface treatment to more effectively secure heat dissipation.

  Although the present invention has been described with reference to a plurality of embodiments, it should be understood that the present invention is not limited to the embodiments. Further, the features described in each embodiment may be freely combined. Further, various improvements, design changes and deletions may be added to the embodiment.

  For example, in the above-described embodiment, the example in which the first surface portion 131 that is a rough surface is provided on the back surface of the heat sink 110 by die casting the heat sink 110 has been described. The present invention is not limited to this, and, for example, in place of (or in addition to) die casting of the heat sink 110, the back surface of the heat sink 110 is subjected to sandblasting or laser roughening treatment, so that The first surface portion 131 may be provided.

  Further, in the above-described embodiment, an example in which the second surface portion 132, which is a smooth surface, is provided on the back surface of the heat sink 110 by performing cutting processing has been described. The present invention is not limited to this, and for example, the second surface portion 132 may be provided on the back surface of the heat sink 110 by performing a plating process instead of (or in addition to) the cutting process.

  Further, in the above-described embodiment, an example in which each rod heater 231 is configured to emit infrared rays having the same wavelength has been described. The present invention is not limited to this, and for example, rod heaters that emit infrared rays of a first wavelength and rod heaters that emit infrared rays of a second wavelength different from the first wavelength may be arranged alternately. .. Since the emissivity of the back surface 130 of the heat sink 110 changes according to the wavelength of infrared rays, it is similar to changing the intensity of infrared rays emitted from each rod heater 231 by selectively operating two types of rod heaters. Is obtained.

10 Substrate, 21, 22 Semiconductor Element, 30 First Main Terminal, 40 Second Main Terminal, 51-55 Main Circuit Wiring, 61-64 First to Fourth Bonding Layer, 70 Frame Member, 80 Control Terminal, 101-106 Semiconductor module, 110 heat sink, 111 top plate, 112 radiation fin, 113 refrigerant jacket, 114 inlet part, 115 outlet part, 120 (heat sink) surface, 121 high emissivity part, 130 (heat sink) back surface, 131 first surface part , 132 second surface portion, 210 radiation thermometer, 220 control device, 230 infrared heater device, 231 bar heater, 232 infrared light, 310 reactor, 320 step down converter, 1000 power semiconductor device

Claims (10)

A heat sink having a front surface and a back surface,
A semiconductor module bonded to the surface of the heat sink via a conductive bonding layer,
On the back surface of the heat sink, a first surface portion having a first emissivity for infrared rays having a predetermined wavelength, and a smooth second surface having a second emissivity smaller than the first emissivity for infrared rays having the predetermined wavelength. And a face portion are provided,
The surface of the heat sink is provided with a high emissivity portion for temperature monitoring,
Power semiconductor devices. The surface of the heat sink has a rectangular shape,
The high emissivity portion is provided in a corner of the surface of the heat sink,
The power semiconductor device according to claim 1. A high emissivity tape is attached to the high emissivity part,
The power semiconductor device according to claim 1. The predetermined wavelength is 1 μm or more and 10 μm or less,
The first emissivity is 0.2 or more and less than 0.3,
The high emissivity portion has an emissivity of 0.3 or more for infrared rays having a predetermined wavelength,
The power semiconductor device according to claim 1. An electronic component is mounted on the second surface portion of the back surface of the heat sink via a resin sheet or heat dissipation grease,
The power semiconductor device according to claim 1. The heat sink is made of aluminum,
The power semiconductor device according to claim 1. Providing a heat sink having a front surface and a back surface,
Disposing a semiconductor module on the surface of the heat sink via a conductive bonding material,
Irradiating the back surface of the heat sink with infrared rays of a predetermined wavelength to heat the conductive bonding material, thereby bonding the semiconductor module to the front surface of the heat sink,
In the step of preparing the heat sink,
Preparing a heat sink having a back surface having a first emissivity for infrared rays of the predetermined wavelength;
On the back surface of the heat sink, a smooth second surface portion having a second emissivity smaller than the first emissivity with respect to infrared rays having the predetermined wavelength is provided.
A high emissivity portion is provided on the surface of the heat sink,
In the step of joining the semiconductor module to the surface of the heat sink,
Using a radiation thermometer, to measure the temperature of the high emissivity portion provided on the surface of the heat sink,
Based on the measured temperature of the high emissivity portion, by controlling the infrared rays to irradiate the back surface of the heat sink, to uniformly heat the conductive bonding material,
Method for manufacturing power semiconductor device. In the step of preparing the heat sink,
A first surface portion is provided on the back surface of the heat sink by die-casting at least a part of the heat sink or by subjecting the back surface of the heat sink to sandblasting or laser roughening.
By providing a cutting process or a plating process on a part of the back surface of the heat sink, the second surface portion is provided on the back surface.
A method of manufacturing a power semiconductor device according to claim 7. The predetermined wavelength is 1 μm or more and 10 μm or less,
The first emissivity is 0.2 or more and less than 0.3,
The high emissivity portion has an emissivity of 0.3 or more for infrared rays having a predetermined wavelength,
A method for manufacturing a power semiconductor device according to claim 7. The conductive bonding material is a fluxless solder material,
The method for manufacturing a power semiconductor device according to claim 7.

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