JP6557960B2 - Semiconductor device manufacturing member and method of manufacturing semiconductor device using the same - Google Patents
Semiconductor device manufacturing member and method of manufacturing semiconductor device using the same Download PDFInfo
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- JP6557960B2 JP6557960B2 JP2014222738A JP2014222738A JP6557960B2 JP 6557960 B2 JP6557960 B2 JP 6557960B2 JP 2014222738 A JP2014222738 A JP 2014222738A JP 2014222738 A JP2014222738 A JP 2014222738A JP 6557960 B2 JP6557960 B2 JP 6557960B2
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- resin composition
- semiconductor device
- thermosetting resin
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- manufacturing
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/83005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92144—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
本発明は、半導体装置製造用部材、及びそれを用いた半導体装置の製造方法、並びに該半導体装置製造用部材及び半導体装置の製造方法に用いられる熱硬化性樹脂組成物、該熱硬化性樹脂組成物を有する熱硬化性樹脂フィルム、該熱硬化性樹脂フィルムを用いてなる半導体装置に関する。より詳しくは、小型化及び薄型化の要求が高いウェハレベル半導体装置を、反りを抑制して製造するための、半導体装置製造用部材、及びそれを用いた半導体装置の製造方法等に関する。 The present invention relates to a member for manufacturing a semiconductor device, a method for manufacturing a semiconductor device using the same, a thermosetting resin composition used in the member for manufacturing a semiconductor device and a method for manufacturing the semiconductor device, and the thermosetting resin composition The present invention relates to a thermosetting resin film having an object, and a semiconductor device using the thermosetting resin film. More specifically, the present invention relates to a semiconductor device manufacturing member and a method for manufacturing a semiconductor device using the same for manufacturing a wafer level semiconductor device that is highly demanded to be reduced in size and thickness while suppressing warpage.
電子機器の高機能化に伴って、半導体装置の小型化及び薄型化が進んでいる。近年、半導体装置の軽薄短小化は留まるところを知らず、半導体素子とほぼ同じ大きさのチップサイズパッケージや、半導体装置の上に半導体装置を積むパッケージ・オン・パッケージといった実装形態も盛んに行われており、今後、ますます半導体装置の小型化及び薄型化が進むと予想される。
このチップサイズパッケージの一形態として、ウェハレベルでパッケージ作製された、ウェハレベルチップサイズパッケージが、極めて小型の半導体装置を実現する技術として注目されている。
As electronic devices become more sophisticated, semiconductor devices are becoming smaller and thinner. In recent years, semiconductor devices have become lighter, thinner, and smaller, and mounting forms such as chip size packages that are almost the same size as semiconductor elements and package-on-packages in which semiconductor devices are stacked on top of semiconductor devices have also been actively performed. In the future, it is expected that semiconductor devices will become increasingly smaller and thinner.
As one form of this chip size package, a wafer level chip size package manufactured at a wafer level has attracted attention as a technology for realizing an extremely small semiconductor device.
ところで、ウェハレベルチップサイズパッケージ等のウェハレベル半導体装置は、ウェハ上に再配線層を形成し、はんだボール等の外部接続用端子を設けた後、ダイシングによって個片化することで得られる(例えば特許文献1〜3参照)。端子数が数10ピンから100ピン程度の場合は、ウェハ上にはんだボール等の外部接続用端子を設けることが可能である。 By the way, a wafer level semiconductor device such as a wafer level chip size package is obtained by forming a rewiring layer on a wafer, providing external connection terminals such as solder balls, and then dicing into pieces (for example, Patent Literatures 1 to 3). When the number of terminals is about several tens to 100 pins, external connection terminals such as solder balls can be provided on the wafer.
しかしながら、半導体素子の微細化が進展し、端子数が100ピン以上に増加してくると、ウェハ上のみに再配線層を形成し、外部接続用端子を設けることが難しくなる。無理に外部接続用端子を設けた場合、端子間のピッチが狭くなると共に、端子の高さが低くなり、半導体装置を実装した後の接続信頼性の確保が難しくなる。このため、半導体素子の微細化、すなわち外部接続用端子数の増加への対応が求められている。
このような背景から、近年、ウェハを所定サイズに個片化した後、再配置することで、半導体素子の外側にも外部接続用端子を設けることができる半導体装置の開発が進められている(例えば特許文献4参照)。
However, when the miniaturization of semiconductor elements progresses and the number of terminals increases to 100 pins or more, it becomes difficult to form a rewiring layer only on the wafer and provide external connection terminals. When the external connection terminals are forcibly provided, the pitch between the terminals is reduced and the heights of the terminals are reduced, so that it is difficult to ensure connection reliability after mounting the semiconductor device. For this reason, it is required to cope with miniaturization of semiconductor elements, that is, an increase in the number of external connection terminals.
Against this background, in recent years, development of a semiconductor device in which external connection terminals can be provided outside the semiconductor element by rearranging the wafer after dividing it into a predetermined size has been promoted ( For example, see Patent Document 4).
特許文献4に記載されている半導体装置は、ウェハを所定サイズに個片化した後、再配置するため、ウェハ上に再配線するよりも再配線領域を広く確保することができ、半導体素子の多ピン化に対応することが可能となる。 Since the semiconductor device described in Patent Document 4 separates the wafer into a predetermined size and then rearranges it, it can secure a wider rewiring area than rewiring on the wafer. It becomes possible to cope with a large number of pins.
図1〜3は、従来の半導体装置の製造方法を示す図である。図3(q)に示す半導体装置は、半導体素子の再配置、封止、再配線層の形成、配線の形成、外部接続用端子の形成、及び個片化等の工程を経て得られる。 1 to 3 are diagrams showing a conventional method of manufacturing a semiconductor device. The semiconductor device shown in FIG. 3 (q) is obtained through processes such as rearrangement of semiconductor elements, sealing, formation of a rewiring layer, formation of wiring, formation of external connection terminals, and singulation.
まず、支持体の片側の面に仮固定用フィルムを貼り合せ、支持体上に仮固定層を形成する(図1(a)参照)。次いで、半導体素子を所定の間隔で能動面(回路が形成された面)が仮固定層に当接するように再配置する(図1(b)参照)。
次いで、半導体素子を覆うように熱硬化性樹脂等の封止材で封止し、必要に応じて硬化処理を行う(図1(c)参照)。次いで、ホットプレート等で加熱することにより、支持体及び仮固定層を剥離し、半導体素子の能動面を露出させる(図1(d)及び(e)参照)。
次いで、半導体素子の能動面上に、スピンコート等により感光性樹脂組成物層を形成する(図2(f)参照)。次に、形成された感光性樹脂組成物層の所定の箇所を露光及び現像処理し、オーブン等で後硬化する(図2(g)参照)。
次いで、スパッタ等によりシード層を形成する(図2(h)参照)。上記シード層上にラミネート等により回路形成用レジストを形成し、所定の箇所を露光及び現像処理する(図2(j)参照)。次いで、電気めっき法により配線パターンを形成する(図2(k)参照)。次いで、剥離液により回路形成用レジストを除去する(図3(m)参照)。次いで、上記シード層をエッチングにより除去する(図3(n)参照)。次いで、再度、スピンコート等により感光性樹脂組成物層を形成し、所定の箇所を露光及び現像処理した後、オーブン等で後硬化する(図3(p)参照)。次いで、はんだボールをリフロー搭載する。最後に、ダイシング個片化することで、半導体装置を作製することができる(図3(q)参照)。
First, a temporary fixing film is bonded to one side of the support to form a temporary fixing layer on the support (see FIG. 1A). Next, the semiconductor elements are rearranged at predetermined intervals so that the active surfaces (surfaces on which the circuits are formed) are in contact with the temporary fixing layer (see FIG. 1B).
Next, sealing is performed with a sealing material such as a thermosetting resin so as to cover the semiconductor element, and a curing process is performed as necessary (see FIG. 1C). Next, the support and the temporary fixing layer are peeled off by heating with a hot plate or the like, and the active surface of the semiconductor element is exposed (see FIGS. 1D and 1E).
Next, a photosensitive resin composition layer is formed on the active surface of the semiconductor element by spin coating or the like (see FIG. 2F). Next, a predetermined portion of the formed photosensitive resin composition layer is exposed and developed, and post-cured in an oven or the like (see FIG. 2G).
Next, a seed layer is formed by sputtering or the like (see FIG. 2H). A resist for circuit formation is formed on the seed layer by lamination or the like, and a predetermined portion is exposed and developed (see FIG. 2 (j)). Next, a wiring pattern is formed by electroplating (see FIG. 2 (k)). Next, the circuit forming resist is removed with a stripping solution (see FIG. 3M). Next, the seed layer is removed by etching (see FIG. 3 (n)). Next, a photosensitive resin composition layer is formed again by spin coating or the like, and a predetermined portion is exposed and developed, and then post-cured in an oven or the like (see FIG. 3 (p)). Next, the solder balls are reflow mounted. Finally, a semiconductor device can be manufactured by dicing into individual pieces (see FIG. 3 (q)).
上記の方法で得られた半導体装置は、小型化及び薄型化が可能であるため、高機能化及び多機能化が進むスマートフォン、タブレット端末等の電子機器に好適に用いられる。
しかしながら、上記の方法で製造された半導体装置は、熱硬化性樹脂等による封止後において、半導体素子の能動面側が熱硬化性樹脂等の封止材により封止されておらず、厚み方向の対称性が低い(図1(e)参照)。そのため、反りが生じ易いという問題があった。また、薄型の半導体装置を製造する場合、この反りがより発生し易い傾向にあり、薄型化への対応も困難であった。
Since the semiconductor device obtained by the above method can be reduced in size and thickness, it is preferably used for electronic devices such as smartphones and tablet terminals whose functions are becoming higher and more multifunctional.
However, in the semiconductor device manufactured by the above method, the active surface side of the semiconductor element is not sealed with a sealing material such as a thermosetting resin after sealing with a thermosetting resin or the like. The symmetry is low (see FIG. 1 (e)). Therefore, there is a problem that warpage is likely to occur. Further, when manufacturing a thin semiconductor device, this warp tends to occur more easily, and it is difficult to cope with the reduction in thickness.
本発明は、上記課題に鑑みてなされたものであり、半導体装置の低反り化、及び薄型化を可能とする、半導体装置製造用部材を提供することを目的とする。
また、該半導体装置製造用部材を用いる効率のよい半導体装置の製造方法、並びに、該半導体装置製造用部材及び半導体装置の製造方法に用いられる熱硬化性樹脂組成物、該熱硬化性樹脂組成物を有する熱硬化性樹脂フィルム、該熱硬化性樹脂フィルムを用いてなる半導体装置を提供することを目的とする。
The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a semiconductor device manufacturing member that can reduce the warpage and thickness of a semiconductor device.
Also, an efficient semiconductor device manufacturing method using the semiconductor device manufacturing member, a thermosetting resin composition used in the semiconductor device manufacturing member and a semiconductor device manufacturing method, and the thermosetting resin composition It aims at providing the semiconductor device which uses the thermosetting resin film which has this, and this thermosetting resin film.
本発明者等は上記の課題を解決すべく検討を進めた結果、下記の本発明により当該課題を解決できることを見出した。
すなわち、本発明は、下記[1]〜[8]を提供する。
[1]少なくとも仮固定層と、熱硬化性樹脂組成物層(a)とを有する、半導体素子の再配置に用いられる半導体装置製造用部材。
[2]少なくとも支持体(1)と、仮固定層と、熱硬化性樹脂組成物層(a)とをこの順に有する、上記[1]に記載の半導体装置製造用部材。
[3]熱硬化性樹脂組成物層(a)の厚みT1が、2〜120μmである、上記[1]又は[2]に記載の半導体装置製造用部材。
[4]熱硬化性樹脂組成物層(a)が、エポキシ樹脂、フェノール樹脂、シアネート樹脂、ポリアミドイミド樹脂及び熱硬化性ポリイミド樹脂から選ばれる1種以上を含む樹脂と、最大粒径が20μm以下、かつ平均粒径が5μm以下である無機フィラーとを含有する熱硬化性樹脂組成物を層形成してなるものである、上記[1]〜[3]のいずれかに記載の半導体装置製造用部材。
[5]下記工程(I)〜(XI)を有する、半導体装置の製造方法。
(I)上記[1]〜[4]のいずれかに記載の半導体装置製造用部材の熱硬化性樹脂組成物層(a)上に、1つ以上の半導体素子を、半導体素子の能動面と熱硬化性樹脂組成物層(a)とが当接するように再配置する工程
(II)前記1つ以上の半導体素子の受動面を、封止用樹脂組成物で封止し、半導体素子の受動面を覆う絶縁層(B)を形成する工程
(III)熱硬化性樹脂組成物層(a)を硬化して、熱硬化性樹脂組成物層(a)を硬化してなる絶縁層(A)を形成する工程
(IV)前記半導体装置製造用部材の仮固定層を剥離する工程
(V)絶縁層(A)を研削し、半導体素子の能動面にまで至る開口部を形成する工程
(VI)絶縁層(A)上にシード層を形成する工程
(VII)前記シード層上に回路形成用レジストを形成し、露光処理及び現像処理を施して再配線用のレジストパターンを形成する工程
(VIII)電気めっき法により配線パターンを形成した後、剥離処理により前記レジストパターンを除去する工程
(IX)前記シード層を除去する工程
(X)前記配線パターン上に絶縁層(C)を形成した後、配線パターンにまで至る開口部を形成する工程
(XI)外部接続用端子を形成する工程
[6]上記[1]〜[4]のいずれかに記載の半導体装置製造用部材に使用される熱硬化性樹脂組成物であって、
エポキシ樹脂、フェノール樹脂、シアネート樹脂、ポリアミドイミド樹脂及び熱硬化性ポリイミド樹脂から選ばれる1種以上を含む樹脂と、最大粒径が20μm以下、かつ平均粒径が5μm以下である無機フィラーとを含有する、熱硬化性樹脂組成物。
[7]上記[6]に記載の熱硬化性樹脂組成物を支持体(2)上に塗布及び乾燥して得られる、上記[1]〜[4]のいずれかに記載の半導体装置製造用部材の製造に用いられる、熱硬化性樹脂フィルム。
[8]上記[7]に記載の熱硬化性樹脂フィルムを用いてなる、半導体装置。
As a result of investigations to solve the above problems, the present inventors have found that the problems can be solved by the following present invention.
That is, the present invention provides the following [1] to [8].
[1] A semiconductor device manufacturing member used for rearrangement of a semiconductor element, having at least a temporary fixing layer and a thermosetting resin composition layer (a).
[2] The semiconductor device manufacturing member according to [1], including at least the support (1), the temporary fixing layer, and the thermosetting resin composition layer (a) in this order.
[3] The member for manufacturing a semiconductor device according to the above [1] or [2], wherein the thickness T 1 of the thermosetting resin composition layer (a) is 2 to 120 μm.
[4] A resin in which the thermosetting resin composition layer (a) includes one or more selected from an epoxy resin, a phenol resin, a cyanate resin, a polyamideimide resin, and a thermosetting polyimide resin, and a maximum particle size of 20 μm or less. In addition, for manufacturing a semiconductor device according to any one of the above [1] to [3], which is formed by layering a thermosetting resin composition containing an inorganic filler having an average particle size of 5 μm or less. Element.
[5] A method for manufacturing a semiconductor device, comprising the following steps (I) to (XI).
(I) On the thermosetting resin composition layer (a) of the member for manufacturing a semiconductor device according to any one of the above [1] to [4], one or more semiconductor elements are arranged on an active surface of the semiconductor element. Step (II) of rearranging the thermosetting resin composition layer (a) so as to contact with the thermosetting resin composition layer (a), wherein the passive surface of the one or more semiconductor elements is sealed with a sealing resin composition, Step (III) of Forming Insulating Layer (B) Covering the Surface Insulating Layer (A) Formed by Curing Thermosetting Resin Composition Layer (a) and Curing Thermosetting Resin Composition Layer (a) Step (IV) Step of peeling the temporary fixing layer of the semiconductor device manufacturing member (V) Step of grinding the insulating layer (A) to form an opening reaching the active surface of the semiconductor element (VI) Forming a seed layer on the insulating layer (A) (VII) forming a resist for circuit formation on the seed layer; Step of forming a resist pattern for rewiring by performing processing and development processing (VIII) After forming a wiring pattern by electroplating, removing the resist pattern by stripping treatment (IX) Removing the seed layer Step (X) After forming an insulating layer (C) on the wiring pattern, forming an opening reaching the wiring pattern (XI) Forming an external connection terminal [6] [1] to [ 4] is a thermosetting resin composition used for a member for manufacturing a semiconductor device according to any one of
Contains a resin containing one or more selected from an epoxy resin, a phenol resin, a cyanate resin, a polyamideimide resin, and a thermosetting polyimide resin, and an inorganic filler having a maximum particle size of 20 μm or less and an average particle size of 5 μm or less. A thermosetting resin composition.
[7] For manufacturing a semiconductor device according to any one of [1] to [4], which is obtained by applying and drying the thermosetting resin composition according to [6] on a support (2). A thermosetting resin film used for manufacturing members.
[8] A semiconductor device using the thermosetting resin film according to [7].
本発明によると、半導体装置の低反り化、及び薄型化を可能とする、半導体装置製造用部材を提供することができる。
また、該半導体装置製造用部材を用いる効率のよい半導体装置の製造方法、並びに、該半導体装置製造用部材及び半導体装置の製造方法に用いられる熱硬化性樹脂組成物、該熱硬化性樹脂組成物を有する熱硬化性樹脂フィルム、該熱硬化性樹脂フィルムを用いてなる半導体装置を提供することができる。
ADVANTAGE OF THE INVENTION According to this invention, the member for semiconductor device manufacture which enables low curvature and thickness reduction of a semiconductor device can be provided.
Also, an efficient semiconductor device manufacturing method using the semiconductor device manufacturing member, a thermosetting resin composition used in the semiconductor device manufacturing member and a semiconductor device manufacturing method, and the thermosetting resin composition There can be provided a thermosetting resin film having a semiconductor device and a semiconductor device using the thermosetting resin film.
[半導体装置製造用部材]
本発明の半導体装置製造用部材は、少なくとも仮固定層と、熱硬化性樹脂組成物層(a)とを有する、半導体素子の再配置に用いられる半導体装置製造用部材である。
本発明の半導体装置製造用部材の一態様としては、図4(b)に示される半導体装置製造用部材が挙げられる。該部材は、支持体(1)1と、仮固定層2と、熱硬化性樹脂組成物層(a)3とをこの順に有する積層構造を有する。
以下、本発明の半導体装置製造用部材の代表的な使用方法について、図4〜7を用いて説明する。
[Semiconductor device manufacturing members]
The member for manufacturing a semiconductor device of the present invention is a member for manufacturing a semiconductor device used for rearrangement of semiconductor elements, which has at least a temporary fixing layer and a thermosetting resin composition layer (a).
As one aspect of the member for manufacturing a semiconductor device of the present invention, a member for manufacturing a semiconductor device shown in FIG. This member has a laminated structure which has the support body (1) 1, the temporary fixing layer 2, and the thermosetting resin composition layer (a) 3 in this order.
Hereinafter, a typical method of using the semiconductor device manufacturing member of the present invention will be described with reference to FIGS.
図4(b)に示す半導体装置製造用部材の熱硬化性樹脂組成物層(a)3上に、図4(c)に示すように半導体素子4を所定の間隔で、能動面が熱硬化性樹脂組成物層(a)3と当接するように貼着することで、半導体素子4を再配置する。
次いで、図4(d)に示すように、封止材により、再配置した半導体素子4の受動面を封止して絶縁層(B)6を形成する。次に、熱硬化性樹脂組成物層(a)の硬化処理を行い、熱硬化性樹脂組成物層(a)を硬化してなる絶縁層(A)5を形成する。更に、硬化処理後の積層体から、支持体(1)1及び仮固定層2を剥離する(図5(e)及び(f)参照)。
次に、絶縁層(A)5を研削し、半導体素子4の能動面にまで到る開口部を形成した後(図5(g)参照)、シード層7を形成し(図5(h)参照)、シード層7の上に感光性樹脂組成物を用いてレジストパターン8を形成(図5(j)参照)する。
その後、めっき法によって配線パターン9を形成し(図6(k)参照)、レジストパターン8及びシード層7を除去((図6(m)、図6(n)参照)する。
更に、配線パターン9を覆うように、絶縁層(C)10を形成し(図6(p)参照)、該絶縁層(C)10に開口部を形成する(図7(q)参照)。開口部から露出した配線パターン9にめっき11を施し(図7(r)参照)、外部接続用端子12を形成した後(図7(s)参照)、ダイシング個片化することで、図7(t)に示す半導体装置を得ることができる。
On the thermosetting resin composition layer (a) 3 of the semiconductor device manufacturing member shown in FIG. 4B, the active surface is thermoset at predetermined intervals as shown in FIG. 4C. The semiconductor element 4 is rearranged by sticking so as to be in contact with the conductive resin composition layer (a) 3.
Next, as shown in FIG. 4D, the passive surface of the rearranged semiconductor element 4 is sealed with a sealing material to form an insulating layer (B) 6. Next, the thermosetting resin composition layer (a) is cured to form an insulating layer (A) 5 formed by curing the thermosetting resin composition layer (a). Further, the support (1) 1 and the temporary fixing layer 2 are peeled from the laminate after the curing treatment (see FIGS. 5 (e) and (f)).
Next, the insulating layer (A) 5 is ground to form an opening reaching the active surface of the semiconductor element 4 (see FIG. 5G), and then a seed layer 7 is formed (FIG. 5H). Reference), a resist pattern 8 is formed on the seed layer 7 using a photosensitive resin composition (see FIG. 5J).
Thereafter, a wiring pattern 9 is formed by plating (see FIG. 6K), and the resist pattern 8 and the seed layer 7 are removed (see FIGS. 6M and 6N).
Further, an insulating layer (C) 10 is formed so as to cover the wiring pattern 9 (see FIG. 6 (p)), and an opening is formed in the insulating layer (C) 10 (see FIG. 7 (q)). After plating 11 is applied to the wiring pattern 9 exposed from the opening (see FIG. 7 (r)), the external connection terminals 12 are formed (see FIG. 7 (s)), and then dicing into individual pieces. The semiconductor device shown in (t) can be obtained.
このように、本発明の半導体装置製造用部材を用いて得られる半導体装置は、半導体装置の能動面、及び受動面に樹脂組成物層が形成されるため、半導体装置の厚み方向の構造対称性を高めることができる。これによって、得られる半導体装置の反りを抑制することができ、その後の製造工程において、半導体装置を効率よく形成できると考えられる。 Thus, in the semiconductor device obtained using the semiconductor device manufacturing member of the present invention, the resin composition layer is formed on the active surface and the passive surface of the semiconductor device. Can be increased. This can suppress warpage of the obtained semiconductor device, and it is considered that the semiconductor device can be efficiently formed in the subsequent manufacturing process.
<熱硬化性樹脂組成物層(a)>
熱硬化性樹脂組成物層(a)は、熱硬化性樹脂組成物から構成される層であり、半導体素子を再配置するために用いられる層である。
熱硬化性樹脂組成物層(a)中の熱硬化性樹脂は、半導体素子の再配置を可能にする観点から、半硬化又は未硬化であることが好ましい。
なお、本明細書において、「半硬化」とは、JIS K 6800「接着剤・接着用語」に定義されているようなB−ステージ(熱硬化性樹脂組成物の硬化中間体、この状態での樹脂は加熱すると軟化し、ある種の溶剤に触れると膨潤するが、完全に溶融、溶解することはない)状態を意味し、「未硬化」とは、前記溶剤に実質的に熱硬化性樹脂の全部が溶解する状態を意味する。
<Thermosetting resin composition layer (a)>
A thermosetting resin composition layer (a) is a layer comprised from a thermosetting resin composition, and is a layer used in order to rearrange a semiconductor element.
The thermosetting resin in the thermosetting resin composition layer (a) is preferably semi-cured or uncured from the viewpoint of enabling rearrangement of the semiconductor element.
In this specification, “semi-cured” means B-stage (cured intermediate of thermosetting resin composition, as defined in JIS K 6800 “Adhesive / Adhesive Terminology”. The resin softens when heated and swells when exposed to certain solvents, but does not melt or dissolve completely). “Uncured” means a substantially thermosetting resin in the solvent. Means a state in which all of is dissolved.
熱硬化性樹脂組成物層(a)の厚みT1は、好ましくは2〜120μm、より好ましくは5〜50μm、さらに好ましくは10〜30μmである。熱硬化性樹脂組成物層(a)の厚みを120μm以下とすることにより、研削処理により微細な開口径を設けることが可能になる。熱硬化性樹脂組成物層(a)の厚みを2μm以上とすることにより、熱硬化性樹脂組成物層(a)の厚みを制御し易く、半導体素子の能動面側の平滑性を向上させることができる。 The thickness T 1 of the thermosetting resin composition layer (a) is preferably 2 to 120 μm, more preferably 5 to 50 μm, and still more preferably 10 to 30 μm. By setting the thickness of the thermosetting resin composition layer (a) to 120 μm or less, a fine opening diameter can be provided by grinding. By making the thickness of the thermosetting resin composition layer (a) 2 μm or more, the thickness of the thermosetting resin composition layer (a) can be easily controlled, and the smoothness on the active surface side of the semiconductor element is improved. Can do.
熱硬化性樹脂組成物層(a)は、特に限定されないが、エポキシ樹脂、シアネート樹脂、フェノール樹脂、ポリアミドイミド樹脂及び熱硬化性ポリイミド樹脂から選ばれる1種以上を含む樹脂と、最大粒径が20μm以下、かつ平均粒径が5μm以下である無機フィラーとを含有する熱硬化性樹脂組成物を層形成してなることが好ましい。
以下、本発明の半導体装置製造用部材に好適に用いられる、本発明の熱硬化性樹脂組成物について説明する。
The thermosetting resin composition layer (a) is not particularly limited, but a resin containing one or more selected from an epoxy resin, a cyanate resin, a phenol resin, a polyamideimide resin, and a thermosetting polyimide resin, and a maximum particle size. It is preferable to form a layer of a thermosetting resin composition containing an inorganic filler having an average particle size of 20 μm or less and an average particle size of 5 μm or less.
Hereinafter, the thermosetting resin composition of the present invention that is suitably used for the member for manufacturing a semiconductor device of the present invention will be described.
(熱硬化性樹脂組成物)
本発明の熱硬化性樹脂組成物に含まれる樹脂は、エポキシ樹脂、シアネート樹脂、フェノール樹脂、ポリアミドイミド樹脂及び熱硬化性ポリイミド樹脂から選ばれる1種以上であることが好ましい。半導体装置の低反り化、及び薄型化をより効果的に発現させる観点から、エポキシ樹脂を含有することがより好ましく、エポキシ樹脂とエポキシ樹脂用硬化剤とを含有することが特に好ましい。また、必要に応じて、アクリル樹脂、酸変性エポキシアクリレート、酸含有ウレタン樹脂等のカルボン酸含有樹脂を含有していてもよい。
(Thermosetting resin composition)
The resin contained in the thermosetting resin composition of the present invention is preferably at least one selected from an epoxy resin, a cyanate resin, a phenol resin, a polyamideimide resin, and a thermosetting polyimide resin. From the viewpoint of more effectively expressing low warpage and thinning of the semiconductor device, it is more preferable to contain an epoxy resin, and it is particularly preferable to contain an epoxy resin and a curing agent for epoxy resin. Moreover, you may contain carboxylic acid containing resin, such as an acrylic resin, acid-modified epoxy acrylate, and an acid containing urethane resin, as needed.
〔エポキシ樹脂〕
エポキシ樹脂としては、2個以上のグリシジル基を有するエポキシ樹脂であれば特に限定されず、例えば、ビスフェノールA型エポキシ樹脂、ビスフェノールF型エポキシ樹脂、ビスフェノールS型エポキシ樹脂等のビスフェノール型エポキシ樹脂;ノボラックフェノール型エポキシ樹脂;ビフェニル型エポキシ樹脂;ナフタレン型エポキシ樹脂;ジシクロペンタジエン型エポキシ樹脂;ビキシレノールジグリシジルエーテル等のビキシレノール型エポキシ樹脂;水添ビスフェノールAグリシジルエーテル等の水添ビスフェノールA型エポキシ樹脂;及びそれらの二塩基酸変性ジグリシジルエーテル型エポキシ樹脂などが挙げられる。これらは単独で又は2種以上を組み合わせて用いることができる。
〔Epoxy resin〕
The epoxy resin is not particularly limited as long as it is an epoxy resin having two or more glycidyl groups. For example, bisphenol type epoxy resins such as bisphenol A type epoxy resin, bisphenol F type epoxy resin, and bisphenol S type epoxy resin; Phenolic epoxy resin; biphenyl type epoxy resin; naphthalene type epoxy resin; dicyclopentadiene type epoxy resin; bixylenol type epoxy resin such as bixylenol diglycidyl ether; hydrogenated bisphenol A type epoxy resin such as hydrogenated bisphenol A glycidyl ether And their dibasic acid-modified diglycidyl ether type epoxy resins. These can be used alone or in combination of two or more.
エポキシ樹脂としては、市販品を用いてもよい。市販のエポキシ樹脂としては、例えば、DIC(株)製「エピクロンEXA−4700」(4官能ナフタレン型エポキシ樹脂)、日本化薬(株)製「NC−7000」(ナフタレン骨格含有多官能固形エポキシ樹脂)等のナフタレン型エポキシ樹脂;日本化薬(株)製「EPPN−502H」(トリスフェノールエポキシ樹脂)等のフェノール類とフェノール性水酸基を有する芳香族アルデヒドとの縮合物のエポキシ化物(トリスフェノール型エポキシ樹脂);DIC(株)製「エピクロンHP−7200H」(ジシクロペンタジエン骨格含有多官能固形エポキシ樹脂)等のジシクロペンタジエンアラルキル型エポキシ樹脂;日本化薬(株)製「NC−3000H」(ビフェニル骨格含有多官能固形エポキシ樹脂)等のビフェニルアラルキル型エポキシ樹脂;DIC(株)製「エピクロンN660」、「エピクロンN690」、日本化薬(株)製「EOCN−104S」等のノボラック型エポキシ樹脂;日産化学工業(株)製「TEPIC」等のトリス(2,3−エポキシプロピル)イソシアヌレート、DIC(株)製「エピクロン860」、「エピクロン900−IM」、「エピクロンEXA―4816」、「エピクロンEXA−4822」、新日鐵化学(株)製「エポトートYD−134」、三菱化学(株)製「JER834」、「JER872」、住友化学(株)製「ELA−134」等のビスフェノールA型エポキシ樹脂;DIC(株)製「エピクロンHP−4032」等のナフタレン型エポキシ樹脂;DIC(株)製「エピクロンN−740」等のフェノールノボラック型エポキシ樹脂、フェノールとサリチルアルデヒドの縮合物のエポキシ樹脂;日本化薬(株)製「EPPN−500シリーズ」などが挙げられる。
上記エポキシ樹脂の中でも、銅との密着性、及び絶縁性に優れる点からは、日本化薬(株)製「NC−3000H」(ビフェニル骨格含有多官能固形エポキシ樹脂)等のビフェニルアラルキル型エポキシ樹脂が好ましく、また、架橋密度が高く、高Tgが得られる点からは、日本化薬(株)製「EPPN−500シリーズ」が好ましい。
熱硬化性樹脂組成物(a)中のエポキシ樹脂の含有量は、無機フィラーを除く樹脂成分100質量部に対して、好ましくは30〜90質量部、より好ましくは40〜80質量部、さらに好ましくは50〜80質量部である。
A commercially available product may be used as the epoxy resin. Examples of commercially available epoxy resins include “Epiclon EXA-4700” (tetrafunctional naphthalene type epoxy resin) manufactured by DIC Corporation, and “NC-7000” (polyfunctional solid epoxy resin containing naphthalene skeleton) manufactured by Nippon Kayaku Co., Ltd. Naphthalene type epoxy resins such as “EPPN-502H” (trisphenol epoxy resin) manufactured by Nippon Kayaku Co., Ltd., and epoxidized products (trisphenol type) of condensation products of phenols and aromatic aldehydes having a phenolic hydroxyl group Epoxy resin); dicyclopentadiene aralkyl epoxy resin such as “Epiclon HP-7200H” (dicyclopentadiene skeleton-containing polyfunctional solid epoxy resin) manufactured by DIC Corporation; “NC-3000H” (manufactured by Nippon Kayaku Co., Ltd.) Biphenyl aralkyl such as biphenyl skeleton-containing polyfunctional solid epoxy resin) Epoxy resin; Novolac type epoxy resin such as “Epiclon N660”, “Epiclon N690” manufactured by DIC Corporation, “EOCN-104S” manufactured by Nippon Kayaku Co., Ltd .; Tris such as “TEPIC” manufactured by Nissan Chemical Industries, Ltd. (2,3-epoxypropyl) isocyanurate, manufactured by DIC Corporation "Epicron 860", "Epicron 900-IM", "Epicron EXA-4816", "Epicron EXA-4822", manufactured by Nippon Steel Chemical Co., Ltd. Bisphenol A type epoxy resins such as “Epototo YD-134”, Mitsubishi Chemical Corporation “JER834”, “JER872”, Sumitomo Chemical Co., Ltd. “ELA-134”; DIC Corporation “Epiclon HP-4032” Naphthalene-type epoxy resin such as “Epiclon N-740” manufactured by DIC Corporation Epoxy resins, epoxy resins of the condensation product of phenol with salicylaldehyde; manufactured by Nippon Kayaku Co., Ltd., "EPPN-500 series" and the like.
Among the above epoxy resins, biphenyl aralkyl type epoxy resins such as “NC-3000H” (biphenyl skeleton-containing polyfunctional solid epoxy resin) manufactured by Nippon Kayaku Co., Ltd. are used because of their excellent adhesion to copper and insulation. In addition, “EPPN-500 series” manufactured by Nippon Kayaku Co., Ltd. is preferable from the viewpoint of high crosslinking density and high Tg.
The content of the epoxy resin in the thermosetting resin composition (a) is preferably 30 to 90 parts by mass, more preferably 40 to 80 parts by mass, further preferably 100 parts by mass of the resin component excluding the inorganic filler. Is 50-80 parts by mass.
熱硬化性樹脂としてエポキシ樹脂を用いる場合、エポキシ樹脂用硬化剤を併用することが好ましく、必要に応じて硬化促進剤を組み合わせて使用してもよい。
エポキシ樹脂と組み合わせる硬化剤としては、従来公知のエポキシ樹脂用硬化剤を用いることができる。
エポキシ樹脂用硬化剤としては、例えば、フェノール樹脂、酸無水物、脂肪族アミン、脂環族ポリアミン、芳香族ポリアミン、ジシアンジアミド、グアニジン類等が挙げられる。具体的には、4,4’−ジアミノジフェニルスルフォン、4,4’−ビス(4−アミノフェノキシ)ビフェニル、2,2−ビス[4−(4−アミノフェノキシ)フェニル]プロパン、1,3−ビス(4−アミノフェノキシ)ベンゼン、1,4−ビス(4−アミノフェノキシ)ベンゼン、トリメチレンビス(4−アミノベンゾエート)、3,3’−ジメチル−4,4’−ジアミノビフェニル、2,2’−ジメチル−4,4’−ジアミノビフェニル、4,4’−ジアミノジフェニルエーテル、3,4’−ジアミノジフェニルエーテル、ビス[4−(4−アミノフェノキシ)フェニル]スルフォン、ビス[4−(3−アミノフェノキシ)フェニル]スルフォン、9,9’−ビス(4−アミノフェニル)フルオレン、2,2−ビス[4−(4−アミノフェノキシ)フェニル]ヘキサフルオロプロパン等が挙げられる。これらのエポキシ樹脂用硬化剤は、単独で又は2種以上を組み合わせて用いることができる。
また、エポキシ樹脂用硬化剤として、本発明の熱硬化性樹脂組成物に好適に用いられる、後述するシアネート樹脂、フェノール樹脂、ポリアミドイミド樹脂及び熱硬化性ポリイミド樹脂を用いてもよく、半導体装置の低反り化、及び薄型化をより効果的に発現させる観点から、ポリアミドイミド樹脂、熱硬化性ポリイミド樹脂をエポキシ樹脂用硬化剤として用いることが好ましい。
When using an epoxy resin as a thermosetting resin, it is preferable to use an epoxy resin curing agent in combination, and a curing accelerator may be used in combination as necessary.
As the curing agent combined with the epoxy resin, a conventionally known curing agent for epoxy resin can be used.
Examples of the epoxy resin curing agent include phenol resins, acid anhydrides, aliphatic amines, alicyclic polyamines, aromatic polyamines, dicyandiamide, and guanidines. Specifically, 4,4′-diaminodiphenylsulfone, 4,4′-bis (4-aminophenoxy) biphenyl, 2,2-bis [4- (4-aminophenoxy) phenyl] propane, 1,3- Bis (4-aminophenoxy) benzene, 1,4-bis (4-aminophenoxy) benzene, trimethylenebis (4-aminobenzoate), 3,3′-dimethyl-4,4′-diaminobiphenyl, 2,2 '-Dimethyl-4,4'-diaminobiphenyl, 4,4'-diaminodiphenyl ether, 3,4'-diaminodiphenyl ether, bis [4- (4-aminophenoxy) phenyl] sulfone, bis [4- (3-amino Phenoxy) phenyl] sulfone, 9,9′-bis (4-aminophenyl) fluorene, 2,2-bis [4- (4-aminophenoxy) Eniru] hexafluoropropane, and the like. These epoxy resin curing agents can be used alone or in combination of two or more.
Further, as a curing agent for epoxy resin, a cyanate resin, a phenol resin, a polyamideimide resin and a thermosetting polyimide resin, which will be described later, which are preferably used in the thermosetting resin composition of the present invention may be used. From the viewpoint of more effectively expressing low warpage and thinning, it is preferable to use a polyamideimide resin or a thermosetting polyimide resin as a curing agent for an epoxy resin.
熱硬化性樹脂組成物中のエポキシ樹脂用硬化剤の含有量は、エポキシ樹脂及びエポキシ樹脂用硬化剤の種類に応じて適宜決定すればよいが、半導体装置の低反り化、及び薄型化をより効果的に発現させる観点から、無機フィラーを除く樹脂成分100質量部に対して、好ましくは5〜50質量部、より好ましくは10〜40質量部である。 The content of the curing agent for the epoxy resin in the thermosetting resin composition may be appropriately determined according to the type of the curing agent for the epoxy resin and the epoxy resin, but it can further reduce the warpage and thickness of the semiconductor device. From the viewpoint of effective expression, the amount is preferably 5 to 50 parts by mass, more preferably 10 to 40 parts by mass with respect to 100 parts by mass of the resin component excluding the inorganic filler.
エポキシ樹脂と組み合わせる硬化促進剤としては、従来公知の硬化促進剤を用いることができる。具体的には、イミダゾール化合物又はそのエポキシアダクト若しくはマイクロカプセル化物、DBU(1,8−ジアザビシクロ(4.5.0)ウンデセン−7)又はその誘導体等の複素環式化合物;第3級アミン化合物;トリフェニルホスフィン等の有機フォスフィン化合物;テトラフェニルホスフォニウム塩、テトラフェニルボレート塩等のオニウム塩化合物などが挙げられる。これらの硬化促進剤は、単独で又は2種以上を組み合わせて用いることができる。 A conventionally well-known hardening accelerator can be used as a hardening accelerator combined with an epoxy resin. Specifically, heterocyclic compounds such as imidazole compounds or epoxy adducts or microencapsulated products thereof, DBU (1,8-diazabicyclo (4.5.0) undecene-7) or derivatives thereof; tertiary amine compounds; Organic phosphine compounds such as triphenylphosphine; onium salt compounds such as tetraphenylphosphonium salts and tetraphenylborate salts. These curing accelerators can be used alone or in combination of two or more.
〔フェノール樹脂〕
フェノール樹脂としては、1分子中に2個以上のフェノール性水酸基を有するフェノール樹脂であれば特に制限はないが、例えば、レゾルシン、カテコール、ビスフェノールA、ビスフェノールF及び置換又は非置換のビフェノール等の1分子中に2個のフェノール性水酸基を有する化合物、アラルキル型フェノール樹脂、ジシクロペンタジエン型フェノール樹脂、トリフェニルメタン型フェノール樹脂、ノボラック型フェノール樹脂、ベンズアルデヒド型フェノールとアラルキル型フェノールとの共重合型フェノール樹脂、パラキシリレン及び/又はメタキシリレン変性フェノール樹脂、メラミン変性フェノール樹脂、テルペン変性フェノール樹脂、ジシクロペンタジエン型ナフトール樹脂、シクロペンタジエン変性フェノール樹脂、多環芳香環変性フェノール樹脂、ビフェニル型フェノール樹脂、並びにこれらの2種以上を共重合して得られるフェノール樹脂などが挙げられる。これらのフェノール樹脂は、単独で又は2種以上を組み合わせて用いることができる。
フェノール樹脂は、従来公知のフェノール樹脂用硬化剤と併用してもよく、エポキシ樹脂用硬化剤として用いてもよい。
[Phenolic resin]
The phenol resin is not particularly limited as long as it is a phenol resin having two or more phenolic hydroxyl groups in one molecule. For example, resorcin, catechol, bisphenol A, bisphenol F and substituted or unsubstituted biphenol 1 Compound having two phenolic hydroxyl groups in the molecule, aralkyl type phenol resin, dicyclopentadiene type phenol resin, triphenylmethane type phenol resin, novolac type phenol resin, copolymerized phenol of benzaldehyde type phenol and aralkyl type phenol Resin, paraxylylene and / or metaxylylene modified phenolic resin, melamine modified phenolic resin, terpene modified phenolic resin, dicyclopentadiene type naphthol resin, cyclopentadiene modified phenolic resin, polycyclic Incense ring-modified phenolic resins, biphenyl type phenol resins, and phenol resins obtained by copolymerization of two or more thereof. These phenol resins can be used alone or in combination of two or more.
The phenol resin may be used in combination with a conventionally known curing agent for phenol resin, or may be used as a curing agent for epoxy resin.
〔熱硬化性ポリイミド樹脂〕
熱硬化性ポリイミド樹脂としては、分子構造中に少なくとも2個の不飽和N−置換マレイミド基を有するビスマレイミド化合物を含有することが好ましい。具体的には、例えば、N,N’−エチレンビスマレイミド、N,N’−ヘキサメチレンビスマレイミド、N,N’−(1,3−フェニレン)ビスマレイミド、N,N’−[1,3−(2−メチルフェニレン)]ビスマレイミド、N,N’−[1,3−(4−メチルフェニレン)]ビスマレイミド、N,N’−(1,4−フェニレン)ビスマレイミド、ビス(4−マレイミドフェニル)メタン、ビス(3−メチル−4−マレイミドフェニル)メタン、3,3−ジメチル−5,5−ジエチル−4,4−ジフェニルメタンビスマレイミド、ビス(4−マレイミドフェニル)エーテル、ビス(4−マレイミドフェニル)スルホン、ビス(4−マレイミドフェニル)スルフィド、ビス(4−マレイミドフェニル)ケトン、ビス(4−マレイミドシクロヘキシル)メタン、1,4−ビス(4−マレイミドフェニル)シクロヘキサン、1,4−ビス(マレイミドメチル)シクロヘキサン、1,4−ビス(マレイミドメチル)ベンゼン、1,3−ビス(4−マレイミドフェノキシ)ベンゼン、1,3−ビス(3−マレイミドフェノキシ)ベンゼン、ビス[4−(3−マレイミドフェノキシ)フェニル]メタン、ビス[4−(4−マレイミドフェノキシ)フェニル]メタン、1,1−ビス[4−(3−マレイミドフェノキシ)フェニル]エタン、1,1−ビス[4−(4−マレイミドフェノキシ)フェニル]エタン、1,2−ビス[4−(3−マレイミドフェノキシ)フェニル]エタン、1,2−ビス[4−(4−マレイミドフェノキシ)フェニル]エタン、2,2−ビス[4−(3−マレイミドフェノキシ)フェニル]プロパン、2,2−ビス[4−(4−マレイミドフェノキシ)フェニル]プロパン、2,2−ビス[4−(3−マレイミドフェノキシ)フェニル]ブタン、2,2−ビス[4−(4−マレイミドフェノキシ)フェニル]ブタン、2,2−ビス[4−(3−マレイミドフェノキシ)フェニル]−1,1,1,3,3,3−ヘキサフルオロプロパン、2,2−ビス[4−(4−マレイミドフェノキシ)フェニル]−1,1,1,3,3,3−ヘキサフルオロプロパン、4,4−ビス(3−マレイミドフェノキシ)ビフェニル、4,4−ビス(4−マレイミドフェノキシ)ビフェニル、ビス[4−(3−マレイミドフェノキシ)フェニル]ケトン、ビス[4−(4−マレイミドフェノキシ)フェニル]ケトン、2,2−ビス(4−マレイミドフェニル)ジスルフィド、ビス(4−マレイミドフェニル)ジスルフィド、ビス[4−(3−マレイミドフェノキシ)フェニル]スルフィド、ビス[4−(4−マレイミドフェノキシ)フェニル]スルフィド、ビス[4−(3−マレイミドフェノキシ)フェニル]スルホキシド、ビス[4−(4−マレイミドフェノキシ)フェニル]スルホキシド、ビス[4−(3−マレイミドフェノキシ)フェニル]スルホン、ビス[4−(4−マレイミドフェノキシ)フェニル]スルホン、ビス[4−(3−マレイミドフェノキシ)フェニル]エーテル、ビス[4−(4−マレイミドフェノキシ)フェニル]エーテル、1,4−ビス[4−(4−マレイミドフェノキシ)−α,α−ジメチルベンジル]ベンゼン、1,3−ビス[4−(4−マレイミドフェノキシ)−α,α−ジメチルベンジル]ベンゼン、1,4−ビス[4−(3−マレイミドフェノキシ)−α,α−ジメチルベンジル]ベンゼン、1,3−ビス[4−(3−マレイミドフェノキシ)−α,α−ジメチルベンジル]ベンゼン、1,4−ビス[4−(4−マレイミドフェノキシ)−3,5−ジメチル−α,α−ジメチルベンジル]ベンゼン、1,3−ビス[4−(4−マレイミドフェノキシ)−3,5−ジメチル−α,α−ジメチルベンジル]ベンゼン、1,4−ビス[4−(3−マレイミドフェノキシ)−3,5−ジメチル−α,α−ジメチルベンジル]ベンゼン、1,3−ビス[4−(3−マレイミドフェノキシ)−3,5−ジメチル−α,α−ジメチルベンジル]ベンゼン、ポリフェニルメタンマレイミド等が挙げられる。これらのマレイミド化合物は、単独で又は2種以上を組み合わせて用いることができる。
[Thermosetting polyimide resin]
The thermosetting polyimide resin preferably contains a bismaleimide compound having at least two unsaturated N-substituted maleimide groups in the molecular structure. Specifically, for example, N, N′-ethylene bismaleimide, N, N′-hexamethylene bismaleimide, N, N ′-(1,3-phenylene) bismaleimide, N, N ′-[1,3 -(2-methylphenylene)] bismaleimide, N, N '-[1,3- (4-methylphenylene)] bismaleimide, N, N'-(1,4-phenylene) bismaleimide, bis (4- Maleimidophenyl) methane, bis (3-methyl-4-maleimidophenyl) methane, 3,3-dimethyl-5,5-diethyl-4,4-diphenylmethane bismaleimide, bis (4-maleimidophenyl) ether, bis (4 -Maleimidophenyl) sulfone, bis (4-maleimidophenyl) sulfide, bis (4-maleimidophenyl) ketone, bis (4-maleimidocyclohexyl) Tan, 1,4-bis (4-maleimidophenyl) cyclohexane, 1,4-bis (maleimidomethyl) cyclohexane, 1,4-bis (maleimidomethyl) benzene, 1,3-bis (4-maleimidophenoxy) benzene, 1,3-bis (3-maleimidophenoxy) benzene, bis [4- (3-maleimidophenoxy) phenyl] methane, bis [4- (4-maleimidophenoxy) phenyl] methane, 1,1-bis [4- ( 3-maleimidophenoxy) phenyl] ethane, 1,1-bis [4- (4-maleimidophenoxy) phenyl] ethane, 1,2-bis [4- (3-maleimidophenoxy) phenyl] ethane, 1,2-bis [4- (4-Maleimidophenoxy) phenyl] ethane, 2,2-bis [4- (3-maleimidophenoxy) Enyl] propane, 2,2-bis [4- (4-maleimidophenoxy) phenyl] propane, 2,2-bis [4- (3-maleimidophenoxy) phenyl] butane, 2,2-bis [4- (4 -Maleimidophenoxy) phenyl] butane, 2,2-bis [4- (3-maleimidophenoxy) phenyl] -1,1,1,3,3,3-hexafluoropropane, 2,2-bis [4- ( 4-maleimidophenoxy) phenyl] -1,1,1,3,3,3-hexafluoropropane, 4,4-bis (3-maleimidophenoxy) biphenyl, 4,4-bis (4-maleimidophenoxy) biphenyl, Bis [4- (3-maleimidophenoxy) phenyl] ketone, bis [4- (4-maleimidophenoxy) phenyl] ketone, 2,2-bis (4-maleimi Dophenyl) disulfide, bis (4-maleimidophenyl) disulfide, bis [4- (3-maleimidophenoxy) phenyl] sulfide, bis [4- (4-maleimidophenoxy) phenyl] sulfide, bis [4- (3-maleimidophenoxy) ) Phenyl] sulfoxide, bis [4- (4-maleimidophenoxy) phenyl] sulfoxide, bis [4- (3-maleimidophenoxy) phenyl] sulfone, bis [4- (4-maleimidophenoxy) phenyl] sulfone, bis [4 -(3-maleimidophenoxy) phenyl] ether, bis [4- (4-maleimidophenoxy) phenyl] ether, 1,4-bis [4- (4-maleimidophenoxy) -α, α-dimethylbenzyl] benzene, 1 , 3-Bis [4- (4-maleimidophene Noxy) -α, α-dimethylbenzyl] benzene, 1,4-bis [4- (3-maleimidophenoxy) -α, α-dimethylbenzyl] benzene, 1,3-bis [4- (3-maleimidophenoxy) -Α, α-dimethylbenzyl] benzene, 1,4-bis [4- (4-maleimidophenoxy) -3,5-dimethyl-α, α-dimethylbenzyl] benzene, 1,3-bis [4- (4 -Maleimidophenoxy) -3,5-dimethyl-α, α-dimethylbenzyl] benzene, 1,4-bis [4- (3-maleimidophenoxy) -3,5-dimethyl-α, α-dimethylbenzyl] benzene, Examples include 1,3-bis [4- (3-maleimidophenoxy) -3,5-dimethyl-α, α-dimethylbenzyl] benzene, polyphenylmethanemaleimide and the like. These maleimide compounds can be used alone or in combination of two or more.
上記マレイミド化合物の重合触媒としては、公知のビスマレイミド樹脂用の重合触媒を使用することができ、例えば、イミダゾール類、第3級アミン類、第4級アンモニウム塩類、三弗化ホウ素アミン錯体、オルガノフォスフィン類、オルガノホスホニウム塩等のイオン触媒;ヒドロペルオキシド等の有機過酸化物、アゾイソブチロニトリル等のアゾ化合物等のラジカル重合開始剤などが挙げられる。
重合触媒の添加量は、目的に応じて適宜決定すればよいが、マレイミド樹脂組成物の安定性の観点から、樹脂成分100質量部に対して、好ましくは0.1〜3.0質量部である。
As the polymerization catalyst for the maleimide compound, known polymerization catalysts for bismaleimide resins can be used. For example, imidazoles, tertiary amines, quaternary ammonium salts, boron trifluoride amine complexes, organo Examples thereof include ion catalysts such as phosphine and organophosphonium salt; organic peroxides such as hydroperoxide, radical polymerization initiators such as azo compounds such as azoisobutyronitrile.
The addition amount of the polymerization catalyst may be appropriately determined according to the purpose, but is preferably 0.1 to 3.0 parts by mass with respect to 100 parts by mass of the resin component from the viewpoint of stability of the maleimide resin composition. is there.
熱硬化性ポリイミド樹脂は、エポキシ樹脂用硬化剤としても好ましく用いられる。エポキシ樹脂用硬化剤として好適に用いられる熱硬化性ポリイミド樹脂としては、好ましくは上記マレイミド化合物とジアミン化合物との反応物、より好ましくは上記のマレイミド化合物とジアミン化合物と酸性置換基を有するアミン化合物との反応物である。
上記反応物の製造に用いられるジアミン化合物としては、例えば、芳香族アミン類であるm−フェニレンジアミン、p−フェニレンジアミン、1,4−ビス(4−アミノフェノキシ)ベンゼン、4,4’−ジアミノジフェニルメタン、3,3’−ジメチル−4,4’−ジアミノジフェニルメタン、3,3’−ジエチル−4,4’−ジアミノジフェニルメタン、2,2−ビス[4−(4−アミノフェノキシ)フェニル]プロパン、4,4’−ジアミノベンゾフェノン、4,4’−ジアミノジフェニルエーテル、3,3’−ジアミノジフェニルスルホン、4,4’−ジアミノジフェニルスルホン、ビス[4−(4−アミノフェノキシ)フェニル]スルホン、ベンジジン、4,4’−ビス(4−アミノフェノキシ)ビフェニル、4,4’−ジアミノジフェニルスルフィド、4,4’−ジアミノ−3,3’−ビフェニルジオール及びグアナミン化合物類であるベンゾグアナミン等が好ましく挙げられる。
また、上記反応物の製造に用いられる酸性置換基を有するアミン化合物としては、例えば、m−アミノフェノール、p−アミノフェノール、o−アミノフェノール、p−アミノ安息香酸、m−アミノ安息香酸、o−アミノ安息香酸、o−アミノベンゼンスルホン酸、m−アミノベンゼンスルホン酸、p−アミノベンゼンスルホン酸、3,5−ジヒドロキシアニリン、3,5−ジカルボキシアニリン等が好ましく挙げられる。
A thermosetting polyimide resin is also preferably used as a curing agent for epoxy resins. As a thermosetting polyimide resin suitably used as a curing agent for epoxy resin, preferably a reaction product of the maleimide compound and a diamine compound, more preferably an amine compound having an acidic substituent with the maleimide compound, the diamine compound, and The reaction product.
Examples of the diamine compound used in the production of the reaction product include m-phenylenediamine, p-phenylenediamine, 1,4-bis (4-aminophenoxy) benzene, and 4,4′-diamino which are aromatic amines. Diphenylmethane, 3,3′-dimethyl-4,4′-diaminodiphenylmethane, 3,3′-diethyl-4,4′-diaminodiphenylmethane, 2,2-bis [4- (4-aminophenoxy) phenyl] propane, 4,4′-diaminobenzophenone, 4,4′-diaminodiphenyl ether, 3,3′-diaminodiphenylsulfone, 4,4′-diaminodiphenylsulfone, bis [4- (4-aminophenoxy) phenyl] sulfone, benzidine, 4,4'-bis (4-aminophenoxy) biphenyl, 4,4'-diaminodiphenylsulfur It de, benzoguanamine 4,4'-diamino-3,3'-biphenyl diol and guanamine compounds is preferably exemplified.
Moreover, as an amine compound which has an acidic substituent used for manufacture of the said reaction material, m-aminophenol, p-aminophenol, o-aminophenol, p-aminobenzoic acid, m-aminobenzoic acid, o Preferred examples include -aminobenzoic acid, o-aminobenzenesulfonic acid, m-aminobenzenesulfonic acid, p-aminobenzenesulfonic acid, 3,5-dihydroxyaniline, 3,5-dicarboxyaniline and the like.
〔ポリアミドイミド樹脂〕
ポリアミドイミド樹脂は、分子骨格中にアミド結合とイミド結合とを有する樹脂であり、例えば、分子内にカルボキシル基及びカルボン酸無水物の両者を有する化合物とジイソシアネート化合物とを反応させることにより得られるもの、及びイミド基を有するジカルボン酸化合物とジイソシアネート化合物とを反応させることにより得られるもの等が挙げられる。
イミド基を有するジカルボン酸化合物は、例えば、ジアミン化合物と、無水トリメリット酸等のトリカルボン酸化合物とを反応させることにより得ることができる。イミド基を有するジカルボン酸化合物の製造に用いられるジアミン化合物としては、例えば、(4,4’−ジアミノ)ジシクロヘキシルメタンが好ましく挙げられ、硬化物の物性を調整する観点から、3,3’−ジヒドロキシ−4,4’−ジアミノビフェニル等のフェノール性水酸基を有するジアミン化合物を用いてもよい。
ジイソシアネート化合物としては、例えば、4,4’−ジフェニルメタンジイソシアネートが好ましく挙げられる。
ポリアミドイミド樹脂としては、例えば、東洋紡績(株)製「バイロマックスHR11NN」、「バイロマックスHR12N2」、「バイロマックスHR16NN」等が商業的に入手可能である。
[Polyamideimide resin]
Polyamideimide resin is a resin having an amide bond and an imide bond in the molecular skeleton, and is obtained, for example, by reacting a compound having both a carboxyl group and a carboxylic acid anhydride in the molecule with a diisocyanate compound. And those obtained by reacting a dicarboxylic acid compound having an imide group with a diisocyanate compound.
The dicarboxylic acid compound having an imide group can be obtained, for example, by reacting a diamine compound with a tricarboxylic acid compound such as trimellitic anhydride. As a diamine compound used for the production of a dicarboxylic acid compound having an imide group, for example, (4,4′-diamino) dicyclohexylmethane is preferably mentioned. From the viewpoint of adjusting the physical properties of the cured product, 3,3′-dihydroxy A diamine compound having a phenolic hydroxyl group such as -4,4'-diaminobiphenyl may be used.
Preferred examples of the diisocyanate compound include 4,4′-diphenylmethane diisocyanate.
As the polyamide-imide resin, for example, “Vilomax HR11NN”, “Vilomax HR12N2”, “Vilomax HR16NN” manufactured by Toyobo Co., Ltd. are commercially available.
〔シアネート樹脂〕
シアネート樹脂としては、分子内に2個以上のイソシアネート基を有する化合物であれば特に限定されないが、例えば、ビス(4−シアネートフェニル)メタン、ビス(3−メチル−4−シアネートフェニル)メタン、ビス(3−エチル−4−シアネートフェニル)メタン、ビス(3,5−ジメチル−4−シアネートフェニル)メタン、1,1−ビス(4−シアネートフェニル)エタン、2,2−ビス(4−シアネートフェニル)プロパン、2,2−ビス(4−シアネートフェニル)−1,1,1,3,3,3−ヘキサフルオロプロパン、ジ(4−シアネートフェニル)エーテル、ジ(4−シアネートフェニル)チオエーテル、4,4−ジシアネート−ジフェニル等が挙げられる。これらのシアネート樹脂は、単独で又は2種以上を組み合わせて用いることができる。
[Cyanate resin]
The cyanate resin is not particularly limited as long as it is a compound having two or more isocyanate groups in the molecule. For example, bis (4-cyanatephenyl) methane, bis (3-methyl-4-cyanatephenyl) methane, bis (3-ethyl-4-cyanatephenyl) methane, bis (3,5-dimethyl-4-cyanatephenyl) methane, 1,1-bis (4-cyanatephenyl) ethane, 2,2-bis (4-cyanatephenyl) Propane, 2,2-bis (4-cyanatephenyl) -1,1,1,3,3,3-hexafluoropropane, di (4-cyanatephenyl) ether, di (4-cyanatephenyl) thioether, 4 , 4-dicyanate-diphenyl and the like. These cyanate resins can be used alone or in combination of two or more.
〔無機フィラー〕
無機フィラーとしては、従来公知の無機フィラーを使用することができ、例えば、硫酸バリウム、チタン酸バリウム、無定形シリカ、結晶性シリカ、溶融シリカ、球状シリカ、タルク、クレー、炭酸マグネシウム、炭酸カルシウム、酸化アルミニウム、水酸化アルミニウム、窒化ケイ素、及び窒化アルミニウム、並びに、銅、錫、亜鉛、ニッケル、銀、パラジウム、アルミニウム、鉄、コバルト、金、及び白金等の金属粉体などが挙げられる。これらの無機フィラーは、単独で又は2種以上を組み合わせて用いることができる。
[Inorganic filler]
As the inorganic filler, conventionally known inorganic fillers can be used, for example, barium sulfate, barium titanate, amorphous silica, crystalline silica, fused silica, spherical silica, talc, clay, magnesium carbonate, calcium carbonate, Examples thereof include aluminum oxide, aluminum hydroxide, silicon nitride, and aluminum nitride, and metal powders such as copper, tin, zinc, nickel, silver, palladium, aluminum, iron, cobalt, gold, and platinum. These inorganic fillers can be used alone or in combination of two or more.
本発明の熱硬化性樹脂組成物に含まれる無機フィラーの最大粒径は、20μm以下であり、好ましくは10μm以下、より好ましくは5μm以下、さらに好ましくは1μm以下である。
また、無機フィラーの平均粒径は、5μm以下であり、好ましくは3μm以下、より好ましくは1μm以下、さらに好ましくは300nm以下、特に好ましくは100nm以下である。
無機フィラーの最大粒径及び平均粒径を、上記範囲内とすることにより、デスミア処理後の表面を平滑にすることができる。
無機フィラーの最大粒径、及び平均粒径は、小さいものほど好ましいが、生産性及び入手容易性の観点から、最大粒径は、好ましくは50nm以上、より好ましくは100nm以上であり、平均粒径は、好ましくは2nm以上、より好ましくは10nm以上である。
なお、ここでいう無機フィラーの最大粒径及び平均粒径は動的光散乱式ナノトラック粒度分布計「UPA−EX150」(日機装(株)製)又はレーザ回折散乱式マイクロトラック粒度分布計「MT−3100」(日機装(株)製)を用いて測定した値を意味する。
The maximum particle size of the inorganic filler contained in the thermosetting resin composition of the present invention is 20 μm or less, preferably 10 μm or less, more preferably 5 μm or less, and even more preferably 1 μm or less.
The average particle size of the inorganic filler is 5 μm or less, preferably 3 μm or less, more preferably 1 μm or less, still more preferably 300 nm or less, and particularly preferably 100 nm or less.
By setting the maximum particle size and the average particle size of the inorganic filler within the above ranges, the surface after the desmear treatment can be smoothed.
The maximum particle size and the average particle size of the inorganic filler are preferably smaller, but from the viewpoint of productivity and availability, the maximum particle size is preferably 50 nm or more, more preferably 100 nm or more, and the average particle size. Is preferably 2 nm or more, more preferably 10 nm or more.
The maximum particle size and the average particle size of the inorganic filler here are the dynamic light scattering nanotrack particle size distribution meter “UPA-EX150” (manufactured by Nikkiso Co., Ltd.) or the laser diffraction scattering type microtrack particle size distribution meter “MT”. -3100 "(manufactured by Nikkiso Co., Ltd.).
熱硬化性樹脂組成物中の無機フィラーの含有量は、半導体装置の低反り化、及び薄型化をより効果的に発現させる観点から、樹脂成分100質量部に対して、好ましくは0〜90質量部、より好ましくは10〜70質量部、さらに好ましくは20〜40質量部である。 The content of the inorganic filler in the thermosetting resin composition is preferably 0 to 90 masses with respect to 100 mass parts of the resin component from the viewpoint of more effectively expressing low warpage and thinning of the semiconductor device. Parts, more preferably 10 to 70 parts by mass, and still more preferably 20 to 40 parts by mass.
無機フィラーとしてシリカを用いる場合、シランカップリング剤により表面処理したシリカを用いることが好ましい。
シランカップリング剤としては、一般的に入手可能なものを用いることができ、例えば、アルキルシラン、アルコキシシラン、ビニルシラン、エポキシシラン、アミノシラン、アクリルシラン、メタクリルシラン、メルカプトシラン、スルフィドシラン、イソシアネートシラン、サルファーシラン、スチリルシラン、アルキルクロロシラン等が使用可能である。
When silica is used as the inorganic filler, it is preferable to use silica surface-treated with a silane coupling agent.
As the silane coupling agent, generally available ones can be used, for example, alkyl silane, alkoxy silane, vinyl silane, epoxy silane, amino silane, acrylic silane, methacryl silane, mercapto silane, sulfide silane, isocyanate silane, Sulfur silane, styryl silane, alkylchlorosilane, and the like can be used.
(熱硬化性樹脂組成物の製造方法)
本発明の熱硬化性樹脂組成物の製造方法は、特に限定されないが、例えば、上記樹脂成分、無機フィラー等を、公知の撹拌機、混合機等を用いて混合することにより製造することができる。
熱硬化性樹脂組成物は、後に塗工等を行う観点から、液状又は熱硬化性樹脂組成物溶液(以下、「樹脂ワニス」ともいう)として得ることが好ましい。
樹脂ワニスを得る方法としては、例えば、各成分を公知の撹拌機等により溶媒に溶解又は分散する方法、又は予め各成分を溶融混合することにより得られた熱硬化性樹脂組成物を溶媒に溶解若しくは分散させる方法等が挙げられる。
溶媒としては、樹脂成分を溶解することができ、且つ無機フィラーを分散させることができる溶媒であれば特に限定されないが、例えば、ジメチルアセトアミド、N−メチル−2−ピロリドン等が挙げられる。
(Method for producing thermosetting resin composition)
Although the manufacturing method of the thermosetting resin composition of this invention is not specifically limited, For example, it can manufacture by mixing the said resin component, an inorganic filler, etc. using a well-known stirrer, a mixer, etc. .
The thermosetting resin composition is preferably obtained as a liquid or thermosetting resin composition solution (hereinafter also referred to as “resin varnish”) from the viewpoint of subsequent coating or the like.
As a method for obtaining a resin varnish, for example, each component is dissolved or dispersed in a solvent with a known stirrer or the like, or a thermosetting resin composition obtained by previously melting and mixing each component is dissolved in a solvent. Or the method of dispersing is mentioned.
The solvent is not particularly limited as long as it can dissolve the resin component and can disperse the inorganic filler, and examples thereof include dimethylacetamide and N-methyl-2-pyrrolidone.
<仮固定層>
本発明の半導体装置製造用部材は、仮固定層を有する。仮固定層は、熱硬化性樹脂組成物層(a)上に半導体素子が再配置された後に、剥離される層である。
仮固定層としては、一般的に半導体装置の製造に用いられる仮固定用フィルム等を用いることができる。
仮固定用フィルムとしては、例えば、紫外線照射を行うことによって、接着力が低下する紫外線剥離フィルム、特定の薬液によって溶解する固定フィルム、加熱処理によって接着力が低下する熱剥離フィルム等が挙げられ、作業性、安全性、及び環境保全の観点から、熱剥離フィルムが好ましい。
<Temporary fixing layer>
The member for manufacturing a semiconductor device of the present invention has a temporary fixing layer. The temporary fixing layer is a layer that is peeled after the semiconductor element is rearranged on the thermosetting resin composition layer (a).
As the temporary fixing layer, a film for temporary fixing generally used for manufacturing a semiconductor device can be used.
Examples of the temporary fixing film include, for example, an ultraviolet peeling film whose adhesive strength is reduced by performing ultraviolet irradiation, a fixing film which is dissolved by a specific chemical, a thermal peeling film whose adhesive strength is reduced by heat treatment, and the like. From the viewpoints of workability, safety, and environmental protection, a heat release film is preferable.
<支持体(1)>
本発明の半導体装置製造用部材は、仮固定層の熱硬化性樹脂組成物層(a)が設けられた面とは反対側の面に支持体(1)を有していてもよい。
支持体(1)としては、特に限定されないが、熱による寸法変化が小さいSUS板、シリコンウェハ、ガラスクロスに樹脂を含浸させたガラスクロス入りコア基材等が好ましい。また、支持体(1)の厚みは、特に限定されないが、好ましくは0.4〜3.0mm、より好ましくは0.5〜3.0mmである。0.4mm以上であると変形を抑制することができ、3.0mm以下であるとSUS板を用いた場合であっても質量が大きくなり過ぎずハンドリングが良好になる。
<Support (1)>
The member for manufacturing a semiconductor device of the present invention may have a support (1) on the surface opposite to the surface on which the thermosetting resin composition layer (a) of the temporary fixing layer is provided.
Although it does not specifically limit as a support body (1), The core base material with a glass cloth which impregnated resin to the SUS board, silicon wafer, glass cloth with a small dimensional change by a heat | fever, etc. are preferable. The thickness of the support (1) is not particularly limited, but is preferably 0.4 to 3.0 mm, more preferably 0.5 to 3.0 mm. When it is 0.4 mm or more, deformation can be suppressed, and when it is 3.0 mm or less, even when a SUS plate is used, the mass does not become too large and the handling becomes good.
<半導体装置製造用部材の製造方法>
本発明の半導体装置製造用部材の製造方法は、例えば、下記工程(i)又は(ii)により製造することができる。
(i)液状の熱硬化性樹脂組成物又は前記樹脂ワニスを、仮固定層上に塗布する方法。
(ii)本発明の熱硬化性樹脂組成物を支持体(2)上に塗布及び乾燥して得られる熱硬化性樹脂フィルムを仮固定層に貼着する方法。
<Method for Manufacturing Member for Manufacturing Semiconductor Device>
The manufacturing method of the member for manufacturing a semiconductor device of the present invention can be manufactured, for example, by the following step (i) or (ii).
(I) A method of applying a liquid thermosetting resin composition or the resin varnish on a temporary fixing layer.
(Ii) A method of adhering a thermosetting resin film obtained by applying and drying the thermosetting resin composition of the present invention on a support (2) to a temporary fixing layer.
(工程(i))
工程(i)は、液状の熱硬化性樹脂組成物又は前記樹脂ワニスを、仮固定層上に塗布する方法である。
熱硬化性樹脂組成物を塗布する方法としては、公知のコーターによる塗布、印刷法による塗布等が挙げられる。コーターの方式は、特に限定されるものではなく、ダイ、コンマ、ディップ、スピン等が使用できる。
樹脂ワニスを塗布した後の乾燥条件は、特に限定されないが、熱硬化性樹脂組成物を未硬化又は半硬化の状態を維持しつつ、溶媒を除去する観点から、乾燥温度としては、好ましくは50〜150℃、乾燥時間としては、好ましくは1〜30分である。乾燥機としては、ホットプレート、乾燥炉等を用いることができる。
(Process (i))
Step (i) is a method of applying a liquid thermosetting resin composition or the resin varnish on the temporary fixing layer.
Examples of the method for applying the thermosetting resin composition include application by a known coater and application by a printing method. The method of the coater is not particularly limited, and a die, comma, dip, spin, or the like can be used.
Although the drying conditions after apply | coating a resin varnish are not specifically limited, From a viewpoint of removing a solvent, maintaining a thermosetting resin composition in the uncured or semi-hardened state, As drying temperature, Preferably it is 50. The drying time is preferably 1 to 30 minutes. As the dryer, a hot plate, a drying furnace, or the like can be used.
(工程(ii))
工程(ii)は、本発明の熱硬化性樹脂組成物を支持体(2)上に塗布及び乾燥して得られる熱硬化性樹脂フィルムを仮固定層に貼着する方法である。
工程(ii)で好適に用いられる、本発明の熱硬化性樹脂フィルムについて説明する。
(Process (ii))
Step (ii) is a method of sticking a thermosetting resin film obtained by applying and drying the thermosetting resin composition of the present invention on the support (2) to the temporary fixing layer.
The thermosetting resin film of the present invention that is preferably used in the step (ii) will be described.
〔熱硬化性樹脂フィルム〕
本発明の熱硬化性樹脂フィルムは、本発明の熱硬化性樹脂組成物を支持体(2)上に塗布及び乾燥することにより製造することができる。
支持体(2)としては、特に限定されず、ポリエチレンテレフタレートフィルム(以下、「PETフィルム」ともいう)等の公知のフィルムを使用することができる。支持体(2)の厚みは、使用する材質等に応じて適宜選択すればよいが、好ましくは1〜50μm、より好ましくは10〜30μmである。
熱硬化性樹脂フィルムの厚みは、好ましくは2〜120μm、より好ましくは5〜50μm、さらに好ましくは10〜30μmである。
[Thermosetting resin film]
The thermosetting resin film of this invention can be manufactured by apply | coating and drying the thermosetting resin composition of this invention on a support body (2).
The support (2) is not particularly limited, and a known film such as a polyethylene terephthalate film (hereinafter also referred to as “PET film”) can be used. The thickness of the support (2) may be appropriately selected according to the material used, but is preferably 1 to 50 μm, more preferably 10 to 30 μm.
The thickness of the thermosetting resin film is preferably 2 to 120 μm, more preferably 5 to 50 μm, and still more preferably 10 to 30 μm.
熱硬化性樹脂フィルムは、支持体(2)上に、公知のコーター等を用いて前記液状の熱硬化性樹脂組成物又は樹脂ワニスを塗布し、次いで、乾燥機等により乾燥することにより製造することができる。
塗布の方法としては、前記工程(i)と同様の方法が挙げられる。
乾燥条件としては、特に限定されないが、熱硬化性樹脂組成物を未硬化又は半硬化の状態を維持しつつ、溶媒を除去する観点から、乾燥温度としては、好ましくは50〜150℃、より好ましくは80〜120℃であり、乾燥時間としては、好ましくは1〜60分、より好ましくは5〜20分である。
また、樹脂フィルムには、熱硬化性樹脂組成物層(a)への埃等の付着を抑制する観点から、ポリエチレンフィルム等の保護フィルムを貼着してもよい。
The thermosetting resin film is produced by applying the liquid thermosetting resin composition or the resin varnish on the support (2) using a known coater or the like, and then drying it with a dryer or the like. be able to.
Examples of the application method include the same method as in step (i).
Although it does not specifically limit as drying conditions, From a viewpoint of removing a solvent, maintaining a thermosetting resin composition in the uncured or semi-hardened state, As drying temperature, Preferably it is 50-150 degreeC, More preferably Is 80 to 120 ° C., and the drying time is preferably 1 to 60 minutes, more preferably 5 to 20 minutes.
Moreover, you may stick protective films, such as a polyethylene film, to a resin film from a viewpoint of suppressing adhesion of dust etc. to a thermosetting resin composition layer (a).
このようにして得られた熱硬化性樹脂フィルムを、公知の真空ラミネーター、ロールラミネーター、プレス機等を用いて、仮固定層に貼着することにより、本発明の半導体装置製造用部材を製造することができる。
仮固定層への貼り合わせ工程におけるラミネーターの温度、時間、圧力は、仮固定層上に、熱硬化性樹脂組成物が均一に、かつ空気のかみこみ等が生じない条件を適宜選択すればよい。ラミネーターの温度は、半導体素子の埋め込み性を向上させる観点から、好ましくは40〜120℃、より好ましくは60〜100℃である。
ラミネーターの時間としては、同様の観点から、好ましくは1〜60秒、より好ましくは2〜20秒である。
ラミネーターの圧力としては、同様の観点から、好ましくは0.05〜1.0MPa、より好ましくは0.2〜0.6MPaである。
By sticking the thermosetting resin film thus obtained to a temporary fixing layer using a known vacuum laminator, roll laminator, press, or the like, the member for manufacturing a semiconductor device of the present invention is manufactured. be able to.
The temperature, time, and pressure of the laminator in the step of bonding to the temporary fixing layer may be selected as appropriate so long as the thermosetting resin composition is uniform on the temporary fixing layer and air entrapment does not occur. The temperature of the laminator is preferably 40 to 120 ° C, more preferably 60 to 100 ° C, from the viewpoint of improving the embedding property of the semiconductor element.
From the same viewpoint, the laminator time is preferably 1 to 60 seconds, more preferably 2 to 20 seconds.
The pressure of the laminator is preferably 0.05 to 1.0 MPa, more preferably 0.2 to 0.6 MPa from the same viewpoint.
[半導体装置の製造方法]
本発明の半導体装置の製造方法は、下記工程(I)〜(XI)を有する。
(I)本発明の半導体装置製造用部材の熱硬化性樹脂組成物層(a)上に、1つ以上の半導体素子を、半導体素子の能動面と熱硬化性樹脂組成物層(a)とが当接するように再配置する工程
(II)前記1つ以上の半導体素子の受動面を、封止用樹脂組成物で封止し、半導体素子の受動面を覆う絶縁層(B)を形成する工程
(III)熱硬化性樹脂組成物層(a)を硬化して、熱硬化性樹脂組成物層(a)を硬化してなる絶縁層(A)を形成する工程
(IV)前記半導体装置製造用部材の仮固定層を剥離する工程
(V)絶縁層(A)を研削し、半導体素子の能動面にまで至る開口部を形成する工程
(VI)絶縁層(A)上にシード層を形成する工程
(VII)前記シード層上に回路形成用レジストを形成し、露光処理及び現像処理を施して再配線用のレジストパターンを形成する工程
(VIII)電気めっき法により配線パターンを形成した後、剥離処理により前記レジストパターンを除去する工程
(IX)前記シード層を除去する工程
(X)前記配線パターン上に絶縁層(C)を形成した後、配線パターンにまで至る開口部を形成する工程
(XI)外部接続用端子を形成する工程
[Method for Manufacturing Semiconductor Device]
The method for manufacturing a semiconductor device of the present invention includes the following steps (I) to (XI).
(I) On the thermosetting resin composition layer (a) of the member for manufacturing a semiconductor device of the present invention, one or more semiconductor elements, an active surface of the semiconductor element, a thermosetting resin composition layer (a), and (II) sealing the passive surface of the one or more semiconductor elements with a sealing resin composition to form an insulating layer (B) that covers the passive surface of the semiconductor element Step (III) Step of curing the thermosetting resin composition layer (a) and curing the thermosetting resin composition layer (a) to form an insulating layer (A) (IV) Manufacturing of the semiconductor device (V) Grinding the insulating layer (A) to form an opening reaching the active surface of the semiconductor element (VI) Forming a seed layer on the insulating layer (A) Step (VII) A resist for circuit formation is formed on the seed layer, and an exposure process and a development process are performed, and the process is repeated. Step of forming a resist pattern for lines (VIII) Forming a wiring pattern by an electroplating method, then removing the resist pattern by a peeling process (IX) Removing the seed layer (X) On the wiring pattern Forming an opening reaching the wiring pattern after forming the insulating layer (C) in (XI) forming an external connection terminal
本発明の半導体装置の製造方法により得られる半導体装置は、本発明の半導体装置製造用部材を用いるため、半導体装置の能動面、及び受動面に樹脂組成物層が形成される。これによって、半導体装置の厚み方向の構造対称性を高めることができ、得られる半導体装置の反りを抑制することができるため、半導体装置を効率よく形成できると考えられる。なお、本発明の半導体装置の製造方法は、小型化及び薄型化が進むウェハレベル半導体装置の形態において特に好適である。 Since the semiconductor device obtained by the semiconductor device manufacturing method of the present invention uses the semiconductor device manufacturing member of the present invention, a resin composition layer is formed on the active surface and passive surface of the semiconductor device. Thereby, the structural symmetry in the thickness direction of the semiconductor device can be increased, and the warp of the obtained semiconductor device can be suppressed. Therefore, it is considered that the semiconductor device can be formed efficiently. The method for manufacturing a semiconductor device according to the present invention is particularly suitable in the form of a wafer level semiconductor device that is becoming smaller and thinner.
以下、図面を参照しながら本発明の製造方法の好適な実施形態について詳細に説明する。以下の説明では、同一又は相当部分には同一符号を付し、重複する説明は省略する。また、上下左右等の位置関係は、特に断らない限り、図面に示す位置関係に基づくものとする。更に、図面の寸法比率は図示の比率に限られるものではない。
ここでは、図4(a)に示す態様から、図7(t)に示す半導体装置を製造する方法について、工程ごとに説明する。
Hereinafter, preferred embodiments of the production method of the present invention will be described in detail with reference to the drawings. In the following description, the same or corresponding parts are denoted by the same reference numerals, and redundant description is omitted. Further, the positional relationship such as up, down, left and right is based on the positional relationship shown in the drawings unless otherwise specified. Further, the dimensional ratios in the drawings are not limited to the illustrated ratios.
Here, a method for manufacturing the semiconductor device shown in FIG. 7 (t) from the mode shown in FIG. 4 (a) will be described step by step.
<工程(I)>
工程(I)は、図4(c)に示すように、本発明の半導体装置製造用部材の熱硬化性樹脂組成物層(a)3上に、1つ以上の半導体素子4を、半導体素子の能動面と熱硬化性樹脂組成物層(a)とが当接するように再配置する工程である。
<Process (I)>
In step (I), as shown in FIG. 4C, one or more semiconductor elements 4 are placed on the thermosetting resin composition layer (a) 3 of the member for manufacturing a semiconductor device of the present invention. It is the process of rearrange | positioning so that an active surface and thermosetting resin composition layer (a) may contact | abut.
<工程(II)>
工程(II)は、図4(d)に示すように、前記1つ以上の半導体素子4の受動面を封止用樹脂組成物で封止し、半導体素子4の受動面を覆う絶縁層(B)6を形成する工程である。
<Process (II)>
In step (II), as shown in FIG. 4D, the passive surface of the one or more semiconductor elements 4 is sealed with a sealing resin composition, and an insulating layer ( B) A step of forming 6.
封止用樹脂組成物に含まれる樹脂は、熱硬化性、熱可塑性、又は感光性のいずれでもよいが、耐熱性及びその他の信頼性の観点から、熱硬化性樹脂が好ましい。
なお、本明細書において、封止用樹脂組成物として、熱硬化性樹脂を用いる場合、硬化前の半導体素子4の受動面を封止する樹脂組成物層を「熱硬化性樹脂組成物層(b)」と称し、熱硬化性樹脂組成物層(b)を硬化してなる層を「絶縁層(B)」と称する。
封止用樹脂組成物に含まれる樹脂として熱硬化性又は感光性樹脂を用いる場合、封止後、熱硬化及び/又はポストUV硬化することが好ましい。
熱硬化条件は、使用する樹脂の種類に応じて適宜決定すればよいが、硬化反応を充分進行させる観点、及び生産性を向上させる観点から、硬化温度は、好ましくは80〜230℃、より好ましくは100〜200℃、さらに好ましくは140〜200℃であり、硬化時間は、好ましくは5〜180分、より好ましくは10〜120分、さらに好ましくは30〜80分である。
封止用樹脂組成物に用いる熱硬化性樹脂組成物としては、一般に半導体封止用途で用いられる熱硬化性樹脂を用いることができ、例えば、本発明の熱硬化性樹脂組成物を用いることができる。
封止用樹脂組成物の形態は、特に限定されず、液状、顆粒状、フィルム状のいずれであってもよい。また、封止用樹脂組成物を用いた封止方法は、市販のトランスファー封止成型機、コンプレッション封止成型機等を用いることができる。
The resin contained in the encapsulating resin composition may be any of thermosetting, thermoplastic, or photosensitive, but a thermosetting resin is preferable from the viewpoint of heat resistance and other reliability.
In addition, in this specification, when using a thermosetting resin as a resin composition for sealing, the resin composition layer which seals the passive surface of the semiconductor element 4 before hardening is referred to as “thermosetting resin composition layer ( b) ", and a layer formed by curing the thermosetting resin composition layer (b) is referred to as" insulating layer (B) ".
When a thermosetting or photosensitive resin is used as the resin contained in the sealing resin composition, it is preferable to perform thermosetting and / or post-UV curing after sealing.
The thermosetting conditions may be appropriately determined according to the type of resin to be used, but from the viewpoint of sufficiently proceeding the curing reaction and improving the productivity, the curing temperature is preferably 80 to 230 ° C, more preferably. Is 100 to 200 ° C., more preferably 140 to 200 ° C., and the curing time is preferably 5 to 180 minutes, more preferably 10 to 120 minutes, and further preferably 30 to 80 minutes.
As the thermosetting resin composition used for the sealing resin composition, a thermosetting resin generally used for semiconductor sealing can be used. For example, the thermosetting resin composition of the present invention is used. it can.
The form of the sealing resin composition is not particularly limited, and may be any of liquid, granule, and film. Moreover, a commercially available transfer sealing molding machine, a compression sealing molding machine, etc. can be used for the sealing method using the sealing resin composition.
絶縁層(B)の厚みは、好ましくは25〜500μm、より好ましくは100〜300μm、さらに好ましくは200〜300μmである。絶縁層(B)の厚みを、500μm以下とすることにより、薄型の半導体装置に好適である。一方、絶縁層(B)の厚みを、25μm以上とすることにより、半導体素子4の厚みが過度に制限されることなく、半導体素子4を熱硬化性樹脂組成物層(a)に配置する際や、封止用樹脂組成物で封止する際に半導体素子4が割れることを抑制することができる。 The thickness of the insulating layer (B) is preferably 25 to 500 μm, more preferably 100 to 300 μm, and still more preferably 200 to 300 μm. By setting the thickness of the insulating layer (B) to 500 μm or less, it is suitable for a thin semiconductor device. On the other hand, when the thickness of the insulating layer (B) is 25 μm or more, the thickness of the semiconductor element 4 is not excessively limited, and the semiconductor element 4 is disposed in the thermosetting resin composition layer (a). In addition, the semiconductor element 4 can be prevented from cracking when sealed with the sealing resin composition.
<工程(III)>
工程(III)は、熱硬化性樹脂組成物層(a)を硬化して、熱硬化性樹脂組成物層(a)を硬化してなる絶縁層(A)5を形成する工程である。
熱硬化条件は、使用する熱硬化性樹脂組成物の種類に応じて適宜決定すればよいが、硬化反応を充分進行させる観点、及び生産性を向上させる観点から、硬化温度は、好ましくは80〜230℃、より好ましくは100〜200℃、さらに好ましくは140〜200℃であり、硬化時間は、好ましくは5〜180分、より好ましくは10〜120分、さらに好ましくは30〜80分である。
なお、本工程は前記熱硬化性樹脂組成物層(b)を硬化する工程と同時に行ってもよい。
絶縁層(A)の厚みの好適な態様としては、本発明の半導体装置製造用部材の熱硬化性樹脂組成物層(a)の厚みと同様である。
<Step (III)>
Step (III) is a step of curing the thermosetting resin composition layer (a) to form the insulating layer (A) 5 formed by curing the thermosetting resin composition layer (a).
The thermosetting conditions may be appropriately determined according to the type of the thermosetting resin composition to be used, but from the viewpoint of sufficiently proceeding the curing reaction and improving the productivity, the curing temperature is preferably 80 to It is 230 degreeC, More preferably, it is 100-200 degreeC, More preferably, it is 140-200 degreeC, Curing time becomes like this. Preferably it is 5-180 minutes, More preferably, it is 10-120 minutes, More preferably, it is 30-80 minutes.
In addition, you may perform this process simultaneously with the process of hardening | curing the said thermosetting resin composition layer (b).
A preferable aspect of the thickness of the insulating layer (A) is the same as the thickness of the thermosetting resin composition layer (a) of the member for manufacturing a semiconductor device of the present invention.
<工程(IV)>
工程(IV)は、図5(f)に示すように、半導体装置製造用部材の仮固定層2を剥離する工程である。支持体(1)1を有している場合、仮固定層2の剥離前又は仮固定層2の剥離と同時に支持体(1)1を剥離してもよい(図5(e)参照)。
剥離方法は特に限定されないが、仮固定層2として熱剥離シートを用いた場合は、例えば、所定温度に設定されたホットプレート上に載せて加熱する方法により、剥離することができる。加熱する温度は、用いる熱剥離シートに応じて適宜決定すればよい。
なお、工程(IV)は、前記工程(III)の前に行ってもよい。
<Step (IV)>
Step (IV) is a step of peeling the temporary fixing layer 2 of the member for manufacturing a semiconductor device as shown in FIG. When the support (1) 1 is provided, the support (1) 1 may be peeled before the temporary fixing layer 2 is peeled off or simultaneously with the peeling of the temporary fixing layer 2 (see FIG. 5 (e)).
The peeling method is not particularly limited, but when a heat peeling sheet is used as the temporary fixing layer 2, the peeling can be carried out by, for example, a method of placing and heating on a hot plate set to a predetermined temperature. What is necessary is just to determine the temperature to heat suitably according to the thermal peeling sheet to be used.
In addition, you may perform process (IV) before the said process (III).
<工程(V)>
工程(V)は、図5(g)に示すように、半導体素子4の能動面上の絶縁層(A)5を研削し、半導体素子4の能動面にまで至る開口部を形成する工程である。
研削後は、デスミア処理液、レジスト剥離液等のアルカリ処理液などにより処理することが好ましい。アルカリ処理液は、開口径に応じて、pHを調整することができる。
デスミア処理液は、例えば、過マンガン酸ナトリウム液、水酸化ナトリウム液、過マンガン酸カリウム液、クロム液、硫酸等の混合液を使用することができる。
デスミア処理は、熱湯、膨潤液等を用いて被処理基板を膨潤処理した後、過マンガン酸ナトリウム液等で残渣等を除去し、還元(中和)を行った後、水洗、湯洗、乾燥を行う。1回の処理を行っても充分な粗化及び残渣除去の効果が得られない場合は複数回処理を行ってもよい。なお、デスミア処理は上記のものに限定されない。
デスミア処理後に、再度、熱硬化性樹脂組成物の熱硬化を行ってもよい。再度の熱硬化の効果は、用いる熱硬化性樹脂によって異なるが、例えば、未反応物の減少、ガラス転移温度の向上、低熱膨張化等を図ることができる。
<Process (V)>
Step (V) is a step of grinding the insulating layer (A) 5 on the active surface of the semiconductor element 4 to form an opening reaching the active surface of the semiconductor element 4 as shown in FIG. is there.
After grinding, it is preferable to treat with an alkali treatment solution such as a desmear treatment solution or a resist stripping solution. The pH of the alkaline treatment liquid can be adjusted according to the opening diameter.
As the desmear treatment liquid, for example, a mixed liquid such as a sodium permanganate liquid, a sodium hydroxide liquid, a potassium permanganate liquid, a chromium liquid, and sulfuric acid can be used.
In desmear treatment, the substrate to be treated is swelled with hot water, swelling liquid, etc., then the residue is removed with sodium permanganate solution, etc., reduced (neutralized), washed with water, washed with hot water, and dried. I do. If sufficient effects of roughening and residue removal are not obtained even if the treatment is performed once, the treatment may be performed a plurality of times. The desmear process is not limited to the above.
After the desmear treatment, the thermosetting resin composition may be thermally cured again. Although the effect of the second thermosetting varies depending on the thermosetting resin used, for example, it is possible to reduce unreacted materials, improve the glass transition temperature, reduce the thermal expansion, and the like.
<工程(VI)>
工程(VI)は、図5(h)に示すように、絶縁層(A)5上にシード層7を形成する工程である。
シード層7は、銅の配線パターン8を電界めっき法によって形成する際の基層となる導電性薄膜であり、無電界銅めっき法、スパッタ法等により好適に形成することができる。スパッタ法による場合、銅を蒸着する前にTiを蒸着する等、形成層を種々選択することができる。
シード層7の厚みは、特に限定されないが、通常は0.1〜2.0μmである。
<Process (VI)>
Step (VI) is a step of forming a seed layer 7 on the insulating layer (A) 5 as shown in FIG.
The seed layer 7 is a conductive thin film that serves as a base layer when the copper wiring pattern 8 is formed by electroplating, and can be suitably formed by electroless copper plating, sputtering, or the like. When the sputtering method is used, various formation layers can be selected, for example, Ti is deposited before copper is deposited.
The thickness of the seed layer 7 is not particularly limited, but is usually 0.1 to 2.0 μm.
<工程(VII)>
工程(VII)は、図5(j)に示すように、シード層7上に回路形成用レジストを形成し、露光処理及び現像処理を施して再配線用のレジストパターン8を形成する工程である。
回路形成用レジストとしては、回路形成用のレジストとして用いられている公知のレジスト材料を用いることができ、液状、フィルム状のいずれであってよい。
回路形成用レジストは、レジスト材料が液状の場合は、印刷機を用いて塗布して形成することができ、レジスト材料がフィルム状の場合は、ロールラミネーター、真空ラミネーター等を用いて貼り付けて形成することができる。
露光処理は、形成された回路形成用レジストに対して、マスクパターンを通して活性光線を照射することにより、回路形成用レジストの所定部分を露光し、露光部の回路形成用レジストを光硬化させる処理である。該露光処理に次いで、露光部以外の回路形成用レジストを除去する現像処理を施すことにより、再配線用のレジストパターン8を形成することができる。
露光処理における活性光線の光源としては、公知の光源を用いることができ、例えば、カーボンアーク灯、水銀蒸気アーク灯、超高圧水銀灯、高圧水銀灯、キセノンランプ等の紫外線を有効に放射するものを好適に使用できる。また、直接描画方式のダイレクトレーザ露光を用いてもよい。
露光量は使用する装置、及び回路形成用レジストの組成等によって異なるが、好ましくは10〜600mJ/cm2、より好ましくは20〜400mJ/cm2である。露光量が10mJ/cm2以上であると光硬化の進行が充分となり安定してレジストパターンを形成することができ、600mJ/cm2以下であると光硬化が過剰に進行することを抑制することができ、回路形成用レジストの開口形状を安定して得ることができる。
現像処理に用いる現像液としては、例えば、20〜50℃の炭酸ナトリウムの希薄溶液(1〜5質量%水溶液)等のアルカリ現像液が用いられる。現像方法は、特に限定されず、前記現像液を用いて、スプレー、揺動浸漬、ブラッシング及びスクラッピング等の公知の方法により行うことができる。
<Process (VII)>
In step (VII), as shown in FIG. 5 (j), a resist for circuit formation is formed on the seed layer 7, and a resist pattern 8 for rewiring is formed by performing exposure processing and development processing. .
As the resist for circuit formation, a known resist material used as a resist for circuit formation can be used, and it may be either liquid or film.
When the resist material is in liquid form, the circuit forming resist can be applied and formed using a printing machine. If the resist material is in the form of a film, it can be formed using a roll laminator, vacuum laminator, etc. can do.
The exposure process is a process of exposing a predetermined portion of the circuit forming resist by irradiating the formed circuit forming resist with an actinic ray through a mask pattern and photocuring the circuit forming resist in the exposed portion. is there. Subsequent to the exposure process, a resist pattern 8 for rewiring can be formed by performing a development process for removing the resist for circuit formation other than the exposed part.
As the light source of the actinic ray in the exposure processing, a known light source can be used. For example, a light source that effectively emits ultraviolet rays, such as a carbon arc lamp, a mercury vapor arc lamp, an ultrahigh pressure mercury lamp, a high pressure mercury lamp, and a xenon lamp is preferable. Can be used for Further, direct drawing direct laser exposure may be used.
The amount of exposure varies depending on the apparatus used, the composition of the circuit forming resist, and the like, but is preferably 10 to 600 mJ / cm 2 , more preferably 20 to 400 mJ / cm 2 . When the exposure amount is 10 mJ / cm 2 or more, the progress of photocuring is sufficient and a resist pattern can be stably formed, and when it is 600 mJ / cm 2 or less, the photocuring is prevented from proceeding excessively. The opening shape of the circuit forming resist can be obtained stably.
As the developer used for the development process, for example, an alkali developer such as a dilute solution (1 to 5% by mass aqueous solution) of sodium carbonate at 20 to 50 ° C is used. The development method is not particularly limited, and can be performed by a known method such as spraying, rocking immersion, brushing, and scraping using the developer.
<工程(VIII)>
工程(VIII)は、図6(k)に示すように、電気めっき法によりシード層7上に配線パターン9を形成し、剥離処理によりレジストパターン8を除去する工程である。
電気めっきは、従来公知の方法により行えばよく、得られる配線パターン9の厚みは、1〜20μmが好ましい。
次いで、図6(m)に示すように、剥離液により、レジストパターン8を剥離し除去する。
<Process (VIII)>
Step (VIII) is a step of forming a wiring pattern 9 on the seed layer 7 by electroplating and removing the resist pattern 8 by a stripping process, as shown in FIG. 6 (k).
The electroplating may be performed by a conventionally known method, and the thickness of the obtained wiring pattern 9 is preferably 1 to 20 μm.
Next, as shown in FIG. 6 (m), the resist pattern 8 is stripped and removed with a stripping solution.
<工程(IX)>
工程(IX)は、図6(n)に示すように、絶縁層(A)5の表面に露出しているシード層7を除去する工程である。シード層7の除去は公知のエッチング液を用いて行うことができる。
<Process (IX)>
Step (IX) is a step of removing the seed layer 7 exposed on the surface of the insulating layer (A) 5 as shown in FIG. The removal of the seed layer 7 can be performed using a known etching solution.
<工程(X)>
工程(X)は、図6(p)に示すように、配線パターン9上に絶縁層(C)10を形成し、次いで、図7(q)に示すように、配線パターン9にまで至る開口部を形成する工程である。
絶縁層(C)は、絶縁層(A)の形成に用いられる熱硬化性樹脂組成物、すなわち本発明の熱硬化性樹脂組成物を使用して好適に形成することができる。また、その好適な形成方法も、絶縁層(A)の形成方法と同様である。
また、絶縁層(C)の開口部の形成方法は、前記工程(V)における開口部の形成方法と同様である。
<Process (X)>
In step (X), an insulating layer (C) 10 is formed on the wiring pattern 9 as shown in FIG. 6 (p), and then the opening reaching the wiring pattern 9 is shown in FIG. 7 (q). It is the process of forming a part.
An insulating layer (C) can be suitably formed using the thermosetting resin composition used for formation of an insulating layer (A), ie, the thermosetting resin composition of this invention. Moreover, the suitable formation method is the same as the formation method of an insulating layer (A).
Moreover, the formation method of the opening part of an insulating layer (C) is the same as the formation method of the opening part in the said process (V).
<工程(XI)>
工程(XI)は、外部接続用端子12を形成する工程である。
外部接続用端子12を形成するにあたって、まず、図7(r)に示すように、絶縁層(C)10に設けた開口部から露出した配線パターン9に無電解ニッケルめっきと金めっき11を行うことが好ましい。ニッケルめっきの厚みは、好ましくは1〜10μmであり、金めっきの厚みは、好ましくは0.01〜1.0μm、より好ましくは0.05〜0.15μmである。
次いで、図7(s)に示すように、絶縁層(C)10の開口部に外部接続用端子12としての導電材料を形成する。導電材料は、特に限定されるものではないが、環境保全の観点から、Sn−Ag系、Sn−Ag−Cu系等のはんだを使用することが好ましい。また、回路形成用レジストを用いて、Cuポストを形成してもよい。
次いで、ダイサーを用いてダイシング個片化することで、図7(t)に示す半導体装置を得ることができる。
<Process (XI)>
Step (XI) is a step of forming the external connection terminals 12.
In forming the external connection terminal 12, first, as shown in FIG. 7R, electroless nickel plating and gold plating 11 are performed on the wiring pattern 9 exposed from the opening provided in the insulating layer (C) 10. It is preferable. The thickness of the nickel plating is preferably 1 to 10 μm, and the thickness of the gold plating is preferably 0.01 to 1.0 μm, more preferably 0.05 to 0.15 μm.
Next, as shown in FIG. 7S, a conductive material as the external connection terminal 12 is formed in the opening of the insulating layer (C) 10. The conductive material is not particularly limited, but it is preferable to use Sn-Ag-based, Sn-Ag-Cu-based solder or the like from the viewpoint of environmental conservation. Alternatively, a Cu post may be formed using a circuit forming resist.
Next, the semiconductor device shown in FIG. 7 (t) can be obtained by dicing into pieces using a dicer.
以上、本発明に係る半導体装置製造用部材、及びそれを用いる半導体装置の製造方法等の好適な実施形態について説明したが、本発明は必ずしも上述した実施形態に限定されるものではなく、その趣旨を逸脱しない範囲で適宜変更を行ってもよい。 The preferred embodiments of the semiconductor device manufacturing member according to the present invention and the semiconductor device manufacturing method using the same have been described above, but the present invention is not necessarily limited to the above-described embodiments, and the gist thereof is described. Changes may be made as appropriate without departing from.
[仮固定層付き支持体の準備]
まず、支持体(1)として直径220mm、厚み1.5mmのSUS板を準備した。次に、SUS板の片側に仮固定用フィルムを、ラミネーターを用いて貼り付け、SUS板上に仮固定層を形成し、仮固定層付き支持体を得た(図4(a)参照)。なお、SUS板からはみ出した仮固定用フィルムについては、カッターナイフで切り離した。
[Preparation of support with temporary fixing layer]
First, a SUS plate having a diameter of 220 mm and a thickness of 1.5 mm was prepared as the support (1). Next, a temporary fixing film was attached to one side of the SUS plate using a laminator, a temporary fixing layer was formed on the SUS plate, and a support with a temporary fixing layer was obtained (see FIG. 4A). In addition, about the film for temporary fixing which protruded from the SUS board, it cut away with the cutter knife.
[熱硬化性樹脂組成物の製造]
製造例1
(熱硬化性樹脂組成物Aの製造)
熱硬化性樹脂組成物Aを製造するにあたり、まず硬化剤(A−1)を調製した。
温度計、撹拌装置、還流冷却管付き水分定量器の付いた加熱及び冷却可能な容積2リットルの反応容器に、ビス(4−アミノフェニル)スルホン26.40gと、2,2−ビス[4−(4−マレイミドフェノキシ)フェニル]プロパン484.50gと、p−アミノ安息香酸29.10gと、ジメチルアセトアミド360.00gとを入れ、140℃で5時間反応させて分子主鎖中にスルホン基を有し、酸性置換基と不飽和N−置換マレイミド基とを有する硬化剤(A−1)の溶液を得た。
[Production of thermosetting resin composition]
Production Example 1
(Manufacture of thermosetting resin composition A)
In producing the thermosetting resin composition A, a curing agent (A-1) was first prepared.
In a reaction vessel with a volume of 2 liters that can be heated and cooled, equipped with a thermometer, a stirrer, and a moisture meter with a reflux condenser, 26.40 g of bis (4-aminophenyl) sulfone and 2,2-bis [4- (4-Maleimidophenoxy) phenyl] propane (484.50 g), p-aminobenzoic acid (29.10 g) and dimethylacetamide (360.00 g) were added and reacted at 140 ° C. for 5 hours to have a sulfone group in the molecular main chain. Then, a solution of the curing agent (A-1) having an acidic substituent and an unsaturated N-substituted maleimide group was obtained.
次に、ビフェニルアラルキル型エポキシ樹脂(日本化薬(株)製、製品名:NC−3000H)70質量部、上記で得られた硬化剤(A−1)を固形分で30質量部、及びビニルシランで処理したシリカフィラー(平均粒径:50nm)を樹脂成分100質量部に対して30質量部配合して、ビーズミル(アシザワファインテック(株)製、商品名:スターミルLMZ)を用い、周速12m/sにて3時間分散して、熱硬化性樹脂組成物Aの溶液を得た。
なお、シリカフィラーの粒径は、レーザ回折散乱式マイクロトラック粒度分布計「MT−3100」(日機装(株)製)を用いて測定し、平均粒径が50nm、最大粒径が1μm以下となっていることを確認した。
Next, 70 parts by mass of a biphenyl aralkyl type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., product name: NC-3000H), 30 parts by mass of the hardener (A-1) obtained above, and vinylsilane 30 parts by mass of silica filler (average particle size: 50 nm) treated with a resin component with respect to 100 parts by mass of the resin component, using a bead mill (trade name: Star Mill LMZ, manufactured by Ashizawa Finetech Co., Ltd.), a peripheral speed of 12 m The solution of thermosetting resin composition A was obtained by dispersing at / s for 3 hours.
The particle size of the silica filler was measured using a laser diffraction scattering type microtrack particle size distribution meter “MT-3100” (manufactured by Nikkiso Co., Ltd.), and the average particle size was 50 nm and the maximum particle size was 1 μm or less. Confirmed that.
製造例2
(熱硬化性樹脂組成物Bの製造)
熱硬化性樹脂組成物Bを製造するにあたり、まず硬化剤(B−1)を調製した。
ジアミン化合物として(4,4’−ジアミノ)ジシクロヘキシルメタン(新日本理化(株)製、商品名:ワンダミンHM(WHM))52.7g、反応性官能基を有するジアミンとして3,3’−ジヒドロキシ−4,4’−ジアミノビフェニル6g、トリカルボン酸無水物として無水トリメリット酸108g及び非プロトン性極性溶媒としてN−メチル−2−ピロリドン1281gをフラスコに入れ、フラスコ内の温度を80℃に設定して30分間撹拌した。撹拌終了後、水と共沸可能な芳香族炭化水素としてトルエン192gをさらに添加し、フラスコ内の温度を160℃に昇温して2.5時間還流した。水分定量受器に理論量の水が貯留され、水の留出が見られなくなっていることを確認した後、水分定量受器中の水及びトルエンを除去しながら、フラスコ内の温度を180℃まで上昇させて反応溶液中のトルエンを除去した。フラスコ内の溶液を60℃まで冷却した後、長鎖炭化水素鎖骨格(炭素原子数約50)を有するジカルボン酸として水添α,ω−ポリブタジエンジカルボン酸(日本曹達(株)製、商品名:CI−1000)309.5gを入れ、10分間撹拌した。撹拌終了後、ジイソシアネートとして4,4’−ジフェニルメタンジイソシアネート119.7gを添加し、フラスコ内の温度を160℃に上昇させて2時間反応させ、硬化剤(B−1)の溶液として、ポリアミドイミド樹脂溶液を得た。
このポリアミドイミド樹脂の重量平均分子量(Mw)をゲルパーミエーションクロマトグラフィーにより測定したところ47,000であった。ポリアミドイミド1分子あたりの平均反応性官能基数Nは4.4であった。
Production Example 2
(Production of thermosetting resin composition B)
In producing the thermosetting resin composition B, a curing agent (B-1) was first prepared.
(4,4′-diamino) dicyclohexylmethane (manufactured by Shin Nippon Rika Co., Ltd., trade name: Wandamine HM (WHM)) 52.7 g as a diamine compound, and 3,3′-dihydroxy- as a diamine having a reactive functional group 6 g of 4,4′-diaminobiphenyl, 108 g of trimellitic anhydride as a tricarboxylic anhydride and 1281 g of N-methyl-2-pyrrolidone as an aprotic polar solvent were put in a flask, and the temperature in the flask was set at 80 ° C. Stir for 30 minutes. After completion of the stirring, 192 g of toluene was further added as an aromatic hydrocarbon azeotropic with water, and the temperature in the flask was raised to 160 ° C. and refluxed for 2.5 hours. After confirming that the theoretical amount of water was stored in the moisture determination receiver and that no water distilling was observed, the temperature in the flask was adjusted to 180 ° C. while removing water and toluene in the moisture determination receiver. And toluene in the reaction solution was removed. After cooling the solution in the flask to 60 ° C., hydrogenated α, ω-polybutadiene dicarboxylic acid (manufactured by Nippon Soda Co., Ltd., trade name) as a dicarboxylic acid having a long-chain hydrocarbon chain skeleton (about 50 carbon atoms). CI-1000) 309.5 g was added and stirred for 10 minutes. After completion of the stirring, 119.7 g of 4,4′-diphenylmethane diisocyanate was added as a diisocyanate, the temperature in the flask was raised to 160 ° C. and reacted for 2 hours, and a solution of a curing agent (B-1) was obtained as a polyamideimide resin. A solution was obtained.
The weight average molecular weight (Mw) of this polyamideimide resin was measured by gel permeation chromatography and found to be 47,000. The average reactive functional group number N per polyamideimide molecule was 4.4.
次に、ビフェニルアラルキル型エポキシ樹脂(日本化薬(株)製、製品名:NC−3000H)70質量部、上記で得られた硬化剤(B−1)を固形分で30質量部、及びビニルシランで処理したシリカフィラー(平均粒径:50nm)を樹脂成分100質量部に対して30質量部配合して、ビーズミル(アシザワファインテック(株)製、商品名:スターミルLMZ)を用い、周速12m/sにて3時間分散して、熱硬化性樹脂組成物Bの溶液を得た。
シリカフィラーの粒径は、実施例1と同様の方法により測定し、平均粒径が50nm、最大粒径が1μm以下であることを確認した。
Next, 70 parts by mass of a biphenyl aralkyl type epoxy resin (manufactured by Nippon Kayaku Co., Ltd., product name: NC-3000H), 30 parts by mass of the solidifying agent (B-1) obtained above, and vinylsilane 30 parts by mass of silica filler (average particle size: 50 nm) treated with a resin component with respect to 100 parts by mass of the resin component, using a bead mill (trade name: Star Mill LMZ, manufactured by Ashizawa Finetech Co., Ltd.), a peripheral speed of 12 m The solution of thermosetting resin composition B was obtained by dispersing at / s for 3 hours.
The particle size of the silica filler was measured by the same method as in Example 1, and it was confirmed that the average particle size was 50 nm and the maximum particle size was 1 μm or less.
製造例3
<熱硬化性樹脂組成物C>
クレゾールノボラック型エポキシ樹脂(DIC(株)製、商品名:エピクロンN660)70質量部、硬化剤としてフェノキシ樹脂(新日鉄化学(株)製、商品名:YP−55)、メラミン変性フェノールノボラック樹脂(DIC(株)製、商品名:LA7054)30質量部、硫酸バリウム(平均粒径:300nm)を樹脂成分100質量部に対して10質量部、及びビニルシランで処理したシリカフィラー(平均粒径:50nm)を樹脂成分100質量部に対して30質量部配合して、ビーズミル(アシザワファインテック(株)製、商品名:スターミルLMZ)を用い、周速12m/sにて3時間分散して、熱硬化性樹脂組成物Cの溶液を得た。
シリカフィラー及び硫酸バリウムの粒径は、実施例1と同様の方法により測定し、シリカフィラーの平均粒径が50nm、最大粒径が1μm以下であること、硫酸バリウムの平均粒径が300nm、最大粒径が2μmであることを確認した。
Production Example 3
<Thermosetting resin composition C>
70 parts by mass of a cresol novolac type epoxy resin (manufactured by DIC Corporation, trade name: Epicron N660), a phenoxy resin (manufactured by Nippon Steel Chemical Co., Ltd., trade name: YP-55) as a curing agent, a melamine-modified phenol novolac resin (DIC) Co., Ltd., trade name: LA7054 30 parts by mass, barium sulfate (average particle size: 300 nm) 10 parts by mass with respect to 100 parts by mass of resin component, and silica filler treated with vinylsilane (average particle size: 50 nm) 30 parts by mass with respect to 100 parts by mass of the resin component, dispersed for 3 hours at a peripheral speed of 12 m / s using a bead mill (manufactured by Ashizawa Finetech Co., Ltd., product name: Star Mill LMZ), and thermoset. A solution of the conductive resin composition C was obtained.
The particle diameters of the silica filler and barium sulfate were measured by the same method as in Example 1. The average particle diameter of the silica filler was 50 nm, the maximum particle diameter was 1 μm or less, the average particle diameter of barium sulfate was 300 nm, the maximum It was confirmed that the particle size was 2 μm.
[熱硬化性樹脂フィルムの製造]
製造例4〜10
製造例1〜3により得られた熱硬化性樹脂組成物A〜Cの溶液を、支持体(2)であるPETフィルム(帝人(株)製、商品名:G2−16、16μm厚)上に、乾燥後の熱硬化性樹脂組成物層(a)の厚みが表1に示す厚みT1になるように塗布した。その後、熱風対流式乾燥機を用いて100℃で10分間乾燥することによって支持体(2)上に熱硬化性樹脂フィルムを得た。
次いで、熱硬化性樹脂フィルムに埃等が付着しないように、ポリエチレンフィルム(タマポリ(株)製、商品名:NF−15)を保護フィルムとして貼り合わせ、保護フィルム付の熱硬化性樹脂フィルムF1〜F7を得た。
[Manufacture of thermosetting resin film]
Production Examples 4 to 10
The solutions of the thermosetting resin compositions A to C obtained in Production Examples 1 to 3 are placed on a PET film (trade name: G2-16, 16 μm thickness, manufactured by Teijin Limited) which is the support (2). the thickness of the thermosetting resin composition layer after drying (a) was applied so that the thickness T 1 as shown in Table 1. Then, the thermosetting resin film was obtained on the support body (2) by drying for 10 minutes at 100 degreeC using a hot air convection type dryer.
Subsequently, a polyethylene film (manufactured by Tamapoly Co., Ltd., trade name: NF-15) is bonded as a protective film so that dust or the like does not adhere to the thermosetting resin film, and the thermosetting resin films F1 to F1 with a protective film are attached. F7 was obtained.
[半導体装置製造用部材の製造]
製造例11〜17
製造例4〜10で得られた熱硬化性樹脂フィルムF−1〜F−7の保護フィルムを剥がし、前述の仮固定層付き支持体上に、熱硬化性樹脂フィルムが仮固定層に当接するように載置した。次いで、プレス式真空ラミネーター((株)名機製作所製、商品名:MVLP−500)を用いて表2に示す条件でラミネートし、仮固定層上に熱硬化性樹脂組成物層(a)を形成した。その後、支持体(2)であるPETフィルムを剥離し、支持体(1)と仮固定層と熱硬化性樹脂組成物層(a)とをこの順に有する半導体装置製造用部材P−1〜P−7を得た。
なお、プレス式真空ラミネーターの真空引き時間は20秒、気圧は4kPa以下の条件とした。
[Manufacture of semiconductor device manufacturing members]
Production Examples 11-17
The protective films of the thermosetting resin films F-1 to F-7 obtained in Production Examples 4 to 10 are peeled off, and the thermosetting resin film comes into contact with the temporary fixing layer on the above-described support with the temporary fixing layer. Was placed as follows. Subsequently, it laminates on the conditions shown in Table 2 using a press-type vacuum laminator (trade name: MVLP-500, manufactured by Meiki Seisakusho Co., Ltd.), and the thermosetting resin composition layer (a) is placed on the temporary fixing layer. Formed. Thereafter, the PET film as the support (2) is peeled off, and the semiconductor device manufacturing members P-1 to P having the support (1), the temporary fixing layer, and the thermosetting resin composition layer (a) in this order. -7 was obtained.
The press-type vacuum laminator was evacuated for 20 seconds and the atmospheric pressure was 4 kPa or less.
[半導体装置の製造]
実施例1〜9
まず、図4(c)に示すように、表3に示す厚みT2を有する7.3mm×7.3mmの半導体素子((株)ウォルツ製、商品名:CC80−0101JY)を、半導体装置製造用部材P−1〜P−7上に、半導体素子の能動面と熱硬化性樹脂組成物層(a)とが当接するように格子状に配置した。
半導体素子の搭載数は193個、ピッチは縦方向、横方向ともに9.6mmとした。半導体素子の配置にはダイソーター(キヤノンマシナリー(株)製、商品名:CAP3500)を用いた。配置時の荷重は半導体素子1個当り1kgfとした。
[Manufacture of semiconductor devices]
Examples 1-9
First, as shown in FIG. 4 (c), the semiconductor device of 7.3 mm × 7.3 mm having a thickness T 2 shown in Table 3 (Co. Walz Ltd., trade name: CC80-0101JY) a semiconductor device manufacturing On the members P-1 to P-7, the active surface of the semiconductor element and the thermosetting resin composition layer (a) were arranged in a lattice shape so as to contact each other.
The number of mounted semiconductor elements was 193, and the pitch was 9.6 mm in both the vertical and horizontal directions. A die sorter (manufactured by Canon Machinery Co., Ltd., trade name: CAP3500) was used for the arrangement of the semiconductor elements. The load at the time of arrangement was 1 kgf per semiconductor element.
次に、熱硬化性樹脂組成物層(a)の形成に用いた熱硬化性樹脂組成物と同様の熱硬化性樹脂組成物からなる熱硬化性樹脂フィルムを用いて、半導体素子を覆うように封止し、表3に示す厚みT3を有する熱硬化性樹脂組成物層(b)を形成した。封止方法は熱硬化性樹脂組成物層(a)の形成方法と同様である。次いで、表3に記載の条件で熱硬化を行い、熱硬化性樹脂組成物層(a)及び熱硬化性樹脂組成物層(b)を硬化してなる、絶縁層(A)及び絶縁層(B)を形成した(図4(d)参照)。 Next, the semiconductor element is covered with a thermosetting resin film made of the same thermosetting resin composition as the thermosetting resin composition used for forming the thermosetting resin composition layer (a). sealed, to form the thermosetting resin composition layer having a thickness T 3 shown in Table 3 (b). The sealing method is the same as the method for forming the thermosetting resin composition layer (a). Subsequently, thermosetting is performed under the conditions described in Table 3, and the thermosetting resin composition layer (a) and the thermosetting resin composition layer (b) are cured, and an insulating layer (A) and an insulating layer ( B) was formed (see FIG. 4D).
その後、図5(e)及び(f)に示すように、支持体(1)及び仮固定層を、200℃のホットプレート上で剥離し、成形物を得た。 Then, as shown to FIG.5 (e) and (f), the support body (1) and the temporary fixing layer were peeled on the 200 degreeC hotplate, and the molding was obtained.
比較例1〜5
図1(b)に示すように、表4に示す厚みを有する7.3mm×7.3mmの半導体素子((株)ウォルツ製、商品名:CC80−0101JY)を、前述の仮固定層付き支持体の仮固定層に、半導体素子の能動面と仮固定層とが当接するように格子状に配置した。
半導体素子の搭載数は193個、ピッチは縦方向、横方向ともに9.6mmとした。半導体素子の配置にはダイソーター(キヤノンマシナリー(株)製、商品名:CAP3500)を用いた。配置時の荷重は半導体素子1個当り1kgfとした。
次に、図1(c)に示すように、封止材として、熱硬化性樹脂組成物層(a)の形成に用いた熱硬化性樹脂組成物と同様の熱硬化性樹脂組成物からなる熱硬化性樹脂フィルムを用いて、半導体素子を覆うように封止し、表4に示す厚みを有する封止材の層を形成した。封止方法は熱硬化性樹脂組成物層(a)の形成方法と同様である。次いで、表4に記載の条件で熱硬化を行った。
その後、図1(d)及び(e)に示すように、支持体及び仮固定層を、200℃のホットプレート上で剥離した。
次いで、図2(f)の感光性樹脂組成物の替わりに封止材として用いた、熱硬化性樹脂組成物と同じ熱硬化性樹脂組成物を用いて、同様の条件で熱硬化をし、厚み25μmの絶縁層を形成することで成形物を得た。
Comparative Examples 1-5
As shown in FIG. 1 (b), a 7.3 mm × 7.3 mm semiconductor element (trade name: CC80-0101JY, manufactured by Waltz Co., Ltd.) having the thickness shown in Table 4 is supported with the above-described temporary fixing layer. The active surface of the semiconductor element and the temporary fixing layer were arranged in a lattice shape so as to contact the temporary fixing layer of the body.
The number of mounted semiconductor elements was 193, and the pitch was 9.6 mm in both the vertical and horizontal directions. A die sorter (manufactured by Canon Machinery Co., Ltd., trade name: CAP3500) was used for the arrangement of the semiconductor elements. The load at the time of arrangement was 1 kgf per semiconductor element.
Next, as shown in FIG.1 (c), it consists of the thermosetting resin composition similar to the thermosetting resin composition used for formation of a thermosetting resin composition layer (a) as a sealing material. Using a thermosetting resin film, the semiconductor element was sealed so as to form a sealing material layer having a thickness shown in Table 4. The sealing method is the same as the method for forming the thermosetting resin composition layer (a). Next, thermosetting was performed under the conditions described in Table 4.
Then, as shown to FIG.1 (d) and (e), the support body and the temporary fixing layer were peeled on the 200 degreeC hotplate.
Next, using the same thermosetting resin composition as the thermosetting resin composition used as a sealing material instead of the photosensitive resin composition of FIG. 2 (f), thermosetting under the same conditions, A molded product was obtained by forming an insulating layer having a thickness of 25 μm.
[評価条件]
実施例1〜9で得られた成形物について、以下の(1)〜(3)の評価を行った。また、比較例1〜5で得られた半導体装置については、(1)成形物の反りを評価した。
(1)成形物の反り
得られた成形物について、直径200mmの範囲を室温下(25℃)で高精度三次元形状測定システム(コムス(株)製、商品名:MAP−3D 300XYTAS)用いて測定して、以下の基準に基づいて評価した。
○:反り量が1mm未満
△:反り量が1mm以上、2mm未満
×:反り量が2mm以上
[Evaluation conditions]
The molded products obtained in Examples 1 to 9 were evaluated as follows (1) to (3). Moreover, about the semiconductor device obtained by Comparative Examples 1-5, the curvature of the molded object was evaluated.
(1) Warping of molded product About the obtained molded product, a range of 200 mm in diameter was used at room temperature (25 ° C.) using a high-accuracy three-dimensional shape measurement system (Combs Co., Ltd., trade name: MAP-3D 300XYTAS). It was measured and evaluated based on the following criteria.
○: Warpage amount is less than 1 mm △: Warpage amount is 1 mm or more and less than 2 mm ×: Warpage amount is 2 mm or more
(2)埋め込み性
得られた成形物について、目視で観察して、以下の基準に基づいて評価した。
○:半導体素子間に充分に樹脂が埋め込まれており、未充填部がない。
×:半導体素子間に未充填部がある。
(2) Embeddability The obtained molded product was visually observed and evaluated based on the following criteria.
○: The resin is sufficiently embedded between the semiconductor elements, and there is no unfilled portion.
X: There is an unfilled portion between the semiconductor elements.
(3)絶縁層(A)表面の平滑性
得られた成形物について、半導体素子の能動面側の絶縁層(A)の表面を、表面粗さ計((株)小坂研究所製、商品名:Surfcorder SE−2300)を用いて段差を測定して、以下の基準に基づいて評価した。
○:絶縁層(A)の表面の段差が2μm未満
△:絶縁層(A)の表面の段差が2μm以上、5μm未満
×:絶縁層(A)の表面の段差が5μm以上
(3) Insulating layer (A) surface smoothness About the obtained molded product, the surface of the insulating layer (A) on the active surface side of the semiconductor element was measured with a surface roughness meter (trade name, manufactured by Kosaka Laboratory Ltd.). : Surfcorder SE-2300) was used to measure the level difference and evaluated based on the following criteria.
○: The step on the surface of the insulating layer (A) is less than 2 μm Δ: The step on the surface of the insulating layer (A) is 2 μm or more and less than 5 μm ×: The step on the surface of the insulating layer (A) is 5 μm or more
上記の評価結果を表3及び4に示した。 The evaluation results are shown in Tables 3 and 4.
本発明の半導体装置製造用部材を用いた実施例1〜9は、いずれも成形物の反りが小さく、埋め込み性、絶縁層(A)の平滑性にも優れていた。一方で、比較例1〜5は、いずれも成形物の反りが大きかった。 In each of Examples 1 to 9 using the semiconductor device manufacturing member of the present invention, the warpage of the molded product was small, and the embedding property and the smoothness of the insulating layer (A) were excellent. On the other hand, as for Comparative Examples 1-5, the curvature of the molding was large.
本発明の半導体装置製造用部材、及びそれを用いた半導体装置の製造方法は、ウェハレベル半導体装置に好適に用いられる他、パッケージ・オン・パッケージの再配線プロセス等、小型化及び薄型化が必要な全ての半導体装置、部品内蔵基板に適用することができる。 The semiconductor device manufacturing member and the semiconductor device manufacturing method using the same according to the present invention are preferably used for a wafer level semiconductor device, and need to be reduced in size and thickness, such as a package-on-package rewiring process. It can be applied to all semiconductor devices and component-embedded substrates.
1 支持体(1)
2 仮固定層
3 熱硬化性樹脂組成物層(a)
4 半導体素子
5 絶縁層(A)
6 絶縁層(B)
7 シード層
8 レジストパターン
9 配線パターン
10 絶縁層(C)
11 無電解ニッケル/金めっき
12 外部接続用端子
1 Support (1)
2 Temporary fixing layer 3 Thermosetting resin composition layer (a)
4 Semiconductor element 5 Insulating layer (A)
6 Insulation layer (B)
7 Seed layer 8 Resist pattern 9 Wiring pattern 10 Insulating layer (C)
11 Electroless nickel / gold plating 12 External connection terminal
Claims (8)
熱硬化性樹脂組成物層(a)が、エポキシ樹脂、フェノール樹脂、シアネート樹脂、ポリアミドイミド樹脂及び熱硬化性ポリイミド樹脂から選ばれる1種以上を含む樹脂と、最大粒径が1μm以下かつ平均粒径が50nm以下である無機フィラーとを含有する熱硬化性樹脂組成物を層形成してなる層である、半導体素子の再配置に用いられる半導体装置製造用部材であって、
前記熱硬化性樹脂組成物層(a)は、その一方の面に半導体素子を再配置されるものであり、かつその他方の面に再配線が形成されるものである、半導体装置製造用部材。 Having at least a temporary fixing layer and a thermosetting resin composition layer (a),
The thermosetting resin composition layer (a) is a resin containing one or more selected from an epoxy resin, a phenol resin, a cyanate resin, a polyamideimide resin, and a thermosetting polyimide resin, a maximum particle size of 1 μm or less, and an average particle size A member for manufacturing a semiconductor device used for rearrangement of semiconductor elements, which is a layer formed by layering a thermosetting resin composition containing an inorganic filler having a diameter of 50 nm or less,
The thermosetting resin composition layer (a) is a member for manufacturing a semiconductor device in which a semiconductor element is rearranged on one surface and a rewiring is formed on the other surface. .
(I)請求項1〜4のいずれか1項に記載の半導体装置製造用部材の熱硬化性樹脂組成物層(a)上に、1つ以上の半導体素子を、半導体素子の能動面と熱硬化性樹脂組成物層(a)とが当接するように再配置する工程
(II)前記1つ以上の半導体素子の受動面を、封止用樹脂組成物で封止し、半導体素子の受動面を覆う絶縁層(B)を形成する工程
(III)熱硬化性樹脂組成物層(a)を硬化して、熱硬化性樹脂組成物層(a)を硬化してなる絶縁層(A)を形成する工程
(IV)前記半導体装置製造用部材の仮固定層を剥離する工程
(V)絶縁層(A)を研削し、半導体素子の能動面にまで至る開口部を形成する工程
(VI)絶縁層(A)上にシード層を形成する工程
(VII)前記シード層上に回路形成用レジストを形成し、露光処理及び現像処理を施して再配線用のレジストパターンを形成する工程
(VIII)電気めっき法により配線パターンを形成した後、剥離処理により前記レジストパターンを除去する工程
(IX)前記シード層を除去する工程
(X)前記配線パターン上に絶縁層(C)を形成した後、配線パターンにまで至る開口部を形成する工程
(XI)外部接続用端子を形成する工程 A method for manufacturing a semiconductor device, comprising the following steps (I) to (XI).
(I) On the thermosetting resin composition layer (a) of the member for manufacturing a semiconductor device according to any one of claims 1 to 4, one or more semiconductor elements are disposed on the active surface of the semiconductor element and heat. Step (II) of rearranging the curable resin composition layer (a) so as to come into contact with the curable resin composition layer (a), wherein the passive surface of the one or more semiconductor elements is sealed with a sealing resin composition, Step (III) of forming an insulating layer (B) covering the insulating layer (A) obtained by curing the thermosetting resin composition layer (a) and curing the thermosetting resin composition layer (a) Step of forming (IV) Step of peeling off the temporary fixing layer of the semiconductor device manufacturing member (V) Step of grinding the insulating layer (A) to form an opening reaching the active surface of the semiconductor element (VI) Insulation Step of forming a seed layer on the layer (A) (VII) Forming a circuit forming resist on the seed layer, and exposing A step of forming a resist pattern for rewiring by performing processing and development processing (VIII) A step of removing the resist pattern by a stripping treatment after forming a wiring pattern by electroplating (IX) A step of removing the seed layer Step (X) Forming an insulating layer (C) on the wiring pattern and then forming an opening reaching the wiring pattern (XI) Forming an external connection terminal
エポキシ樹脂、フェノール樹脂、シアネート樹脂、ポリアミドイミド樹脂及び熱硬化性ポリイミド樹脂から選ばれる1種以上を含む樹脂と、最大粒径が1μm以下、かつ平均粒径が50nm以下である無機フィラーとを含有する、熱硬化性樹脂組成物。 It is a thermosetting resin composition used for the member for semiconductor device manufacture according to any one of claims 1 to 4,
A resin containing one or more selected from an epoxy resin, a phenol resin, a cyanate resin, a polyamideimide resin, and a thermosetting polyimide resin, and an inorganic filler having a maximum particle size of 1 μm or less and an average particle size of 50 nm or less A thermosetting resin composition to contain.
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