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JP6235901B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP6235901B2
JP6235901B2 JP2013272503A JP2013272503A JP6235901B2 JP 6235901 B2 JP6235901 B2 JP 6235901B2 JP 2013272503 A JP2013272503 A JP 2013272503A JP 2013272503 A JP2013272503 A JP 2013272503A JP 6235901 B2 JP6235901 B2 JP 6235901B2
Authority
JP
Japan
Prior art keywords
well
semiconductor region
electrode
gate electrode
memory cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2013272503A
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English (en)
Japanese (ja)
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JP2015128083A (ja
Inventor
英明 山越
英明 山越
大介 岡田
大介 岡田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2013272503A priority Critical patent/JP6235901B2/ja
Priority to TW103142908A priority patent/TWI645570B/zh
Priority to KR1020140187088A priority patent/KR20150077339A/ko
Priority to CN201410831957.0A priority patent/CN104752435B/zh
Priority to US14/584,533 priority patent/US9196363B2/en
Publication of JP2015128083A publication Critical patent/JP2015128083A/ja
Priority to US14/942,142 priority patent/US20160071858A1/en
Application granted granted Critical
Publication of JP6235901B2 publication Critical patent/JP6235901B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • H01L29/42324—
    • H01L29/42328—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/10—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
JP2013272503A 2013-12-27 2013-12-27 半導体装置 Active JP6235901B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2013272503A JP6235901B2 (ja) 2013-12-27 2013-12-27 半導体装置
TW103142908A TWI645570B (zh) 2013-12-27 2014-12-09 半導體裝置
KR1020140187088A KR20150077339A (ko) 2013-12-27 2014-12-23 반도체 장치
CN201410831957.0A CN104752435B (zh) 2013-12-27 2014-12-26 半导体器件
US14/584,533 US9196363B2 (en) 2013-12-27 2014-12-29 Semiconductor device
US14/942,142 US20160071858A1 (en) 2013-12-27 2015-11-16 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013272503A JP6235901B2 (ja) 2013-12-27 2013-12-27 半導体装置

Publications (2)

Publication Number Publication Date
JP2015128083A JP2015128083A (ja) 2015-07-09
JP6235901B2 true JP6235901B2 (ja) 2017-11-22

Family

ID=53482726

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013272503A Active JP6235901B2 (ja) 2013-12-27 2013-12-27 半導体装置

Country Status (5)

Country Link
US (2) US9196363B2 (zh)
JP (1) JP6235901B2 (zh)
KR (1) KR20150077339A (zh)
CN (1) CN104752435B (zh)
TW (1) TWI645570B (zh)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6235901B2 (ja) * 2013-12-27 2017-11-22 ルネサスエレクトロニクス株式会社 半導体装置
US10192875B2 (en) * 2014-10-14 2019-01-29 Ememory Technology Inc. Non-volatile memory with protective stress gate
TWI593052B (zh) 2015-01-07 2017-07-21 力旺電子股份有限公司 半導體元件及其製造方法
US9805806B2 (en) 2015-10-16 2017-10-31 Ememory Technology Inc. Non-volatile memory cell and method of operating the same
US9847133B2 (en) * 2016-01-19 2017-12-19 Ememory Technology Inc. Memory array capable of performing byte erase operation
JP6876397B2 (ja) * 2016-09-21 2021-05-26 ラピスセミコンダクタ株式会社 半導体メモリおよび半導体メモリの製造方法
US9990992B2 (en) * 2016-10-25 2018-06-05 Arm Ltd. Method, system and device for non-volatile memory device operation
JP6276447B1 (ja) 2017-03-24 2018-02-07 株式会社フローディア 不揮発性半導体記憶装置
US10446567B2 (en) * 2017-03-31 2019-10-15 Asahi Kasei Microdevices Corporation Nonvolatile storage element and reference voltage generation circuit
WO2019124356A1 (ja) * 2017-12-20 2019-06-27 パナソニック・タワージャズセミコンダクター株式会社 半導体装置及びその動作方法
US11049565B2 (en) * 2018-04-23 2021-06-29 Micron Technology, Inc. Non-volatile memory devices and systems with volatile memory features and methods for operating the same
US10847225B2 (en) * 2018-06-20 2020-11-24 Microchip Technology Incorporated Split-gate flash memory cell with improved read performance
US10923594B2 (en) * 2018-12-20 2021-02-16 Globalfoundries U.S. Inc. Methods to reduce or prevent strain relaxation on PFET devices and corresponding novel IC products
JP2021048204A (ja) * 2019-09-17 2021-03-25 キオクシア株式会社 半導体装置及びその製造方法
JP2023045292A (ja) * 2021-09-21 2023-04-03 キオクシア株式会社 半導体記憶装置及びその制御方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6977408B1 (en) * 2003-06-30 2005-12-20 Lattice Semiconductor Corp. High-performance non-volatile memory device and fabrication process
JP4800109B2 (ja) 2005-09-13 2011-10-26 ルネサスエレクトロニクス株式会社 半導体装置
US7671401B2 (en) * 2005-10-28 2010-03-02 Mosys, Inc. Non-volatile memory in CMOS logic process
JP4622902B2 (ja) * 2006-03-17 2011-02-02 セイコーエプソン株式会社 不揮発性半導体記憶装置
JP4901325B2 (ja) * 2006-06-22 2012-03-21 ルネサスエレクトロニクス株式会社 半導体装置
JP2008270364A (ja) * 2007-04-17 2008-11-06 Toyota Motor Corp 不揮発性半導体記憶素子
JP5404149B2 (ja) * 2009-04-16 2014-01-29 ルネサスエレクトロニクス株式会社 半導体記憶装置
JP2011009454A (ja) 2009-06-25 2011-01-13 Renesas Electronics Corp 半導体装置
KR20110134704A (ko) * 2010-06-09 2011-12-15 삼성전자주식회사 비휘발성 메모리 장치
JP6078327B2 (ja) * 2012-12-19 2017-02-08 ルネサスエレクトロニクス株式会社 半導体装置
JP6235901B2 (ja) * 2013-12-27 2017-11-22 ルネサスエレクトロニクス株式会社 半導体装置

Also Published As

Publication number Publication date
TW201526249A (zh) 2015-07-01
TWI645570B (zh) 2018-12-21
JP2015128083A (ja) 2015-07-09
US20150187782A1 (en) 2015-07-02
CN104752435A (zh) 2015-07-01
KR20150077339A (ko) 2015-07-07
US9196363B2 (en) 2015-11-24
CN104752435B (zh) 2019-04-09
US20160071858A1 (en) 2016-03-10

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