JP6230381B2 - 加工方法 - Google Patents
加工方法 Download PDFInfo
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- JP6230381B2 JP6230381B2 JP2013236374A JP2013236374A JP6230381B2 JP 6230381 B2 JP6230381 B2 JP 6230381B2 JP 2013236374 A JP2013236374 A JP 2013236374A JP 2013236374 A JP2013236374 A JP 2013236374A JP 6230381 B2 JP6230381 B2 JP 6230381B2
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- 238000003672 processing method Methods 0.000 title claims description 22
- 238000003466 welding Methods 0.000 claims description 26
- 230000002093 peripheral effect Effects 0.000 claims description 18
- 230000008878 coupling Effects 0.000 claims description 14
- 238000010168 coupling process Methods 0.000 claims description 14
- 238000005859 coupling reaction Methods 0.000 claims description 14
- 238000005304 joining Methods 0.000 claims description 14
- 238000002360 preparation method Methods 0.000 claims description 10
- 230000001678 irradiating effect Effects 0.000 claims description 3
- 238000000034 method Methods 0.000 claims description 2
- 238000005520 cutting process Methods 0.000 description 22
- 239000000853 adhesive Substances 0.000 description 17
- 230000001070 adhesive effect Effects 0.000 description 17
- 239000003292 glue Substances 0.000 description 12
- 239000010410 layer Substances 0.000 description 8
- 230000001681 protective effect Effects 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 239000012790 adhesive layer Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 229910009372 YVO4 Inorganic materials 0.000 description 2
- 239000000835 fiber Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000002679 ablation Methods 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54493—Peripheral marks on wafers, e.g. orientation flats, notches, lot number
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Plasma & Fusion (AREA)
- Thermal Sciences (AREA)
- Mechanical Engineering (AREA)
Description
11a 表面
11b 裏面
11c 外周(側面)
13 デバイス領域
15 外周余剰領域
17 ストリート(分割予定ライン)
19 デバイス
21 バンプ(凸部)
31 支持プレート
31a 表面
31b 裏面
31c 凹部
41 レーザービーム
43 集光点
45 溶着領域
47 分断溝
49 溶着領域
51 フレーム
53 ダイシングテープ
2 研削装置
4 保持テーブル
6 研削ホイール
8 研削砥石
10 レーザー加工装置
12 保持テーブル
14 レーザー加工ヘッド
16 研削装置
18 保持テーブル
20 研削ホイール
22 研削砥石
24 切削装置
26 保持テーブル
28 切削ブレード
Claims (4)
- 表面にデバイスが形成されたデバイス領域と該デバイス領域を囲繞した外周余剰領域とを有し、該デバイス領域に凸部を有し、外周が面取り加工されている被加工物の加工方法であって、
被加工物の該デバイス領域に対応すると共に該凸部を収容する凹部を表面側に有した支持プレートを準備する支持プレート準備ステップと、
該支持プレートの該凹部と被加工物の該デバイス領域とを対応させるように被加工物を該支持プレート上に載置する位置決めステップと、
該支持プレート上に載置された被加工物の該外周余剰領域にレーザービームを照射して被加工物が該支持プレートに溶着した溶着領域を形成し、被加工物を該支持プレート上に固定する結合ステップと、
該結合ステップを実施した後、被加工物に加工を施す加工ステップと、を備え、
該溶着領域は、被加工物の該面取り加工されている部分と該支持プレートとの間に形成されることを特徴とする加工方法。 - 前記加工ステップを実施した後、被加工物を前記溶着領域に沿って分断する分断溝を形成し、被加工物を前記支持プレートから取り外す取り外しステップをさらに備え、
該取り外しステップでは、該分断溝の内周が該溶着領域の内周位置から被加工物の中央側に位置づくよう、該分断溝が形成されることを特徴とする請求項1に記載の加工方法。 - 前記結合ステップでは、被加工物の側方からレーザービームを照射することで前記溶着領域を形成することを特徴とする請求項1または請求項2に記載の加工方法。
- 前記溶着領域は、前記支持プレート上に載置された被加工物の側面を含む領域であることを特徴とする請求項1から請求項3のいずれかに記載の加工方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013236374A JP6230381B2 (ja) | 2013-11-15 | 2013-11-15 | 加工方法 |
US14/531,477 US9576835B2 (en) | 2013-11-15 | 2014-11-03 | Workpiece processing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013236374A JP6230381B2 (ja) | 2013-11-15 | 2013-11-15 | 加工方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2015097221A JP2015097221A (ja) | 2015-05-21 |
JP6230381B2 true JP6230381B2 (ja) | 2017-11-15 |
Family
ID=53172091
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013236374A Active JP6230381B2 (ja) | 2013-11-15 | 2013-11-15 | 加工方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US9576835B2 (ja) |
JP (1) | JP6230381B2 (ja) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6399923B2 (ja) * | 2014-12-24 | 2018-10-03 | 株式会社ディスコ | 板状物のレーザー加工方法 |
JP6608732B2 (ja) * | 2016-03-01 | 2019-11-20 | 株式会社ディスコ | ウエーハの加工方法 |
JP2017162855A (ja) * | 2016-03-07 | 2017-09-14 | 株式会社ディスコ | ウエーハの加工方法 |
CN107331644A (zh) * | 2016-04-29 | 2017-11-07 | 上海微电子装备(集团)股份有限公司 | 一种晶圆临时键合方法 |
JP6775880B2 (ja) * | 2016-09-21 | 2020-10-28 | 株式会社ディスコ | ウェーハの加工方法 |
US11264280B2 (en) * | 2017-06-19 | 2022-03-01 | Rohm Co., Ltd. | Semiconductor device manufacturing method and wafer-attached structure |
DE102018200656A1 (de) * | 2018-01-16 | 2019-07-18 | Disco Corporation | Verfahren zum Bearbeiten eines Wafers |
KR102477355B1 (ko) | 2018-10-23 | 2022-12-15 | 삼성전자주식회사 | 캐리어 기판 및 이를 이용한 기판 처리 장치 |
JP7187115B2 (ja) * | 2018-12-04 | 2022-12-12 | 株式会社ディスコ | ウェーハの加工方法 |
KR20220006155A (ko) * | 2020-07-07 | 2022-01-17 | 삼성디스플레이 주식회사 | 디스플레이 장치의 제조 방법 |
Family Cites Families (20)
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WO2003098695A1 (fr) * | 2002-05-20 | 2003-11-27 | Sumitomo Mitsubishi Silicon Corporation | Substrat stratifie, procede de fabrication de substrat, et gabarit de pressage de peripherie externe de plaquettes utilises dans ce procede |
JP2004193515A (ja) * | 2002-12-13 | 2004-07-08 | Shin Etsu Handotai Co Ltd | Soiウエーハの製造方法 |
JP2004207606A (ja) | 2002-12-26 | 2004-07-22 | Disco Abrasive Syst Ltd | ウェーハサポートプレート |
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JP4847199B2 (ja) * | 2006-04-25 | 2011-12-28 | 株式会社ディスコ | ウエーハに装着された接着フィルムの破断方法 |
DE102006032488B4 (de) * | 2006-07-13 | 2008-09-25 | Infineon Technologies Ag | Verfahren zur Bearbeitung von Wafern |
DE102007035788A1 (de) * | 2007-07-31 | 2009-02-05 | Robert Bosch Gmbh | Waferfügeverfahren, Waferverbund sowie Chip |
US20090130821A1 (en) * | 2007-10-12 | 2009-05-21 | Applied Materials, Inc. | Three dimensional packaging with wafer-level bonding and chip-level repair |
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JP2011060848A (ja) * | 2009-09-07 | 2011-03-24 | Nitto Denko Corp | 熱硬化型ダイボンドフィルム、ダイシング・ダイボンドフィルム、及び、半導体装置 |
US8912017B2 (en) * | 2011-05-10 | 2014-12-16 | Ostendo Technologies, Inc. | Semiconductor wafer bonding incorporating electrical and optical interconnects |
US8580655B2 (en) * | 2012-03-02 | 2013-11-12 | Disco Corporation | Processing method for bump-included device wafer |
JP6214192B2 (ja) * | 2013-04-11 | 2017-10-18 | 株式会社ディスコ | 加工方法 |
-
2013
- 2013-11-15 JP JP2013236374A patent/JP6230381B2/ja active Active
-
2014
- 2014-11-03 US US14/531,477 patent/US9576835B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
JP2015097221A (ja) | 2015-05-21 |
US20150136312A1 (en) | 2015-05-21 |
US9576835B2 (en) | 2017-02-21 |
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