JP6127575B2 - Semiconductor device, power conversion device and drive system - Google Patents

Description

  The present invention relates to a semiconductor device, a power conversion device, and a drive system.

  A p-type base layer is formed on the surface of the n-type base layer opposite to the p-type emitter layer and the collector electrode, and an n-type source layer is formed on the surface of the p-type base layer. The n-type source layer and the p-type base layer are connected to the emitter electrode, and a first trench and a second trench are formed from the surface of the n-type source layer to the intermediate depth of the n-type base layer through the p-type base layer. A gate electrode is formed in the first trench through a gate insulating film, and a buried electrode is formed in the second trench through an insulating film. A semiconductor device is disclosed in which a buried electrode and an emitter electrode are electrically connected to have substantially the same potential (Patent Document 1).

JP 2003-188382 A

  However, the semiconductor device is configured in accordance with the applied voltage characteristics unique to the device so as to suppress the oscillation of the gate voltage due to circuit resonance or the oscillation of the voltage between the collector and the emitter. Therefore, when applied to a switching device in which the operating voltage and current change, there is a problem that optimal drive control cannot be performed against electromagnetic interference of the device.

  The problem to be solved by the present invention is to provide a semiconductor element, a power conversion device, and a drive system that reduce electromagnetic interference and enable optimum drive control.

  The present invention detects a gate voltage of a switching element when the switching element is turned off or turned on, measures a charge amount accumulated in the gate, and performs switching based on the detected gate voltage and the measured charge amount. The above problem is solved by setting the gate impedance of the element.

  In the present invention, since the gate impedance corresponding to the state of the switching element is set while measuring the gate charge amount of the switching element, it is possible to perform optimum drive control with suppressed surge, and as a result, the electromagnetic wave Interference can be reduced.

1 is a block diagram of a drive system according to an embodiment of the present invention. FIG. 2 is a block diagram of a gate control circuit, an upper arm circuit, and a controller of FIG. 1. It is a gate control circuit diagram which constitutes an upper arm circuit. 2 is a graph showing changes in gate voltage characteristics and collector-emitter voltage with respect to gate charge amount in the switching element of FIG. 1. It is an operation characteristic of a switching element, and is a graph showing characteristics of collector current (Ic), collector-emitter voltage (Vce), gate voltage (Vg), gate current (Ig), and gate charge amount (Qg) at turn-off. (A) shows the characteristics of the comparative example, and (b) shows the characteristics of the present invention. FIG. 6 is a gate control circuit diagram constituting an upper arm circuit in a semiconductor device according to a modification of the present invention. FIG. 6 is a block diagram of a gate control circuit, an upper arm circuit, and a controller in a semiconductor device according to a modification of the present invention. FIG. 6 is a block diagram of a gate control circuit, upper and lower arm circuits, and a controller in a semiconductor device according to a modification of the present invention. It is a graph which shows the characteristic of the gate voltage with respect to the amount of gate charges in the switching element of the semiconductor device which concerns on the modification of this invention. In the drive system concerning other embodiments of the present invention, it is a graph which shows the characteristic of torque current command value (Iq ^* ) at the time of torque starting, inverter input voltage (Vdc), and inverter current (Iq).

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<< First Embodiment >>
FIG. 1 is a block diagram of a driving system for a three-phase motor including a semiconductor device according to an embodiment of the present invention. The drive system of this example is an example in which an insulated gate bipolar transistor (IGBT) is used as a switching element as a semiconductor used in a power converter.

  The drive system of this example includes a battery 1, an inverter 2, a motor 3, a switch 4, and a controller 5.

  The battery 1 is a battery configured by connecting a plurality of secondary batteries such as lithium ion batteries directly or in parallel. The battery 1 is a power source for the vehicle.

  The inverter 2 is a power conversion device that converts DC power input from the battery 1 into AC power and outputs the AC power to the motor 3 based on a control signal from the controller. The inverter 2 includes upper arm elements 21, 23, and 25 that form an upper arm circuit, lower arm elements 22, 24, and 26 that form a lower knitting circuit, a smoothing capacitor 27, and a drive circuit 30. .

  The upper arm elements 21, 23, and 25 mainly have a circuit in which switching elements Q 1, Q 3, and Q 5 as power devices and diodes D 1, D 3, and D 5 are connected in parallel. The collector terminal of the switching element Q1 and the cathode terminal of the diode D1 are connected, and the collector terminal of the switching element Q1 and the anode terminal of the diode D1 are connected. Similarly, the lower arm elements 22, 24, and 26 are mainly configured by a circuit in which switching elements Q2, Q4, and Q6 as power devices and diodes D2, D4, and D6 are connected in parallel. The connection between switching element Q2 to switching element Q6 and diodes D2 to D56 is the same as the connection between switching element Q1 and diode D1.

  In this example, three pairs of circuits in which two switching elements Q1 to Q6 are connected in series are electrically connected to the battery 1 by being connected between the power supply line P and the power supply line N. Each connection point for connecting the switching elements and the three-phase output portion of the three-phase motor 3 are electrically connected to each other. The power line P is connected to the positive side of the battery 1, and the power line N is connected to the negative side of the battery 1.

  The connection point between the emitter terminal of the switching element Q1 and the collector terminal of the switching element Q2 is a U-phase output, and the connection point between the emitter terminal of the switching element Q3 and the collector terminal of the switching element Q4 is a V-phase output. The connection point between the emitter terminal of Q5 and the collector terminal of the switching element Q6 is a W-phase output and is connected to the three-phase wiring of the motor 3. The upper arm elements 21, 23, 25 and the lower arm elements 22, 24, 26 constitute a two-level three-phase inverter circuit 20.

  The smoothing capacitor 27 is an element that is connected between the inverter circuit 20 and the battery 1 and smoothes the electric power from the battery 1. The smoothing capacitor 27 is connected between the power supply lines P and N.

  The drive circuit 30 has a function of switching the switching elements S <b> 1 to S <b> 6 on and off based on the switching signal transmitted from the controller 5. In this embodiment, the high-side gate control circuit 31 and the low-side gate control circuit 32 are used. The high-side gate control circuit 31 is a circuit that switches the switching element Q1 on and off by controlling the gate of the switching element Q1 of the upper arm element 21, and is a gate drive circuit for the switching element Q1. The low-side gate control circuit 32 is a circuit that switches the switching element Q2 on and off by controlling the gate of the switching element Q2 of the lower arm circuit 22, and is a gate drive circuit for the switching element Q2.

  In FIG. 1, only the U-phase high-side gate control circuit 31 and the low-side gate control circuit 32 are shown, but the drive circuit 2 has the same gate control circuit for the V-phase and the W-phase. ing.

  The motor 3 is a three-phase AC motor, and examples thereof include an induction motor having a secondary winding on a rotor, a brushless motor having a permanent magnet built therein and a permanent magnet synchronous motor. The motor 3 is connected to the connection point of the switching elements Q1 and Q2, the connection point of the switching elements Q3 and Q4, and the connection point of the switching elements Q5 and Q6 in each phase of the inverter circuit.

  The switch 4 is connected between the battery 1 and the smoothing capacitor 27 of the inverter 2.

  The controller 5 is a controller for controlling the drive circuit 2. Based on the torque command value input from the outside, the phase current of the motor 3, and the rotation speed of the motor 3, the controller 5 outputs the current command value of the inverter 2 for outputting the required torque command value from the motor 3. Calculate. The phase current of the motor 3 is detected by a current sensor 6 connected between the inverter circuit 20 and the motor 3, and the rotational speed of the motor 3 is calculated from the detection value of the resolver 7 provided in the motor 3. The

  Then, the controller 5 generates a switching signal for supplying electric power required by the motor 3 and outputs it to the drive circuit 30. And the drive circuit 30 switches on / off of each switching element Q1-Q6 based on the said switching signal. Thus, the controller 5 performs PWM control on the inverter 2.

  Next, a detailed configuration of the gate control circuit will be described with reference to FIG. FIG. 2 is a block diagram of the high-side gate control circuit 31, the upper arm element 21, and the controller 5. Since the high side and the low side can be implemented with the same configuration, description thereof is omitted. The other switching elements Q2 to Q5 and the configuration of the gate control circuit are the same as those in FIG.

  As shown in FIG. 2, the high-side gate control circuit 31 includes a gate drive circuit 311, a gate voltage detection unit 312, a gate charge amount measurement unit 313, a DC voltage estimation unit 314, a gate resistance setting circuit 315, A gate current detection unit 316 and a reference voltage setting unit 318 are included. In FIG. 2, C indicates a collector terminal of the transistor which is the switching element Q1, G indicates a gate terminal, E indicates an emitter terminal, and ES indicates a detection emitter terminal.

  The gate drive circuit 311 is a drive circuit for switching the switching element Q1 on and off. The gate driving circuit 311 is connected to the gate terminal G and inputs a gate voltage, thereby accumulating gate charge in the input capacitance between the gate and the emitter and turning on the switching element Q1. Further, the gate driving circuit 311 extracts the gate charge to turn off the switching element.

  The gate voltage detection unit 312 is connected to the gate terminal side of the switching element Q1 by being connected to the gate terminal G and the detection emitter terminal ES, and by detecting the voltage between these terminals, the gate of the switching element Q1 is detected. The voltage (Vg) is detected. The gate voltage detection unit 312 outputs the detected gate voltage to the voltage estimation unit 314.

  The gate charge amount estimation unit 313 measures the amount of charge accumulated in the gate based on the current value of the gate current detection unit 316 connected to the gate terminal G. The gate charge amount estimation unit 313 measures the gate charge amount by calculating the integrated value of the gate current detected by the gate current detection unit 316. The gate charge amount estimation unit 313 outputs the measured charge amount to the voltage estimation unit 314.

  The DC voltage estimation unit 314 estimates the DC voltage (Vce) between the emitter and collector of the switching element based on the gate voltage detected by the gate voltage detection unit 312 and the charge amount measured by the gate charge amount measurement unit. . The voltage estimation unit 314 outputs the estimated voltage (Vce) to the reference voltage setting unit 318.

  The gate resistance setting circuit 315 sets the gate resistance of the switching element Q1 based on the collector-emitter voltage (Vce) estimated by the voltage estimation unit 315.

  The reference voltage setting unit 318 sets a reference voltage for changing the gate resistance of the switching element Q1 based on the DC voltage estimated by the DC voltage estimation unit 314.

  Next, specific configurations of the gate drive circuit 311 and the gate resistance setting circuit 312 will be described with reference to FIG. FIG. 3 is a circuit diagram of the high side gate control circuit 31.

  As shown in FIG. 3, the gate drive circuit 311 has a pulse transmitter 3111, transistors Tr1 and Tr2, and parallel circuits of resistors R11 and R12 and diodes D11 and D12. The pulse transmitter 3111 includes an amplifier circuit and the like, and is connected to the bases of the transistors Tr1 and Tr2. The pulse transmitter 3111 transmits a pulse to the transistors Tr1 and Tr2 so as to switch the switching element Q1 on and off at the control timing indicated by the switching signal input from the controller 5.

  The transistor Tr1 is an npn type transistor. The transistor Tr2 is a pnp type transistor. The transistors Tr1 and Tr2 are connected in series with each other. The base connection point of the transistors Tr1 and Tr2 is connected to the pulse transmitter 321, and the connection point between the emitter of the transistor Tr1 and the collector of the transistor Tr2 is the connection of the parallel circuit of the resistors R11 and R12 and the diodes D11 and D12. Has been.

  The resistor R11 and the diode D11 are connected in series, and the resistor R12 and the diode D12 are connected in series. A series circuit of the resistor R11 and the diode D11 and a series circuit of the resistor R12 and the diode D12 are connected in parallel so that the diode D11 and the diode D12 are in opposite directions. The parallel circuit of the resistors R11 and R12 and the diodes D11 and D12 is connected between the connection point of the transistors Tr1 and Tr2 and the gate terminal of the switching element Q1.

  The gate resistance setting circuit 315 includes resistors R1 and R2, transistors S1 and S2, and comparators 321 and 322. The transistor S1 is a P-type MOSFET, and the transistor S2 is an N-type MOSFET.

A parallel circuit of the resistor R1 and the transistor S1 is connected between the positive electrode of the gate power supply 317 and the collector of the transistor Tr1. The gate voltage (V _GFB ) fed back to the switching element Q1 is input to the inverting input of the comparator 321. The reference voltage (REF_ON) for changing the gate resistance is input to the non-inverting input of the comparator 321 from the reference voltage setting unit 318 when the switching element Q1 is turned on. The comparison result of the comparator 321 is input to the control terminal of the transistor S1.

A parallel circuit of the resistor R2 and the transistor S2 is connected between the negative electrode of the gate power supply 317 and the emitter of the transistor Tr2. The gate voltage (V _GFB ) fed back to the switching element Q1 is input to the inverting input of the comparator 322. The reference voltage (REF_OFF) for changing the gate resistance is input to the non-inverting input of the comparator 322 from the reference voltage setting unit 318 when the switching element Q1 is turned off. . The comparison result of the comparator 322 is input to the control terminal of the transistor S2.

  Next, the circuit operation of FIG. 3 will be described. When the switching element Q1 is turned on, a pulse signal for turning on the transistor Tr1 and turning off the transistor Tr2 is output from the pulse generator 3111 and input to the bases of the transistors Tr1 and Tr2. When the transistor Tr1 is turned on, a gate current is input from the gate power supply 317 to the gate of the switching element Q1 via the resistor R1 or the transistor S1 through the resistor R11 and the diode D11. When the charge is accumulated in the input capacitance between the gate and emitter of the switching element Q1, and the gate voltage exceeds a voltage threshold value that turns on the switching element Q1, the switching element Q1 is turned on.

On the other hand, when the switching element Q1 is turned off, the transistor Tr1 is turned off and the transistor Tr2 is turned on by the pulse signal from the pulse generator 3111, and the resistance R12 and the diode D12 are passed from the gate of the switching element Q1 to One of R2 or transistor S2 is conducted to form a conduction path to the ground. Then, the charge accumulated in the input capacitance between the gate and emitter of the switching element Q1 is extracted, whereby the gate voltage is lowered and the switching element Q1 is turned off.

  Further, when the switching element Q1 is turned on, the gate resistance is set by switching on and off the transistor S1. When the transistor S1 is turned off when the switching element Q1 is turned on, the gate current flows through the resistor R1 and the resistor R11 and is input to the gate of the switching element Q1. Therefore, the gate resistance is a combined impedance Z1 of the resistance R1 and the resistance R11.

On the other hand, when the transistor S1 is turned on when the switching element Q1 is turned on, the resistor R1 is short-circuited by the transistor S1, so that the gate current flows through the transistor S1 and the resistor R11 to the gate of the switching element Q1. Entered. Therefore, the gate resistance becomes the combined resistance Z2 of the resistance when the transistor S1 is turned on and the resistance R11. As the impedance of the resistor R1, the following formula (1) is established by selecting a sufficiently large value for the resistance when the transistor S1 is conductive.

  That is, the combined impedance Z2 can be reduced by the resistance R1. Therefore, when the switching element Q1 is turned on, the gate impedance can be increased by the resistance R1 by turning off the transistor S1.

  Further, when the switching element Q1 is turned off, the gate resistance is set by switching the transistor S2 on and off. When the transistor S2 is turned off when the switching element Q1 is turned off, the current drawn from the gate charge amount flows through the resistor R2 and the resistor R12 and flows to the emitter side terminal VEE. Therefore, the gate resistance is an impedance between the resistor R2 and the resistor R12.

On the other hand, when turning off the switching element Q1, Turning on transistor S2, since during the resistor R2 is shorted by the transistor S2, the current from the gate, flows through the transistor S2 and resistors R1 2, the emitter-side terminal Flow to VEE. Therefore, the gate resistance becomes the impedance of the resistor R12. As in the case of turn-on, the impedance of the resistor R2 by setting a sufficiently large value with respect to the conduction time of the resistance of the transistor S2, when turning off the switching element Q1, by turning off the transistor S 2 from on The gate impedance can be increased by the resistance R2.

  Thereby, the gate resistance setting circuit 315 switches between a high impedance circuit that makes the gate resistance of the switching element Q1 higher than a predetermined impedance and a low impedance circuit that makes the gate resistance lower than the predetermined impedance. The gate resistance setting circuit 315 changes the gate impedance transiently by switching the transistors S1 and S2 on and off when the switching element Q1 is turned on and off. The predetermined impedance is set by the resistance values of the resistors R1, R2, R11, and R12.

  Here, the surge voltage generated in the switching elements Q1 to Q6 will be described. In order to suppress the surge voltage of the switching element Q1, it is necessary to suppress the temporal change (dV / dt) in the voltage between the electrodes of the switching element Q1 in the transient state of the transistor. In order to suppress the voltage change amount (dV / dt) of the switching element Q1, for example, when the switching element Q1 is turned off, the gate resistance is increased by the gate resistance setting circuit 315 to suppress the surge voltage. it can. However, when the gate resistance is increased, the switching loss of the switching element Q1 increases.

  Therefore, in order to suppress the voltage change amount (dV / dt) while reducing the switching loss, it is necessary to set the gate resistance switching timing by the gate resistance setting circuit 315 to an appropriate timing. The switching timing of the gate resistance can be set to an appropriate timing from the change in the interelectrode voltage of the switching element Q1.

  The DC voltage estimation unit 314 of this example detects a change in the voltage between the electrodes of the switching element Q1 by estimating the collector-emitter voltage (Vce) of the switching element Q1 by the method described below.

  During the ON / OFF operation of the switching element Q1, the voltage difference between the collector terminal and the emitter terminal of the switching element Q1 changes. Further, switching of the switching element Q1 on and off is determined by the amount of charge of the input capacitance between the collector and emitter. Therefore, the transient state of the switching element Q1 can be estimated from the correspondence between the potential difference between the collector terminal and the emitter terminal and the charge amount of the gate, and the interelectrode voltage (Vce) of the switching element Q1 can be estimated. it can.

  That is, in this example, since the voltage between the electrodes of the switching element Q1 is changed by using the DC voltage estimated by the DC voltage estimation unit 314, the gate resistance switching timing is set to an appropriate timing. Making it possible.

  With reference to FIG. 4, an example of the characteristics of the switching element Q1 due to the magnitude of the collector-emitter voltage (Vce) with respect to the gate charge amount (Qg) and the gate voltage (Vg) and the gate voltage Vg and the gate charge amount Qg will be described. . FIG. 4 is a graph showing the characteristics of the gate voltage with respect to the gate charge amount. For example, the solid line shows the characteristic when Vce is a low voltage of 100V, and the dotted line shows the characteristic when Vce is a high voltage of 300V. The voltage (Vth) is a gate voltage threshold value of the switching element Q1.

In a region where the gate voltage (Vg) is higher than the gate voltage threshold value (Vth), even if the same gate voltage is applied, the gate charge amount (Qg) varies depending on the collector-emitter voltage. This is because the feedback capacitance (Cres) of the switching element Q1, which is a voltage effect transistor, is charged and discharged during the turn-on or turn-off switch operation. The feedback capacitance is due to the internal structure of the switching element. The relationship of equation (2) is established among the gate charge amount (Qg), the collector-emitter voltage (Vce), and the feedback capacitance (Cres).

  In this example, by using a high-voltage power device for the switching element Q1 of the inverter 2, the collector-emitter voltage (Vce) at the time of switching increases, or the switching element Q1 of this example has a feedback capacitance ( By using a device having a large (Cres) for the switching element Q1, the amount of change in the gate charge amount (Qg) becomes large.

  Therefore, the DC voltage estimation unit 314 estimates the collector-emitter voltage (Vce) from the relationship shown in FIG. The relationship in FIG. 4 is a characteristic determined in advance from the characteristics of the devices of the switching elements Q1 to Q6. The voltage estimation unit 314 records in advance the correlation between the collector-emitter voltage (Vce) with respect to the gate voltage (Vg) and the gate charge amount (Qg) using, for example, a map. Then, the DC voltage estimation unit 314 estimates the DC voltage corresponding to the gate voltage of the gate voltage detection unit 312 and the charge amount characteristic of the gate charge amount measurement unit 313 with reference to the map, and the reference voltage setting unit Output to 318.

  The reference voltage setting unit 318 sets the reference voltage to a voltage (REF_OFF) or a voltage (REF_ON) based on the DC voltage estimated by the DC voltage estimation unit 314. Thereby, the timing of the transient gate impedance change at the turn-on or turn-off can be optimized according to the magnitude of the DC voltage.

  The gate voltage detection unit 312 and the gate charge amount measurement unit 313 perform detection of the gate voltage and measurement of the gate charge amount at a predetermined cycle, and output the DC voltage estimation unit 314 to estimate the collector-emitter voltage (Vce). Has been. The predetermined cycle is shorter than the switching cycle by the controller 5.

  In this example, the collector-emitter voltage estimated at a predetermined cycle is set by the reference voltage setting unit 318 based on the output of the voltage estimation unit 314 as described below. With respect to (Vce), it is possible to transiently control the optimum voltage change amount (dV / dt) for driving the switching element Q1.

  In order to avoid a short circuit between the power supply line P and the power supply line N, for example, in the U-phase switching control, the controller 5 alternately turns on and off the switching element Q1 and the switching element Q2.

  Therefore, when the high-side switching element Q1 is turned off, the low-side switching element Q2 is in an off state. At this time, the voltage (VHce) between the positive electrode side (high potential side) terminal of the switching element Q1 and the negative electrode side (low potential side) terminal is an electrode between the positive electrode and the negative electrode of the switching element Q1. It is equal to the voltage (Vce).

  Since the voltage between the electrodes (Vce) is estimated by the voltage estimation unit 314 as described above, the transient state of the switching element Q1 can be estimated, and when the switching element Q1 is turned off, The gate resistance may be changed transiently.

Hereinafter, control of the gate resistance in the gate resistance setting circuit 315 when turning off will be described. At the start of the turn off of the switching element Q1, for the collector emitter voltage is low, the gate resistance setting circuit 315 makes the gate resistance at a low level. Specifically, at the start of turn-off, the gate charge amount is small, and the collector-emitter voltage (Vce) estimated by the voltage estimation unit 314 is low. Therefore, the reference voltage setting unit 318 sets the reference voltage to be input to the non-inverting terminal of the comparator 322 so that the transistor S2 remains on even when the feedback gate voltage (V _GFB ) is input to the comparator 322. By setting, the gate resistance setting circuit 315 is controlled.

  Next, the turn-off operation of the switching element Q1 is continued, and the actual voltage (Vce) of the switching element Q1 increases. The voltage estimation unit 314 estimates an increase in voltage (Vce) by estimating the collector-emitter voltage from the charge amount of the gate charge amount measurement unit 313 and the gate voltage of the gate voltage detection unit 312.

  The voltage estimation unit 314 has a function of determining whether or not the collector-emitter voltage (Vce) greatly exceeds the DC voltage (Vdc) of the battery 1 due to the surge voltage according to the magnitude of the DC voltage Vdc. . For example, the collector-emitter voltage estimated from the gate charge amount and the gate voltage characteristics (Vg, Qg characteristics) may be compared with the voltage threshold value for determining the surge voltage rise or estimated. The determination may be made by comparing the amount of change in the collector-emitter voltage with a predetermined determination threshold.

When it is determined that the surge voltage is large and the collector-emitter voltage (Vce) greatly exceeds the DC voltage (Vdc), the reference voltage setting unit 318 _{supplies the} feedback gate voltage (V _GFB ) to the comparator 322. The reference voltage (REF_OFF) of the non-inverting terminal of the comparator 322 is set so that the transistor S2 is switched off with respect to the input.

After the setting of the reference voltage (REF_OFF) for turning off the transistor S2, the gate voltage decreases with the lapse of turn-off time, and when the feedback voltage (V _GFB ) reaches the reference voltage (REF_OFF), the switching element Q1 Turns off and increases gate resistance. Thereby, the peak value of the collector-emitter voltage of the switching element Q1 is suppressed, and the surge voltage can be suppressed.

  The timing for switching the gate voltage is determined by the reference voltage of the comparator 322 set by the reference voltage setting unit 318. The lower the reference voltage (REF_OFF) by the reference voltage setting unit 318, the later the timing for switching to a higher gate resistance. The gate resistance switching timing may be set, for example, from the rate of change of the collector-emitter voltage after the start of turn-off.

  Next, the control of the high side gate control circuit 31 when the switching element Q1 is turned off will be described with reference to FIG. FIG. 5 shows the characteristics of the collector current (Ic), collector-emitter voltage (Vce), gate voltage (Vg), gate current (Ig), and gate charge amount (Qg), and (a) shows the characteristics of the comparative example. (B) shows the characteristics of the present invention. The horizontal axis indicates time.

At time _{t 1,} the controller 5, the control command to turn off the switching element Q1 is inputted, the gate drive circuit 311 turns off the transistors Tr1, to turn on the transistor Tr2. And the fall of gate voltage (Vg) begins.

When where a gate voltage (Vg) is less than or equal to the gate voltage threshold value (Vth) at time _{t 2, the} turn-off of the switching element Q1 is started.

Time t ₂ later, in the comparative example, the gate resistance maintains a low impedance, the collector-emitter voltage (Vce) is increased greatly. And since the rate of change (dV / dt) of voltage (Vce) is large, surge voltage (Vs) becomes large. Then, at time _{t a,} the collector-emitter voltage (Vce) becomes the peak voltage (Vdc + Vs _1). When the gate resistance is not changed in the transient state of the switching element Q1 as in the comparative example, the voltage (Vce) depends on the circuit characteristics of the inverter 2 such as the device characteristics of the switching element and the regulation inductance of the inverter circuit. Rises.

On the other hand, in this embodiment, from the point of time t _2, the gate charge amount measuring unit 313 starts the integration of the current value of the gate current detection unit 316 measures the amount of charge (Qg). The voltage estimation unit 314 estimates the collector-emitter voltage (Vce) from the measured charge amount and the gate voltage of the gate voltage detection unit 312.

At time t ₃ , the high-side gate control circuit 31 detects that the estimated collector-emitter voltage (Vce) has reached the threshold voltage for switching the gate resistance, and the gate resistance setting circuit 315. Thus, the gate resistance is switched from the low impedance to the high impedance side.

Time _{t 3} subsequent increase in the voltage (Vce) is suppressed than Comparative Example. At the time (t _b ), the DC voltage (Vce) becomes the peak voltage (Vdc + Vs ₂ ). Since the surge voltage (Vs ₂ ) of the present invention is lower than the surge voltage (Vs ₁ ) of the comparative example, the peak voltage of the collector-emitter voltage (Vce) is also lower than that of the comparative example.

  Similarly, when the high-side gate control circuit 31 turns on the switching element Q1, the voltage between the collector and the emitter is obtained from the detected value of the gate voltage and the measured value of the gate charge using the characteristic of Vg−Qg. And the gate resistance is switched according to the estimated voltage (Vce) in the transient state of the switching element Q1.

  Note that the time for setting the gate resistance to the high resistance side depends on the variation of the gate voltage threshold (Vth), the detection error of the gate current detector, the fall time or rise time of the voltage current such as the gate current or the gate voltage, etc. May be set.

  The detailed control at the time of turn-on is the same as described above, and thus the description thereof is omitted. However, in the control at the time of turning on the switching element Q1, switching of the pair arm connected in series with the switching elements Q1 to Q6 being controlled is performed. The voltage rise including the recovery voltages of the elements Q1 to Q6 and the diodes D1 to D6 can also be controlled.

  As described above, in this example, when the switching elements Q1 to Q6 are turned on or turned off, the gate voltage detected by the gate voltage detection unit 312 and the charge amount measured by the gate charge measurement unit 313 are set. Based on this, the gate impedances of the switching elements Q1 to Q6 are set. As a result, in this example, the gate impedance corresponding to the state of the switching element is set while measuring the gate charge amount of the switching element, so that it is possible to perform the optimum drive control that suppresses the surge. As a result, electromagnetic wave interference (EMI noise) can be reduced.

  Further, in this example, the inter-electrode voltage (Vce) between the positive electrode and the negative electrode of the switching elements Q1 to Q6 is estimated based on the gate voltage of the gate voltage detection unit 312 and the gate charge amount of the gate charge amount measurement unit 313. . As a result, the gate operation state during the switching operation and the gate charge amount during the switch operation can be measured, the transient state of the gate can be measured, and the transient state of the switching elements Q1 to Q6 can be detected. The surge voltage can be suppressed by setting the gate resistance during the transient state.

  Further, in this example, the interelectrode voltage (Vce) can be estimated from the correlation of the interelectrode voltage (Vce) with respect to the gate voltage and the gate charge amount of the switching elements Q1 to Q6.

  In addition, in this example, when the switching elements Q1 to Q6 are turned off, when the switching elements Q1 to Q6 exceed a voltage threshold value indicating an increase in surge voltage, the low impedance circuit included in the gate resistance setting circuit 315 has a high impedance. Switch to circuit. Thereby, the transient state of switching elements Q1-Q6 can be detected, and a surge voltage can be suppressed.

  In this example, the gate charge amount is measured from the detection value of the gate current detection unit 316 connected to the gate terminals of the switching elements Q1 to Q6. Thereby, this example can measure a charge amount using the detection value on the gate input side of the switching elements Q1 to Q6 to which a high voltage is not applied, and can suppress a surge voltage.

  Further, in this example, the measurement of the gate charge amount is started from the time when the switching element starts turning off or the time when turning on starts. Thereby, the transient state of switching elements Q1-Q6 during turn-off or turn-on control can be detected.

  This example also includes a high-side gate control circuit 31 and a low-side gate control circuit 32, and switching of the switching elements Q1, Q3, Q5 of the upper arm elements 21, 23, 25 of the inverter 2 and the lower arm circuits 22, 24, 26. Elements Q2, Q4, and Q6 are driven. That is, although the transient states of the switching elements Q1 to Q6 differ depending on variations or detection errors of the switching elements Q1 to Q6, in this example, the high side gate control circuit 31 and the low side gate corresponding to the switching elements Q1 to Q6 The control circuit 32 detects a transient state and sets the gate resistance. Thereby, a surge voltage can be suppressed according to the transient state of each switching element Q1-Q6. Moreover, since EMI noise generated in the inverter 2 can be suppressed, the system can be simplified and the power converter can be downsized.

  In addition, when a surge voltage is generated during the switching operation of the inverter 2, EMI noise is generated in the vehicle drive system including the inverter 2. And this EMI noise affects the radio wave of FM radio and television broadcasting provided in the vehicle, and may also affect communication devices inside and outside the vehicle.

  Since the drive system of this example can suppress a surge voltage as described above, when the drive system is applied to a vehicle, generation of EMI noise can be prevented. Moreover, this example can also improve the conversion efficiency of an inverter, can improve control responsiveness, and can implement | achieve size reduction of a system.

  Moreover, the drive system of this example can provide a function of adjusting the output voltage waveform from the inverter 2 by controlling the gate voltages of the switching elements Q1 to Q6. When the drive system of this example is mounted on a vehicle, the surge voltage is suppressed when the torque required by the vehicle is generated for the rotor of the rotating body such as the motor 3 that is an inductive load. Or EMI noise can be reduced.

  As a modification of this example, the gate charge amount measurement unit 313 may measure the gate charge amount based on the detection voltage of the voltage detection unit 319 instead of the gate current detection unit 316. FIG. 6 shows a circuit diagram of the high-side gate control circuit 31 of the semiconductor device according to the modification of the present invention.

  As shown in FIG. 6, the high-side gate control circuit 31 according to the modification includes a voltage detection unit 319 and a resistor R3. The resistor R3 is connected between the parallel circuit of the resistors R11 and R12 and the diodes D11 and D12 and the gate terminal of the switching element Q1. The voltage detector 319 detects the voltage across the resistor R3 and outputs the voltage to the gate charge amount measuring unit 313.

The gate charge amount measurement unit 313 measures the gate current (Ig) from the detection voltage ( _{V_R3} ) of the voltage detection unit 319 and the resistance value (R ₃ ) of the resistor R3 using Equation (3).

  Then, the gate charge amount measurement unit 313 measures the gate charge amount by integrating the current values calculated by the equation (3).

In this example, IGBTs are used for the switching elements Q1 to Q6, and the gate voltage feedback V _GFB is used to estimate the collector-emitter voltage. However, the gate is used to estimate the MOSFET drain-source voltage. It is clear that the same effect can be obtained by using the voltage feedback V _GFB . FIG. 7 is a block diagram of the control circuit 31, the upper arm element 21, and the controller 5 in the semiconductor device according to the modification of the present invention. In FIG. 7, G indicates a gate terminal, SS indicates a detection source terminal, D indicates a drain terminal, and S indicates a source terminal.

As shown in FIG. 7, the gate drive circuit 311 is connected to the gate terminal G and the detection source terminal E S of the switching element Q1. The gate voltage detection unit 312 is connected to the gate terminal G and the detection source terminal ES . The gate charge amount estimation unit 313 measures the amount of charge accumulated in the gate based on the current value of the gate current detection unit 316 connected to the gate terminal G.

  The characteristics of the gate voltage (Vg) and the gate charge amount (Qg) shown in FIG. Therefore, the voltage estimation unit 314 can estimate the inter-electrode voltage (drain-source voltage) of the switching element Q1, which is a MOSFET, based on the gate voltage and the gate charge amount. As a result, even if a MOSFET is used as the switching element Q1, this example suppresses the surge voltage by detecting the transient state of the switching element Q1 and setting the gate resistance in the same manner as in the control of the present example related to the IGBT. can do.

  FIG. 8 is a block diagram of a power conversion device including a semiconductor device according to a modification of the present invention. Further, as shown in FIG. 1, the semiconductor device of this example is applied to an inverter circuit having outputs of a plurality of phases such as three phases, but a single-phase inverter like the semiconductor device of the modification shown in FIG. You may apply to a circuit. .

  As a preferred example of this example, a transistor whose gate structure is a trench structure may be used for the switching elements Q1 to Q6 of the semiconductor device of this example.

  Here, the relationship between the gate structure and the characteristics of Vg-Qg will be described. Examples of devices used as power transistors for the inverter (switching elements Q1 to Q6) include transistors having oxide film gates such as MOSFETs and IGBTs. As shown in Expression (1), the gate voltage and the charge amount characteristic (Vg-Qg characteristic) are dependent on the feedback capacitance (Cres). When a vertical device is used as the power transistor, the feedback capacitance (Cres) varies depending on the gate structure.

  FIG. 9 shows the characteristics of the gate charge amount (Qg) and the gate voltage (Vg) depending on the gate structure. FIG. 9 illustrates the relationship between the collector-emitter voltage (Vce) with respect to the gate charge amount (Qg) and the gate voltage (Vg) in the switching element Q1. The solid line shows the characteristics of the planar structure, and the dotted line shows the characteristics of the trench structure.

The feedback capacity (Cres) of the trench structure generally tends to be larger than the feedback capacity of the planar structure. Therefore, when the gate voltage is the same voltage and the inter-electrode voltage (Vce) changes from 100 V to 300 V, for example, the amount of change in gate charge (ΔQg ₁ ) in the trench structure is the change in gate charge in the planar structure. It becomes larger than the amount (ΔQg ₂ ).

  Therefore, in this example, by using a transistor having a trench structure in the gate structure for the switching elements Q1 to Q6, the amount of change in the interelectrode voltage (Vce) is increased with respect to the gate voltage and the gate charge amount. Therefore, the estimation accuracy of the interelectrode voltage (Vce) can be increased.

  The gate voltage detector 312 corresponds to the “gate voltage detector” of the present invention, the gate charge measuring unit 313 is the “gate charge measuring unit”, and the gate resistance setting circuit 315 is the “gate impedance setting” of the present invention. Means ”, the voltage estimation unit 314 is“ voltage estimation means ”, the high-side gate control circuit 31 is“ first gate control circuit ”, the low-side gate control circuit 32 is“ second gate control circuit ”, and the controller 5 is Corresponds to “control means”.

<< Second Embodiment >>
A power conversion device including a semiconductor device according to another embodiment of the present invention will be described. In this example, a part of control of the controller 5 is different from the first embodiment described above in this example. Since the configuration other than this is the same as that of the first embodiment described above, the description thereof is incorporated as appropriate.

  When the inverter 2 is controlled based on the torque command on the step when the controller 5 performs PWM control at a constant cycle, the circuit between the motor 3, the smoothing capacitor 27, the battery 1, etc. Voltage (inverter input voltage) may decrease, causing pulsation in the current.

  Therefore, in this example, the estimation control of the voltage between the electrodes of the switching elements Q1 to Q6 based on the gate voltage and the gate charge is used, and the decrease of the inverter input voltage and the pulsation of the current are suppressed. Hereinafter, specific control of this example will be described.

  The high-side gate control circuit 31 uses the gate voltage detection unit 312, the gate charge measurement unit 313, and the voltage estimation unit 314, and the electrodes of the switching elements Q <b> 1 to Q <b> 6 with a cycle shorter than the control cycle of PWM control by the controller 5. The voltage between the two is estimated.

  For example, when the switching element Q1 is turned on for the U phase, the switching element Q2 is in the off state. Therefore, there is a correlation between the change in the interelectrode voltage of the switching element Q1 and the change in the input voltage of the inverter 2.

  The controller 5 calculates a current command value for performing a switching operation based on the torque command value or the like, generates a switching signal based on the current command value, and transmits the switching signal to the drive circuit 30. The high side gate control circuit 31 turns on or off the switching elements Q1 to Q6 based on the switching signal. At that time, the high-side gate control circuit 31 estimates the inter-electrode voltage of the switching element Q1 based on the gate voltage and the gate charge amount. Then, when the estimated change amount of the interelectrode voltage is higher than a predetermined determination threshold, the high side gate control circuit 31 transmits a signal indicating that the interelectrode voltage has changed to the controller 5. That is, the drive circuit 30 transmits and receives signals to and from the controller 5 that is a host controller.

  When the controller 5 receives a signal from the high-side gate control circuit 31 that the interelectrode voltage has changed, the controller 5 resets the current command value so as to suppress the change in the input voltage of the inverter 2 according to the amount of change in the voltage. Calculate. In the next PWM control cycle, the controller 5 generates a switching signal based on the changed current command value and outputs the switching signal to the drive circuit 30. Thereby, based on the voltage between electrodes estimated by the voltage estimation part 314, the fall of the input voltage of the inverter 2 can be suppressed.

Next, control of the drive circuit 30 and the controller 5 will be described with reference to FIG. FIG. 10 shows the characteristics of the current command value (Iq ^* ), the inverter input voltage (Vdc), and the inverter current (Iq). The horizontal axis indicates time. A dotted line graph a represents the current command value before the change, and a solid line graph b represents the current command value after the change. Also, dotted line graphs c and e show the inverter input voltage and inverter current of the comparative example, respectively, and solid line graphs d and f show the inverter input voltage and inverter current of the present invention, respectively. In the comparative example, the interelectrode voltage of the switching elements Q1 to Q6 is not estimated, and the current command value based on the estimated voltage is not controlled.

At time t _1, the controller 5 controls the inverter 2 in step-like current command value, the drive circuit 30, based on the gate control command of the controller 5 performs switching operation of the switching elements Q1 to Q6.

At the time of time t _2, the voltage estimating unit 314, based on the gate voltage and the gate charge, and estimates the inter-electrode voltage of the switching elements Q1 to Q6. When the estimated change amount of the interelectrode voltage or the voltage difference of the interelectrode voltage with respect to the voltage of the battery 1 is larger than a threshold value for determining a decrease in the inverter input voltage, the drive circuit 30 A signal indicating a decrease in the inverter input voltage is transmitted to the controller 5. The time between time t ₁ and time t ₂ is shorter than the control cycle of the controller 5.

At time t ₃ , the controller 5 changes the current command value set at time t ₁ to a different current command value based on the signal from the drive circuit 30. Along with the change of the current command value, a time t ₃ after a reduction in the inverter input voltage is suppressed, also increase the inverter current is also suppressed. The time between time t ₁ and time t ₃ corresponds to the control cycle of the controller 5.

On the other hand, in the comparative example, since at time t ₂ is not performed above control is not changed current command value and the input voltage of the inverter decreases further, also the inverter current pulsates.

  As described above, in this example, the current command value is changed to a different current command value based on the voltage between the electrodes of the switching elements Q1 to Q6 estimated by the voltage estimation unit 314. Thereby, since the transient change of the DC voltage of the inverter 2 can be followed, the fluctuation | variation of an inverter input voltage can be suppressed.

DESCRIPTION OF SYMBOLS 1 ... Battery 2 ... Inverter 20 ... Inverter circuit 21, 23, 25 ... Upper arm element 22, 24, 26 ... Lower arm circuit 27 ... Smoothing capacitor 30 ... Drive circuit 31 ... High side gate control circuit 32 ... Low side gate control circuit 311 DESCRIPTION OF SYMBOLS ... Gate drive circuit 312 ... Gate voltage detection part 313 ... Gate charge amount measurement part 314 ... Voltage estimation part 315 ... Gate resistance setting circuit 316 ... Gate current detection part 317 ... Gate power supply 318 Reference voltage setting part 319 ... Voltage detection part 4 ... Switch 5 ... Controller 6 ... Current sensor 7 ... Resolver

Claims (9)

A gate voltage detecting means for controlling the gate voltage of the switching element to detect the gate voltage of the switching element in a semiconductor device for driving the switching element;
Charge amount measuring means for measuring the amount of charge accumulated in the gate;
Voltage estimation means for estimating an interelectrode voltage between the positive electrode and the negative electrode of the switching element from the gate voltage detected by the gate voltage detection means and the charge amount measured by the charge amount measurement means;
A semiconductor device comprising gate impedance setting means for setting a gate impedance of the switching element based on the inter-electrode voltage estimated by the voltage estimation means when the switching element is turned off or turned on. The semiconductor device according to claim 1 ,
The semiconductor device according to claim 1, wherein the voltage estimation means estimates the interelectrode voltage from a correlation between the gate voltage and the interelectrode voltage with respect to the charge amount. The semiconductor device according to claim 1 or 2 ,
The gate impedance setting means has a high impedance circuit that makes the gate impedance higher than a predetermined impedance, and a low impedance circuit that makes the gate impedance lower than the predetermined impedance,
When the voltage between the positive electrode and the negative electrode of the switching element exceeds a predetermined voltage when the switching element is turned off or turned on, the low impedance circuit is switched to the high impedance circuit. Semiconductor device. A semiconductor device according to any one of claims 1 to 3 ,
The semiconductor device according to claim 1, wherein a gate structure of the switching element has a trench structure. A semiconductor device according to any one of claims 1 to 4 , wherein
The semiconductor device characterized in that the charge amount measuring means measures the charge amount from a detection value of a sensor connected to a gate terminal of the switching element. A semiconductor device according to any one of claims 1 to 5 ,
The semiconductor device according to claim 1, wherein the charge amount measuring means starts measuring the charge amount at a time when the switching element starts to turn off or starts to turn on. A power conversion device comprising the semiconductor device according to any one of claims 1 to 6 ,
An inverter in which a plurality of the switching elements are connected in series;
A first gate control circuit for controlling a gate of the switching element included in the upper arm circuit of the inverter;
A second gate control circuit for controlling the gate of the switching element included in the lower arm circuit of the inverter,
The first gate control circuit and the second gate control circuit are:
A power conversion apparatus comprising: the gate voltage detection means, the charge amount measurement means, and the gate impedance setting means. A power conversion device comprising the semiconductor device according to any one of claims 1 to 6 ,
An inverter that connects the plurality of switching elements, converts the input power, and outputs the inverter;
Based on a motor torque command value input from the outside, a current command value for controlling the inverter is calculated, and a switching signal for switching on and off of the inverter is generated from the current command value to control the inverter. Control means for
The control means changes the current command value calculated by the control means to a different current command value based on the interelectrode voltage estimated by the voltage estimation means . An inverter having the semiconductor device according to any one of claims 1 to 6 ,
A vehicle drive system comprising: an inductive load connected to the inverter.

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