JP5952922B2 - オプトエレクトロニクス半導体チップ - Google Patents
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- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/08—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
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- H01L33/16—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
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- H01L33/18—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous within the light emitting region
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
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- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
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Description
本特許出願は、独国特許出願第102012101718.2号の優先権を主張し、この文書の開示内容は参照によって本明細書に組み込まれている。
Claims (14)
- オプトエレクトロニクス半導体チップであって、
− 互いに距離を隔てて配置されている、少なくとも1つの活性領域(1)と、
− 前記活性領域(1)の下面(1a)に配置されているキャリア(2)と、
を備えており、
− 前記活性領域(1)の1つが主延在方向(R)を有し、
− 前記活性領域(1)が、第1の半導体材料によって形成されているコア領域(10)を有し、
− 前記活性領域(1)が活性層(11)を有し、前記活性層(11)が、少なくとも、前記活性領域(1)の前記主延在方向(R)を横切る方向(x,y)に、前記コア領域(10)を覆っており、
− 前記活性領域(1)がカバー層(12)を有し、前記カバー層(12)が、第2の半導体材料によって形成されており、少なくとも、前記活性領域(1)の前記主延在方向(R)を横切る方向(x,y)に、前記活性層(11)を覆っており、
前記活性領域(1)が、前記キャリア(2)とは反対側の自身の上面(1b)に、材料除去の結果としての粗面化部またはファセット部を有し、
前記活性領域(1)が電流拡散層(13)を有し、前記電流拡散層(13)が、少なくとも、前記主延在方向(R)を横切る方向(x,y)に、前記カバー層(12)を覆っており、
前記電流拡散層(13)が、動作時に前記活性層(11)において生成される電磁放射に対して透過性であり、透明導電性酸化物によって形成されている、
オプトエレクトロニクス半導体チップ。 - 多数の活性領域(1)を備えており、
− 前記キャリア(2)とは反対側の各活性領域(1)の上面(1b)において、前記活性領域(1)の前記コア領域(10)に前記活性層(11)が存在せず、前記コア領域(10)が導電性コンタクト層(6)に直接接触しており、
− 前記コンタクト層(6)が、前記活性領域(1)の少なくとも大部分、またはすべての前記活性領域(1)の前記コア領域(10)に直接接触しており、前記コンタクト層(6)が、部分的に、前記多数の活性領域(1)の側の前記キャリア(2)の外面(2a)に平行に、または実質的に平行に延びる平面内に、延在している、
請求項1に記載のオプトエレクトロニクス半導体チップ。 - 少なくとも前記第1の半導体材料が、前記キャリア(2)の上にエピタキシャルに堆積されている、
請求項1または請求項2のいずれかに記載のオプトエレクトロニクス半導体チップ。 - 前記第1の半導体材料の成長方向(z)が、前記主延在方向(R)に平行または実質的に平行である、
請求項3に記載のオプトエレクトロニクス半導体チップ。 - 前記活性領域(1)が、前記主延在方向(R)において求められる長さ(L)を有し、前記活性領域(1)が、前記主延在方向(R)に垂直な平面内において求められる直径(D)を有し、直径(D)に対する長さ(L)の比が、少なくとも1である、
請求項1から請求項4のいずれかに記載のオプトエレクトロニクス半導体チップ。 - 前記電流拡散層(13)が、透明導電性酸化物によって形成されている、
請求項1から請求項5のいずれかに記載のオプトエレクトロニクス半導体チップ。 - 前記電流拡散層(13)が、前記活性領域(1)の長さ(L)の少なくとも大部分にわたり延在している、
請求項6に記載のオプトエレクトロニクス半導体チップ。 - 前記多数の活性領域(1)の間に絶縁材料(4)が配置されており、前記絶縁材料(4)が、少なくとも、前記主延在方向(R)を横切る方向(x,y)に、前記活性領域(1)を囲んでいる、
請求項1から請求項7のいずれかに記載のオプトエレクトロニクス半導体チップ。 - 前記絶縁材料(4)が、少なくとも部分的に、前記活性領域の外面に、直接隣接している、
請求項8に記載のオプトエレクトロニクス半導体チップ。 - 前記多数の活性領域(1)の側の前記キャリア(2)の面にマスク層(5)が配置されており、前記マスク層(5)が前記活性領域(1)それぞれに対して前記キャリア(2)に通じる開口部(5a)を有し、前記第1の半導体材料が前記開口部を満たしている、
請求項1から請求項9のいずれかに記載のオプトエレクトロニクス半導体チップ。 - 前記マスク層(5)が、部分的に、絶縁材料(4)に隣接している、
請求項10に記載のオプトエレクトロニクス半導体チップ。 - 前記キャリア(2)とは反対側の前記活性領域(1)の上面(1b)において、前記コア領域(10)に前記活性層(11)が存在せず、前記コア領域(10)が導電性コンタクト層(6)に直接接触している、
請求項1から請求項11のいずれかに記載のオプトエレクトロニクス半導体チップ。 - 前記コンタクト層(6)が、前記活性領域(1)の少なくとも大部分の前記コア領域(10)に直接接触しており、前記コンタクト層(6)が、部分的に、前記多数の活性領域(1)の側の前記キャリア(2)の外面(2a)に平行に、または実質的に平行に延びる平面内に、延在している、
請求項12に記載のオプトエレクトロニクス半導体チップ。 - オプトエレクトロニクス半導体チップであって、
− 互いに距離を隔てて配置されている、多数の活性領域(1)と、
− 前記多数の活性領域(1)の間に配置されており、少なくとも、前記主延在方向(R)を横切る方向(x,y)に、前記活性領域(1)を囲んでおり、少なくとも1種類のルミネセンス変換物質もしくは少なくとも1種類のESD保護材料またはその両方を含んでいる、機能材料と、
− 前記活性領域(1)の下面(1a)に配置されているキャリア(2)と、
を備えており、
− 前記活性領域(1)の1つが主延在方向(R)を有し、
− 前記活性領域(1)が、第1の半導体材料によって形成されているコア領域(10)を有し、
− 前記活性領域(1)が活性層(11)を有し、前記活性層(11)が、少なくとも、前記活性領域(1)の前記主延在方向(R)を横切る方向(x,y)に、前記コア領域(10)を覆っており、
− 前記活性領域(1)がカバー層(12)を有し、前記カバー層(12)が、第2の半導体材料によって形成されており、少なくとも、前記活性領域(1)の前記主延在方向(R)を横切る方向(x,y)に、前記活性層(11)を覆っており、
− 前記キャリア(2)とは反対側の各活性領域(1)の上面(1b)において、前記活性領域(1)の前記コア領域(10)に前記活性層(11)が存在せず、前記コア領域(10)が導電性コンタクト層(6)に直接接触しており、
− 前記コンタクト層(6)が、前記活性領域(1)の少なくとも大部分、またはすべての前記活性領域(1)の前記コア領域(10)に直接接触しており、前記コンタクト層(6)が、部分的に、前記多数の活性領域(1)の側の前記キャリア(2)の外面(2a)に平行に、または実質的に平行に延びる平面内に、延在している、
オプトエレクトロニクス半導体チップ。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102012101718.2 | 2012-03-01 | ||
DE102012101718A DE102012101718A1 (de) | 2012-03-01 | 2012-03-01 | Optoelektronischer Halbleiterchip |
PCT/EP2013/053371 WO2013127672A1 (de) | 2012-03-01 | 2013-02-20 | Optoelektronischer halbleiterchip |
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JP2015508941A JP2015508941A (ja) | 2015-03-23 |
JP5952922B2 true JP5952922B2 (ja) | 2016-07-13 |
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US (1) | US9214600B2 (ja) |
EP (1) | EP2820684A1 (ja) |
JP (1) | JP5952922B2 (ja) |
KR (1) | KR20150044422A (ja) |
CN (1) | CN104145346B (ja) |
DE (1) | DE102012101718A1 (ja) |
WO (1) | WO2013127672A1 (ja) |
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DE102012109594A1 (de) | 2012-10-09 | 2014-04-10 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines optoelektronischen Halbleiterbauteils und optoelektronisches Halbleiterbauteil |
DE102013114466A1 (de) * | 2013-12-19 | 2015-06-25 | Osram Gmbh | Optoelektronisches Halbleiterbauteil und Verfahren zur Herstellung eines optoelektronischen Halbleiterbauteils |
DE102014117995A1 (de) | 2014-12-05 | 2016-06-09 | Osram Opto Semiconductors Gmbh | Halbleiterschichtenfolge zur Erzeugung von sichtbarem Licht und Leuchtdiode |
DE102015120778B4 (de) * | 2015-11-30 | 2021-09-23 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Optoelektronisches Bauelement und Verfahren zur Herstellung eines optoelektronischen Bauelements |
DE102015121554B4 (de) * | 2015-12-10 | 2022-01-13 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zur Herstellung von optoelektronischen Halbleiterchips und optoelektronischer Halbleiterchip |
DE102016102876A1 (de) * | 2016-02-18 | 2017-08-24 | Osram Opto Semiconductors Gmbh | Optoelektronisches Halbleiterbauelement und Verfahren zur Herstellung eines optoelektronischen Halbleiterbauelements |
US11416041B2 (en) | 2016-05-23 | 2022-08-16 | Microsoft Technology Licensing, Llc. | Device having display integrated infrared and visible light source |
DE102016114992A1 (de) * | 2016-08-12 | 2018-02-15 | Osram Opto Semiconductors Gmbh | Optoelektronischer Halbleiterchip |
WO2018062252A1 (ja) | 2016-09-29 | 2018-04-05 | 日亜化学工業株式会社 | 発光素子 |
DE102017105943A1 (de) | 2017-03-20 | 2018-09-20 | Osram Opto Semiconductors Gmbh | Optoelektronischer Halbleiterchip und Verfahren zu dessen Herstellung |
DE102017113741A1 (de) * | 2017-06-21 | 2018-12-27 | Osram Opto Semiconductors Gmbh | Optoelektronisches Halbleiterbauelement |
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WO2013127672A1 (de) | 2013-09-06 |
CN104145346A (zh) | 2014-11-12 |
KR20150044422A (ko) | 2015-04-24 |
JP2015508941A (ja) | 2015-03-23 |
US20150021636A1 (en) | 2015-01-22 |
US9214600B2 (en) | 2015-12-15 |
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