JP5812712B2 - Semiconductor device and manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a mounting structure of a semiconductor device, particularly a semiconductor device that operates at a high temperature.

  With the progress of industrial equipment, electric railways, and automobiles, the operating temperature of semiconductor elements used for them has also increased. In recent years, semiconductor devices that operate even at high temperatures have been energetically developed, and miniaturization, high breakdown voltage, and high current density of semiconductor devices have been advanced. In particular, wide bandgap semiconductors such as SiC and GaN have a larger bandgap than Si semiconductors, and semiconductor devices are expected to have higher breakdown voltage, smaller size, higher current density, and higher temperature operation. In order to implement a semiconductor element having such characteristics as an apparatus, even when the semiconductor element operates at a high temperature of 150 ° C. or higher, a stable operation of the semiconductor device is ensured by suppressing the crack of the bonding material and the deterioration of the wiring. There is a need.

  On the other hand, as a method of sealing a semiconductor element with a resin in a semiconductor device, Patent Document 1 proposes a method in which a dam material is used to surround the periphery of the semiconductor element and the inside thereof is partially resin-sealed. . Patent Document 2 proposes a method of providing a dam around the semiconductor element in order to prevent the resin covering the semiconductor element from flowing and spreading.

JP 2003-124401 A JP 58-17646 A

  However, in the methods disclosed in Patent Document 1 and Patent Document 2, the semiconductor element becomes a wide band gap semiconductor element such as SiC, and operates at a higher temperature than before, or in response to this, the heat cycle test is performed. When the temperature rises, problems such as voids in the dam structure and peeling of the dam from the sealing resin and insulating substrate will reduce the insulation resistance of the semiconductor device, which will damage the reliability of the semiconductor device such as destruction and malfunction. was there.

  The present invention has been made to solve the above problems, and even when the semiconductor element repeatedly operates at a high temperature and undergoes a heat cycle, the sealing resin is cracked or peeled off from the substrate. An object is to obtain a highly reliable semiconductor device that is difficult to cause.

The semiconductor device according to the present invention includes a semiconductor element substrate having a surface electrode pattern formed on one surface of an insulating substrate and a back electrode pattern formed on the other surface of the insulating substrate, and the surface electrode pattern opposite to the insulating substrate. At least a surface electrode pattern or a back electrode pattern is formed on the surface of the semiconductor element, the first sealing resin that covers the semiconductor element and the surface electrode pattern, and the surface of the insulating substrate. A second sealing resin that covers a portion that is not present and the first sealing resin and has a smaller elastic modulus than the first sealing resin, and a plurality of semiconductor elements are fixed to the surface electrode pattern, The plurality of semiconductor elements are integrally covered with the first sealing resin, and the shape of the side surface of the outer shape of the first sealing resin is a straight line in a cross section perpendicular to the insulating substrate. form , And the one in which the second sealing resin covers the first sealing resin in direct contact with the side surface of the outer shape of the first sealing resin.

The method for manufacturing a semiconductor device according to the present invention includes at least a temporary wall having a surface perpendicular to the insulating substrate in a peripheral portion of the insulating substrate on the surface of the insulating substrate where the front electrode pattern and the back electrode pattern are not formed. A masking resin coating step of covering with a masking resin to form,
A semiconductor element fixing step for fixing the semiconductor element to the surface of the surface electrode pattern opposite to the insulating substrate via a bonding material, and filling the interior of the temporary wall with the first sealing resin; A first sealing resin forming step for curing the stop resin, a masking resin removing step for removing the masking resin, at least the first sealing resin, and a portion where the surface of the insulating substrate is exposed by removing the masking resin. And a second sealing resin forming step of covering with the second sealing resin.

  According to the semiconductor device and the method of manufacturing a semiconductor device according to the present invention, since the portion of the semiconductor element substrate where the surface of the insulating substrate is exposed is covered with the second sealing resin having a low elastic modulus, the semiconductor element is repeatedly heated. Even in the case of operating in a heat cycle, it is possible to obtain a highly reliable semiconductor device in which cracking is not generated in the sealing resin or peeling from the substrate is difficult.

It is sectional drawing which shows the basic structure of the semiconductor device by Embodiment 1 of this invention. 1 is a top view showing a basic structure of a semiconductor device according to a first embodiment of the present invention with a part removed. FIG. It is sectional drawing which shows another basic structure of the semiconductor device by Embodiment 1 of this invention. It is a 1st schematic diagram which shows the manufacturing method of the semiconductor device by Embodiment 2 of this invention. It is a 2nd schematic diagram which shows the manufacturing method of the semiconductor device by Embodiment 2 of this invention. It is sectional drawing which shows the basic structure of the semiconductor device by Embodiment 3 of this invention. FIG. 10 is a perspective view showing a basic structure in which a plurality of modules of a semiconductor device according to Embodiment 3 of the present invention are arranged to form one semiconductor device, with a part of sealing resin and parts removed.

Embodiment 1 FIG.
FIG. 1 is a cross-sectional view showing the basic structure of a semiconductor device according to the first embodiment of the present invention. FIG. 2 is a basic structure of the semiconductor device according to the first embodiment of the present invention with the sealing resin, wiring, and terminals removed. FIG. FIG. 1 is a cross-sectional view taken at a position corresponding to the position AA in FIG. 2 and includes a sealing resin, wiring, and terminals. The semiconductor elements 5 and 6 are fixed to the surface of the surface electrode pattern 2 of the semiconductor element substrate 4 having the surface electrode pattern 2 on the upper surface of the insulating substrate 1 and the back electrode pattern 3 on the back surface by a bonding material 7 such as solder. . Here, for example, the semiconductor element 5 is a power semiconductor element such as a MOSFET that controls a large current, and the semiconductor element 6 is, for example, a free-wheeling diode provided in parallel with the power semiconductor element 5. The semiconductor element substrate 4 has the back electrode pattern 3 side fixed to the base plate 10 with a bonding material 70 such as solder. The base plate 10 serves as a bottom plate, and the base plate 10 and the case side plate 11 form a case. A first sealing resin 12 is provided so as to cover the semiconductor elements 5 and 6 and the surface electrode pattern 2. A second sealing resin 120 is provided so as to cover the inside of the case including the first sealing resin 12. Further, the second sealing resin 120 is also injected into the portion where the surface electrode pattern 2 is not present (the portion indicated by reference numeral 20 in FIGS. 1 and 2) to cover the surface of the insulating substrate 1. Each semiconductor element is connected to a wiring 13 for electrically connecting an electrode of each semiconductor element to the outside, and the wiring 13 is connected to a terminal 14.

  The semiconductor element substrate 4 has a surface electrode pattern 2 on the upper surface of the insulating substrate 1 and a back electrode pattern 3 on the back surface. The insulating substrate 1 is completely composed of the surface electrode pattern 2 and the back electrode pattern 3. There is a portion where the insulating substrate 1 is exposed when the semiconductor element substrate 4 is not covered. In the first embodiment, in the semiconductor element substrate 4, the portion where the insulating substrate 1 is exposed (the portion indicated by reference numeral 20 in FIGS. 1 and 2 and the peripheral portion of the insulating substrate 1) is also second sealed. Covered with resin 120. Here, the second sealing resin 120 is a low-elasticity resin having a lower elastic modulus than the first sealing resin 12.

  As the first sealing resin, for example, an epoxy resin is used. However, the resin is not limited to this, and any resin having a desired elastic modulus and heat resistance can be used. For example, in addition to an epoxy resin, a silicone resin, a urethane resin, a polyimide resin, a polyamide resin, a polyamideimide resin, an acrylic resin, or the like is preferably used. Further, the first sealing resin 12 is used to prevent the bonding material 7 between the surface electrode pattern 2 from being peeled off due to thermal stress even when the semiconductor elements 5 and 6 are heated during operation. 6 has a function to hold down. For this reason, it is necessary to use a resin that is hard to some extent, that is, a high elastic modulus.

For example, a silicone resin is used as the second sealing resin 120, but the present invention is not limited to this, and a urethane resin, an acrylic resin, or the like can also be used. In addition, ceramic powder such as Al ₂ O ₃ and SiO ₂ can be added, but this is not restrictive, and AlN, BN, Si ₃ N ₄ , diamond, SiC, B ₂ O ₃ etc. You may add and you may add resin powder, such as a silicone resin and an acrylic resin. The powder shape is often spherical, but is not limited thereto, and a crushed shape, a granular shape, a flake shape, an aggregate, or the like may be used. The filling amount of the powder may be an amount that can provide the necessary fluidity, insulation, and adhesiveness. However, the elastic modulus of the second sealing resin 120 must be smaller than the elastic modulus of the first sealing resin 12.

  The present invention is effective not only in the first embodiment but also in other embodiments when applied to a semiconductor element operating at 150 ° C. or more as a power semiconductor element. In particular, the present invention is more effective when applied to a so-called wide band gap semiconductor, which is formed of a material such as silicon carbide (SiC), gallium nitride (GaN) -based material, or diamond and has a larger band gap than silicon (Si). Further, in FIG. 2, only four semiconductor elements are mounted on one molded semiconductor device, but the present invention is not limited to this, and a necessary number of semiconductor elements are mounted according to the intended use. be able to.

  The front electrode pattern 2, the back electrode pattern 3, the base plate 10 and the terminal 14 are usually made of copper, but are not limited to this, and aluminum or iron may be used, or a composite material of these may be used. good. The surface is usually nickel-plated, but the present invention is not limited to this, and gold or tin-plating may be performed, as long as a necessary current and voltage can be supplied to the semiconductor element. Further, a composite material such as copper / invar / copper may be used, and an alloy such as SiCAl or CuMo may be used. Further, since the terminal 14 and the surface electrode pattern 2 are embedded in the first sealing resin 12, a minute unevenness may be provided on the surface in order to improve the adhesion with the resin, so that they are chemically bonded. An adhesion auxiliary layer may be provided with a silane coupling agent or the like.

The semiconductor element substrate 4 refers to a ceramic insulating substrate 1 such as Al ₂ O ₃ , SiO ₂ , AlN, BN, and Si ₃ N ₄ provided with a surface electrode pattern 2 and a back electrode pattern 3 of copper or aluminum. . The semiconductor element substrate 4 is required to have heat dissipation and insulating properties, and is not limited to the above, and the insulating substrate 1 such as a cured resin material in which ceramic powder is dispersed or a cured resin material in which a ceramic plate is embedded is used. A surface electrode pattern 2 and a back electrode pattern 3 may be provided. The ceramic powder used for the insulating substrate 1 is Al ₂ O ₃ , SiO ₂ , AlN, BN, Si ₃ N _4, etc., but is not limited to this, and diamond, SiC, B ₂ O ₃ , Etc. may be used. Further, resin powder such as silicone resin and acrylic resin may be used. The powder shape is often spherical, but is not limited thereto, and a crushed shape, a granular shape, a flake shape, an aggregate, or the like may be used. The filling amount of the powder is not limited as long as the necessary heat dissipation and insulation are obtained. The resin used for the insulating substrate 1 is usually an epoxy resin, but is not limited to this, and a polyimide resin, a silicone resin, an acrylic resin, or the like may be used as long as the material has both insulating properties and adhesiveness. It doesn't matter.

  The wiring 13 uses a wire body having a circular cross section made of aluminum or gold, but is not limited to this, and for example, a copper plate having a rectangular cross section may be used. In FIG. 1, only three wirings are provided in the semiconductor element. However, the number is not limited to this, and a necessary number can be provided depending on the current density of the semiconductor element. The wiring 13 may be a structure in which metal pieces such as copper and tin may be joined with molten metal as long as a necessary current and voltage can be supplied to the semiconductor element.

  Further, an example in which the copper plate wiring 130 is used for the wiring is shown in FIG. 3, the same reference numerals as those in FIG. 1 denote the same or corresponding parts. The surface of the copper plate wiring 130 may use nickel plating for rust prevention or may be subjected to chemical treatment such as a rust prevention agent. Moreover, in order to improve adhesiveness with each sealing resin, an unevenness | corrugation may be provided in the surface and adhesiveness improvement agents, such as a primer process, may be provided. As the adhesion improver, for example, a silane coupling agent, polyimide, epoxy resin, or the like is used, but is not particularly limited as long as it improves the adhesion between the wiring member to be used and the first sealing resin. Here, an example in which a copper plate is used as the wiring is shown, but if it is a material that can be electrically connected to a terminal, can be electrically connected to a semiconductor element, and can secure a necessary current capacity, Needless to say, metals other than copper may be used.

  The operation of the semiconductor device according to the first embodiment of the present invention is as follows. When the semiconductor element operates at a high temperature, the first sealing resin 12 and the semiconductor element substrate 4 around the semiconductor element thermally expand, and when the semiconductor element stops operating, thermal contraction occurs. That is, a heat cycle occurs. The first sealing resin 12 is adjusted so as to have a linear expansion coefficient close to the linear expansion coefficient of the material (for example, copper) of the surface electrode pattern 2 and the back electrode pattern 3 among the materials of the semiconductor element substrate 4. The linear expansion coefficient is different from that of the insulating substrate 1. In the conventional semiconductor device, since the first sealing resin 12 and the insulating substrate 1 are in direct contact with the portion of the semiconductor element substrate where the front electrode pattern 2 and the back electrode pattern 3 are not formed, the heat cycle is repeated. In addition, due to the difference in linear expansion coefficient between them, the first sealing resin 12 is peeled off or cracked at the contact portion between the first sealing resin 12 and the insulating substrate 1, and the reliability of the semiconductor device is remarkably increased. It was decreasing. However, in the semiconductor device according to the first embodiment of the present invention shown in FIG. 1, the portion where the insulating substrate 1 is exposed in the single semiconductor element substrate 4 is a resin material having a lower elastic modulus than the first sealing resin 12. It is covered with the second sealing resin 120 formed in (1). For this reason, when a heat cycle occurs, the stress generated by the difference in the expansion coefficient is relieved in the portion of the second sealing resin 120 that is lower in elasticity than the first sealing resin 12, that is, softer. A highly reliable semiconductor device can be obtained in which peeling or cracking of the sealing resin 12 hardly occurs.

  Furthermore, as shown in FIG. 1 and FIG. 3, the shape of the side surface 121 of the first sealing resin 12 is a shape that is a straight line in a cross section cut by a plane perpendicular to the insulating substrate 1. This shape is realized by the manufacturing method described in the second embodiment below, and is realized when a resin as a material is formed on a semiconductor element by so-called potting as conventionally performed. It is a shape that cannot be done. With this shape, it is possible to obtain a semiconductor device that can secure an insulation distance even when the bottom area of the first sealing resin is small compared to the shape of a resin formed by conventional potting.

Embodiment 2. FIG.
4 and 5 are schematic views showing a method of manufacturing a semiconductor device according to the second embodiment of the present invention. 4 and 5, the same reference numerals as those in FIGS. 1 and 2 denote the same or corresponding parts. The outline of this manufacturing method is as follows. First, a surface of the semiconductor element substrate 4 on which the surface electrode pattern 2 or the back electrode pattern 3 of the insulating substrate 1 is not formed is provided on the peripheral portion of the insulating substrate 1 with a temporary wall 9 having a height higher than the thickness of the semiconductor element. Cover with masking resin to form (masking resin coating step). Next, a semiconductor element is fixed to the surface electrode pattern 2, and the interior of the temporary wall 9 is covered with the first sealing resin 12 (first sealing resin forming step), and the masking resin is removed (masking resin removal). Process). Thereafter, a second sealing resin 120 is provided so as to cover the surface of the insulating substrate 1 where the front electrode pattern 2 or the back electrode pattern 3 is not formed and the first sealing resin 12 (second sealing resin). Forming step). The masking resin can be produced by putting an uncured resin in a syringe and drawing it while extruding it to a required location, or printing using a screen mask. However, these methods take time to produce. If the front surface electrode pattern 2 and the back surface electrode pattern 3 of the semiconductor element substrate 4 are sandwiched by a jig provided with a groove, and then uncured masking resin is injected and cured, various temporary structures can be obtained by changing the position and shape of the groove. A wall 9 can be provided, and a substrate on which the surface electrode pattern or the back electrode pattern of the insulating substrate 1 is not formed can be produced.

FIG. 4 is a schematic diagram for explaining the masking resin coating step. First, a semiconductor element substrate 4 having a surface electrode pattern 2 attached to one surface of an insulating substrate 1 and a back electrode pattern 3 attached to the other surface is prepared (FIG. 4A). Further, a split-type jig composed of an upper jig 21 and a lower jig 22 made of Teflon (registered trademark) is prepared (FIG. 4B). The upper jig 21 is provided with a resin injection hole 23 for injecting a masking resin. The semiconductor element substrate 4 is placed at a predetermined position of the lower jig 22, and the upper jig 21 is covered so that the position does not shift, and then a masking resin is injected later using a method such as screwing or hydraulic press. Tighten the masking resin so that it does not leak from the upper and lower jigs. The upper jig 21 and the lower jig 22 are prepared with sufficient flatness so that the masking resin does not flow on the surfaces of the front electrode pattern 2 and the back electrode pattern 3. Next, the inside of the jig containing the semiconductor element substrate 4 is decompressed to 10 torr using the decompression chamber 31 or the like (FIG. 4C). Thereafter, as shown by an arrow in FIG. 4C, uncured masking resin 41 is injected from the resin injection hole 23 of the upper jig 21 with a pressing force of about 1 MPa. When the masking resin is injected into the entire space of the jig, it is returned to 760 torr (atmosphere), and the masking resin is thermally cured. For example, when KE-1833 manufactured by Shin-Etsu Chemical Co., Ltd., which is a silicone resin, is used as the masking resin, curing is performed at 120 ° C. for 1 hour. After thermosetting, the jig is cooled to room temperature, and then the upper and lower jigs are divided and the substrate is taken out, whereby the temporary wall 9 formed of the masking resin is formed, and the surface shown in FIG. A substrate filled with the masking resin 90 in the portion 20 where the electrode pattern 2 does not exist can be manufactured (FIG. 4D).

  At this time, the surface other than the front surface electrode pattern 2 and the back surface electrode pattern 3, for example, the front surface electrode pattern 2 shown in FIG. 4C is provided so that the resin is injected into all the space portions from one resin injection hole 23. The part 20 where the temporary wall 9 is not provided must be connected to the space inside the jig. Here, the jig may be provided with a deaeration hole. Moreover, it goes without saying that a mold release agent may be applied to the wall surface of the jig to improve the demolding property, and that the jig may be made of a material other than Teflon (registered trademark). Needless to say.

  In the first and second embodiments, the surface electrode pattern 2 is separated as shown in FIG. 2, for example, and the insulating substrate is exposed between the surface electrode patterns 2 as an example. Needless to say, the present invention can be applied to the case where the surface electrode pattern 2 is not separated but is a single piece and the portion where the insulating substrate is exposed is only the peripheral portion.

  Next, a manufacturing method for manufacturing a semiconductor device using the semiconductor element substrate 4 provided with the temporary walls 9 will be described with reference to FIG. A case formed by the case side plate 11 to which the terminal 14 is attached and the base plate 10 is prepared separately from the semiconductor element substrate 4 provided with the temporary wall 9. The semiconductor element substrate 4 provided with the temporary wall 9 is fixed to the base plate which is the bottom plate of the case by a bonding material 70 such as solder. At the same time, the semiconductor elements 5 and 6 are fixed to the surface electrode pattern of the semiconductor element substrate 4 with a bonding material 7 such as solder (semiconductor element fixing step). Thereafter, the semiconductor elements 5 and 6, the surface electrode pattern 2, and the terminals 14 are connected by wiring 13 (FIG. 5A).

  Next, after the inside of the temporary wall 9 is filled with the first sealing resin 12 and cured (first sealing resin forming step, FIG. 5B), the temporary wall 9 formed of the masking resin and The masking resin 90 in the portion 20 without the surface electrode pattern 2 is removed with a solvent (masking resin removal step, FIG. 5C). At this time, in order to completely remove the masking resin, heating or a plurality of washing processes are performed as necessary. Here, after the masking resin is removed, the surface of the first sealing resin 12 in contact with the temporary wall 9, that is, the shape of the side surface 121 of the first sealing resin is a cross section perpendicular to the insulating substrate 1. In FIG. 5C, the shape becomes a straight line. After the masking resin is completely removed, a second sealing resin is injected into the case and the whole is molded (second sealing resin forming step, FIG. 5D). At the time of this injection, a defoaming process is performed as necessary so that the second sealing resin 120 is completely injected also into the portion 20 without the surface electrode pattern 2.

  As the masking resin, a thermoplastic resin and a thermosetting resin can be used. The masking resin material functions as a dam wall that prevents the first sealing resin covering the semiconductor element from flowing and spreading, and can maintain its shape in the curing temperature region of the first sealing resin, and also the first sealing resin. There is no particular limitation as long as the stop resin can be removed by a method such as solvent treatment and heat treatment after curing.

  For example, a silicone resin can be used as the masking resin. It was found that the masking resin made of silicone resin can be removed at room temperature with a silicone solution. A thermoplastic wax may be used as the masking resin. It has been found that when a temporary wall is made using a thermoplastic wax, it can be removed with a wax solution or a hydrocarbon solvent. When the thermoplastic wax is used as a masking resin for the temporary wall, if the softening temperature of the thermoplastic wax is higher than the curing temperature of the first sealing resin, the temporary sealing is performed when the first sealing resin covers the semiconductor element. I was able to play the role of a wall. Further, when the softening temperature of the thermoplastic wax is lower than the curing temperature of the first sealing resin, the first stage curing temperature of the first sealing resin is set to a temperature lower than the softening temperature of the thermoplastic wax, After semi-curing the first sealing resin and removing the thermoplastic wax with a wax solution, the first sealing resin is further cured at a predetermined curing temperature, thereby producing a semiconductor device with high insulation reliability. I knew it was possible.

  The height of the temporary wall 9 is not particularly limited as long as it is equal to or higher than the height of the semiconductor elements 5 and 6 so that the first sealing resin 12 covers the semiconductor elements 5 and 6. A height that does not exceed the height of the case side plate 11 is preferable. The width of the temporary wall 9 is preferably about 1 to 2 mm because the size of the insulating substrate 1 is often 100 mm × 100 mm or less. However, the width is not limited to this, and the first sealing resin is used. Any width may be used as long as it is necessary for partitioning so as not to be deformed.

  As described above, in the method for manufacturing a semiconductor device according to the second embodiment of the present invention, since the first sealing resin is formed using the temporary wall, it is easy to change the height of the temporary wall. The sealing amount of the first sealing resin can be changed, and the insulation distance can be adjusted. Further, it is conceivable to cover the temporary wall 9 with the second sealing resin while leaving the temporary wall 9, but voids are generated in the temporary wall 9 or the adhesion between the temporary wall 9 and the insulating substrate 1 is poor. In such a case, the insulation resistance may be reduced. On the other hand, in the present invention, the temporary wall is removed, and the portion where the insulating substrate is exposed is covered with the second sealing resin having a low elastic modulus, so that there is little possibility that the insulation resistance is lowered. Therefore, a highly reliable semiconductor device can be obtained.

Embodiment 3 FIG.
FIG. 6 is a cross-sectional view showing the structure of the semiconductor device according to the third embodiment of the present invention. 6, the same reference numerals as those in FIGS. 1 and 3 denote the same or corresponding parts. In the third embodiment, the socket 131 for connecting the wiring to the semiconductor elements 5 and 6 is provided. First sealing resin 12
The socket 131 is provided so as to be exposed on the surface of the first sealing resin 12 so that wiring can be inserted into the socket 131 from the outside after being covered with.

  Normally, the socket is electrically connected to each other by inserting a metal pin into the metal on the pipe, but the method is not limited to this method, and the semiconductor embedded in the first sealing resin 12 is used. Any structure that electrically connects the elements 5 and 6 and the wiring may be used. Further, the surface of the socket 131 may be provided with irregularities on the surface in order to improve the adhesion with the first sealing resin 12 or the second sealing resin 120, and a chemical such as a silane coupling agent may be provided. Processing may be performed. The electrical connection between the semiconductor elements 5 and 6 and the socket 131 is usually performed using a solder material, but is not limited to this, and a silver paste or a material that is metal-bonded by sintering may be used. In FIG. 6, the copper wiring 130 is used for the wiring to the socket 131, but it goes without saying that a normal linear wiring may be used.

  A portion surrounded by a broken line in FIG. 6, that is, the semiconductor element 5, 6 sealed with the first sealing resin 12 is used as a module 100, and a plurality of modules 100 are arranged in the case side plate 11 to form one semiconductor. A conceptual diagram of the configuration of the apparatus is shown in FIG. 7, the same reference numerals as those in FIG. 6 denote the same or corresponding parts. FIG. 7 is a perspective view showing a state in which the second sealing resin 120, the terminal 14 and the copper plate wiring 130 are removed, and a part of the first sealing resin 12 is also removed, and the semiconductor element can be seen. In FIG. 7, a bar 110 provided between the modules is a member for attaching a terminal (not shown in FIG. 7) for bridging the wiring from each module.

  In this structure, the semiconductor elements 5 and 6 are sealed with the first sealing resin 12 and then energized from the socket 131 before the module is sealed with the second sealing resin 120. An operation test can be performed. When a defective module is found in the operation test, the defective module can be replaced with a non-defective module by removing the bonding between the semiconductor element substrate 4 and the base plate 10, so that the yield of the semiconductor device can be improved.

Embodiment 4 FIG.
In the fourth embodiment, a test semiconductor device module is manufactured using a sealing resin using various materials, and the results of a power cycle test and a heat cycle test are shown as examples. In the power cycle test, energization was performed until the temperature of the semiconductor element reached 200 ° C., and when the temperature reached that temperature, the energization was stopped, the temperature of the semiconductor element was cooled to 120 ° C., and the current was again energized. In addition, the heat cycle test was performed by putting the entire semiconductor device in a thermostat capable of temperature control, and repeatedly changing the temperature of the thermostat so as to be between −40 ° C. and 150 ° C.

Example 1.
Table 1 shows the structure shown in FIG. 2, that is, the results of the power cycle test and the heat cycle test when the elastic modulus of the first sealing resin for sealing the semiconductor element substrate is changed.

Example 1-1 in Table 1 will be described. As a result of adding about 50 wt% glass filler to KER-4000-UV manufactured by Shin-Etsu Chemical Co., Ltd. In the heat cycle test, it was found that after 50 cycles, peeling and cracking of the sealing resin occurred and the semiconductor device stopped operating.

  In Example 1-2, as a result of adding about 58 wt% of a glass filler to KER-4000-UV manufactured by Shin-Etsu Chemical Co., Ltd. and sealing with a sealing resin with an elastic modulus adjusted to 1 GPa, in the power cycle test, 160,000 cycles, In the heat cycle test, it was found to improve up to 300 cycles.

In Example 1-3, as a result of using EX-550 (elastic modulus: 7.0 GPa) manufactured by San Yulec Co., Ltd. as the first sealing resin, it can be improved to 180,000 cycles in the power cycle test and 800 cycles in the heat cycle test. all right.

  In Example 1-4, 15% by weight of silica filler was added to EX-550 manufactured by San Yulec Co., Ltd., and a sealing resin having an elastic modulus adjusted to 12 GPa was used. As a result, 160,000 cycles were used in the power cycle test and 600 samples were used in the heat cycle test. It turned out to be a cycle.

  In Example 1-5, as a result of using a sealing resin in which 20 wt% of silica filler was added to EX-550 manufactured by San Yulec Co., Ltd. and the elastic modulus was adjusted to 14 GPa, it was 14,000 cycles in the power cycle test, and 500 in the heat cycle test. It turned out to be a cycle.

  In Example 1-6, 36 wt% of silica filler was added to EX-550 manufactured by Sanyu Rec Co., Ltd., and a sealing resin having an elastic modulus adjusted to 20 GPa was used. As a result, 110000 cycles in the power cycle test and 450 cycles in the heat cycle test. It turned out to be a cycle.

In Example 1-7, 40 wt% of silica filler was added to EX-550 manufactured by Sanyu Rec Co., Ltd., and a sealing resin with an elastic modulus adjusted to 22 GPa was used. As a result, in the power cycle test, 100,000 cycles, It turned out to be 200 cycles.

From the above results, it has been found that the elastic modulus M of the first sealing resin is appropriately in the range of 1 GPa to 20 GPa.

Example 2
Next, examples in which the second sealing resin is made of various elastic modulus resins and the insulating properties are evaluated will be described. In the semiconductor device, the size of the base plate is 50 × 92 × 3 mm, the size of the insulating substrate using AlN is 23.2 × 23.4 × 1.12 mm, the size of the semiconductor element using SiC is 5 × 5 × 0.35 mm,
We used Senju Metal M731, a case using polyphenylene sulfide (PPS), and wiring using aluminum with a diameter of 0.4 mm. In this test, only one SiC semiconductor element was mounted inside the module, and a heat cycle test and a corona start voltage measurement were performed.

  Table 2 shows a semiconductor device manufactured by the process shown in the second embodiment, that is, a temporary wall is provided on the outer periphery of the semiconductor element substrate, and the first sealing resin is sealed with EX-550 made by Sanyu Rec with an elastic modulus of 7.0 GPa Then, after removing the hypothetical wall with a predetermined solvent, the results of a heat cycle test and a partial discharge start voltage (corona start voltage) when the elastic modulus of the second sealing resin to be sealed is changed are shown.

Example 2-1 will be described. When SE1886 (elastic modulus 30 kPa) manufactured by Toray Dow Corning is used as the second sealing resin, the semiconductor element substrate and the first sealing resin are sealed, and a semiconductor device is manufactured. It was found that the characteristics of the semiconductor device were maintained until the cycle, and the corona onset voltage was 6.0 kV or higher.

  In Example 2-2, as a result of manufacturing a semiconductor device using KE1833 (elastic modulus: 3.5 MPa) manufactured by Shin-Etsu Chemical as the second sealing resin, the characteristics of the semiconductor device were maintained for 1200 cycles or more in the heat cycle test. The starting voltage was found to be over 6.0 kV.

  In Example 2-3, as a second sealing resin, about 50 wt% of glass filler was added to Shin-Etsu Chemical KER-4000-UV, the elastic modulus was adjusted to 900 MPa, and a semiconductor device was manufactured. It was found that the semiconductor device characteristics were maintained for 1200 cycles or more, and the corona onset voltage was 6.0 kV.

In Example 2-4, a semiconductor device was fabricated using SCR-1016 (elastic modulus 1.4 GPa) manufactured by Shin-Etsu Chemical as the second sealing resin. As a result, the heat cycle test life decreased to 800 cycles, and the corona start voltage Was found to be 4.5 kV.

In Example 2-5, about 54 wt% of glass filler is added to Shin-Etsu Chemical SCR-1016 as the second sealing resin.
As a result of adding and adjusting the elastic modulus to 3 GPa to fabricate a semiconductor device, it was found that the heat cycle test life decreased to 200 cycles and the corona onset voltage decreased to 2.5 kV.

By comprehensively judging the test results of the heat cycle test life and the corona start voltage described above, it was found that the elastic modulus N of the second sealing resin is suitably in the range of 30 kPa to 1 GPa.

1: Insulating substrate 2: Surface electrode pattern
3: Back electrode pattern 4: Semiconductor element substrate 5, 6: Semiconductor element 7, 70: Bonding material 9: Temporary wall 10: Base plate 11: Case side plate 12: First sealing resin 13, 130: Wiring 14: Terminal 21: Upper jig 22: Lower jig 23: Resin injection hole 120: Second sealing resin 121: Side surface of the first sealing resin 131: Socket

Claims (11)

A semiconductor element substrate having a surface electrode pattern formed on one side of the insulating substrate and a back electrode pattern formed on the other side of the insulating substrate;
A semiconductor element fixed to the surface of the surface electrode pattern opposite to the insulating substrate via a bonding material;
A first sealing resin covering the semiconductor element and the surface electrode pattern;
The surface of the insulating substrate covers at least a portion where the surface electrode pattern or the back electrode pattern is not formed and the first sealing resin, and has a smaller elastic modulus than the first sealing resin. Two sealing resins,
A plurality of the semiconductor elements are fixed to the surface electrode pattern, and the plurality of semiconductor elements are integrally covered with the first sealing resin ,
The shape of the side surface of the outer shape of the first sealing resin is a shape that is a straight line in a cross section in a plane perpendicular to the insulating substrate, and the second sealing resin is the first sealing resin. A semiconductor device characterized in that the first sealing resin is covered in direct contact with a side surface of the outer shape . A semiconductor element substrate having a surface electrode pattern formed on one side of the insulating substrate and a back electrode pattern formed on the other side of the insulating substrate;
A semiconductor element fixed to the surface of the surface electrode pattern opposite to the insulating substrate via a bonding material;
A first sealing resin covering the semiconductor element and the surface electrode pattern;
The surface of the insulating substrate covers at least a portion where the surface electrode pattern or the back electrode pattern is not formed and the first sealing resin, and has a smaller elastic modulus than the first sealing resin. Two sealing resins,
A plurality of the semiconductor elements are fixed to the surface electrode pattern, and the plurality of semiconductor elements are integrally covered with the first sealing resin,
The surface electrode pattern has a portion where the insulating substrate is exposed while being separated into a plurality of portions, and the portion where the insulating substrate is exposed is covered with the second sealing resin. semi conductor arrangement but the above second sealing resin covering the portion exposed between you and being covered by the first sealing resin. The semiconductor device according to claim 1 or 2 elastic modulus of the second sealing resin is characterized by a range of 1GPa from 30 kPa. The semiconductor device according to any one of claims 1 to 3, the elastic modulus of the first sealing resin is characterized by a range of 20GPa from 1 GPa. Semiconductor element is a semiconductor device according to any one of claims 1, characterized in that it is formed by a wide band gap semiconductor 4. 6. The semiconductor device according to claim 5 , wherein the wide band gap semiconductor is a semiconductor made of any one of silicon carbide, gallium nitride-based material, and diamond. A method of manufacturing a semiconductor device according to claim 1 ,
At least the surface of the insulating substrate on which the front electrode pattern and the back electrode pattern are not formed is covered with a masking resin so as to form a temporary wall having a height higher than the thickness of the semiconductor element in the peripheral portion of the insulating substrate. Masking resin coating process;
A semiconductor element fixing step of fixing the semiconductor element to a surface of the surface electrode pattern opposite to the insulating substrate via a bonding material;
A first sealing resin forming step of curing the first sealing resin after filling the inside of the temporary wall with the first sealing resin;
A masking resin removal step of removing the masking resin;
A second sealing resin forming step of covering at least the first sealing resin and the portion where the surface of the insulating substrate is exposed by removing the masking resin with a second sealing resin;
A method for manufacturing a semiconductor device, comprising: 8. The method of manufacturing a semiconductor device according to claim 7 , wherein, in the first sealing resin forming step, the temperature for curing the first sealing resin is a temperature equal to or lower than a heat resistant temperature of the masking resin. . The masking resin coating step
Sandwiching the semiconductor element substrate with an upper jig and a lower jig having resin injection holes;
Installing in a reduced pressure environment with the semiconductor element substrate sandwiched between the upper jig and the lower jig;
Injecting uncured masking resin from the resin injection hole in this reduced pressure environment;
After injecting the uncured masking resin, taking it out in an atmospheric pressure environment, curing the injected uncured masking resin, removing the upper jig and the lower jig, and demolding;
The method of manufacturing a semiconductor device according to claim 7 , comprising: 8. The method of manufacturing a semiconductor device according to claim 7 , wherein the material of the masking resin is a silicone resin. 8. The method of manufacturing a semiconductor device according to claim 7 , wherein the material of the masking resin is a thermoplastic resin.

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