JP5805364B2 - Light source driving device, optical scanning device, and image forming apparatus - Google Patents

Description

  The present invention relates to a light source driving device, an optical scanning device, and an image forming apparatus, and more specifically, includes a light source driving device that drives a plurality of light emitting units, an optical scanning device having the light source driving device, and the optical scanning device. The present invention relates to an image forming apparatus.

  In image forming apparatuses such as laser printers and digital copiers, there is an increasing demand for improvement in image formation speed (high speed) and improvement in writing density (high image quality). As one of the methods for achieving these demands, A method of scanning a surface to be scanned with a plurality of light beams using a multi-beam light source capable of emitting a plurality of light beams has been considered.

  By the way, in a multi-beam light source having a plurality of light emitting units, in order to narrow the scanning line interval, the light emitting units are arranged so as to be shifted from each other in the direction corresponding to the main scanning direction. In this case, it is necessary to control the lighting timing of each light emitting unit in order to align the writing start positions in a plurality of scanning lines.

  For example, in Patent Document 1, the lighting timing of at least one light emitting unit of the light source unit is determined based on the image clock generated in synchronization with the detection signal of the synchronization detecting unit, and the lighting timing of the other light emitting units. An image forming apparatus including a control unit that controls the lighting of a plurality of light emitting units of a light source unit by determining the value by changing the count value of the image clock.

  By the way, in the image forming apparatus, the optical characteristics of the optical components may change or the positional relationship between the optical components may change due to temperature change or aging change after shipment. As a result, the light spot position on the surface to be scanned may deviate from the desired position. For example, this causes a shift in the writing position of the image data in the main scanning direction. However, in the image forming apparatus disclosed in Patent Document 1, it is difficult to accurately correct the deviation in the writing position in real time.

  The present invention has been made under such circumstances, and a first object thereof is to provide a light source driving device capable of controlling lighting timings of a plurality of light emitting units with high accuracy in real time.

  A second object of the present invention is to provide an optical scanning device capable of performing high-density optical scanning with high accuracy.

  A third object of the present invention is to provide an image forming apparatus capable of forming a high quality image at high speed.

From a first aspect, the present invention has a plurality of light emitting units arranged at least in positions corresponding to the main scanning direction, and is scanned by a plurality of light beams from the plurality of light emitting units. A light source driving device used in an optical scanning device that writes image information on a surface, a high frequency clock generation circuit that generates a plurality of high frequency clock signals having different phases, and a time required for one scan by the optical scanning device is desired A phase data generating circuit that generates phase data that defines the transition timing of the signal level of the pixel clock signal so as to be time; a high-frequency clock signal from the high-frequency clock generating circuit, and phase data from the phase data generating circuit based on the pixel clock generating circuit for generating the picture element clock signal and; wherein the plurality of light emitting portions in accordance with image information Corresponding to the writing data creating circuit for creating a plurality of the writing data; corresponding to the plurality of light emitting portions, wherein by the plurality of light beams in units of time corresponding to the phase difference of the plurality of high-frequency clock signal together acquire a plurality of correction data for correcting the deviation amount of writing start timing of the scanning surface, the plurality of the writing data, from the phase data and the plurality of correction data, corresponding to the plurality of light emitting portions a drive circuit for driving the onset light portion corresponding on the basis of the modulated data output from the modulation data control circuit; create multiple modulation data, the modulation data control circuit and for sequentially outputting the plurality of modulated data ; wherein the modulation data control circuit, when outputting the modulated data, data of the previous pixel clock signal of the two of the pixel clock signal for tandem In timing, which is a light source driving device comprises outputting a plurality of output portions of the data, the remainder of the plurality of data at the timing of the pixel clock signal after constituting the modulation data.

  According to this, it becomes possible to control the lighting timing of the plurality of light emitting units in real time with higher accuracy than in the past.

  From a second viewpoint, the present invention is an optical scanning device that scans a surface to be scanned in a main scanning direction along a plurality of scanning lines with a plurality of light beams, and at least relates to a direction corresponding to the direction of the scanning lines. A light source having a plurality of light emitting portions arranged at different positions; a light source driving device of the present invention for driving the light source; and condensing a plurality of light beams from the light source on the scanned surface; And an optical system that moves a plurality of light spots on the surface to be scanned along the plurality of scanning lines in a main scanning direction.

  According to this, since the light source drive device of the present invention is provided, as a result, high-density optical scanning can be performed with high accuracy.

  According to a third aspect of the present invention, there is provided at least one image carrier; and at least one optical scanning device according to the present invention that scans the at least one image carrier with a light beam modulated according to image information. And an image forming apparatus.

  According to this, since the optical scanning device of the present invention is provided, as a result, a high-quality image can be formed at high speed.

It is a figure for demonstrating schematic structure of the laser printer which concerns on one Embodiment of this invention. It is the schematic which shows the optical scanning device in FIG. It is a figure for demonstrating the surface emitting laser array contained in the light source in FIG. It is a figure for demonstrating the several light spot formed on the surface of a photoreceptor drum when a some light emission part is lighted simultaneously. It is a block diagram for demonstrating the structure of a scanning control apparatus. It is a wave form diagram for demonstrating two high frequency clock signals from which a phase mutually differs. FIG. 6 is a diagram (part 1) for describing phase data; FIG. 5 is a second diagram for explaining phase data; 6 is a timing chart for explaining the operation of the pixel clock generation circuit in FIG. 5. 6 is a timing chart for explaining the operation of the image data creation circuit in FIG. 5. FIG. 6 is a diagram for illustrating a configuration of a write control circuit in FIG. 5. 12 is a timing chart (part 1) for explaining the operation of the two-point measuring circuit in FIG. 12 is a timing chart (part 2) for explaining the operation of the two-point measuring circuit in FIG. 12 is a timing chart (No. 1) for explaining the operation of the synchronous lighting control circuit in FIG. 12 is a timing chart (part 2) for explaining the operation of the synchronous lighting control circuit in FIG. It is a figure for demonstrating the structure of the correction data creation circuit in FIG. It is a timing chart for demonstrating operation | movement of a correction data creation circuit. It is a figure for demonstrating each light spot position formed on the surface of a photoconductor drum at the time of a writing start. It is a figure for demonstrating the structure of the conversion data creation and correction circuit in FIG. It is a figure for demonstrating the structure of the data preparation and correction circuit in FIG. It is a figure for demonstrating the relationship between image data and conversion data. It is a figure for demonstrating the relationship between the lower 4 bits of correction data, and the selection data output from a data selection circuit, when phase data is "00". It is a figure for demonstrating the relationship between the lower 4 bits of correction data, and the selection data output from a data selection circuit, when phase data is "01". It is a figure for demonstrating the relationship between the lower 4 bits of correction data, and the selection data output from a data selection circuit, when phase data is "11". 4 is a timing chart (part 1) for explaining the operation of the data creation / correction circuit; 12 is a timing chart (part 2) for explaining the operation of the data creation / correction circuit. 12 is a timing chart (part 3) for explaining the operation of the data creation / correction circuit; It is a figure for demonstrating the structure of the PWM data creation circuit in FIG. FIG. 29 is a timing chart (No. 1) for explaining the operation of the data creation circuit in FIG. 28; FIG. FIG. 29 is a timing chart (No. 2) for explaining the operation of the data creation circuit in FIG. 28; FIG. FIG. 29 is a timing chart (No. 3) for explaining the operation of the data creation circuit in FIG. 28; FIG. FIG. 29 is a timing chart (No. 4) for explaining the operation of the data creation circuit in FIG. 28; FIG. It is a figure for demonstrating the modification of the insertion position of additional data. 1 is a diagram illustrating a schematic configuration of a color printer.

  Hereinafter, an embodiment of the present invention will be described with reference to FIGS. FIG. 1 shows a schematic configuration of a laser printer 1000 as an image forming apparatus according to an embodiment of the present invention.

  The laser printer 1000 includes an optical scanning device 1010, a photosensitive drum 1030, a charging charger 1031, a developing roller 1032, a transfer charger 1033, a charge eliminating unit 1034, a cleaning unit 1035, a toner cartridge 1036, a paper feeding roller 1037, a paper feeding tray 1038, A registration roller pair 1039, a fixing roller 1041, a paper discharge roller 1042, a paper discharge tray 1043, a communication control device 1050, a printer control device 1060 that comprehensively controls the above-described units, and the like are provided. These are housed in predetermined positions in the printer housing 1044.

  The communication control device 1050 controls bidirectional communication with a host device (for example, a personal computer) via a network or the like.

  The photosensitive drum 1030 is a cylindrical member, and a photosensitive layer is formed on the surface thereof. That is, the surface of the photoconductor drum 1030 is a scanned surface. The photosensitive drum 1030 rotates in the direction of the arrow in FIG.

  The charging charger 1031, the developing roller 1032, the transfer charger 1033, the charge removal unit 1034, and the cleaning unit 1035 are each disposed in the vicinity of the surface of the photosensitive drum 1030. Then, along the rotation direction of the photosensitive drum 1030, the charging charger 1031 → the developing roller 1032 → the transfer charger 1033 → the discharging unit 1034 → the cleaning unit 1035 are arranged in this order.

  The charging charger 1031 uniformly charges the surface of the photosensitive drum 1030.

  The optical scanning device 1010 irradiates the surface of the photosensitive drum 1030 charged by the charging charger 1031 with a light beam modulated based on image information from the host device. As a result, a latent image corresponding to the image information is formed on the surface of the photosensitive drum 1030. The latent image formed here moves in the direction of the developing roller 1032 as the photosensitive drum 1030 rotates. The configuration of the optical scanning device 1010 will be described later.

  The toner cartridge 1036 stores toner, and the toner is supplied to the developing roller 1032.

  The developing roller 1032 causes the toner supplied from the toner cartridge 1036 to adhere to the latent image formed on the surface of the photosensitive drum 1030 to visualize the image information. Here, the latent image to which the toner is attached (hereinafter also referred to as “toner image” for the sake of convenience) moves in the direction of the transfer charger 1033 as the photosensitive drum 1030 rotates.

  Recording paper 1040 is stored in the paper feed tray 1038. A paper feed roller 1037 is disposed in the vicinity of the paper feed tray 1038, and the paper feed roller 1037 takes out the recording paper 1040 one by one from the paper feed tray 1038 and conveys it to the registration roller pair 1039. The registration roller pair 1039 temporarily holds the recording paper 1040 taken out by the paper supply roller 1037, and in the gap between the photosensitive drum 1030 and the transfer charger 1033 according to the rotation of the photosensitive drum 1030. Send it out.

  A voltage having a polarity opposite to that of the toner is applied to the transfer charger 1033 in order to electrically attract the toner on the surface of the photosensitive drum 1030 to the recording paper 1040. With this voltage, the toner image on the surface of the photosensitive drum 1030 is transferred to the recording paper 1040. The recording sheet 1040 transferred here is sent to the fixing roller 1041.

  In the fixing roller 1041, heat and pressure are applied to the recording paper 1040, whereby the toner is fixed on the recording paper 1040. The recording paper 1040 fixed here is sent to the paper discharge tray 1043 via the paper discharge roller 1042 and is sequentially stacked on the paper discharge tray 1043.

  The neutralization unit 1034 neutralizes the surface of the photosensitive drum 1030.

  The cleaning unit 1035 removes the toner remaining on the surface of the photosensitive drum 1030 (residual toner). The surface of the photosensitive drum 1030 from which the residual toner has been removed returns to the position facing the charging charger 1031 again.

  The printer control device 1060 has a front panel (not shown). The user can input image forming conditions via the front panel.

  Next, the configuration of the optical scanning device 1010 will be described.

  As shown in FIG. 2, the optical scanning device 1010 includes a light source 14, a coupling lens 15, an aperture plate 16, a cylindrical lens 17, a polygon mirror 13, an fθ lens 11a, a toroidal lens 11b, two light detection sensors (18a). 18b) includes two light detection mirrors (19a, 19b), a scanning control device 22 (not shown in FIG. 2, see FIG. 5), and the like. These are assembled at predetermined positions of the optical housing 21.

  In this specification, in the XYZ three-dimensional orthogonal coordinate system, the direction along the longitudinal direction of the photosensitive drum 1030 is described as the Y-axis direction, and the rotation axis direction of the polygon mirror 13 is described as the Z-axis direction. In the following, for convenience, the direction corresponding to the main scanning direction is abbreviated as “main scanning corresponding direction”, and the direction corresponding to the sub scanning direction is abbreviated as “sub scanning corresponding direction”.

  The light emission direction of the light source 14 is defined as the W direction, and the main scanning corresponding direction of the light source 14 is defined as the M direction. Note that the sub-scanning corresponding direction in the light source 14 is a direction parallel to the Z-axis direction.

  As shown in FIG. 3 as an example, the light source 14 includes a two-dimensional array 100 in which 16 light emitting units (ch1 to ch16) are two-dimensionally arranged and formed on one substrate.

  The light emitting units ch1, ch5, ch9, and ch13 are the first row light emitting units, the light emitting units ch2, ch6, ch10, and ch14 are the second row light emitting units, and the light emitting units ch3, ch7, ch11, and ch15 are the third row light emitting units. The parts ch4, ch8, ch12, and ch16 are also referred to as a fourth row light emitting part. Here, with respect to the main scanning corresponding direction, the intervals between the columns are equal, and as an example, 30 μm.

  Further, the two-dimensional array 100 is arranged such that the intervals between adjacent light emitting portions are equal when all the light emitting portions are orthogonally projected onto a virtual line extending in the sub-scanning corresponding direction. In the present specification, the “interval between the light emitting portions” refers to the distance between the centers of the two light emitting portions. Therefore, it is possible to scan the surface of the photosensitive drum 1030 with 16 light beams at the same time.

  Each light emitting unit is a vertical cavity surface emitting laser (VCSEL) having an oscillation wavelength of 780 nm band. That is, the two-dimensional array 100 is a so-called surface emitting laser array.

  Returning to FIG. 2, the coupling lens 15 converts the light beam emitted from the light source 14 into substantially parallel light.

  The aperture plate 16 has an aperture and defines the beam diameter of the light beam through the coupling lens 15.

  The cylindrical lens 17 forms an image of the light beam that has passed through the opening of the aperture plate 16 in the vicinity of the deflection reflection surface of the polygon mirror 13 in the Z-axis direction.

  The optical system arranged on the optical path between the light source 14 and the polygon mirror 13 is also called a pre-deflector optical system. In the present embodiment, the pre-deflector optical system includes a coupling lens 15, an aperture plate 16, and a cylindrical lens 17.

  The polygon mirror 13 has a four-sided mirror, and each mirror serves as a deflection reflection surface. The polygon mirror 13 rotates at a constant speed around an axis parallel to the Z-axis direction and deflects the light beam from the cylindrical lens 17.

  The fθ lens 11 a is disposed on the optical path of the light beam deflected by the polygon mirror 13.

  The toroidal lens 11b is disposed on the optical path of the light beam through the fθ lens 11a. Then, a light beam through the toroidal lens 11b is irradiated on the surface of the photosensitive drum 1030, and a light spot is formed. This light spot moves in the longitudinal direction of the photosensitive drum 1030 as the polygon mirror 13 rotates. That is, the surface of the photosensitive drum 1030 is scanned. The moving direction of the light spot at this time is the “main scanning direction”. The rotation direction of the photosensitive drum 1030 is the “sub-scanning direction”.

  The optical system arranged on the optical path between the polygon mirror 13 and the photosensitive drum 1030 is also called a scanning optical system. In the present embodiment, the scanning optical system includes an fθ lens 11a and a toroidal lens 11b. Note that at least one folding mirror may be disposed on at least one of the optical path between the fθ lens 11a and the toroidal lens 11b and the optical path between the toroidal lens 11b and the photosensitive drum 1030.

  When the 16 light emitting units (ch1 to ch16) are turned on at the same time, as shown in FIG. 4, the light spot sp1 by the light from the light emitting unit ch1, the light spot sp2 by the light from the light emitting unit ch2, and the light emitting unit ch3. ,..., And a light spot sp16 due to light from the light emitting portion ch16 is formed on the surface of the photosensitive drum 1030.

  In the following, for convenience, the light spots sp1, sp5, sp9, and sp13 are referred to as “first row spot”, the light spots sp2, sp6, sp10, and sp14 are referred to as “second row spot”, and the light spots sp3, sp7, sp11, and sp15 are referred to as “three spots”. The “column spot” and the light spots sp4, sp8, sp12, and sp16 are also referred to as “fourth column spot”.

  Returning to FIG. 2, a part of the light beam before the start of writing in one scan out of the light beam that is deflected by the polygon mirror 13 and passes through the scanning optical system enters the light detection sensor 18a via the light detection mirror 19a. To do. The light detection sensor 18a is “high level” when the amount of received light is below a predetermined level, and changes to “low level” when the amount of received light exceeds a predetermined level (hereinafter referred to as “tip synchronization detection signal”). Are generated and output to the scanning control device 22.

  Further, a part of the light beam after completion of writing in one scan out of the light beam that is deflected by the polygon mirror 13 and passes through the scanning optical system enters the light detection sensor 18b through the light detection mirror 19b. The light detection sensor 18b is “high level” when the amount of received light is below a predetermined level, and changes to “low level” when the amount of received light exceeds a predetermined level (hereinafter referred to as “rear end synchronization detection signal”). Is generated and output to the scanning control device 22.

  As shown in FIG. 5 as an example, the scanning control device 22 includes a high-frequency clock generation circuit 213, a phase data generation circuit 214, a pixel clock generation circuit 215, an image data generation circuit 216, a write control circuit 219, and a light source drive circuit 221. Etc. Note that the arrows in FIG. 5 indicate the flow of typical signals and information, and do not represent the entire connection relationship of each block.

The high frequency clock generation circuit 213 generates a plurality of high frequency clock signals having different phases. Here, as an example, as shown in FIG. 6, it is assumed that two high-frequency clock signals (VCLK ₁ , VCLK ₂ ) whose phases are different by 180 degrees are generated. Therefore, the time corresponding to the phase difference between the high frequency clock signal VCLK ₁ and the high frequency clock signal VCLK ₂ is ½ period of the high frequency clock signal. Each high-frequency clock signal generated here is supplied to the pixel clock generation circuit 215 and the write control circuit 219. When there is no need to distinguish between the two high-frequency clock signals, they are collectively referred to as a high-frequency clock signal VCLK. Hereinafter, for convenience, the time corresponding to the phase difference between the high frequency clock signal VCLK ₁ and the high frequency clock signal VCLK ₂ is also referred to as “phase difference corresponding time” for short.

  The phase data creation circuit 214 obtains the time required for one scan from the leading edge synchronization detection signal and the trailing edge synchronization detection signal, and the pixel that becomes the output reference of the pixel (dot) data so that the time becomes a desired time. Phase data that defines the transition timing (here, the rising timing) of the signal level in the clock signal PCLK is generated.

  Here, the phase data is 2-bit data. As shown in FIG. 7, when the phase data is “00”, the transition timing is the same as the reference transition timing, and the phase data is “01”. The transition timing means that the reference transition timing is delayed by 1/16 PCLK. When the phase data is “11”, the transition timing means that the reference transition timing is advanced by 1/16 PCLK. doing.

The pixel clock generation circuit 215 generates the pixel clock signal PCLK based on the phase data from the phase data generation circuit 214 and the high frequency clock signal VCLK ₁ from the high frequency clock generation circuit 213. Here, as an example, as shown in FIG. 8, when the phase data is “00”, the pixel clock signal PCLK is a clock signal corresponding to the frequency divided by 8 of the high-frequency clock signal VCLK ₁ .

  The pixel clock generation circuit 215 also generates a line clear signal LCLR as shown in FIG. 9 as an example. FIG. 9 is a timing chart when the phase data is “00”.

  The pixel clock signal PCLK and the line clear signal LCLR generated by the pixel clock generation circuit 215 are supplied to the image data creation circuit 216 and the write control circuit 219 in synchronization with the leading edge synchronization detection signal.

Specifically, as shown in FIG. 9, the rising timing of the high frequency clock signal VCLK ₁ immediately after the leading edge synchronization detection signal changes from “high level” to “low level” is used as a base point (first clock), and the high frequency The pixel clock signal PCLK corresponding to the phase data is output in synchronization with the rising timing of the 10th clock of the clock signal VCLK ₁ . Further, the line clear signal LCLR is changed from “low level” to “high level” at the first rising timing of the synchronized pixel clock signal PCLK, and the line clear signal LCLR is changed to “high” at the next rising timing of the pixel clock signal PCLK. “Level” is changed to “Low level”.

Returning to FIG. 5, the image data creation circuit 216 raster-develops image information received from the host device via the printer control device 1060, performs predetermined halftone processing, and the like, and then uses the pixel clock signal PCLK as a reference. Image data representing the gradation of each pixel is generated for each light emitting unit. Then, as shown in FIG. 10 as an example, the image data generation circuit 216 detects the change of the line clear signal LCLR from “low level” to “high level”, and synchronizes with the rising timing of the pixel clock signal PCLK. Thus, the image data (S216 _{1 to} S216 ₁₆ ) are output to the write control circuit 219 in order from the first pixel data (ID1). Here, it is assumed that one pixel data is 4-bit data. Further, the image data S216 ₁ is image data corresponding to the light emitting unit ch1, the image data S216 ₂ is image data corresponding to the light emitting unit ch2,..., And the image data S216 ₁₆ corresponds to the light emitting unit ch16. Image data.

  As shown in FIG. 11 as an example, the write control circuit 219 includes a conversion data creation circuit 219a, a PWM data creation circuit 219b, a synchronous lighting control circuit 219c, a two-point measurement circuit 219d, a correction data creation circuit 219e, and the like. doing.

  The two-point measuring circuit 219d has two counters (first counter and second counter), and measures the time interval between the leading edge synchronization detection signal rising timing and the trailing edge synchronization detection signal rising timing, The measurement data Dint is output to the correction data creation circuit 219e. The two-point measurement circuit 219d outputs a measurement end signal Dfin for notifying the end of measurement to the synchronous lighting control circuit 219c and the correction data creation circuit 219e.

  The operation of the two-point measuring circuit 219d will be described with reference to the timing charts of FIGS. FIG. 13 is a detailed timing chart near the timing when the rear end synchronization detection signal in FIG. 12 changes from “high level” to “low level”.

(1-1) When the line clear signal LCLR changes from “low level” to “high level”, the value of the first counter and the value of the second counter are set to “0” at the next rising timing of the pixel clock signal PCLK. Reset to. The value of the first counter is counted up in synchronization with the rising timing of the pixel clock signal PCLK. On the other hand, the value of the second counter is counted up in synchronization with the rising timing of the high frequency clock signal VCLK ₁ and the high frequency clock signal VCLK ₂ (see FIG. 13).

(1-2) When the rear end synchronization detection signal changes from “high level” to “low level”, the value of the first counter and the value of the second counter at that time are obtained. In FIG. 13, the value of the first counter is “X”, and the value of the second counter is “10”.

(1-3) The value of the first counter and the value of the second counter are output as measurement data Dint to the correction data creation circuit 219e. At the same time as the measurement data Dint is output, the measurement end signal Dfin is changed from “low level” to “high level”. In the following description, the contents of the measurement data Dint are expressed in the form of (the value of the first counter, the value of the second counter).

(1-4) In synchronization with the next rising timing of the pixel clock signal PCLK, the measurement end signal Dfin is changed from “high level” to “low level”.

  Returning to FIG. 11, the synchronous lighting control circuit 219 c is detected by a light emitting unit that emits light detected by the light detection sensor 18 a (hereinafter, also referred to as “tip synchronized light emitting unit” for convenience) and the light detection sensor 18 b. A light emitting unit that emits light (hereinafter, also referred to as “rear end synchronized light emitting unit” for convenience) is selected, and a plurality of synchronized lighting signals (ch1 synchronized lighting signal to ch16 synchronized) for lighting the selected light emitting unit are selected. Lighting signal). The plurality of synchronous lighting signals generated here are output to the PWM data generation circuit 219b. The ch1 synchronized lighting signal corresponds to the light emitting unit ch1, the ch2 synchronized lighting signal corresponds to the light emitting unit ch2, and the ch16 synchronized lighting signal corresponds to the light emitting unit ch16.

  Further, the synchronous lighting control circuit 219c notifies the correction data creation circuit 219e of the front end ch information Dfch for specifying the front end synchronized light emitting unit and the rear end ch information Dech for specifying the rear end synchronized light emitting unit.

  The operation of the synchronous lighting control circuit 219c will be described with reference to the timing chart of FIG. Here, as an example, both the front-end synchronized light emitting unit and the rear-end synchronized light emitting unit are assumed to be the light emitting unit ch1.

(2-1) When the line clear signal LCLR changes from “low level” to “high level”, the value of the internal counter is reset to “0” in synchronization with the next rising timing of the pixel clock signal PCLK. The counter value is counted up in synchronization with the rising timing of the pixel clock signal PCLK.

(2-2) When the value of the counter reaches a value (M) corresponding to a preset lighting timing for rear end synchronization detection, the ch1 synchronous lighting signal is changed from “low level” to “high level”. Change to As a result, the light emitting unit ch1 is turned on. At the same time, “1” is notified as the rear end channel information Dech. Note that the ch2 synchronized lighting signal to the ch16 synchronized lighting signal all remain at “low level”.

(2-3) When the measurement end signal Dfin from the two-point measuring circuit 219d changes from “low level” to “high level”, the ch1 synchronous lighting signal is set to “high level” at the next rising timing of the pixel clock signal PCLK. To "low level". Thereby, the light emitting unit ch1 is turned off.

(2-4) When the value of the counter reaches a value (N) corresponding to a preset lighting timing for tip synchronization detection, the ch1 synchronous lighting signal is changed from “low level” to “high level”. change. As a result, the light emitting unit ch1 is turned on. At the same time, “1” is notified as the tip ch information Dfch. Note that the ch2 synchronized lighting signal to the ch16 synchronized lighting signal all remain at “low level”.

(2-5) When the line clear signal LCLR changes from “low level” to “high level”, the counter value is reset to “0” in synchronization with the next rising timing of the pixel clock signal PCLK, and ch1 Change the synchronized lighting signal from “high level” to “low level”. Thereby, the light emitting unit ch1 is turned off.

  Note that the front-end synchronized light emitting section and the rear-end synchronized light emitting section may be different light emitting sections. For example, FIG. 15 shows a timing chart in the case where the light emitting unit ch1 is the front end synchronized light emitting unit and the light emitting unit ch2 is the rear end synchronized light emitting unit. In this case, in the above (2-2) and (2-3), the signal level of the ch2 synchronous lighting signal is changed instead of the ch1 synchronous lighting signal.

  Returning to FIG. 11, the correction data creation circuit 219e individually creates correction data for each light emitting unit based on the measurement data Dint, the measurement end signal Dfin, the leading end ch information Dfch, and the trailing end ch information Dech.

Here, as shown in FIG. 16, the correction data creation circuit 219e includes a measurement data determination circuit 219e ₁ , a memory 219e ₂ , and a correction data calculation circuit 219e ₃ .

When the measurement data discriminating circuit 219e ₁ detects the end of measurement from the measurement end signal Dfin, it is determined whether or not the light emitting unit specified from the front ch information Dfch and the light emitting unit specified from the rear ch information Dech are the same light emitting unit. Judging. If the light emitting unit specified from the front ch information Dfch and the light emitting unit specified from the rear ch information Dech are the same light emitting unit, the input measurement data Dint is stored in the memory 219e ₂ as “reference data”. . Note that the tip ch information Dfch at this time is also stored in the memory 219e ₂ as “reference light emitting unit data”. On the other hand, if the light emitting part specified from the front ch information Dfch and the light emitting part specified from the rear ch information Dech are different light emitting parts, the light emitting part specified from the front ch information Dfch and the memory 219e ₂ are held. It is determined whether or not the light emitting parts specified from the “reference light emitting part data” are the same light emitting part. If the light emitting unit specified from the tip ch information Dfch and the light emitting unit specified from the “reference light emitting unit data” are the same light emitting unit, the correction data calculation circuit 219e ₃ is instructed to calculate correction data. On the other hand, if the light emitting unit specified from the tip ch information Dfch and the light emitting unit specified from the “reference light emitting unit data” are different light emitting units, the measurement data determination circuit 219e ₁ does nothing.

The correction data calculation circuit 219e ₃ calculates the difference between the “reference data” held in the memory 219e ₂ and the measurement data Dint at that time from the rear end ch information Dech based on the instruction of the measurement data determination circuit 219e _1. The correction data Dmod in the specified light emitting unit is obtained. For example, if the reference data stored in the memory 219e ₂ is (X1, Y1) and the measurement data Dint at that time is (X2, Y2), the correction data Dmod is obtained from the following equation (1). . Note that “16” in equation (1) indicates that one period of the pixel clock signal (hereinafter also referred to as “one pixel clock”) is ½ period of the high-frequency clock signal (hereinafter “1/2 high-frequency clock”). This is because it corresponds to 16).

Dmod = (X1 × 16 + Y1) − (X2 × 16 + Y2) (1)

  Therefore, for example, when the correction data Dmod obtained from the above equation (1) is represented by an 11-bit binary number, the lower 4 bits (bit 3 to bit 0) are values in units of 1/2 high-frequency clock. The upper 7 bits (bit 10 to bit 4) are values in units of one pixel clock.

  A specific operation of the correction data generation circuit 219e will be described with reference to the timing chart of FIG. Here, the front end synchronized light emitting unit is the light emitting unit ch1 in any of the first to 16th scans, and the rear end synchronized light emitting unit is the light emitting unit ch1 for the first scan and the light emitting unit ch2 for the second scan. It is assumed that the third scan is the light emitting unit ch3,..., And the 16th scan is the light emitting unit ch16. Note that FIG. 17 shows up to the third scan due to space limitations.

(3-1) When the measurement end is detected from the measurement end signal Dfin in the first scan, the light emitting unit specified from the front end ch information Dfch is compared with the light emitting unit specified from the rear end ch information Dech. Here, since the light emitting part specified from the front ch information Dfch and the light emitting part specified from the rear ch information Dech are both light emitting parts ch1, input measurement data (here, (X1, Y1)) Are stored as “reference data”.

(3-2) In the second scan, when the measurement end is detected from the measurement end signal Dfin, the light emitting unit specified from the front end ch information Dfch is compared with the light emitting unit specified from the rear end ch information Dech. Here, since the light emitting unit specified from the front end ch information Dfch is the light emitting unit ch1, and the light emitting unit specified from the rear end ch information Dech is the light emitting unit ch2, “reference data” (X1, Y1) is input. The difference from the measured data (here, (X2, Y2)) is obtained and output as the correction data Dmod2 of the light emitting unit ch2.

(3-3) When the measurement end is detected from the measurement end signal Dfin in the third scan, the light emitting unit specified from the front end ch information Dfch and the light emitting unit specified from the rear end ch information Dech are compared. Here, since the light emitting unit specified from the front end ch information Dfch is the light emitting unit ch1, and the light emitting unit specified from the rear end ch information Dech is the light emitting unit ch3, “reference data” (X1, Y1) is input. The difference from the measured data (here, (X3, Y3)) is obtained and output as correction data Dmod3 of the light emitting unit ch3.

  Hereinafter, when the measurement end is detected from the measurement end signal Dfin in the 4th to 16th scans, similarly, correction data (Dmod4 to Dmod16) of the light emitting units ch4 to ch16 are output.

  The correction data is acquired before the actual writing, and the subsequent writing is performed using the correction data acquired there. In addition, correction data can be arbitrarily acquired.

Returning to FIG. 11, the conversion data generation circuit 219a generates selection data (Sa _{1 to} Sa ₁₆ ) based on the image data (S216 _{1 to} S216 ₁₆ ), the additional data signal, and the phase data from the image data generation circuit 216. To do. Further, the output timing of the selection data (Sa _{1 to} Sa ₁₆ ) is corrected based on the input correction data (Dmod _{1 to} Dmod ₁₆ ). As a result, the light spots (sp1 to sp16) at the start of writing by the respective light emitting units are aligned at the same position on the photosensitive drum 1030 in the main scanning direction as shown in FIG.

  The additional data signal is a signal corresponding to additional data designated by the user via the front panel, and is supplied from the printer control device 1060 to the conversion data creation circuit 219a. Here, the additional data is 1-bit data. When the designated additional data is “0”, the “low level” signal is supplied as the additional data signal, and when the designated additional data is “1”. , A “high level” signal is provided as an additional data signal.

As shown in FIG. 19, the conversion data creation circuit 219a includes a ch1 data creation / correction circuit 219a ₁ , a ch2 data creation / correction circuit 219a ₂ , a ch3 data creation / correction circuit 219a ₃ ,. - has a data creating and correcting circuit 219a ₁₆ for ch16.

ch1 data creating and correcting circuit 219a ₁ generates selection data Sa _1, data creating and correcting circuit 219a ₂ For ch2 generates selection data Sa _2, the data creating and correcting circuit 219a ₃ for ch3, selected It generates data Sa _3, · · · · ·, data creating and correcting circuit 219a ₁₆ for ch16 generates selection data _{Sa 16.}

  Each data creation / correction circuit has the same configuration.

  Here, as shown in FIG. 20, each data creation / correction circuit includes a delay circuit a2-1, an FF circuit a2-2, a first data conversion circuit a2-3, a second data conversion circuit a2-4, data It has a selection circuit a2-5.

  The delay circuit a2-1 delays the input image data by the value of the upper 7 bits (bit 10 to bit 4) of the input correction data in units of one pixel clock, and outputs the delayed image data A.

  The FF circuit a2-2 further delays the delayed image data A by one pixel clock and outputs it as delayed image data B.

  The first data conversion circuit a2-3 converts the input delayed image data A based on the conversion table shown in FIG.

  The second data conversion circuit a2-4 converts the input delayed image data B based on the conversion table shown in FIG.

  Here, one pixel data in the conversion data A and the conversion data B is 16-bit data, and is output to the data selection circuit a2-5 as parallel data.

  When the phase data is “00”, the data selection circuit a2-5 refers to the selection table shown in FIG. 22 and converts it according to the value of the lower 4 bits (bit3 to bit0) of the input correction data. A total of 16-bit data is selected from data A and converted data B. Then, the data selected from the conversion data A is the upper bit, the data selected from the conversion data B is the lower bit, 16 bits (bit 15 to bit 0), 0 is added to bit 16 (bit 16), and 17 Selection data of bits (bit 16 to bit 0) is generated.

  For example, if the lower 4 bits of the correction data are “0000”, bits 15 to 0 of the conversion data A are selected. If the lower 4 bits of the correction data are “0001”, bits 14 to of the conversion data A are selected. Bit 0 and bit 15 of conversion data B are selected. If the lower 4 bits of the correction data are “0010”, bits 13 to 0 of the conversion data A and bits 15 and 14 of the conversion data B are selected, and the lower 4 bits of the correction data are “0011”. If there is, bits 12 to 0 of conversion data A and bits 15 to 13 of conversion data B are selected.

  When the phase data is “01”, the data selection circuit a2-5 refers to the selection table shown in FIG. 23 and converts it according to the value of the lower 4 bits (bit3 to bit0) of the input correction data. A total of 16-bit data is selected from data A and converted data B. Then, the data selected from the conversion data A is the upper bit, the data selected from the conversion data B is the lower bit, and additional data obtained from the additional data signal is inserted between them, and 17 bits (bit 16 to bit 0). ) Selection data is generated.

  For example, if the lower 4 bits of the correction data are “0000”, bits 15 to 0 of the conversion data A are selected. If the lower 4 bits of the correction data are “0001”, bits 14 to of the conversion data A are selected. Bit 0 and bit 15 of conversion data B are selected. If the lower 4 bits of the correction data are “0010”, bits 13 to 0 of the conversion data A and bits 15 and 14 of the conversion data B are selected, and the lower 4 bits of the correction data are “0011”. If there is, bits 12 to 0 of conversion data A and bits 15 to 13 of conversion data B are selected.

  When the phase data is “11”, the data selection circuit a2-5 refers to the selection table shown in FIG. 24 and converts it according to the value of the lower 4 bits (bit3 to bit0) of the input correction data. A total of 15-bit data is selected from data A and converted data B. Then, the data selected from the conversion data A is the upper bit, the data selected from the conversion data B is the lower bit, 15 bits (bit 14 to bit 0), and bits 15 (bit 15) and bit 16 (bit 16) are set to 0. Is added to generate selection data [16: 0] of 17 bits (bit 16 to bit 0).

  The operation of each data creation / correction circuit will be described with reference to FIGS. Here, as an example, the correction data is assumed to be “0000101101100” in binary. That is, the upper 7 bits of the correction data are “6” in decimal, and the lower 4 bits are “1100” in binary.

  When the image data is input, since the upper 7 bits of the correction data are “6”, the delayed image data A is data delayed by “6” pixel clocks with respect to the image data. For example, the image data (IDn) input at the timing of T1 becomes the data of the delayed image data A at the timing of T2, which is the “T1 + 6” pixel clock. Further, the delayed image data B is data obtained by delaying the delayed image data A by “1” pixel clock, and therefore, the image data immediately before the image data IDn (IDn−1) is delayed at the timing T2. It becomes the data of the image data B.

  At the timing of T3 which is the “T2 + 1” pixel clock, the conversion data A is data (MDn) obtained by converting the image data IDn, and the conversion data B is data (MDn) obtained by converting the image data IDn−1. −1).

  At this time, as shown in FIG. 25, if the phase data is “00”, the lower 4 bits of the correction data are “1100” in binary, so the data selection circuit a2-5 receives the conversion data A Bits 3 to 0 and bits 15 to 4 of the conversion data B are selected. Then, {0, MDn [3: 0], MDn-1 [15: 4]} is output as selection data [16: 0].

  At this time, as shown in FIG. 26, if the phase data is “01”, the lower 4 bits of the correction data are “1100” in binary, so the data selection circuit a2-5 converts the conversion data Bits 3 to 0 of A and bits 15 to 4 of conversion data B are selected. Then, {MDn [3: 0], additional data, MDn-1 [15: 4]} is output as selection data [16: 0].

  Furthermore, at this time, as shown in FIG. 27, if the phase data is “11”, the lower 4 bits of the correction data are “1100” in binary, so the data selection circuit a2-5 converts the conversion data Bits 3 to 1 of A and bits 15 to 4 of conversion data B are selected. Then, {0, 0, MDn [3: 1], MDn-1 [15: 4]} is output as selection data [16: 0]. That is, bit 0 of the conversion data A is deleted.

  In the present embodiment, since the light emission timing of the light emitting unit ch1 is used as a reference, the correction data Dmod1 of the light emitting unit ch1 is “00000000000000”.

Returning to FIG. 11, the PWM data creation circuit 219b converts the selection data (Sa _{1 to} Sa ₁₆ ) from the conversion data creation circuit 219a into serial PWM data (Sb _{1 to} Sb ₁₆ ).

As shown in FIG. 28, the PWM data creation circuit 219b is a ch1 data creation circuit 219b ₁ that converts the selection data Sa ₁ into PWM data Sb ₁ and a ch2 that converts the selection data Sa ₂ into PWM data Sb ₂ . data creating circuit 219b _2, selected data Sa ₃ the PWM data Sb ₃ data generating circuit for ch3 converted to 219b _3, · · · · ·, data creating circuit 219b for ch16 to convert the selected data _{Sa 16} to the PWM data _{Sb 16 16} . Each data creation circuit has the same configuration.

  The operation of each data creation circuit will be described.

If the phase data is “00”, as shown in FIG. 29 and FIG. 30 as an example, among the 17-bit selection data, 16 bits from bit 15 to bit 0 are used as modulation data, and the high-frequency clock signal VCLK ₁ and The rising timing of the high frequency clock signal VCLK ₂ , that is, one bit is output from the lower side for every 1/2 high frequency clock.

  29 shows a case where bit 15 to bit 0 in the selection data are composed of bit 15 to bit 0 of the conversion data A, and FIG. 30 shows that bit 15 to bit 0 in the selection data are bits of the conversion data A. A case is shown in which 3 to bit 0 and bit 15 to bit 4 of conversion data B are included. In FIG. 30, the timing at which MDn [0] is output is delayed by 12 by 1/2 high frequency clock unit as compared with FIG. In this way, it is possible to delay the writing start timing of each light emitting unit with an accuracy of 1/2 high frequency clock.

If the phase data is “01”, as shown in FIG. 31 as an example, the rising timing of the high-frequency clock signal VCLK ₁ and the high-frequency clock signal VCLK ₂ , that is, 1/2, One bit is output from the lower side for each high-frequency clock.

If the phase data is “11”, as shown in FIG. 32 as an example, among the 17-bit selection data, 15 bits from bit 14 to bit 0 are the modulation data, and the high-frequency clock signal VCLK ₁ and the high-frequency clock signal The rising timing of VCLK ₂ , that is, one bit is output from the lower side for every 1/2 high frequency clock.

  In each data generation circuit, when the input synchronous lighting signal is “high level”, the PWM data is forcibly set to “high level”.

Returning to FIG. 11, the light source driving circuit 221 has a plurality of driving units (ch1 driving unit to ch16 driving unit) corresponding to the plurality of light emitting units (ch1 to ch16). The corresponding PWM data from the PWM data creation circuit 219b is input to each drive unit. The output signal of each driving unit is supplied to the corresponding light emitting unit. That is, the light emitting unit ch1 is driven by the ch1 drive unit based on the PWM data Sb _1, the light emitting unit ch2 is driven by the ch2 driver based on the PWM data Sb _2, · · · · · ·, the light emitting unit ch16 is PWM It is driven by ch16 drive unit based on the data _{Sb 16.}

  As is clear from the above description, in the optical scanning device 1010 according to the present embodiment, the light source driving device is configured by the scanning control device 22.

As described above, according to the scanning control device 22 according to the present embodiment, the high-frequency clock generation circuit 213 that generates _two high-frequency clock signals (VCLK ₁ and VCLK ₂ ) having different phases from each other, and the high-frequency clock generation circuit 213 The pixel clock generation circuit 215 that generates the pixel clock signal PCLK based on the high-frequency clock signal and the phase data, and a plurality of image data (writing data) corresponding to the plurality of light emitting units according to the image information A plurality of modulation data corresponding to a plurality of light emitting units is generated from a plurality of writing data and phase data with the image data generation circuit 216, and the output timing of the plurality of modulation data is set in units of “phase difference corresponding time”. Based on the write control circuit 219 to be individually adjusted and a plurality of PWM data output from the write control circuit 219 And a light source driving circuit 221 for driving a plurality of light emitting units. Therefore, it is possible to control the lighting timing of the plurality of light emitting units in real time with higher accuracy than in the past.

  Further, according to the optical scanning device 1010 according to the present embodiment, since the scanning control device 22 is included, high-density optical scanning can be performed with high accuracy.

  Further, even if the optical characteristics of the optical components change due to temperature changes or changes over time, or the positional relationship between the optical components changes, the scanning control device 22 obtains appropriate correction data according to the changes in almost real time. Therefore, it is possible to stably align the writing positions on a plurality of scanning lines.

  In addition, the laser printer 1000 according to the present embodiment includes the optical scanning device 1010 that can accurately perform high-density optical scanning, and as a result, a high-quality image can be formed at high speed. It becomes.

  In the above-described embodiment, the case where the additional data is designated by the user has been described. However, the present invention is not limited to this, and when the additional data is not designated by the user, the data selection circuit a2-5 performs conversion data data. Data generated according to the pattern may be used as additional data. For example, the data selection circuit a2-5 adds “0” and “1” which has less influence on the ratio between the number of “0” and the number of “1” when the additional data is excluded from the selection data. It is good as data.

  In the above embodiment, when the phase data is “01”, the data selection circuit a2-5 sets the data selected from the conversion data A as the upper bits and the data selected from the conversion data B as the lower bits. In the above description, additional data is inserted to generate selection data of 17 bits (bit 16 to bit 0). However, the present invention is not limited to this, and additional data is inserted into the most significant bit as shown in FIG. You may do it. Also in this case, as described above, data generated according to the data pattern of the conversion data may be added data. As a result, the additional data always becomes the bit 16 of the selection data, so that the circuit for inserting the additional data has a simple configuration.

  In the above-described embodiment, the case where two high-frequency clock signals having phases different from each other by 180 degrees are used as the plurality of high-frequency clock signals has been described. However, the present invention is not limited to this. For example, by using a plurality of high-frequency clock signals having a smaller phase difference, it is possible to align the writing positions on the plurality of scanning lines with finer time accuracy.

  Moreover, although the said embodiment demonstrated the case where one measurement data was calculated | required by one scan, it is not limited to this. For example, three measurement data may be obtained in one scan.

  In the above embodiment, the case where the writing position by the light emitting unit ch1 is used as a reference has been described, but the present invention is not limited to this.

  Further, in the above embodiment, when there is almost no difference in the writing position of the light emitting units (for example, the light emitting units ch1, ch5, ch9, ch13) in the same row, instead of the tip ch information Dfch, Tip row information that can identify the row may be used. Similarly, instead of the rear end ch information Dech, rear end column information that can specify a column may be used. In this case, correction data is created for each column.

  Moreover, although the said embodiment demonstrated the case where the 1st row light emission part, the 2nd row light emission part, the 3rd row light emission part, and the 4th row light emission part were equidistant about M direction, it is limited to this. is not.

  In the above embodiment, the case where the transition timing is delayed by 1/16 PCLK by the phase data or advanced by 1/16 PCLK has been described, but the present invention is not limited to this. For example, it may be delayed by 2/16 PCLK. In this case, the additional data is 2-bit data. For example, it may be advanced by 2/16 PCLK. In this case, the modulation data is deleted by 2 bits from the selection data.

  Moreover, although the said embodiment demonstrated the case where the two-dimensional array 100 had 16 light emission parts, it is not limited to this.

  In the above embodiment, the case of the laser printer 1000 as the image forming apparatus has been described. However, the present invention is not limited to this. In short, an image forming apparatus including the optical scanning device 1010 can form a high-quality image at high speed as a result.

  For example, an image forming apparatus that directly irradiates laser light onto a medium (for example, paper) that develops color with laser light may be used.

  Further, an image forming apparatus using a silver salt film as the image carrier may be used. In this case, a latent image is formed on the silver salt film by optical scanning, and this latent image can be visualized by a process equivalent to a developing process in a normal silver salt photographic process. Then, it can be transferred to photographic paper by a process equivalent to a printing process in a normal silver salt photographic process. Such an image forming apparatus can be implemented as an optical plate making apparatus or an optical drawing apparatus that draws a CT scan image or the like.

  As an example, as shown in FIG. 34, a color printer 2000 including a plurality of photosensitive drums may be used.

  The color printer 2000 is a tandem multicolor printer that forms a full-color image by superimposing four colors (black, cyan, magenta, and yellow). The black “photosensitive drum K1, charging device K2, "Developing device K4, cleaning unit K5, and transfer device K6", cyan "photosensitive drum C1, charging device C2, developing device C4, cleaning unit C5, and transfer device C6", and magenta "photosensitive drum" M1, charging device M2, developing device M4, cleaning unit M5, and transfer device M6 ”,“ photosensitive drum Y1, charging device Y2, developing device Y4, cleaning unit Y5, and transfer device Y6 ”for yellow, and light A scanning device 2010, a transfer belt 2080, a fixing unit 2030, and the like are provided.

  Each photoconductor drum rotates in the direction of the arrow in FIG. 34, and a charging device, a developing device, a transfer device, and a cleaning unit are arranged around each photoconductor drum along the rotation direction. Each charging device uniformly charges the surface of the corresponding photosensitive drum. The surface of each photoconductive drum charged by the charging device is irradiated with light by the optical scanning device 2010, and an electrostatic latent image is formed on each photoconductive drum. Then, a toner image is formed on the surface of each photosensitive drum by a corresponding developing device. Further, the toner image of each color is transferred onto the recording paper by the corresponding transfer device, and finally the image is fixed on the recording paper by the fixing unit 2030.

  The optical scanning device 2010 has a light source similar to the light source 14 and a scanning control device similar to the scanning control device 22 for each color. Accordingly, the optical scanning device 2010 can have the same effect as the optical scanning device 1010. The color printer 2000 can have the same effect as the laser printer 1000.

  In this color printer 2000, instead of the optical scanning device 2010, an optical scanning device similar to the optical scanning device 1010 may be used for each color.

  As described above, the light source driving device of the present invention is suitable for controlling the light emission timings of a plurality of light emitting units in real time with high accuracy. The optical scanning device of the present invention is suitable for performing high-density optical scanning with high accuracy. The image forming apparatus of the present invention is suitable for forming a high quality image at high speed.

  11a ... fθ lens (part of optical system), 11b ... toroidal lens (part of optical system), 13 ... polygon mirror (part of optical system), 14 ... light source, 15 ... coupling lens (one part of optical system) Part), 17 ... cylindrical lens (part of optical system), 22 ... scanning control device (light source driving device), 100 ... two-dimensional array (surface emitting laser array), 213 ... high frequency clock generation circuit, 215 ... pixel clock generation Circuit 216 image data creation circuit (write data creation circuit) 219 write control circuit (modulation data control circuit) 221 light source drive circuit (drive circuit) 1000 laser printer (image forming apparatus) DESCRIPTION OF SYMBOLS 1010 ... Optical scanning apparatus, 1030 ... Photosensitive drum (image carrier), 2000 ... Color printer (image forming apparatus), 2010 ... Optical scanning apparatus, ch1-ch16 Emitting portion, K1, C1, M1, Y1 ... photosensitive drum (image bearing member).

JP 2003-276234 A

Claims (9)

Used in an optical scanning device having a plurality of light emitting units arranged at least in different positions corresponding to the main scanning direction and writing image information on a surface to be scanned with a plurality of light beams from the plurality of light emitting units. A light source driving device,
A high-frequency clock generation circuit that generates a plurality of high-frequency clock signals having different phases from each other;
A phase data creating circuit that creates phase data that defines the transition timing of the signal level of the pixel clock signal so that the time required for one scan by the optical scanning device is a desired time;
On the basis of the phase data from the high-frequency clock signal and the phase data generating circuit from the high-frequency clock generating circuit, and the pixel clock generating circuit for generating the picture element clock signal;
A writing data creation circuit for creating a plurality of writing data corresponding to the plurality of light emitting units according to the image information;
Corresponding to said plurality of light emitting portions, a plurality of correction data for correcting the amount of deviation of the writing start timing to the plurality of the by the light beam scanned surface in units of time corresponding to the phase difference of the plurality of high-frequency clock signal together acquire the plurality of the writing data, from said phase data and said plurality of correction data, modulated data to create a plurality of modulation data corresponding to the plurality of light emitting portions to sequentially output the plurality of modulated data A control circuit;
A drive circuit for driving the onset light portion corresponding on the basis of the modulated data output from the modulation data control circuit; equipped with,
When outputting the modulation data, the modulation data control circuit outputs a part of a plurality of data constituting the modulation data at the timing of the previous pixel clock signal among the two pixel clock signals that are in succession. A light source driving device including outputting a remaining portion of the plurality of data at a timing of a later pixel clock signal . The modulation data control circuit, when the phase data is data that advances the transition timing of the signal level more than the reference timing,
The amount of data corresponding to the advance amount of the transition timing when the time corresponding to the phase difference of the plurality of high-frequency clock signals is used as the unit for the converted data of the predetermined data length obtained by converting the write data The light source driving apparatus according to claim 1, wherein modulation data is created by deleting the data. The modulation data control circuit, when the phase data is data that delays the transition timing of the signal level from the reference timing,
The amount of data corresponding to the amount of delay of the transition timing when the time corresponding to the phase difference of the plurality of high-frequency clock signals is used as the unit for the converted data of the predetermined data length converted from the write data The light source driving apparatus according to claim 1, wherein modulation data is created by adding   The light source driving device according to claim 3, wherein the amount of data corresponding to the delay amount of the transition timing is added at the end of the conversion data.   5. The light source driving device according to claim 3, wherein the amount of data corresponding to the delay amount of the transition timing is data corresponding to a data pattern of the conversion data. An optical scanning device that scans a scanned surface in a main scanning direction along a plurality of scanning lines with a plurality of light beams,
A light source having a plurality of light emitting portions arranged at least in positions corresponding to the direction corresponding to the direction of the scanning line;
The light source driving device according to any one of claims 1 to 5, which drives the light source;
An optical system for condensing a plurality of light beams from the light source on the surface to be scanned and moving a plurality of light spots on the surface to be scanned in the main scanning direction along the plurality of scanning lines. Optical scanning device.   The optical scanning device according to claim 6, wherein the light source includes a surface emitting laser array. At least one image carrier;
An image forming apparatus comprising: at least one optical scanning device according to claim 6 or 7 that scans the light beam modulated according to image information with respect to the at least one image carrier. The image forming apparatus according to claim 8, wherein the image information is multicolor color image information.

Images