JP5875422B2 - Image processing apparatus and image processing apparatus control method - Google Patents

Description

  The present invention relates to an image processing apparatus and a control method for the image processing apparatus.

  2. Description of the Related Art Conventionally, there is an image processing apparatus that performs IP conversion processing for converting interlaced image data into progressive image data. In such an image processing apparatus, interlaced image data is input in a first cycle, and IP conversion processing is performed in a second cycle. The first period is, for example, the period of the vertical synchronization signal (input Vsync) of the input interlaced image data. The second period is, for example, the period of the vertical synchronization signal (output Vsync) of the progressive image data to be displayed.

The image processing apparatus includes a frame memory between an IP conversion processing unit that performs IP conversion processing and a scaling processing unit that performs scaling processing on progressive image data output from the IP conversion processing unit. There are things that are not and those that are not. The scaling process is a process of enlarging or reducing the progressive image data output from the IP conversion processing unit at a set magnification.
FIG. 2A is a diagram illustrating a configuration of a conventional image processing apparatus in which a frame memory is provided between the IP conversion processing unit and the scaling processing unit. In the case of such a configuration, the IP conversion processing unit reads interlaced image data from the previous frame memory 201 and performs IP conversion processing. Then, the IP conversion processing unit writes the result of the IP conversion processing (progressive image data) in the subsequent frame memory 202. The scaling processing unit reads progressive image data from the frame memory 202 and performs scaling processing.
FIG. 2B is a diagram illustrating a configuration of a conventional image processing apparatus in which no frame memory is provided between the IP conversion processing unit and the scaling processing unit. In the case of such a configuration, the IP conversion processing unit reads interlaced image data from the frame memory 203 and performs IP conversion processing. Then, the IP conversion processing unit outputs the data (line data) of the progressive image data line (the line necessary for the scaling processing) to the scaling processing unit at the progressive timing. The progressive timing is a timing synchronized with the horizontal synchronizing signal of the progressive image data after the scaling process. The scaling processing unit generates progressive image data for one line after the scaling processing using the input line data.
In the configuration of FIG. 2B, the number of frame memories can be reduced compared to the configuration of FIG. 2A, and the manufacturing cost can be reduced.

Here, the input Vsync and the output Vsync may be different (for example, when there is a difference in clock frequency between the interlaced image data input device side and the progressive image data output device side). For example, when the input video is written in the frame memory in synchronization with the input Vsync and read out in synchronization with the internally generated output Vsync, the input Vsync and the output Vsync are different.
When the frame synchronization control is performed to absorb the phase difference between the input Vsync and the output Vsync when the input Vsync and the output Vsync are different, “field skip” and “field repeat” are generated. “Field skip” skips a certain field and sets interlaced image data of the next field as a processing target (IP conversion processing target) of the IP conversion processing. “Field repeat” is to subject interlaced image data in the same field twice as an IP conversion processing target. Hereinafter, “field skip” and “field repeat” are referred to as “overtaking”.

In the IP conversion processing unit, for example, interlaced image data is converted into progressive image data by generating interpolation pixels (pixels that do not exist in the interlaced image data). The process for generating the interpolation pixel includes an intra-field interpolation process and an inter-field interpolation process.
FIG. 3A is a diagram illustrating an example of intra-field interpolation processing. FIG. 3B is a diagram illustrating an example of inter-field interpolation processing.
In the intra-field interpolation process, an interpolated pixel is generated using a pixel of interlaced image data that is the current IP conversion process target. For example, as illustrated in FIG. 3A, an interpolation pixel is generated using pixels adjacent above and below the interpolation pixel generation position.
In inter-field interpolation processing, interpolated pixels are generated using pixels of interlaced image data in a field different from the current data. For example, as shown in FIG. 3B, the interpolated pixel is the pixel of the interlaced image data (previous data) that was the previous processing target, and the pixel at the same position as the interpolation pixel generation position is used. Generated.

When the “overtaking” described above occurs, the inter-field interpolation processing described above may not be performed, or the image may deteriorate when the above-described inter-field interpolation processing is performed.
A conventional inter-field interpolation process when “overtaking” occurs will be described with reference to FIG. 4. The interlaced image data in the odd field is composed of only odd-numbered lines. The interlaced image data in the even field is composed of only even lines.
When “overtaking” occurs, as shown in FIG. 4, in the IP conversion process, both the current data and the previous data become odd fields, or both of them become even fields. In this case, since there is no pixel at the same position as the interpolation pixel generation position in the previous data, inter-field interpolation processing as shown in FIG. 3B cannot be performed. Alternatively, a pixel at a position different from the generation position of the interpolation pixel is erroneously used, and an interpolation pixel is generated. Such erroneous use of pixels leads to degradation of the display image.

  Conventionally, when "overtaking" occurs, a technique has been proposed in which an intermediate image of the same size as progressive image data is created from each of interlaced image data of two frames for a certain frame period, and the two created intermediate images are alpha blended (Patent Document 1).

JP 2008-236006 A

  However, in the above-described conventional technology, an image that is α-blended over a plurality of frames is displayed, so that an image having a sense of incongruity on the interpolation line (interpolation pixel line) is displayed for a long time.

  An object of the present invention is to provide a technique capable of appropriately performing inter-field interpolation processing even when “overtaking” occurs.

The image processing apparatus of the present invention
Even field interlaced image data and odd field interlaced image data are alternately input in a first period, and the interlaced image data input in a second period different from the first period is a progressive image by interpolation. An image processing apparatus that performs IP conversion processing for converting data,
Determination to determine interlaced image data to be processed by the IP conversion process so that a difference between a timing at which the interlaced image data is input and a timing at which the IP conversion process is performed on the interlaced image data is equal to or less than a predetermined value. Means,
Current data that is the current interlaced image data to be processed, previous data that is the interlaced image data that was processed immediately before the current data, and the interlace that is processed after the current data Conversion means for performing inter-field interpolation processing using one of the subsequent data that is image data, and converting the current data into progressive image data;
Have
The converting means, when both the current data and the one of the previous data and the subsequent data are even fields or odd fields, the current data, the previous data, and the subsequent data. Inter-field interpolation processing is performed using the other data of the data.

The control method of the image processing apparatus of the present invention includes:
Even field interlaced image data and odd field interlaced image data are alternately input in a first period, and the interlaced image data input in a second period different from the first period is a progressive image by interpolation. A method for controlling an image processing apparatus that performs IP conversion processing for converting data,
Determination to determine interlaced image data to be processed by the IP conversion process so that a difference between a timing at which the interlaced image data is input and a timing at which the IP conversion process is performed on the interlaced image data is equal to or less than a predetermined value. Steps,
Current data that is the current interlaced image data to be processed, previous data that is the interlaced image data that was processed immediately before the current data, and the interlace that is processed after the current data A conversion step of performing inter-field interpolation using one of the subsequent data that is image data, and converting the current data into progressive image data;
Have
In the converting step, when both the current data and the one of the previous data and the subsequent data are even fields or odd fields, the current data, the previous data, and the subsequent data Inter-field interpolation processing is performed using the other data of the data.

  According to the present invention, inter-field interpolation processing can be appropriately performed even when “overtaking” occurs.

Example of functional configuration of image processing apparatus according to embodiment 1 Example of configuration of conventional image processing apparatus An example of intra-field interpolation processing and inter-field interpolation processing Example of conventional inter-field interpolation processing when "overtaking" occurs Example of inter-field interpolation processing according to Embodiment 1 Example of processing flow of inter-field interpolation processing unit according to embodiment 1 Example of timing at which “overtaking” according to the first embodiment is detected Example of processing flow of overtaking detection unit according to embodiment 1 An example of inter-field interpolation processing Example of conventional inter-field interpolation processing when "overtaking" occurs An example of inter-field interpolation processing according to the second embodiment Example of process flow of inter-field interpolation processing unit according to embodiment 2 Example of timing at which “overtaking” according to the second embodiment is detected Example of processing flow of overtaking detection unit according to embodiment 2

<Example 1>
Hereinafter, an image processing apparatus and a control method thereof according to the present embodiment will be described. In the image processing apparatus according to the present embodiment, even-field interlaced image data and odd-field interlaced image data are alternately input in the first cycle. The image processing apparatus according to the present embodiment converts the input interlaced image data into progressive image data by interpolation in a second period different from the first period.
The interlaced image data in the even field is composed of only even lines. The interlaced image data in the odd field is composed of only odd-numbered lines. The first period is, for example, the period of the vertical synchronization signal of the input interlaced image data. The second cycle is, for example, the cycle of the vertical synchronization signal of the progressive image data to be displayed (in this embodiment, progressive image data subjected to scaling processing such as enlargement processing and reduction processing).

(Constitution)
FIG. 1 is a block diagram illustrating an example of a functional configuration of the image processing apparatus according to the present embodiment.
The frame memory 101 is a storage device that stores interlaced image data of a plurality of fields.
Of the input interlaced image data, the input image processing unit 102 writes interlaced image data to be subjected to IP conversion processing (IP conversion processing target) to the frame memory 101. The input image processing unit 102 may perform predetermined image processing on the input interlaced image data and write the input interlaced image data in the frame memory 101 or may write the input interlaced image data into the frame memory 101 as it is.

  The IP conversion processing unit 112 converts the interlaced image data into progressive image data and outputs it in the second cycle. Specifically, the IP conversion processing unit 112, in the second cycle, out of the interlaced image data written in the frame memory 101, the current field, the field immediately before the current field, and the current field Read interlaced image data of three fields of the previous field. Then, the IP conversion processing unit 112 converts the interlaced image data immediately before the current field into progressive image data and outputs it. The interlaced image data in the current field is, for example, interlaced image data written last in the interlaced image data written in the frame memory 101. As described above, the interlaced image data written in the frame memory 101 is interlaced image data to be subjected to IP conversion processing. For this reason, in this embodiment, the current interlace image data (current data) subject to the IP conversion process, the interlace image data (previous data) that is subject to the IP conversion process immediately before the current data, and the one after the current data. Interlaced image data (post data) to be subjected to IP conversion processing is read out. Then, the current data is converted into progressive image data and output.

The scaling processing unit 111 performs scaling processing on the progressive image data output from the IP conversion processing unit 112. The scaling process is, for example, an enlargement process for enlarging image data at a set enlargement ratio, or a reduction process for reducing image data at a set reduction ratio.
As shown in FIG. 1, in this embodiment, a storage such as a frame memory that temporarily stores progressive image data output from the IP conversion processing unit 112 is provided between the IP conversion processing unit 112 and the scaling processing unit 111. No device is provided.

  The output synchronization signal generation unit 110 generates a signal (output synchronization signal) having a cycle (second cycle) in which the IP conversion processing unit 112 performs IP conversion processing. In this embodiment, the output synchronization signal generation unit 110 generates a signal synchronized with the vertical synchronization signal of the progressive image data (progressive image data subjected to the scaling process) generated by the scaling processing unit 111.

The control unit 103 converts the input interlaced image data vertical synchronization signal (first period vertical synchronization signal) and the output synchronization signal generation unit 110 to generate the output synchronization signal (second period signal). Based on this, interlaced image data to be converted into IP is determined. Specifically, the control unit 103 interlaces the IP conversion process target so that the difference between the timing at which the interlaced image data is input and the timing at which the IP conversion process is performed on the interlaced image data is equal to or less than a predetermined value. Determine the image data. Then, the control unit 103 controls the input image processing unit 102 so that the interlaced image data targeted for IP conversion processing is written in the frame memory 101 in the second cycle among the input interlaced image data. The predetermined value is, for example, the time (first period) from when interlaced image data is input until the next interlaced image data is input.
In addition, the control unit 103 performs IP conversion processing in synchronization with the output synchronization signal generated by the output synchronization signal generation unit 110 (that is, IP conversion processing is performed in the second period). The conversion processing unit 112 is controlled.

  The IP conversion processing unit 112 includes a motion detection unit 104, an intra-field interpolation processing unit 105, an inter-field interpolation processing unit 106, an overtaking detection unit 107, an interpolation line image generation unit 108, an output unit 109, and the like.

  The motion detector 104 detects the motion of the image between fields. Specifically, the motion detection unit 104 detects motion using interlaced image data for three fields of current data, previous data, and subsequent data read from the frame memory 101. Then, the motion information representing the motion detection result is output to the interpolation line image generation unit 108. The motion detection method is not particularly limited. For example, a block matching method may be used, or a method for determining a motion from a difference in pixel values between fields may be used. The motion may be detected in any unit such as one pixel unit, a plurality of pixel units, and an image unit.

  The intra-field interpolation processing unit 105 performs intra-field interpolation processing using the current data. The intra-field interpolation process is a process for generating an interpolation pixel of the current data (a pixel that does not exist in the current data) using the pixel of the current data. The intra-field interpolation processing unit 105 outputs image data (intra-field interpolation image data) composed of interpolation pixels generated by the intra-field interpolation processing to the interpolation line image generation unit 108.

The inter-field interpolation processing unit 106 performs inter-field interpolation processing based on the detection result of the overtaking detection unit 107 described later.
Specifically, the inter-field interpolation processing unit 106 uses the current data and one of the previous data and the subsequent data in the normal time (when “overtaking” has not occurred). Perform interpolation processing. The inter-field interpolation processing unit 106 performs inter-field interpolation processing using the current data and the other data of the previous data and the subsequent data when “passing” occurs.
In the present embodiment, the inter-field interpolation processing unit 106 performs inter-field interpolation processing using the current data and the previous data at the normal time. The inter-field interpolation processing unit 106 performs inter-field interpolation processing using the current data and the subsequent data when “overtaking” occurs.
Then, the inter-field interpolation processing unit 106 outputs the image data (inter-field interpolation image data) including the interpolation pixels generated by the inter-field interpolation processing to the interpolation line image generation unit 108.
Inter-field interpolation processing is processing for generating interpolated pixels of current data using pixels of interlaced image data in a field different from the current data. “Overtaking” is a “field skip” or “field repeat” that occurs when control is performed so that the difference between the timing at which interlaced image data is input and the timing at which IP conversion processing is performed on the interlaced image data is equal to or less than a predetermined value It is. “Field skip” skips a certain field and sets interlaced image data of the next field as a processing target (IP conversion processing target) of the IP conversion processing. “Field repeat” is to subject interlaced image data in the same field twice as an IP conversion processing target.

  The overtaking detection unit 107 detects “overtaking” using field information (information indicating whether the interlaced image data is an even field or an odd field). Specifically, the overtaking detection unit 107 determines that “overtaking” has occurred when both the current data and the previous data are even fields or odd fields. Then, the overtaking detection unit 107 outputs the detection result to the inter-field interpolation processing unit 106. The field information is information representing at least a field of current data and a field of previous data. For example, the field information is information representing only the current data field and the previous data field. The field information may be information representing three fields of current data, previous data, and subsequent data, or information representing all interlaced image data fields stored in the frame memory 101. May be. The field information may be added to the interlaced image data as metadata, or may be generated by a functional unit such as an input image processing unit.

  The interpolation line image generation unit 108 synthesizes (blends) the intra-field interpolation image data and the inter-field interpolation image data for each interpolation pixel based on the motion information output from the motion detection unit 104 and includes interpolation pixels. Interpolated line image data is generated. The intra-field interpolation process is suitable when the image motion is large, and the inter-field interpolation process is suitable when the image motion is small. Therefore, in this embodiment, when the motion of the image is large, the inter-field interpolation image (inter-field interpolation processing) is set so that the weight of the intra-field interpolation image (the processing result of the intra-field interpolation processing) is larger than when the image is small. Processing result) and the inter-field interpolation image are synthesized. Then, the interpolation line image generation unit 108 outputs the generated interpolation line image data to the output unit 109.

  The output unit 109 converts the current data into progressive image data using the interpolation line image data, and outputs it to the scaling processing unit 111. Specifically, the output unit 109 outputs data (line data) of progressive image data lines (lines necessary for scaling processing) to the scaling processing unit 111 at the progressive timing. The progressive timing is a timing synchronized with the horizontal synchronizing signal of the progressive image data after the scaling process. The scaling processing unit 111 generates progressive image data for one line after the scaling processing using the input line data.

(Inter-field interpolation processing)
An example of inter-field interpolation processing according to the present embodiment will be described with reference to FIGS. FIG. 5 is a diagram schematically illustrating an example of inter-field interpolation processing according to the present embodiment. FIG. 6 is a flowchart illustrating an example of the processing flow of the inter-field interpolation processing unit 106 according to the present embodiment.
The inter-field interpolation processing unit 106 determines whether “overtaking” is detected from the detection result of the overtaking detecting unit 107 (S601).
When the overtaking is not detected (S601: No), the inter-field interpolation processing unit 106 sets the previous data pixel as the current data interpolation pixel (S602). Specifically, as shown in FIG. 5, a pixel at the same position as the generation position of the interpolation pixel of the current data that is the pixel of the previous data is set as the interpolation pixel of the current data.
When the overtaking is detected (S601: Yes), the inter-field interpolation processing unit 106 sets the subsequent data pixel as the current data interpolation pixel (S603). Specifically, as shown in FIG. 5, a pixel at the same position as the generation position of the interpolation pixel of the current data, which is a pixel of the subsequent data, is set as the interpolation pixel of the current data. At this time, since one of the current data and the subsequent data is an even field and the other is an odd field, a pixel at the same position as the interpolation pixel generation position can be selected, and an appropriate interpolation pixel can be generated.

(Overtaking detection process)
An example of the “overtaking” detection process (overtaking detection process) according to the present embodiment will be described with reference to FIGS. FIG. 7 is a diagram illustrating an example of timing at which “overtaking” is detected. FIG. 8 is a flowchart illustrating an example of a processing flow of the overtaking detection unit 107 according to the present embodiment.
The overtaking detection unit 107 uses the field information to determine whether both the current data and the previous data are even fields or odd fields (S801).
When both the current data and the previous data are even fields or odd fields (S801: Yes), the overtaking detection unit 107 determines that “overtaking” has occurred (S802). Therefore, when the current data and the previous data transition as shown in FIG. 7, “overtaking” is detected at the timing indicated by the arrow in FIG.
When one of the current data and the previous data is an even field and the other is an odd field (S801: No), the overtaking detection unit 107 determines that “overtaking” has not occurred (S803).

  As described above, according to the present embodiment, the inter-field interpolation process using the current data and the previous data is performed at the normal time. When “overtaking” occurs such that both the current data and the previous data are even fields or odd fields, inter-field interpolation processing using the current data and the subsequent data is performed. Thereby, even when “overtaking” occurs, inter-field interpolation processing can be appropriately performed. Specifically, even when “overtaking” occurs, it is possible to use a pixel at the same position as the interpolation pixel generation position in the inter-field interpolation processing.

<Example 2>
Hereinafter, an image processing apparatus and a control method thereof according to the present embodiment will be described. As shown in FIG. 9, the inter-field interpolation processing method includes a method in which an interpolation pixel is generated using a pixel of the subsequent data and the same position as the generation position of the interpolation pixel.
(Task)
A conventional inter-field interpolation process when “overtaking” occurs will be described with reference to FIG.
When “overtaking” occurs, as shown in FIG. 10, in the IP conversion process, both the current data and the subsequent data become odd fields, or both of them become even fields. In this case, since there is no pixel at the same position as the interpolation pixel generation position in the subsequent data, inter-field interpolation processing as shown in FIG. 9 cannot be performed. Alternatively, a pixel at a position different from the generation position of the interpolation pixel is erroneously used, and an interpolation pixel is generated. Such erroneous use of pixels leads to degradation of the display image.
Therefore, in this embodiment, inter-field interpolation processing and overtaking detection processing are performed as follows.

(Inter-field interpolation processing)
An example of inter-field interpolation processing according to the present embodiment will be described with reference to FIGS. FIG. 11 is a diagram schematically illustrating an example of inter-field interpolation processing according to the present embodiment. FIG. 12 is a flowchart illustrating an example of the processing flow of the inter-field interpolation processing unit 106 according to the present embodiment.
The inter-field interpolation processing unit 106 determines whether “overtaking” is detected from the detection result of the overtaking detecting unit 107 (S1201).
When the overtaking is not detected (S1201: No), the inter-field interpolation processing unit 106 sets the subsequent data pixel as the current data interpolation pixel (S1202). Specifically, as shown in FIG. 11, a pixel of the subsequent data, which is the same position as the generation position of the interpolation pixel of the current data, is set as the interpolation pixel of the current data.
If an overtaking is detected (S1201: Yes), the inter-field interpolation processing unit 106 sets the previous data pixel as the current data interpolation pixel (S603). Specifically, as shown in FIG. 11, a pixel in the previous data, which is the same position as the generation position of the interpolation pixel of the current data, is set as the interpolation pixel of the current data. At this time, since one of the current data and the previous data is an even field and the other is an odd field, a pixel at the same position as the interpolation pixel generation position can be selected, and an appropriate interpolation pixel can be generated.

(Overtaking detection process)
An example of “overtaking” detection processing (overtaking detection processing) according to the present embodiment will be described with reference to FIGS. FIG. 13 is a diagram illustrating an example of timing at which “overtaking” is detected. FIG. 14 is a flowchart illustrating an example of a process flow of the overtaking detection unit 107 according to the present embodiment.
The overtaking detection unit 107 uses the field information to determine whether both the current data and the subsequent data are even fields or odd fields (S1401).
When both the current data and the subsequent data are even fields or odd fields (S1401: Yes), the overtaking detection unit 107 determines that “overtaking” has occurred (S1402). For this reason, when the current data and the subsequent data change as shown in FIG. 13, “overtaking” is detected at the timing indicated by the arrow in FIG.
When one of the current data and the subsequent data is an even field and the other is an odd field (S1401: No), the overtaking detection unit 107 determines that “overtaking” has not occurred (S1403).

  As described above, according to the present embodiment, the inter-field interpolation process using the current data and the subsequent data is performed at the normal time. When “overtaking” occurs such that both the current data and the subsequent data become even fields or odd fields, inter-field interpolation processing using the current data and the previous data is performed. Thereby, even when “overtaking” occurs, inter-field interpolation processing can be appropriately performed. Specifically, even when “overtaking” occurs, it is possible to use a pixel at the same position as the interpolation pixel generation position in the inter-field interpolation processing.

103 Control Unit 106 Inter-field Interpolation Processing Unit 112 IP Conversion Processing Unit

Claims (16)

Even field interlaced image data and odd field interlaced image data are alternately input in a first period, and the interlaced image data input in a second period different from the first period is a progressive image by interpolation. An image processing apparatus that performs IP conversion processing for converting data,
Determination to determine interlaced image data to be processed by the IP conversion process so that a difference between a timing at which the interlaced image data is input and a timing at which the IP conversion process is performed on the interlaced image data is equal to or less than a predetermined value. Means,
Current data that is the current interlaced image data to be processed, previous data that is the interlaced image data that was processed immediately before the current data, and the interlace that is processed after the current data Conversion means for performing inter-field interpolation processing using one of the subsequent data that is image data, and converting the current data into progressive image data;
Have
The converting means, when both the current data and the one of the previous data and the subsequent data are even fields or odd fields, the current data, the previous data, and the subsequent data. An image processing apparatus that performs inter-field interpolation processing using the other of the data. It further comprises detection means for detecting the movement of the image between the fields,
The conversion means further performs intra-field interpolation processing using the current data, and performs inter-field interpolation processing so that the weight of the processing result of the intra-field interpolation processing is greater when the image motion is large than when it is small. The image processing apparatus according to claim 1, wherein the processing result and the processing result of the intra-field interpolation processing are combined to convert the current data into progressive image data. The intra-field interpolation process is a process of generating an interpolation pixel of the current data using a pixel of the current data.
The image processing apparatus according to claim 2. A scaling unit for performing an enlargement process or a reduction process on the progressive image data output from the conversion unit;
Wherein during the conversion means and the scaling means is any one of claims 1-3, characterized in that storage means for temporarily storing the progressive image data output from said conversion means is not provided An image processing apparatus according to 1. The converting means repeatedly performs a process of outputting progressive image data for one line,
  The scaling means repeatedly performs processing for generating image data for one line after being subjected to enlargement processing or reduction processing, using progressive image data for one line output from the conversion means.
The image processing apparatus according to claim 4. Further comprising generating means for generating a vertical synchronization signal of the progressive image data;
  The determining unit determines interlaced image data to be processed by the IP conversion process based on a vertical synchronization signal of the input interlaced image data and a vertical synchronization signal generated by the generating unit.
The image processing apparatus according to claim 1, wherein the image processing apparatus is an image processing apparatus. Determination means for determining whether both the current data and the one of the previous data and the subsequent data are even fields or odd fields;
  The converting means performs the inter-field interpolation processing based on the determination result of the determining means.
The image processing apparatus according to claim 1, wherein the image processing apparatus is an image processing apparatus. The inter-field interpolation process is a process for generating an interpolation pixel of the current data by using a pixel of a field different from the current data.
The image processing apparatus according to claim 1, wherein the image processing apparatus is an image processing apparatus. Even field interlaced image data and odd field interlaced image data are alternately input in a first period, and the interlaced image data input in a second period different from the first period is a progressive image by interpolation. A method for controlling an image processing apparatus that performs IP conversion processing for converting data,
Determination to determine interlaced image data to be processed by the IP conversion process so that a difference between a timing at which the interlaced image data is input and a timing at which the IP conversion process is performed on the interlaced image data is equal to or less than a predetermined value. Steps,
Current data that is the current interlaced image data to be processed, previous data that is the interlaced image data that was processed immediately before the current data, and the interlace that is processed after the current data A conversion step of performing inter-field interpolation using one of the subsequent data that is image data, and converting the current data into progressive image data;
Have
In the converting step, when both the current data and the one of the previous data and the subsequent data are even fields or odd fields, the current data, the previous data, and the subsequent data A method for controlling an image processing apparatus, wherein inter-field interpolation processing is performed using the other data of the data. And further comprising a detecting step of detecting movement of the image between the fields,
  In the conversion step, intra-field interpolation processing using the current data is further performed,
When the motion is large, the inter-field interpolation processing result and the intra-field interpolation processing result are combined so that the weight of the intra-field interpolation processing result is greater than when the motion is small, and the current data is Converted to progressive image data
The method of controlling an image processing apparatus according to claim 9. The intra-field interpolation process is a process of generating an interpolation pixel of the current data using a pixel of the current data.
The method of controlling an image processing apparatus according to claim 10. A scaling step for enlarging or reducing the progressive image data obtained in the conversion step;
The method of controlling an image processing apparatus according to claim 9, wherein the image processing apparatus is a control method. In the conversion step, a process of outputting progressive image data for one line is repeatedly performed,
  In the scaling step, a process of generating image data for one line after the enlargement process or the reduction process is performed using the progressive image data for one line obtained in the conversion step is repeatedly performed.
The method of controlling an image processing apparatus according to claim 12. A generation step of generating a vertical synchronization signal of the progressive image data;
  In the determining step, interlaced image data to be processed in the IP conversion process is determined based on the vertical synchronizing signal of the input interlaced image data and the vertical synchronizing signal generated in the generating step.
The method for controlling an image processing apparatus according to claim 9, wherein: A determination step of determining whether both the current data and the one of the previous data and the subsequent data are even fields or odd fields;
  In the conversion step, the inter-field interpolation processing is performed based on the determination result in the determination step.
The method for controlling an image processing apparatus according to claim 9, wherein: The inter-field interpolation process is a process for generating an interpolation pixel of the current data by using a pixel of a field different from the current data.
The method for controlling an image processing apparatus according to claim 9, wherein:

Images