JP5384443B2 - フリップチップ型半導体裏面用フィルム、ダイシングテープ一体型半導体裏面用フィルム、半導体装置の製造方法、及び、フリップチップ型半導体装置 - Google Patents
フリップチップ型半導体裏面用フィルム、ダイシングテープ一体型半導体裏面用フィルム、半導体装置の製造方法、及び、フリップチップ型半導体装置 Download PDFInfo
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- JP5384443B2 JP5384443B2 JP2010169501A JP2010169501A JP5384443B2 JP 5384443 B2 JP5384443 B2 JP 5384443B2 JP 2010169501 A JP2010169501 A JP 2010169501A JP 2010169501 A JP2010169501 A JP 2010169501A JP 5384443 B2 JP5384443 B2 JP 5384443B2
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Images
Classifications
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- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
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Description
図1で示されるように、ダイシングテープ一体型半導体裏面用フィルム1は、基材31上に粘着剤層32が設けられたダイシングテープ3と、前記粘着剤層上に設けられたフリップチップ型半導体裏面用フィルム(以下、「半導体裏面用フィルム」という場合がある)2とを備える構成である。また、本発明のダイシングテープ一体型半導体裏面用フィルムは、図1で示されているように、ダイシングテープ3の粘着剤層32上において、半導体ウエハの貼着部分に対応する部分33のみに半導体裏面用フィルム2が形成された構成であってもよいが、粘着剤層32の全面に半導体裏面用フィルムが形成された構成でもよく、また、半導体ウエハの貼着部分に対応する部分33より大きく且つ粘着剤層32の全面よりも小さい部分に半導体裏面用フィルムが形成された構成でもよい。なお、半導体裏面用フィルム2の表面(ウエハの裏面に貼着される側の表面)は、ウエハ裏面に貼着されるまでの間、セパレータ等により保護されていてもよい。
半導体裏面用フィルム2はフィルム状の形態を有している。半導体裏面用フィルム2は、通常、製品としてのダイシングテープ一体型半導体裏面用フィルムの形態では、未硬化状態(半硬化状態を含む)であり、ダイシングテープ一体型半導体裏面用フィルムを半導体ウエハに貼着させた後に熱硬化される(詳細については後述する)。
<ゲル分率の測定方法>
半導体裏面用フィルムから約0.1gをサンプリングして精秤し(試料の重量)、該サンプルをメッシュ状シートで包んだ後、約50mlのトルエン中に室温で1週間浸漬させる。その後、溶剤不溶分(メッシュ状シートの内容物)をトルエンから取り出し、130℃で約2時間乾燥させ、乾燥後の溶剤不溶分を秤量し(浸漬・乾燥後の重量)、下記式(a)よりゲル分率(重量%)を算出する。
ゲル分率(重量%)=[(浸漬・乾燥後の重量)/(試料の重量)]×100 (a)
前記ダイシングテープ3は、基材31上に粘着剤層32が形成されて構成されている。このように、ダイシングテープ3は、基材31と、粘着剤層32とが積層された構成を有していればよい。基材(支持基材)は粘着剤層等の支持母体として用いることができる。前記基材31は放射線透過性を有していることが好ましい。前記基材31としては、例えば、紙などの紙系基材;布、不織布、フェルト、ネットなどの繊維系基材;金属箔、金属板などの金属系基材;プラスチックのフィルムやシートなどのプラスチック系基材;ゴムシートなどのゴム系基材;発泡シートなどの発泡体や、これらの積層体[特に、プラスチック系基材と他の基材との積層体や、プラスチックフィルム(又はシート)同士の積層体など]等の適宜な薄葉体を用いることができる。本発明では、基材としては、プラスチックのフィルムやシートなどのプラスチック系基材を好適に用いることができる。このようなプラスチック材における素材としては、例えば、ポリエチレン(PE)、ポリプロピレン(PP)、エチレン−プロピレン共重合体等のオレフィン系樹脂;エチレン−酢酸ビニル共重合体(EVA)、アイオノマー樹脂、エチレン−(メタ)アクリル酸共重合体、エチレン−(メタ)アクリル酸エステル(ランダム、交互)共重合体等のエチレンをモノマー成分とする共重合体;ポリエチレンテレフタレート(PET)、ポリエチレンナフタレート(PEN)、ポリブチレンテレフタレート(PBT)等のポリエステル;アクリル系樹脂;ポリ塩化ビニル(PVC);ポリウレタン;ポリカーボネート;ポリフェニレンスルフィド(PPS);ポリアミド(ナイロン)、全芳香族ポリアミド(アラミド)等のアミド系樹脂;ポリエーテルエーテルケトン(PEEK);ポリイミド;ポリエーテルイミド;ポリ塩化ビニリデン;ABS(アクリロニトリル−ブタジエン−スチレン共重合体);セルロース系樹脂;シリコーン樹脂;フッ素樹脂などが挙げられる。
本実施の形態に係るダイシングテープ一体型半導体裏面用フィルムの製造方法について、図1に示すダイシングテープ一体型半導体裏面用フィルム1を例にして説明する。先ず、基材31は、従来公知の製膜方法により製膜することができる。当該製膜方法としては、例えばカレンダー製膜法、有機溶媒中でのキャスティング法、密閉系でのインフレーション押出法、Tダイ押出法、共押出し法、ドライラミネート法等が例示できる。
半導体ウエハとしては、公知乃至慣用の半導体ウエハであれば特に制限されず、各種素材の半導体ウエハから適宜選択して用いることができる。本発明では、半導体ウエハとしては、シリコンウエハを好適に用いることができる。
本実施の形態に係る半導体装置の製造方法について、図2を参照しながら以下に説明する。図2は、前記ダイシングテープ一体型半導体裏面用フィルム1を用いた場合の半導体装置の製造方法を示す断面模式図である。
先ず、図2(a)で示されるように、ダイシングテープ一体型半導体裏面用フィルム1の半導体裏面用フィルム2上に任意に設けられたセパレータを適宜に剥離し、当該半導体裏面用フィルム2上に半導体ウエハ4を貼着して、これを接着保持させ固定する(マウント工程)。このとき前記半導体裏面用フィルム2は未硬化状態(半硬化状態を含む)にある。また、ダイシングテープ一体型半導体裏面用フィルム1は、半導体ウエハ4の裏面に貼着される。半導体ウエハ4の裏面とは、回路面とは反対側の面(非回路面、非電極形成面などとも称される)を意味する。貼着方法は特に限定されないが、圧着による方法が好ましい。圧着は、通常、圧着ロール等の押圧手段により押圧しながら行われる。
次に、図2(b)で示されるように、半導体ウエハ4のダイシングを行う。これにより、半導体ウエハ4を所定のサイズに切断して個片化(小片化)し、半導体チップ5を製造する。ダイシングは、例えば、半導体ウエハ4の回路面側から常法に従い行われる。また、本工程では、例えば、ダイシングテープ一体型半導体裏面用フィルム1まで切込みを行うフルカットと呼ばれる切断方式等を採用できる。本工程で用いるダイシング装置としては特に限定されず、従来公知のものを用いることができる。また、半導体ウエハ4は、半導体裏面用フィルムを有するダイシングテープ一体型半導体裏面用フィルム1により優れた密着性で接着固定されているので、チップ欠けやチップ飛びを抑制できると共に、半導体ウエハ4の破損も抑制できる。なお、半導体裏面用フィルム2がエポキシ樹脂を含む樹脂組成物により形成されていると、ダイシングにより切断されても、その切断面において半導体裏面用フィルムの接着剤層の糊はみ出しが生じるのを抑制又は防止することができる。その結果、切断面同士が再付着(ブロッキング)することを抑制又は防止することができ、後述のピックアップを一層良好に行うことができる。
ダイシングテープ一体型半導体裏面用フィルム1に接着固定された半導体チップ5を回収する為に、図2(c)で示されるように、半導体チップ5のピックアップを行って、半導体チップ5を半導体裏面用フィルム2とともにダイシングテープ3より剥離させる。ピックアップの方法としては特に限定されず、従来公知の種々の方法を採用できる。例えば、個々の半導体チップ5をダイシングテープ一体型半導体裏面用フィルム1の基材31側からニードルによって突き上げ、突き上げられた半導体チップ5をピックアップ装置によってピックアップする方法等が挙げられる。なお、ピックアップされた半導体チップ5は、その裏面が半導体裏面用フィルム2により保護されている。
ピックアップした半導体チップ5は、図2(d)で示されるように、基板等の被着体に、フリップチップボンディング方式(フリップチップ実装方式)により固定させる。具体的には、半導体チップ5を、半導体チップ5の回路面(表面、回路パターン形成面、電極形成面などとも称される)が被着体6と対向する形態で、被着体6に常法に従い固定させる。例えば、半導体チップ5の回路面側に形成されているバンプ51を、被着体6の接続パッドに被着された接合用の導電材(半田など)61に接触させて押圧しながら導電材を溶融させることにより、半導体チップ5と被着体6との電気的導通を確保し、半導体チップ5を被着体6に固定させることができる(フリップチップボンディング工程)。このとき、半導体チップ5と被着体6との間には空隙が形成されており、その空隙間距離は、一般的に30μm〜300μm程度である。尚、半導体チップ5を被着体6上にフリップチップボンディング(フリップチップ接続)した後は、半導体チップ5と被着体6との対向面や間隙を洗浄し、該間隙に封止材(封止樹脂など)を充填させて封止することが重要である。
<フリップチップ型半導体裏面用フィルムの作製>
アクリル酸エチル−メチルメタクリレートを主成分とするアクリル酸エステル系ポリマー(商品名「パラクロンW−197CM」根上工業株式会社製):100部に対して、エポキシ樹脂(商品名「エピコート1004」JER株式会社製):117部、フェノール樹脂(商品名「ミレックスXLC−4L」三井化学株式会社製):117部、球状シリカ(商品名「SO−25R」株式会社アドマテックス製):83部、染料(商品名「OIL BLACK BS」オリエント化学工業株式会社製):4部、熱硬化促進触媒(商品名「2PHZ−PW」四国化成工業株式会社製):1.7部をメチルエチルケトンに溶解して、固形分濃度が23.6重量%となる接着剤組成物の溶液を調製した。
実施例2〜16、及び、比較例1、2では、各配合量を表1に示したように変更した以外は、実施例1と同様にしてフリップチップ型半導体裏面用フィルムを作製した。なお、表1中、空欄は0重量部を示す。得られたフリップチップ型半導体裏面用フィルムの厚さを表2に示す。
熱硬化前のフリップチップ型半導体裏面用フィルムを熱硬化させる際の23℃から165℃までの範囲内における体積収縮率は以下のようにして求めた。
まず、実施例1〜16、及び、比較例1〜2のフリップチップ型半導体裏面用フィルムの体積収縮率測定用に、厚さ60μmのフリップチップ型半導体裏面用フィルムをそれぞれ作成した。次に、10mm×10mm、厚さ0.05mmの半導体チップに厚さ60μmフリップチップ型半導体裏面用フィルムを積層したサンプルを作成し、165℃、2時間の条件で硬化させた時の反り量「X」を測定した。なお、反り量は、後述の方法に基づいて測定した。その後、10mm×10mm、厚さ0.05mmの半導体チップに厚さ60μmのフリップチップ型半導体裏面用フィルムを積層した構成について、線膨張係数を振ったシミュレーションを行い、反り量がXとなるような線膨張係数を求めた。そして、これを3倍することにより、体積収縮率とした。このときシミュレーションでは165℃から23℃の範囲で温度変化を与えており、線膨張係数はその温度範囲の中で一定であると仮定した。
熱硬化させた半導体裏面用フィルムを作製し、レオメトリック社製の動的粘弾性測定装置「Solid Analyzer RS A2」を用いて、引張モードにて、サンプル幅:10mm、サンプル長さ:22.5mm、サンプル厚さ:0.2mmで、周波数:1Hz、昇温速度:10℃/分、窒素雰囲気下、所定の温度(23℃)にて測定し、引張貯蔵弾性率を得た。結果を表2に示す。
先ず、ダイシングテープ一体型半導体裏面用フィルムからセパレータを剥離した後、半導体ウエハ(直径8インチ、厚さ200μm;シリコンミラーウエハ)を半導体裏面用フィルム上に70℃でロール圧着して貼り合わせた。更に、半導体ウエハのダイシングを行った。ダイシングは10mm角のチップサイズとなる様にフルカットした。なお、貼り合わせ条件、ダイシング条件は、下記のとおりである。
貼り付け装置:商品名「MA−3000III」日東精機株式会社製
貼り付け速度計:10mm/min
貼り付け圧力:0.15MPa
貼り付け時のステージ温度:70℃
[ダイシング条件]
ダイシング装置:商品名「DFD−6361」ディスコ社製
ダイシングリング:「2−8−1」(ディスコ社製)
ダイシング速度:30mm/sec
ダイシングブレード:
Z1;ディスコ社製「203O−SE 27HCDD」
Z2;ディスコ社製「203O−SE 27HCBB」
ダイシングブレード回転数:
Z1;40,000r/min
Z2;45,000r/min
カット方式:ステップカット
ウェハチップサイズ:10.0mm角
ピックアップ装置:商品名「SPA−300」株式会社新川社製
ピックアップニードル本数:9本
ニードル突き上げ速度:20mm/s
ニードル突き上げ量 : 500μm
ピックアップ時間:1秒
ダイシングテープ エキスパンド量 : 3mm
表2から分かる通り、実施例1〜16のように、熱硬化前のフリップチップ型半導体裏面用フィルムを熱硬化させる際の23℃から165℃までの範囲内における体積収縮率が100ppm/℃以上400ppm/℃以下の半導体裏面用フィルムであると、半導体パッケージの反り量を抑制できることが確認された。
2 半導体裏面用フィルム
3 ダイシングテープ
31 基材
32 粘着剤層
33 半導体ウエハの貼着部分に対応する部分
4 半導体ウエハ
5 半導体チップ
51 半導体チップ5の回路面側に形成されているバンプ
6 被着体
61 被着体6の接続パッドに被着された接合用の導電材
Claims (7)
- 被着体上にフリップチップ接続された半導体素子の裏面に形成するためのフリップチップ型半導体裏面用フィルムであって、
熱硬化前のフリップチップ型半導体裏面用フィルムを熱硬化させる際の23℃から165℃までの範囲内における体積収縮率が、100ppm/℃以上400ppm/℃以下であり、
熱硬化後の23℃における引張貯蔵弾性率が1GPa以上5GPa以下であることを特徴とするフリップチップ型半導体裏面用フィルム。 - 前記フリップチップ型半導体裏面用フィルムの厚さは10μm以上40μm以下の範囲内であることを特徴とする請求項1に記載のフリップチップ型半導体裏面用フィルム。
- 請求項1又は2に記載のフリップチップ型半導体裏面用フィルムが、ダイシングテープ上に積層されたダイシングテープ一体型半導体裏面用フィルムであって、
前記ダイシングテープは基材上に粘着剤層が積層された構造であり、
前記フリップチップ型半導体裏面用フィルムは前記ダイシングテープの粘着剤層上に積層されていることを特徴とするダイシングテープ一体型半導体裏面用フィルム。 - 請求項3に記載のダイシングテープ一体型半導体裏面用フィルムを用いた半導体装置の製造方法であって、
前記ダイシングテープ一体型半導体裏面用フィルムにおけるフリップチップ型半導体裏面用フィルム上に半導体ウエハを貼着する工程と、
前記半導体ウエハをダイシングして半導体素子を形成する工程と、
前記半導体素子を前記フリップチップ型半導体裏面用フィルムとともに、ダイシングテープの粘着剤層から剥離する工程と、
前記半導体素子を前記被着体上にフリップチップ接続する工程とを具備することを特徴とする半導体装置の製造方法。 - 前記フリップチップ接続の工程に於いては、前記被着体上にフリップチップボンディングされた半導体素子と、当該被着体との間の間隙に封止樹脂を封入した後、前記封止樹脂を熱硬化させる工程を具備する請求項4に記載の半導体装置の製造方法。
- 前記封止樹脂がエポキシ樹脂を含有することを特徴とする請求項5に記載の半導体装置の製造方法。
- 請求項4〜6のいずれかに記載の半導体装置の製造方法により製造されたものであることを特徴とするフリップチップ型半導体装置。
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KR1020110074666A KR20120011822A (ko) | 2010-07-28 | 2011-07-27 | 플립 칩형 반도체 이면용 필름, 다이싱 테이프 일체형 반도체 이면용 필름, 반도체 장치의 제조 방법 및 플립 칩형 반도체 장치 |
US13/191,791 US9293387B2 (en) | 2010-07-28 | 2011-07-27 | Film for flip chip type semiconductor back surface, dicing tape-integrated film for semiconductor back surface, process for producing semiconductor device, and flip chip type semiconductor device |
TW100126668A TWI437072B (zh) | 2010-07-28 | 2011-07-27 | 覆晶型半導體背面用膜、半導體背面用切晶帶一體膜、半導體裝置之製造方法及覆晶型半導體裝置 |
CN201110217098.2A CN102376611B (zh) | 2010-07-28 | 2011-07-28 | 半导体背面用膜、半导体背面用切割带集成膜、用于生产半导体器件的方法和半导体器件 |
KR1020150109907A KR20150097446A (ko) | 2010-07-28 | 2015-08-04 | 플립 칩형 반도체 이면용 필름, 다이싱 테이프 일체형 반도체 이면용 필름, 반도체 장치의 제조 방법 및 플립 칩형 반도체 장치 |
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