JP5355935B2 - Metal materials for electrical and electronic parts - Google Patents

Description

  The present invention relates to a metal material for electrical and electronic parts suitable for a sliding portion of a fitting type multipolar connector.

  A plating material in which a plating layer such as tin (Sn) or tin alloy is provided on a conductive substrate such as copper (Cu) or a copper alloy (hereinafter referred to as a substrate as appropriate) has excellent conductivity and strength of the substrate. In addition, it is known as a high-performance conductor having excellent electrical connectivity, corrosion resistance, and solderability of the plating layer, and is widely used for various terminals and connectors used in electrical and electronic equipment. This plating material is usually nickel (which has a barrier function on the substrate) in order to prevent the alloy component of the substrate such as zinc (Zn) (hereinafter, appropriately referred to as a substrate component) from diffusing into the plating layer. Ni), cobalt (Co), iron (Fe), and the like are subjected to base plating.

  When this plating material is used as a terminal, for example, in a high-temperature environment such as in an engine room of an automobile, Sn of the Sn plating layer on the terminal surface is easily oxidizable, so an oxide film is formed on the surface of the Sn plating layer. However, since this oxide film is brittle, it is broken at the time of terminal connection, and the unoxidized Sn plating layer below it is exposed to obtain good electrical connectivity.

  By the way, in recent years, with the progress of electronic control, the mating connector has become multipolar, so a great deal of force is required when inserting and removing the male terminal group and the female terminal group. Since insertion / extraction work is difficult, reduction of the insertion / extraction force is strongly demanded. Moreover, since the workability at the time of connector connection improves by reducing the insertion / extraction force of a connector, the reduction of the said insertion / extraction force is also calculated | required strongly also from this viewpoint.

  As a method of reducing the insertion / extraction force, there is a method in which the Sn plating layer on the surface of the connector terminal is thinned to weaken the contact pressure between the terminals. This method is fretting between the contact surfaces of the terminals because the Sn plating layer is soft. A phenomenon may occur and poor conduction may occur between the terminals.

  The fretting phenomenon is that the soft Sn plating layer on the surface of the terminal wears and oxidizes due to fine sliding that occurs between the contact surfaces of the terminal due to vibration, temperature change, etc., and becomes a wear powder having a large specific resistance. When this phenomenon occurs between terminals, a connection failure occurs. This phenomenon is more likely to occur as the contact pressure between the terminals is lower.

  On the other hand, for example, Patent Document 1 discloses that a fretting phenomenon occurs on the outermost surface by plating Sn or Cu on a Cu or Cu alloy, performing a reflow treatment, and then performing a heat treatment in an atmosphere having an oxygen concentration of 5% or less. A method has been proposed in which a hard Cu—Sn intermetallic compound layer that is difficult to cause is formed and the purpose is to ensure low insertability. However, this method is inferior in the workability of the plating treatment. Patent Document 1 does not describe the Cu—Sn concentration of the Cu—Sn intermetallic compound layer, and further provides an oxide film layer with a regulated thickness on the surface of the Cu—Sn intermetallic compound layer. Processing by reflow heat treatment during line production was difficult to form properly.

  Further, in Patent Document 2, a surface plating layer made of a Ni layer and a Cu—Sn alloy layer is formed in this order on the surface of a base material made of Cu or a Cu alloy. A conductive material for connecting parts for the purpose of securing is described. However, this material is also inferior in workability of the plating treatment. Moreover, since the Cu—Sn alloy layer is defined by the average value of the Cu—Sn concentration, it is difficult to process by reflow heat treatment during line production.

  In Patent Document 3, a metal plating layer is formed by performing metal plating on the surface of a metal substrate, and a reflow treatment is performed so that a soft region spreads in a mesh shape and a hard region surrounded by a mesh of the soft region. And a plating treatment material formed by mixing them. However, this plating material has a problem that, under a high temperature environment, the Cu component of the base material diffuses to the outermost surface of the plating, which causes oxidation and further increases the contact resistance value.

In Patent Document 4, a Cu—Sn alloy coating layer made of particles having a diameter of about several μm is formed along the unevenness of the surface of the base material, and the Sn coating layer is melted and smoothed, and accordingly , A conductive material for connecting parts is described in which a Cu-Sn alloy coating layer is partially exposed on the surface of the material.
However, even if there is no Cu layer in the base and a Ni base is present, there is no problem in the initial state when there is a Cu layer or there is no Ni base. However, in an actual vehicle mounting environment where sliding and thermal load are applied simultaneously, if the pure Sn part is scraped off due to sliding, Cu diffuses to the surface and further oxidation proceeds, leading to an early increase in resistance. It is done.
JP 2000-226645 A JP 2004-68026 A JP 2004-339555 A JP 2006-77307 A

  An object of the present invention is to provide a metal material for electrical and electronic parts that can be easily manufactured and is suitable for a contact portion or a sliding portion of a connection terminal.

The present invention
(1) A metal material for electrical and electronic parts in which a Cu—Sn alloy layer is provided on a conductive substrate, and the Cu—Sn alloy layer has a Cu concentration gradually from the substrate side toward the surface side. In addition, Sn or Sn alloy is partially dispersed in the Cu—Sn alloy layer, and the Cu concentration in the half on the substrate side of the Cu—Sn alloy layer is 50 to 100 mol%. A metal material for electrical and electronic parts , wherein the Sn concentration is 0 to 50 mol%, the Cu concentration in the surface side half is 0 to 95 mol%, and the Sn concentration is 5 to 100 mol% ,
(2) An electric / electronic component in which any one metal of Ni, Co, and Fe or an alloy containing these metals is provided on a conductive substrate, and a Cu-Sn alloy layer is provided thereon. The Cu—Sn alloy layer has a Cu concentration that gradually decreases from the substrate side to the surface side, and is partially Sn or Sn in the Cu—Sn alloy layer. The alloy is dispersed, and in the Cu-Sn alloy layer, the Cu concentration in the substrate half is 50 to 100 mol% and the Sn concentration is 0 to 50 mol%, and the Cu concentration in the surface half is 0 to 95 mol% and Sn concentration is 5 to 100 mol%, a metal material for electrical and electronic parts,
( 3 ) Electricity in which two layers of any one metal of Ni, Co, and Fe or an alloy containing these metals are provided on a conductive substrate, and a Cu-Sn alloy layer is provided thereon. The Cu—Sn alloy layer is a metal material for electronic parts, and the Cu concentration of the Cu—Sn alloy layer gradually decreases from the substrate side to the surface side, and the Sn is partially contained in the Cu—Sn alloy layer. Or a metal material for electrical and electronic parts, in which an Sn alloy is dispersed ,
( 4 ) Of the Cu-Sn alloy layer, the Cu concentration in the substrate half is 50 to 100 mol% and the Sn concentration is 0 to 50 mol%, and the Cu concentration in the surface half is 0 to 95. The metal material for electric and electronic parts according to ( 3), wherein the mol% and Sn concentration are 5 to 100 mol%,
( 5 ) The metal material for electrical and electronic parts according to any one of (1) to ( 4 ), wherein the Cu—Sn alloy layer is 0.1 to 3.0 μm,
( 6 ) A method for producing a metal material for an electric / electronic component according to any one of (1) to ( 5 ), wherein either one of Ni, Co, and Fe on the conductive substrate or the Ni, Co, and Fe On the metal or alloy containing these metals, Cu and Sn are laminated in this order, a step of producing a laminated body, a step of performing a heat treatment on the laminated body, and a step of performing the heat treatment on the laminated body On the other hand, a method for producing a metal material for electrical and electronic parts, comprising a step of performing a cooling treatment,
( 7 ) The metal material for electrical and electronic parts according to ( 6 ), wherein the heat treatment is a treatment for allowing the laminate to pass through a reflow furnace having a furnace temperature of 300 ° C or higher and lower than 900 ° C for 3 to 20 seconds. Manufacturing method,
( 8 ) The method for producing a metal material for electric and electronic parts according to ( 6 ), wherein the cooling treatment is a treatment for allowing the laminate to pass through a liquid at 20 to 80 ° C. over 1 to 100 seconds. ,and,
( 9 ) The cooling treatment is a treatment of allowing the laminate to pass through a gas at 20 to 60 ° C over 1 to 300 seconds, and then passing through a liquid at 20 to 80 ° C over 1 to 100 seconds. The method for producing a metal material for electric and electronic parts according to ( 6 ), characterized in that

  The metal material for electric and electronic parts of the present invention can be easily manufactured by reflow heat treatment, and the heat resistance of the plating material can be improved. This is because, when used as an electrical and electronic material, abundant Cu on the substrate side in the Cu—Sn layer reacts with abundant Sn on the surface side even in a high temperature environment. In addition, the electrical / electronic component manufactured using the metal material for electrical / electronic component of the present invention can remarkably suppress a sudden increase in resistance (fretting) at the sliding electrical contact.

In addition, in the metal material for electric and electronic parts in which the base layer made of Ni or the like is provided on the conductive substrate, the substrate component can be prevented from diffusing to the outermost layer. In addition, in a material in which an intermediate layer made of Cu or the like is provided on the underlayer, the underlayer component such as Ni is prevented from diffusing into the outermost layer. Therefore, good electrical connectivity can be stably obtained.
In addition, in the material in which Sn or Sn alloy is partially dispersed in the Cu-Sn alloy layer, Cu existing in the lower layer side of the Cu-Sn alloy layer when left at high temperature and Sn dispersed in the Cu-Sn alloy layer Alternatively, there is room for the formation of a Cu—Sn alloy by reacting with the Sn alloy, so that CuO or the like is not formed by the expression of Cu, and the effect of stabilizing the contact resistance is also brought about.

The metal material for electrical and electronic parts according to the present invention has a Cu concentration gradually decreasing from the substrate side toward the surface on the conductive substrate or on the base layer formed on the conductive substrate. A -Sn alloy layer is provided, and the Cu-Sn alloy layer has a Cu concentration that gradually decreases from the substrate side toward the surface. This metal material for electrical and electronic parts is subjected to Sn plating treatment on a conductive substrate or a plating layer formed on the conductive substrate, and heat treatment to form a Cu-Sn alloy layer. The -Sn alloy layer is formed by gradually decreasing the Cu concentration from the substrate side to the surface side.
In the present invention, “the Cu concentration of the Cu—Sn alloy layer is gradually decreasing from the substrate side toward the surface” means that the Cu—Sn alloy layer has a depth different from the layer surface in the cross section at least 3 It means that the Cu concentration measured at a location is a low concentration in order from the side closer to the surface.

In the Cu—Sn alloy layer in the present invention, the Cu concentration is gradually decreased from the substrate side toward the surface, but the Cu concentration in the substrate side half of the layer thickness is preferably 50 to 100 mol%, More preferably, it is 65 to 100 mol%, and the Sn concentration is preferably 0 to 50 mol% of the balance, and more preferably 0 to 35 mol% (inevitable impurities other than Cu and Sn are negligible concentrations). The same applies below).
And the Cu concentration of the surface side half is preferably 40 to 95 mol%, more preferably 65 to 85 mol%, and the Sn concentration is preferably 5 to 60 mol%, more preferably 15 to 35 mol%. If the Cu concentration in the half on the substrate side is too low (the Sn concentration is too high), a pure Sn layer is likely to be formed on the outermost surface, and the fretting resistance deteriorates.
If the Sn concentration on the surface side half is too low, the heat resistance is reduced, leading to an early increase in resistance when used in a high temperature environment.

In the metal material for electrical and electronic parts of the present invention, the Cu concentration in the upper Cu-Sn layer is gradation formed, that is, even if the Cu layer is present on the underlayer or the Ni underlayer is not present. Since there is a Cu—Sn layer with a low Sn concentration on the surface side, there is room for Cu to diffuse with Sn. As a result, even if a thermal load is applied, Cu can be exposed to the outermost surface and further oxidized can be delayed.
The thickness of the Cu—Sn alloy layer is preferably 0.1 to 3.0 μm, more preferably 0.3 to 1.5 μm. If this thickness is too thick, Kirkendall voids are likely to occur in the diffusion process, and there is a risk of peeling of the plating, and an increase in the heat treatment temperature and time is expected to increase the plating cost. On the other hand, if it is too thin, the contact resistance may increase, heat resistance may deteriorate, and fretting resistance may deteriorate.

  In the present invention, the conductive substrate includes copper alloys such as copper, phosphor bronze, brass, white, beryllium copper and corson alloy, iron and stainless steel having the electrical conductivity, mechanical strength and heat resistance required for the terminals. Such as iron alloys, composite materials such as copper-coated iron materials and nickel-coated iron materials, various nickel alloys and aluminum alloys are appropriately used.

  Of the metals and alloys (materials), copper-based materials such as copper and copper alloys are particularly suitable because of their excellent balance between conductivity and mechanical strength. When the conductive substrate is other than a copper-based material, it is preferable to cover the surface with copper or a copper alloy.

In the manufacturing method for obtaining the metal material for electrical and electronic parts of the present invention, Sn plating may be formed by electroless plating, but is preferably formed by electroplating. The thickness of the Sn layer formed by Sn plating is preferably 0.01 to 5.0 μm.
The uppermost electric Sn plating may be performed, for example, using a tin sulfate bath at a plating temperature of 30 ° C. or less and a current density of 5 A / dm ² . However, the conditions are not limited to this, and can be set as appropriate.

In the manufacturing method for obtaining the metal material for electric and electronic parts of the present invention , the laminate material plated with Sn on the uppermost layer is heat-treated. Conditions for this heat treatment are selected to form a Cu—Sn alloy layer in which the Cu concentration gradually decreases from the substrate side toward the surface. When the heat treatment is performed by reflow treatment (continuous treatment), heating at a furnace temperature of 300 ° C. or higher and lower than 900 ° C. for 3 to 20 seconds (more preferably 5 to 10 seconds, more preferably 6 to 8 seconds) is preferable.
The reason why this temperature and time are used is to obtain a Cu-Sn layer having a concentration gradient that gradually decreases the Cu concentration in the Cu-Sn layer from the substrate side to the surface layer side.
Moreover, when heat-processing by a batch process, it is preferable to hold | maintain the said material in a 60-200 degreeC furnace for 0.1 to 200 hours.

Furthermore, in the manufacturing method for obtaining the metal material for electric and electronic parts of the present invention , the laminate material subjected to the reflow heat treatment is passed through the liquid in the cooling tank for 1 to 100 seconds (more preferably, 3 to 10 seconds). Cooling is preferred. The liquid temperature is preferably 20 to 80 ° C. (more preferably 30 to 50). Furthermore, before the rapid cooling, the heat-treated laminate material is preferably passed through a gas such as a cold air apparatus in a furnace atmosphere at 20 to 60 ° C. over 1 to 300 seconds and subjected to a slow cooling treatment.
By such a cooling process, the diffusion of Cu and Sn is forcibly terminated midway, or the diffusion rate is rapidly reduced, and the Cu concentration in the Cu—Sn layer makes it easier to obtain a gradation plating structure. Pure Sn can be dispersed in the Cu—Sn layer.

FIG. 1 is a schematic cross-sectional view showing one embodiment of a metal material for electrical and electronic parts . The metal material for electrical and electronic parts of the embodiment shown in FIG. 1 is Cu-Sn in which, for example, Sn plating is performed on the conductive substrate 1 and then heat-treated, so that the Cu concentration is gradually reduced from the substrate 1 side toward the surface 3. The alloy layer 2 is provided. In this embodiment, as the conductive substrate 1, a copper-based material or a Cu base material whose surface is coated with copper or a copper alloy is used. In this embodiment, when the above heat treatment is applied, the conductive substrate 1 has its surface coated with copper or a copper alloy, and the Cu component of the Cu base material is thermally diffused into the Sn plating layer. It diffuses into the substrate 1 by the heat treatment. Therefore, a Cu—Sn alloy layer 2 is formed in which the Cu concentration gradually decreases from the substrate 1 side toward the surface 3. Further, the boundary between the conductive substrate 1 and the Cu—Sn alloy layer 2 in the cross section is not clearly formed.

FIG. 2 is a schematic sectional view showing another embodiment of the present invention. The metal material for electrical and electronic parts of the embodiment shown in FIG. 2 is a Cu material in which Sn is coated on a conductive substrate 1 by plating or the like and then heat-treated to gradually reduce the Cu concentration from the substrate 1 side toward the surface 3. A Sn alloy layer 2 is provided, and Sn (4) is partially dispersed in the Cu—Sn alloy layer 2. The material of the conductive substrate 1 and the boundary between the conductive substrate 1 and the Cu—Sn alloy layer 2 are the same as those in the embodiment shown in FIG. Sn (4) may be a metal Sn or a Sn alloy (an alloy containing 50 mass% or more of Sn). Any method can be used as a dispersion method of Sn (4). For example, the coated Sn is present on the substrate 1 or its surface by optimizing the heat treatment conditions such as reflow treatment and batch treatment. Metal alloy Sn or Sn is prevented from being completely alloyed with Cu (as a specific example, the heat treatment is terminated before the coated Sn is completely alloyed with Cu present on the substrate 1 or its surface). Disperse the alloy.
The dispersion state is that at least a part of the metal Sn or Sn alloy (Sn concentration of 80 mol% or more) is exposed on the surface of the outermost layer, and the Sn or Sn alloy is dispersed in the form of islands or dots in plan view. preferable. Furthermore, an oxide film having a thickness of 0 to 100 nm may be formed on the outermost layer.

Another embodiment of the metal material for electric and electronic parts is plating the conductive substrate 1 with any one metal of Ni, Co, and Fe or an alloy mainly containing these metals (50% by mass or more). And the like, followed by coating with Cu or the like in the order of Cu and Sn, followed by heat treatment to provide the Cu—Sn alloy layer 2 in which the Cu concentration is gradually decreased from the substrate 1 side toward the surface 3. It is a metal material for electronic parts.
FIG. 3 is a schematic cross-sectional view of a metal material for electrical and electronic parts according to this embodiment in which Cu is coated on the conductive substrate 1 by plating or the like. In the metal material for electric and electronic parts shown in FIG. 3, the Cu layer 5 is provided on the conductive substrate 1, and Sn is coated on the Cu layer 5 by plating or the like. Then, by applying heat treatment, the Cu component is thermally diffused from the Cu layer 5 to the Sn layer, and Sn is also diffused into the Cu layer 5 by the heat treatment. Therefore, the Cu—Sn alloy layer 2 is formed in which the Cu concentration gradually decreases from the substrate 1 side toward the surface 3 side. Further, the boundary between the Cu layer 5 and the Cu—Sn alloy layer 2 in the cross section is not clearly formed.

  FIG. 4 is a schematic cross-sectional view of the metal material for electrical and electronic parts of this embodiment, in which Ni plating is performed on the conductive substrate 1. In the metal material for electric and electronic parts shown in FIG. 4, the Ni layer 6 is provided on the conductive substrate 1 by plating or the like, and the Cu layer and Sn layer are further coated on the Ni layer 6 in this order by plating or the like. . Here, by applying heat treatment, the Cu layer provided on the Ni layer 6 and the Sn layer provided thereon are diffused mutually, and the Cu concentration gradually increases from the substrate 1 side toward the surface 3 side. A reduced Cu—Sn alloy layer 2 is formed. In addition, a similar metal material for electric and electronic parts can be obtained when Co plating or Fe plating is performed instead of Ni plating.

In another embodiment of the present invention, a conductive substrate is coated with any one metal of Ni, Co, and Fe or an alloy mainly containing these metals (50% by mass or more) by plating or the like, Further, Cu and Sn were coated by plating or the like in this order, and then heat treated to provide a Cu—Sn alloy layer 2 in which the Cu concentration was gradually reduced from the substrate 1 side toward the surface 3, and the Cu—Sn alloy layer 2 is a metal material for electrical and electronic parts in which Sn or an Sn alloy is partially dispersed.
FIG. 5 is a schematic cross-sectional view of the metal material for electrical and electronic parts of the present embodiment, in which Cu plating is performed on the conductive substrate 1. In the metal material for electric / electronic parts shown in FIG. 5, the Cu layer 5 is provided on the conductive substrate 1 by plating or the like, and Sn is coated on the Cu layer 5 by plating or the like. Then, by applying heat treatment, the Cu component is thermally diffused from the Cu layer 5 to the Sn layer, and Sn is also diffused into the Cu layer 5 by the heat treatment. Therefore, the Cu—Sn alloy layer 2 is formed in which the Cu concentration gradually decreases from the substrate 1 side toward the surface 3 side. Further, the boundary between the Cu layer 5 and the Cu—Sn alloy layer 2 in the cross section is not clearly formed. In addition, Sn (4) is partially dispersed in the Cu—Sn alloy layer 2. The dispersion method of Sn (4) is the same as the dispersion method in the embodiment shown in FIG.

  FIG. 6 is a schematic cross-sectional view of the metal material for electrical and electronic parts of this embodiment, in which Ni plating is performed on the conductive substrate 1. In the metal material for electric and electronic parts shown in FIG. 6, the Ni layer 6 is provided on the conductive substrate 1 by plating or the like, and the Cu layer and Sn layer are further coated on the Ni layer 6 in this order by plating or the like. . Here, by applying heat treatment, the Cu layer provided on the Ni layer 6 and the Sn layer provided thereon are diffused mutually, and the Cu concentration gradually increases from the substrate 1 side toward the surface 3 side. A reduced Cu—Sn alloy layer 2 is formed. Sn (4) is partially dispersed in the Cu—Sn alloy layer 2. The Sn (4) dispersion method is the same as the dispersion method in the embodiment shown in FIG.

Another embodiment of the metal material for electrical and electronic parts is such that the conductive substrate 1 is plated with a metal of Ni, Co, and Fe or an alloy mainly containing these metals (50 mass% or more). Two layers were coated, and further coated by plating or the like in the order of Cu and Sn, and then heat-treated to provide a Cu—Sn alloy layer 2 in which the Cu concentration was gradually decreased from the substrate 1 side to the surface 3 side. It is a metal material for electrical and electronic parts. The two types of plating combinations applied to the conductive substrate 1 are not particularly limited.

  FIG. 7 is a schematic cross-sectional view of the metal material for electrical and electronic parts of this embodiment, in which Ni is coated as a lower layer by plating or the like and Cu is coated as an upper layer by plating or the like. In the metal material for electric and electronic parts shown in FIG. 7, the Ni layer 6 and the Cu layer 5 are provided in this order on the conductive substrate 1, and the Sn layer is applied on the Cu layer 5 by plating or the like. Then, by applying heat treatment, the Cu component is thermally diffused from the Cu layer 5 to the Sn layer, and Sn is also diffused into the Cu layer 5 by the heat treatment. Therefore, the Cu—Sn alloy layer 2 is formed in which the Cu concentration gradually decreases from the substrate 1 side toward the surface 3 side. Further, the boundary between the Cu layer 5 and the Cu—Sn alloy layer 2 in the cross section is not clearly formed.

  In another embodiment of the present invention, two layers of Ni, Co, and Fe metal or an alloy mainly containing these metals (50 mass% or more) are coated on the conductive substrate 1 by plating or the like. Further, a Cu—Sn alloy layer in which Cu concentration is gradually decreased from the substrate 1 side to the surface 3 side is provided by coating with Cu or Sn in this order, followed by heat treatment, and the Cu—Sn alloy. It is a metal material for electrical and electronic parts in which Sn or Sn alloy is partially dispersed in the layer. The two types of plating combinations applied to the conductive substrate 1 are not particularly limited.

  FIG. 8 is a schematic cross-sectional view of a metal material for electrical and electronic parts according to this embodiment, in which Ni is coated as a lower layer by plating or the like, and Cu is coated as an upper layer by plating or the like. In the metal material for electric and electronic parts shown in FIG. 8, the Ni layer 6 and the Cu layer 5 are sequentially provided on the conductive substrate 1, and the Sn layer is applied on the Cu layer 5 by plating or the like. Then, by applying heat treatment, the Cu component is thermally diffused from the Cu layer 5 into the Sn layer, and Sn is also diffused into the substrate 1 by the heat treatment. Therefore, the Cu—Sn alloy layer 2 is formed in which the Cu concentration gradually decreases from the substrate 1 side toward the surface 3 side. Further, the boundary between the Cu layer 5 and the Cu—Sn alloy layer 2 in the cross section is not clearly formed. In addition, Sn (4) is partially dispersed in the Cu—Sn alloy layer 2. The dispersion method of Sn (4) is the same as the dispersion method in the embodiment shown in FIG.

In the present invention, the outermost Cu—Sn alloy layer includes a Cu—Sn intermetallic compound layer. Examples of the Cu—Sn intermetallic compound in the present invention include Cu ₆ Sn ₅ and Cu ₃ Sn. Moreover, what mixed these intermetallic compounds is also included.

In the present invention, preferably, as shown in FIGS. 6 and 8 , a base layer such as a Ni layer 6 is provided on a conductive substrate. Providing the base layer prevents the components of the substrate 1 from diffusing into the outermost layer. The base layer provided on the conductive substrate 1 is made of a metal such as Ni, Co, Fe or the like having a barrier function for preventing the base component from thermally diffusing to the outermost layer, Ni—P based, Ni containing Pb as a main component. Alloys such as -Sn, Co-P, Ni-Co, Ni-Co-P, Ni-Cu, Ni-Cr, Ni-Zn, and Ni-Fe are preferably used. These metals and alloys have good plating processability and no problem in price. Among these, Ni and Ni alloys are recommended because the barrier function does not deteriorate even in a high temperature environment.

Since the metal (alloy) such as Ni used for the underlayer has a high melting point of 1000 ° C. or higher and the use environment temperature of the connection connector is as low as 200 ° C. or lower, the underlayer itself hardly causes thermal diffusion and its barrier. Function is effectively expressed. The underlayer also has a function of improving the adhesion between the conductive substrate and an intermediate layer described later depending on the material of the conductive substrate.
When the thickness of the underlayer is less than 0.01 μm, the barrier function is not sufficiently exerted, and when it exceeds 3 μm, the plating distortion increases and the base layer is easily peeled off. Therefore, 0.01 to 3 μm is preferable. The upper limit of the thickness of the underlayer is preferably 1.5 μm, more preferably 0.5 μm, considering the terminal processability.

More preferably, the metal material for electric and electronic parts of the present invention is such that an intermediate layer made of Cu layer 5 is provided on a base layer made of Ni or the like on a conductive substrate, as in the embodiment shown in FIG. is there. By providing the intermediate layer, it is possible to prevent the base component such as Ni from diffusing to the outermost layer, to stably obtain good electrical connectivity, and to gradually decrease the Cu concentration from the substrate side toward the surface. In addition, the formation of the Cu—Sn alloy layer can be facilitated. The thickness of the intermediate layer is preferably 0.01 to 3 μm. Furthermore, 0.1-0.5 micrometer is preferable.

  The shape of the metal material for electric and electronic parts of the present invention is arbitrary such as a stripe, a round wire, a square wire, and the like. The metal material for electric and electronic parts of the present invention can be processed into electric and electronic parts such as a fitting type multipolar connector for automobiles by a conventional method. For example, the connector made using the metal material for electrical and electronic parts of the present invention weakens the contact pressure between the terminals, does not cause fretting phenomenon between the contact surfaces of the terminals, and causes poor conduction between the terminals. Can be suppressed.

  Hereinafter, the present invention will be described in more detail based on examples, but the present invention is not limited thereto.

Reference example 1
A copper strip having a thickness of 0.25 mm was degreased and pickled in this order, and then Ni, Cu, and Sn were electroplated in this order on the copper alloy strip to prepare a plated laminate. The plating conditions for each metal are as follows.
(A) Ni plating / plating bath composition Component Concentration Nickel sulfamate 500 g / l
Boric acid 30g / l
・ Bath temperature 60 ℃
・ Electric density 5A / dm ²
・ Plating thickness 0.5μm
(B) Cu plating / plating bath composition Component concentration Copper sulfate 180 g / l
Sulfuric acid 80g / l
・ Bath temperature 40 ℃
・ Electric density 5A / dm ²
・ Plating thickness 0.8μm
(C) Sn plating / plating bath composition Component Concentration Stannous sulfate 80 g / l
Sulfuric acid 80g / l
・ Bath temperature 30 ℃
・ Electric density 5A / dm ²
・ Plating thickness 0.3μm
In addition, about the said thickness, plating time can be adjusted suitably.

  Next, this plated laminate was subjected to a reflow treatment in a reflow furnace at 740 ° C. for 7 seconds to obtain a metal material for electric and electronic parts. A photograph (horizontal width: 11.7 μm) of this material by SEM (Scanning Electron Microscope) is shown in FIG. 9, and further, AES (Auger Electron Spectroscopy) of the measurement part including the surface shown in the SEM photograph of FIG. FIG. 10 shows an electron image (Cu—Sn—Ni map) obtained by an Auger electron spectroscopy apparatus. First, a 30-degree oblique section is created by FIB (Focused Ion Beam) at a sample inclination of 60 degrees and used as an Auger measurement (AES) analysis sample. Further, in AES analysis, the 30-degree oblique section is horizontal. Thus, the sample was tilted and analyzed, an AES electron image was obtained, and the thickness of each layer was measured. Table 1 shows Sn and Cu concentrations (mol%) obtained by AES qualitative analysis on the measurement surface 1 (11), measurement surface 2 (12), and measurement surface 3 (13) shown in FIG.

As shown in Table 1 and FIG. 10, the material of this reference example was formed on the Ni layer 6, the Cu layer 5 and the Cu—Sn alloy layer 2 being formed substantially continuously, and the Cu concentration from the substrate 1 side toward the surface. Is gradually decreasing.

Example 1
A copper strip having a thickness of 0.25 mm was degreased and pickled in this order, and then Ni, Cu, and Sn were electroplated in this order on the copper alloy strip to prepare a plated laminate. The plating conditions for each metal are as follows.
(A) Ni plating / plating bath composition Component Concentration Nickel sulfamate 500 g / l
Boric acid 30g / l
・ Bath temperature 60 ℃
・ Electric density 5A / dm ²
・ Plating thickness 0.5μm
(B) Cu plating / plating bath composition Component concentration Copper sulfate 180 g / l
Sulfuric acid 80g / l
・ Bath temperature 40 ℃
・ Electric density 5A / dm ²
・ Plating thickness 0.8μm
(C) Sn plating / plating bath composition Component Concentration Stannous sulfate 80 g / l
Sulfuric acid 80g / l
・ Bath temperature 30 ℃
・ Electric density 5A / dm ²
・ Plating thickness 0.5μm
In addition, about the said thickness, plating time can be adjusted suitably.

  Subsequently, this plating laminated body was heat-treated in a reflow furnace at 740 ° C. for 7 seconds to obtain a metal material for electric and electronic parts. A SEM photograph (width: 11.7 μm) of this material is shown in FIG. 11, and an electronic image (Cu—Sn—Ni map) of the measurement part including the surface shown in the SEM photograph of FIG. Shown in Further, Table 2 shows Sn and Cu concentrations (mol%) obtained by AES qualitative analysis on the measurement surface 1 (21), measurement surface 2 (22), and measurement surface 3 (23) shown in FIG.

  As shown in Table 2 and FIG. 12, the material of this example is the Ni layer 6, the Cu layer 5, and the Cu—Sn alloy layer 2 formed in this order on the substrate 1, and the Cu layer 5 and the Cu—Sn alloy layer. The boundary with 2 is not clear, and the Cu concentration gradually decreases from the substrate 1 side to the surface. In addition, Sn (4) is dispersed in the Cu—Sn alloy layer 2 in an island shape.

Test example 1
With respect to each metal material for electric and electronic parts obtained in Reference Example 1 and Example 1, the following fine sliding test was performed up to 1000 times of sliding reciprocation, and the change in contact resistance value was continuously measured.

The fine sliding test was performed as follows.
Each of the two test metal material pieces 31 and 32 is prepared, and the test metal material piece 31 is provided with a hemispherical overhanging portion (a convex outer surface is the outermost layer surface) 31a having a curvature radius of 1.8 mm. The outermost layer surface 32a of the test metal material piece 32 is brought into contact with the overhanging portion 31a at a contact pressure of 3 N after degreasing and cleaning, and in this state, both are slid 30 μm in an environment of a temperature of 20 ° C. and a humidity of 65%. , Sliding the plate back and forth, applying an open-circuit voltage of 20 mV between the test metal material pieces 31 and 32, passing a constant current of 5 mA, measuring the voltage drop during sliding by the four-terminal method, and measuring the change in electrical resistance by 1. Obtained every second. The frequency of reciprocating motion was about 3.3 Hz. The contact resistance value before the microsliding test was 0.1 mΩ when the test metal material pieces 31 and 32 were the materials of Reference Example 1, and 0.5 mΩ when the materials of Example 1 were used. Further, the maximum contact resistance value during the micro-sliding test was 4.0 mΩ when the test metal material pieces 31 and 32 were made of the material of Reference Example 1, and 4.1 mΩ when the material of Example 1 was used. It was.
Thus, fretting did not occur in the materials of Reference Example 1 and Example 1 .

Example 2
In the same manner as described in Reference Example 1, Ni, Cu, and Sn were plated on a copper alloy strip to prepare a plated laminate, and the same heat treatment was performed to obtain each metal material for electric and electronic parts. However, the Cu and Sn plating thicknesses are the thicknesses indicated by the Cu—Sn layer in Table 3 below, and the Ni plating is not plated when the underlying Ni layer shown in Table 3 is not provided.
The obtained metal materials were tested as test materials, and the plating forms and evaluation results are shown in Table 3 below.

The contents of the items in Table 3 and Table 4 below are as follows.
(A) Cu-Sn Form Full-surface Cu-Sn, partial Cu-Sn, and outermost surface pure Sn mean that the material has a layer structure schematically shown in FIG.
(B) Analysis of copper concentration point
By the same method as described in Reference Example 1, the copper concentration of each layer (1) to (4) shown in FIG. 14 was measured.
(C) Presence or absence of surface pure Sn on concentration analysis line Presence or absence of pure Sn on the surface of the partial layer shown in FIG. 14 (d) Initial test after 160 ° C. × 120 h The test was carried out after a heat load of 120 h.
(E) After spraying salt water and after gas corrosion The test material was sprayed with salt water having a concentration of 5%, and the test was performed, or the test was performed after corroding in a gas at 35 ° C. for 96 hours.
(F) Appearance Visually, “○” indicates no discoloration and “×” indicates discoloration.
(G) Contact resistance The contact resistance was measured in the same manner as before the fine sliding described in Test Example 1 above. When the contact resistance value is less than 5 mΩ, “◯” is indicated, and when the contact resistance value is 5 mΩ or more and less than 10 mΩ, “Δ” is indicated and when 10 mΩ or more is indicated, “X” is indicated.
(H) Fretting resistance Contact resistance was measured by the same microsliding test as described in Test Example 1. When the increase in contact resistance was less than 5 mΩ, “◯” was given, and “Δ” was given for 5 mΩ or more and less than 10 mΩ, and “X” was given for 10 mΩ or more.
(I) Heat resistance after sliding Considering the automobile mounting environment, sliding and thermal load are expected to be repeated simultaneously or alternately. Simulating this phenomenon, the contact resistance was measured after a heat load of 80 ° C. × 100 h after 200 slides. When the contact resistance value is less than 5 mΩ, “◯” is indicated, and when the contact resistance value is 5 mΩ or more and less than 10 mΩ, “Δ” is indicated and when 10 mΩ or more is indicated, “X” is indicated.

Test No. in Table 3 When the outermost surface is pure Sn as in 19, the fretting resistance and the heat resistance after sliding are poor. On the other hand, test no. When the Cu concentration on the surface side is lower than that on the substrate side as in 1 to 16, the test No. It can be seen that compared to 19, the fretting resistance is better.
In addition, Test No. About 1-15, in the Cu-Sn alloy layer, it confirmed that Cu density | concentration was reducing gradually from the base | substrate side toward the surface side.

Further, test No. 1 in which the Cu concentration in the half on the substrate side is 50 to 100 mol% and the Cu concentration in the half on the surface side is not within the range of 40 to 95 mol%. In 6-8, it is No. which is in the range. Compared with 1-5, it turns out that the fretting resistance and the heat resistance after sliding are inferior.
Similarly, when pure Sn is partially dispersed in the Cu—Sn alloy layer, the test is such that the Cu concentration in the substrate half is 50 to 100 mol% and the Cu concentration in the surface half is low. No. 16 is also within test range. Compared with 11-15, it turns out that fretting resistance and heat resistance after sliding are inferior.

  Test No. in which the Cu—Sn alloy layer is outside the range of 0.1 to 3.0 μm. In 9, 10, 17, and 18, test Nos. Within the range. Compared with 1-5 and 11-15, fretting resistance and / or heat resistance after sliding is inferior. When the thickness of the Cu—Sn layer is thicker than 3.0 μm, the test No. As shown in FIGS. 9 and 17, in the test after the heat load of 160 ° C. × 120 h, the test No. When the thickness of the Cu—Sn layer is thinner than 0.1 μm, it is inferior to 1-5 and 11-15. As shown in FIGS. 10 and 18, not only the test after a heat load of 160 ° C. × 120 h but also the test after spraying with salt water and after the gas corrosion are inferior.

  Test No. within the above-mentioned range. 1-5 and no. In 11 to 15, good results are obtained for all the evaluation items.

Example 3
In the same manner as described in Reference Example 1, Ni, Cu, and Sn were plated on a copper alloy strip to prepare a plated laminate, and heat treatment shown in Table 4 below was performed to obtain metal materials for electric and electronic parts. . However, Cu and Sn plating thicknesses are Cu thicknesses and Sn layer thicknesses shown in Table 4 below, and Ni plating without the underlying Ni layer shown in Table 4 is not plated.
The obtained metal materials were tested as test materials, and the plating forms and evaluation results are shown in Table 4 below.

  From Table 4, it can be seen that the Cu concentration gradually decreased from the substrate toward the surface side. In 35, the degree of decrease is small. Test No. having a pure Sn layer on the outermost surface. 31-35 have poor fretting resistance. In addition, test No. with short heating time and cooling time. 32 and 34 are inferior in heat resistance after sliding.

It is a schematic cross-sectional view showing one embodiment of the electric metal material for electronic component. It is a schematic sectional drawing which shows one embodiment of the metal material for electrical and electronic components of this invention. It is a schematic cross-sectional view showing one embodiment of the electric metal material for electronic component. It is a schematic cross-sectional view showing one embodiment of the electric metal material for electronic component. It is a schematic sectional drawing which shows one embodiment of the metal material for electrical and electronic components of this invention. It is a schematic sectional drawing which shows one embodiment of the metal material for electrical and electronic components of this invention. It is a schematic cross-sectional view showing one embodiment of the electric metal material for electronic component. It is a schematic sectional drawing which shows one embodiment of the metal material for electrical and electronic components of this invention. 3 is a SEM micrograph of a metal material for electrical and electronic parts of Reference Example 1. 4 is a Cu—Sn—Ni map of Reference Example 1. 2 is a SEM micrograph of a metal material for electrical and electronic parts of Example 1. FIG. 2 is a Cu—Sn—Ni map of Example 1. FIG. 6 is a perspective explanatory view of a fine sliding test method of Test Example 1. FIG. It is explanatory drawing which shows typically the layer structure for description of the test material cross section of Example 2 and 3. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Conductive base | substrate 2 Cu-Sn alloy layer 3 Material surface 4 Sn
5 Cu layer 6 Ni layer (underlayer)
11 Measurement surface 1 of Reference Example 1
12 Measurement surface 2 of Reference Example 1
13 Measurement surface 3 of Reference Example 1
21 measuring surface 1 of Example 1
22 Measuring surface 2 of Example 1
23 Measuring surface 3 of Example 1
31 Metal material piece for test 31a Hemispherical overhang provided in metal material piece for test 32 Metal material piece for test 32a Outermost layer surface of metal material piece for test

Claims (9)

A metal material for electrical and electronic parts in which a Cu-Sn alloy layer is provided on a conductive substrate,
In the Cu—Sn alloy layer, the Cu concentration gradually decreases from the substrate side to the surface side, and Sn or Sn alloy is partially dispersed in the Cu—Sn alloy layer , Of the Cu-Sn alloy layer, the substrate side half Cu concentration is 50 to 100 mol% and the Sn concentration is 0 to 50 mol%, and the surface side half Cu concentration is 0 to 95 mol% and A metal material for electrical and electronic parts, wherein the Sn concentration is 5 to 100 mol% . A metal material for electrical and electronic parts in which any one metal of Ni, Co, and Fe or an alloy containing these metals is provided on a conductive substrate, and a Cu-Sn alloy layer is further provided thereon Because
In the Cu—Sn alloy layer, the Cu concentration gradually decreases from the substrate side to the surface side, and Sn or Sn alloy is partially dispersed in the Cu—Sn alloy layer , Of the Cu-Sn alloy layer, the substrate side half Cu concentration is 50 to 100 mol% and the Sn concentration is 0 to 50 mol%, and the surface side half Cu concentration is 0 to 95 mol% and A metal material for electrical and electronic parts, wherein the Sn concentration is 5 to 100 mol% . For electric and electronic parts in which two layers of any one metal of Ni, Co, and Fe or an alloy containing these metals are provided on a conductive substrate, and a Cu-Sn alloy layer is further provided thereon A metal material,
The Cu-Sn alloy layer has a Cu concentration that gradually decreases from the substrate side to the surface side, and Sn or Sn alloy is partially dispersed in the Cu-Sn alloy layer. A metal material for electrical and electronic parts. Of the Cu-Sn alloy layer, the substrate side half Cu concentration is 50 to 100 mol% and the Sn concentration is 0 to 50 mol%, and the surface side half Cu concentration is 0 to 95 mol% and The metal material for electrical and electronic parts according to claim 3, wherein the Sn concentration is 5 to 100 mol%. The metal material for electrical and electronic parts according to any one of claims 1 to 4 , wherein the Cu-Sn alloy layer is 0.1 to 3.0 µm. It is a manufacturing method of the metal material for electrical and electronic components of any one of Claims 1-5 ,
A step of laminating Cu and Sn in that order on the conductive substrate or the metal of any one of Ni, Co, and Fe or an alloy containing these metals to produce a laminate;
Performing a heat treatment on the laminate,
The manufacturing method of the metal material for electrical and electronic components characterized by including the process of performing the cooling process with respect to the said laminated body in which the said heat processing process was performed. The said heat processing is a process which passes the said laminated body for 3 to 20 second in the reflow furnace whose furnace temperature is 300 degreeC or more and less than 900 degreeC, The manufacturing method of the metal material for electrical and electronic components of Claim 6 characterized by the above-mentioned. . The said cooling process is a process which passes the said laminated body through the liquid of 20-80 degreeC over 1 to 100 second, The manufacturing method of the metal material for electrical and electronic components of Claim 6 characterized by the above-mentioned. The cooling treatment is a treatment in which the laminate is passed through a gas at 20 to 60 ° C. over 1 to 300 seconds, and then passed through a liquid at 20 to 80 ° C. over 1 to 100 seconds. The manufacturing method of the metal material for electrical and electronic components of Claim 6 .