JP5271402B2 - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device, which can achieve high-density packaging while suppressing yield deterioration. <P>SOLUTION: A manufacturing method of a semiconductor device comprises: a first step of preparing a first semiconductor device 110; a second step of coating the front face of a semiconductor element 1b and an interconnection 2 formed on the front face of the semiconductor element 1b with a sealing resin 5b, grinding the front face of the sealing resin 5b to expose the interconnection 2 from the sealing resin 5b, forming a groove 9 extending from the sealing resin 5b to the semiconductor element 1b, and preparing a second semiconductor device 120 formed by grinding the rear face of the semiconductor element 1b; and a third step of mounting the second semiconductor device 120 in a state that the terminal formation face of the second semiconductor device 120 and the terminal formation face of the first semiconductor device 110 face each other. <P>COPYRIGHT: (C)2012,JPO&amp;INPIT

Description

  The present invention relates to a semiconductor device capable of achieving high-density mounting while suppressing a decrease in yield.

  The rapid spread of portable electronic devices in recent years is remarkable. Accordingly, a resin-encapsulated semiconductor device mounted on a portable electronic device is required to be thin, small, and lightweight. As a high-density semiconductor device that meets such demands, there is one called a chip size package. An example of the configuration of this chip size package will be described with reference to FIG.

  In the semiconductor device 820, as shown in FIG. 12, the electrode pad 6 is formed on the semiconductor element 1b having a thickness of about 400 μm, and the wiring 2 made of Cu or the like electrically connected to the electrode pad 6 is formed. . The surface of the semiconductor element 1b and the wiring 2 are sealed with a sealing resin 5 having a thickness of about 100 μm. Bumps 3 made of solder or the like are formed on the upper surface of the wiring 2 exposed on the surface of the sealing resin 5. Reference numeral 4 in the figure denotes rewiring with Cu or the like for electrically connecting the electrode pad 6 and the wiring 2.

  A method for manufacturing the semiconductor device 820 shown in FIG. 12 will be described with reference to FIG. First, as shown in FIG. 13A, the wiring 2 made of Cu or the like is formed on the semiconductor element 1b. In FIG. 13A, the electrode pad 6 and the rewiring 4 are not shown. Then, as shown in FIG. 13B, the entire surface of the semiconductor element 1 b is sealed with a sealing resin 5 with a thickness that completely covers the wiring 2. Next, as shown in FIG. 13C, after the entire surface is ground to expose the wiring 2 on the surface, bumps 3 made of solder or the like are formed as shown in FIG. 13D. Furthermore, the semiconductor device 820 is manufactured by cutting and dividing the semiconductor element 1b into individual semiconductor devices.

  In Japanese Patent Application No. 11-187658, which is the parent application of the present case, the following eight documents are cited at the time of notification of reasons for refusal.

Japanese Patent Laid-Open No. 10-93013 Japanese Patent Laid-Open No. 9-181256 JP 59-117146 A Japanese Patent Laid-Open No. 10-12810 Japanese Patent Laid-Open No. 7-240696 Microfilm of Japanese Utility Model Application No. 1-144089 (Japanese Utility Model Application No. 3-83940) Japanese Patent Application No. 11-145870 (Japanese Patent Laid-Open No. 2000-340736) Japanese Patent Application No. 10-121046 (Japanese Patent Laid-Open No. 11-31780)

By the way, when the process conditions for manufacturing a semiconductor element are different, such as a memory process and a logic process, it is difficult to form these different functions on one semiconductor element. In such a case, semiconductor devices having respective functions are individually manufactured and mounted on a printed board.
For example, a case where two semiconductor devices are mounted on the printed circuit board 13 will be described. Here, in the first semiconductor device 810, one surface of the epoxy substrate 816 provided with the semiconductor element 811 and the gold wire 815 is sealed with a sealing resin 805, and bumps 803 such as solder are formed in an area shape on the back surface. The semiconductor device is called a BGA (ball grid array) structure, and the second semiconductor device is the above-described semiconductor device 820, which are individually manufactured. When mounting these two individually manufactured semiconductor devices 810 and 820 on the same plane of the printed board 13 as shown in FIG. 14, there is a problem that it is difficult to achieve high-density board mounting. .

  In order to solve the above problem, as shown in FIG. 15, there is a configuration in which the semiconductor elements 1 a and 1 b are stacked and the metal thin wires 15 a and 15 b are connected to the wiring 14 and then resin-sealed. According to this configuration, high-density mounting can be achieved without increasing the board mounting area. However, there are the following problems in terms of the yield of the entire semiconductor device. That is, normally, a semiconductor device is subjected to a simple characteristic check in a wafer state, but a final test (shipment test) is performed only as a semiconductor device after assembly. Therefore, when a semiconductor device is manufactured by mounting two semiconductor elements that have not been final tested, the yield of the entire semiconductor device is the product of the yields of the two semiconductor elements. For this reason, there is a problem that the yield is reduced in inverse proportion to the high-density mounting, leading to an increase in cost.

  In order to solve the above-described problems, according to the present invention, there is provided a method for manufacturing a semiconductor device in which a chip size package is mounted on a BGA package so that respective terminal formation surfaces face each other. 1 step, the wafer surface of the wafer on which the semiconductor element is formed and the copper wiring formed on the wafer surface are covered with a resin, the surface of the resin is ground to expose the copper wiring from the resin, and from the resin A second step of preparing a chip size package formed by forming a groove leading to the wafer and grinding a wafer back surface of the wafer; and a terminal of the chip size package with respect to a terminal formation surface of the BGA package And a third step of mounting the chip size package with the formation surfaces facing each other. Manufacturing method is provided.

  As an effect of the present invention, there is provided a method for manufacturing a semiconductor device capable of achieving high-density mounting while suppressing a decrease in yield in manufacturing the semiconductor device.

1 is an explanatory diagram of a semiconductor device according to Example 1. FIG. It is explanatory drawing of the manufacturing method of a 1st semiconductor device. It is explanatory drawing of the manufacturing method of a 2nd semiconductor device. FIG. 10 is an explanatory diagram of an application example of the semiconductor device according to Example 1; 7 is an explanatory diagram of a semiconductor device according to Example 2. FIG. FIG. 10 is an explanatory diagram of a semiconductor device according to Example 3. FIG. 10 is an explanatory diagram of a semiconductor device according to Example 4; FIG. 10 is an explanatory diagram of an application example of the semiconductor device according to Example 4; FIG. 10 is an explanatory diagram of a semiconductor device according to Example 5; FIG. 10 is an explanatory diagram of a semiconductor device according to Example 6; FIG. 10 is an explanatory diagram of a semiconductor device according to Example 7. It is explanatory drawing of the conventional semiconductor device. It is explanatory drawing of the manufacturing method of the conventional semiconductor device. It is explanatory drawing of the problem of the conventional semiconductor device. It is explanatory drawing of the problem of the conventional semiconductor device.

  Exemplary embodiments of a semiconductor device and a method for manufacturing the same according to the present invention will be described below in detail with reference to the accompanying drawings. In addition, in this specification and drawing, about the component which has the substantially same function structure, duplication description is abbreviate | omitted by attaching | subjecting the same code | symbol.

A semiconductor device 100 according to the present embodiment will be described with reference to FIG. As shown in FIG. 1A, the semiconductor device 100 includes a first semiconductor device 110 having bumps 3 made of solder or the like formed on the surface thereof, for example, in a lattice shape, and a plurality of terminals 2. And a second semiconductor device 120 mounted on the surface of the semiconductor device 110 where the bumps 3 are not formed. The bump 3 of the first semiconductor device 110 and the terminal 2 of the second semiconductor device 120 are electrically connected by wiring on the printed circuit board 13 when the semiconductor device 100 is mounted on the printed circuit board 13 in a later process. Connected.
A method for manufacturing the first semiconductor device 110 and the second semiconductor device 120 will be described with reference to FIGS.

(First Semiconductor Device 110) First, the first semiconductor device 110 will be described with reference to FIG. First, as shown in FIG. 2A, the semiconductor element 1 a and the wiring 14 are provided on the surface of the epoxy substrate 16. Then, as shown in FIG. 2B, the electrode on the semiconductor element 1a and the wiring 14 are connected by a thin metal wire 15a. Thereafter, as shown in FIG. 2C, sealing is performed with a sealing resin 5 so as to cover the constituent members on the epoxy substrate 16. Further, bumps 3 are formed on the back surface of the epoxy substrate 16. A through hole 17 is formed in the epoxy substrate 16, and the wiring 4 is electrically connected to the bump 3 on the back surface.
The height of the bump 3 is substantially the same as or slightly higher than the height of the second semiconductor device 120 mounted on the first semiconductor device 110 in a later process. Further, the bump 3 is melted by heat treatment when the semiconductor device 100 is mounted on the printed board 13 in a later process.

(Second Semiconductor Device 120) Next, a method for manufacturing the second semiconductor device 120 will be described with reference to FIG. First, as shown in FIG. 3A, a Cu wiring 2 having a height of about 50 μm is formed on the semiconductor element 1b by electroplating or the like. Next, as shown in FIG. 3B, the entire surface of the semiconductor element 1b is sealed with a sealing resin 5b with a thickness that completely covers the wiring 2. As the resin sealing method, a transfer molding method, a potting method, a printing method, or the like is used. Next, as shown in FIG. 3C, the entire surface is ground to expose the wiring 2 on the surface.
Next, as shown in FIG. 3D, a groove 9 is formed at a predetermined depth in a portion to be cut and divided in a subsequent process. The depth of the groove 9 is determined based on the thickness of the semiconductor element 1b when the semiconductor device is finally formed. When the thickness of the semiconductor element 1b is 100 μm, the groove is formed to be about 20 μm deep and about 120 μm. And the thickness of the resin part 5b is added and it becomes a depth of 170 micrometers in total.

Next, a back grinding process is performed. First, as shown in FIG. 3E, the grinding tape 20 is attached to the resin-formed surface of the semiconductor element 1b in which the grooves 9 are formed. This grinding tape 20 can be easily peeled off by irradiating it with ultraviolet rays. Next, the surface to which the grinding tape 20 is affixed is fixed to a grinding stage (not shown) by suction. The grinding of the back surface is performed until the bottom of the groove 9 is reached as shown in FIG. In this way, the semiconductor devices (second semiconductor device 120) divided individually on the grinding tape 12 are arranged.
Next, as shown in FIG. 3G, the mount tape 21 is attached to the ground surface. Then, the grinding tape 20 is removed by irradiation with ultraviolet rays. The second semiconductor device 120 is mounted on the first semiconductor device 110 in a state of being arranged on the mount tape 21.

The mounting of the second semiconductor device 120 on the first semiconductor device 120 is performed by mounting the second semiconductor device 120 on the region where the bumps 3 of the first semiconductor device 110 are not formed using the adhesive 115. The adhesive 115 can be supplied to the first semiconductor device 110, but the adhesive 115 can be provided on the mount tape 21. The semiconductor device 100 according to the first embodiment is manufactured through the above steps. The semiconductor device 100 is mounted on the printed circuit board 13 as shown in FIG. At this time, the terminal 2 of the second semiconductor device 120 is electrically connected to the printed circuit board 13 by the solder 18. Here, the solder 18 is a solder paste previously applied to the printed circuit board 13, and this solder paste is formed corresponding to the bump 3 and the terminal 2, respectively.
As described above, according to the semiconductor device 100, the second semiconductor device 120 is mounted on the surface of the first semiconductor device 110 where the bumps 3 are not formed. Since each of the first semiconductor device 110 and the second semiconductor device 120 has been subjected to a final test, high-density mounting can be achieved while suppressing a decrease in yield.

  Note that although an example in which a semiconductor device having a BGA structure is employed as the first semiconductor device 110 has been described in this embodiment, the present invention is not limited to this. For example, as shown in FIG. 4A, a first semiconductor device 110 ′ having a chip size package similar to that of the second semiconductor device 120 is employed as the first semiconductor device, thereby forming the semiconductor device 100 ′. It is also possible. As shown in FIG. 4B, the first semiconductor device 110 ′ has electrodes 2 and bumps 3 in the region where the second semiconductor device 120 is mounted, as in the first semiconductor device 110. Not formed. The same applies to the following embodiments.

  The semiconductor device 200 according to the present embodiment is an improvement of the semiconductor device 100, and the surface of the second semiconductor device 220 where the terminals are not formed is formed by the surface of the first semiconductor device 210 and the adhesive 212. By being bonded, it is common to the semiconductor device 100 in that it is mounted on the first semiconductor device 210. Hereinafter, improvements of the semiconductor device 200 will be described with reference to FIG. In addition, about the same component, the detailed description is abbreviate | omitted by attaching | subjecting the same code | symbol.

In the semiconductor device 200, a recess (a countersink portion) 215 that is shallowly and smoothly cut according to the size of the second semiconductor device 220 is formed in a predetermined region where the bump 3 of the first semiconductor device 210 is not formed. Is formed. Then, the second semiconductor device 220 is mounted on the counterbore part 215.
The semiconductor device 200 is mounted on the printed circuit board 13 as shown in FIG. At this time, since the counterbored portion 215 is formed, a wide space can be provided between the second semiconductor device 220 and the printed circuit board 13, so that connection between elements is performed as shown in FIG. Bumps 3b made of solder or the like for improving the reliability can be formed.
As described above, according to the semiconductor device 200, since a wide space in the thickness direction can be provided in the region where the second semiconductor device 220 is mounted, the second semiconductor device 220 is somewhat thick. Can also be installed. Also, by forming bumps 3b such as solder in this space, it is possible to improve the reliability of connection between elements.

  The semiconductor device 300 according to the present embodiment is an improvement of the semiconductor device 100, and the surface of the second semiconductor device 320 where the terminals are not formed is bonded to the surface of the first semiconductor device 310 with an adhesive. Thus, the semiconductor device 100 is common to the semiconductor device 100 in that it is mounted on the first semiconductor device 310. Hereinafter, improvements of the semiconductor device 300 will be described with reference to FIG. In addition, about the same component, the detailed description is abbreviate | omitted by attaching | subjecting the same code | symbol.

As shown in FIG. 6A, the semiconductor device 300 is a low adhesive that loses adhesion at a predetermined temperature or higher to an adhesive that joins the back surface of the second semiconductor device 320 and the first semiconductor device 310. A molecular adhesive 315 is used. Here, the predetermined temperature is a temperature at the time of heat treatment such as reflow when the semiconductor device 300 is mounted on the printed circuit board 13, and for example, a low molecular adhesive that loses adhesion at 200 ° C. or higher can be used.
The semiconductor device 300 is mounted on the printed circuit board 13 as shown in FIG. At this time, the low molecular adhesive 315 loses adhesive force, and the first semiconductor device 310 and the second semiconductor device 320 are separated.
As described above, according to the semiconductor device 300, when the semiconductor device 300 is mounted on the printed circuit board 13, the first semiconductor device 310 and the second semiconductor device 320 can be separated and individually aligned. it can. Due to such a self-alignment effect, mounting at an accurate position is possible.

  A semiconductor device 400 according to the present embodiment will be described with reference to FIG. In addition, about the component substantially the same as the semiconductor device 100 concerning 1st Embodiment, detailed description is abbreviate | omitted by attaching | subjecting the same code | symbol.

The semiconductor device 100 is mounted on the first semiconductor device 110 by bonding the surface of the second semiconductor device 120 on which the terminals are not formed to the surface of the first semiconductor device 110 with an adhesive 115. It was. In the semiconductor device 400 according to the present embodiment, as shown in FIG. 7A, the terminal 2 of the second semiconductor device 420 is joined to the surface of the first semiconductor device 410 by the solder 415, It is mounted on the first semiconductor device 410.
A wiring pattern for electrically connecting the bumps 3 and the terminals 2 of the second semiconductor device 420 is formed on the back surface of the epoxy substrate 16 on which the bumps 3 of the first semiconductor device 410 are formed. According to the above configuration, the first semiconductor device 410 and the second semiconductor device 420 are electrically connected on the back surface of the epoxy substrate 16.
As described above, according to the semiconductor device 400, as shown in FIG. 7B, when the device is mounted on the printed circuit board 13 in a subsequent process, the number of terminals of the entire device is not increased. Is possible.

  Note that although an example in which a BGA structure semiconductor device is employed as the first semiconductor device 410 has been described in this embodiment mode, the present invention is not limited thereto. For example, as shown in FIG. 8A, a first semiconductor device 410 ′ having a chip size package similar to that of the second semiconductor device 420 is employed as the first semiconductor device, thereby forming the semiconductor device 400 ′. It is also possible. As shown in FIG. 8B, the first semiconductor device 410 ′ has bumps 3 formed in the region where the second semiconductor device 420 is mounted, as in the first semiconductor device 410. The terminal 2 is exposed. The terminal 2 of the first semiconductor device 410 ′ and the terminal 2 of the second semiconductor device 420 are electrically connected by solder 415. The same applies to the following embodiments.

  The semiconductor device 500 according to the present embodiment is an improvement of the semiconductor device 400, and the terminal of the second semiconductor device 520 is joined to the surface of the first semiconductor device 510 by the solder 514, so that the first It is common to the semiconductor device 400 in that it is mounted on one semiconductor device 510. Hereinafter, improvements of the semiconductor device 500 will be described with reference to FIG. In addition, about the same component, the detailed description is abbreviate | omitted by attaching | subjecting the same code | symbol.

As shown in FIG. 9A, the semiconductor device 500 is characterized in that an adhesive member 515 having high thermal conductivity is attached to the back surface of the second semiconductor device 510. In the illustrated example, the adhesive member 515 has a sheet shape with a predetermined thickness.
The semiconductor device 500 is mounted on the printed circuit board 13 as shown in FIG. At this time, the second semiconductor device 520 is stably fixed to the printed circuit board 13 by the adhesive force of the adhesive member 515.
As described above, according to the semiconductor device 500, since the second semiconductor device 520 is connected to the printed circuit board 13 through the adhesive member 617 having high thermal conductivity, the heat dissipation of the second semiconductor device 520 is improved. It is possible to improve.

  The semiconductor device 600 according to the present embodiment is an improvement of the semiconductor device 400, and the first semiconductor device 620 is joined to the surface of the first semiconductor device 610 by soldering the first semiconductor device 610. This is common to the semiconductor device 400 in that it is mounted on the semiconductor device 610. Hereinafter, improvements of the semiconductor device 600 will be described with reference to FIG. In addition, about the same component, the detailed description is abbreviate | omitted by attaching | subjecting the same code | symbol.

The semiconductor device 600 is characterized in that a high melting point solder 615 is used as solder for joining the terminal surface of the second semiconductor device 620 and the first semiconductor device 610. Here, the high melting point is a melting point higher than the temperature at which the semiconductor device 600 is mounted on the printed circuit board 13 in a later step. For example, a high melting point solder 615 having a melting point of 200 ° C. or higher can be used.
As described above, according to the semiconductor device 600, the second semiconductor device 620 is bonded to the first semiconductor device 610 with the high melting point solder even if heat treatment such as reflow during mounting on the printed circuit board 13 is performed. Therefore, stable board mounting is possible.

  A semiconductor device 700 according to the present embodiment will be described with reference to FIG. In addition, about the component substantially the same as the semiconductor device 100 concerning 1st Embodiment, detailed description is abbreviate | omitted by attaching | subjecting the same code | symbol.

  In the semiconductor device 100, the second semiconductor device 120 is mounted on the first semiconductor device 110 by bonding the back surface of the second semiconductor device 120 to the front surface of the first semiconductor device 110 with the adhesive 115. In the semiconductor device 700 according to the present embodiment, as shown in FIG. 11, the second semiconductor device 720 has its back surface bonded to the surface of the first semiconductor device 710 by the sealing resin 715. The semiconductor device is mounted on the first semiconductor device 710.

  The first semiconductor device 710 is subjected to a predetermined pattern processing, and the semiconductor element 1a is fixed to the epoxy substrate 16 provided with the heat radiating plate 702 as necessary with an adhesive. And the electrode on the semiconductor element 1a and the epoxy board | substrate 16 are connected with the metal fine wire 15a. The epoxy substrate 16 is electrically connected on the front surface and is electrically connected to the bumps 3 formed on the back surface of the first semiconductor device 710.

The second semiconductor device 720 is placed in contact with the sealing resin 715 before the sealing resin 715 immediately after the sealing resin 715 of the first semiconductor device 710 is solidified. When the sealing resin 715 is solidified, the first semiconductor device 710 and the second semiconductor device 720 are integrally fixed.
As described above, according to the semiconductor device 700, the second semiconductor device is directly bonded to the resin sealing portion of the first semiconductor device, and another fixing material such as an adhesive is not necessary. Can be simplified and the cost can be reduced.

  The preferred embodiments of the semiconductor device and the manufacturing method thereof according to the present invention have been described above with reference to the accompanying drawings, but the present invention is not limited to such examples. It is obvious for those skilled in the art that various modifications or modifications can be conceived within the scope of the technical idea described in the claims, and these are naturally within the technical scope of the present invention. It is understood that it belongs.

1b Semiconductor element (semiconductor element)
2 Wiring 5b Sealing resin (resin)
16 Epoxy substrate (substrate)
110 First semiconductor device (BGA package)
110 'first semiconductor device (BGA package)
120 Second semiconductor device (chip size package)
210 First semiconductor device (BGA package)
220 Second semiconductor device (chip size package)
310 First semiconductor device (BGA package)
320 Second semiconductor device (chip size package)
410 First semiconductor device (BGA package)
410 'first semiconductor device (BGA package)
420 Second semiconductor device (chip size package)
510 First semiconductor device (BGA package)
520 Second semiconductor device (chip size package)
610 First semiconductor device (BGA package)
620 Second semiconductor device (chip size package)
710 First semiconductor device (BGA package)
720 Second semiconductor device (chip size package)

Claims (1)

A method for manufacturing a semiconductor device in which a chip-size package is mounted on a BGA package with each terminal formation surface facing each other.
A first step of preparing a BGA package;
The wafer surface of the wafer on which the semiconductor element is formed and the copper wiring formed on the wafer surface are covered with a resin, the surface of the resin is ground to expose the copper wiring from the resin, and the resin reaches the wafer. A second step of preparing a chip size package formed by forming a groove and grinding the wafer backside of the wafer;
A third step of mounting the chip size package with the terminal formation surface of the chip size package facing the terminal formation surface of the BGA package;
A method for manufacturing a semiconductor device, comprising: