JP4936695B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device in which an opening is formed from the back surface of a substrate so as to expose a metal layer formed on a semiconductor substrate, and a wiring connected to the metal layer is formed through the opening, and a manufacturing method thereof. In particular, the present invention relates to a technique for monitoring the formation state of openings.

  In recent years, CSP (Chip Size Package) has attracted attention as a three-dimensional mounting technique and a new packaging technique. The CSP refers to a small package having an outer dimension substantially the same as the outer dimension of a semiconductor chip.

  Conventionally, a BGA (Ball Grid Array) type semiconductor device is known as a kind of CSP. In this BGA type semiconductor device, a plurality of ball-shaped conductive terminals made of a metal member such as solder are arranged in a lattice pattern on one main surface of a package, and electrically connected to a semiconductor chip mounted on the other surface of the package. Is connected to.

  When incorporating this BGA type semiconductor device into an electronic device, each conductive terminal is crimped to a wiring pattern on the printed circuit board, thereby electrically connecting the semiconductor chip and the external circuit mounted on the printed circuit board. Connected.

  Such a BGA type semiconductor device is provided with a larger number of conductive terminals than other CSP type semiconductor devices such as SOP (Small Outline Package) and QFP (Quad Flat Package) having lead pins protruding from the side. It has the advantage that it can be reduced in size. This BGA type semiconductor device has an application as an image sensor chip of a digital camera mounted on a mobile phone, for example. As an example of this, there is one in which a support made of glass, for example, is bonded onto one main surface or both main surfaces of a semiconductor chip. In addition, the following patent document 1 is mentioned as related technical literature.

  Next, a method for manufacturing a BGA type semiconductor device in the case where one support is bonded to a semiconductor chip will be described with reference to the drawings.

  8 to 10 are cross-sectional views showing a manufacturing method of a BGA type semiconductor device according to a conventional example applicable to an image sensor chip.

  First, as shown in FIG. 8, a pad electrode 32 made of a metal layer mainly composed of aluminum is formed on the surface of the semiconductor substrate 30 through an insulating layer 31 made of a silicon oxide film or a silicon nitride film. Then, a support 34 made of, for example, glass is bonded onto the semiconductor substrate 30 including the pad electrode 32 via an adhesive 33 made of an epoxy resin layer.

Next, as shown in FIG. 9, a resist layer 35 having an opening is formed on the back surface of the semiconductor substrate 30 corresponding to the pad electrode 32, and using this as a mask, for example, plasma using SF ₆ and O ₂ as an etching gas. Etching is performed on the semiconductor substrate 30, and the insulating layer 31 is further etched to form an opening 36 that reaches the pad electrode 32 from the back surface of the semiconductor substrate 30.

  Then, as shown in FIG. 10, an insulating film 45 made of a silicon oxide film or the like is formed on the back surface of the semiconductor substrate 30 including the inside of the opening 36, and after removing the insulating film 45 on the pad electrode 32, a barrier layer is formed on the entire surface. 37 is formed. Further, a plating seed layer 38 is formed on the barrier layer 37, and a plating process is performed on the seed layer 38 to form a wiring layer 39 made of, for example, copper (Cu). Further, a protective layer 40 is formed on the wiring layer 39, and an opening is provided at a predetermined position of the protective layer 40 to form a conductive terminal 41 that contacts the wiring layer 39.

Thereafter, although not shown, the semiconductor substrate 30 and each of the layers stacked thereon are cut and separated into individual semiconductor chips. Thus, a BGA type semiconductor device in which the pad electrode 32 and the conductive terminal 41 are electrically connected is formed.
JP 2003-309221 A

  However, after forming the opening 36 as described above, the state of the shape of the opening 36 actually formed cannot be known unless the wafer is actually broken and the cross section is observed. . That is, since the opening 36 is formed from the back surface of the opaque semiconductor substrate 30 so as to expose the pad electrode 32 formed on the semiconductor substrate 30 via the insulating layer 31 as described above, When the opening state of 36 is to be observed, it is necessary to observe the opening state of the opening 36 from the transparent support 34 side. However, when observing from the direction of the support 34, the opening 36 cannot be recognized due to the presence of the pad electrode 32 which is a metal layer. Therefore, as shown by the dotted line in FIG. 11, the etching situation in which the semiconductor substrate 30 is not completely opened, or on the contrary, the over-etching proceeds and the opening diameter is increased at the bottom of the opening 36. In addition, the opening diameter of the opening 36 could not be confirmed.

  Therefore, an object is to enable confirmation of the formation state of the opening 36 without observing a cross section.

  In the semiconductor device of the present invention, an opening is formed from the back of the substrate so as to expose the metal layer formed on the semiconductor substrate, and a wiring layer is connected to the metal layer through the opening. It has a monitor opening for monitoring the formation state of the opening.

  In addition, the monitor opening is formed on a scribe line.

  Further, the metal layer is not disposed under the monitor opening.

  In addition, a monitor pattern for observing the opening diameter is provided below the monitor opening, which is made of the same layer as the metal layer.

  Furthermore, the monitor pattern is a rectangular pattern.

  Further, the monitor pattern is a pattern formed of a round shape, a cross shape, or a rhombus.

In addition, a conductive terminal is formed on the wiring layer exposed through an opening formed in a protective layer covering the wiring layer.
Furthermore, a support is provided on the semiconductor substrate including the metal layer.

  The manufacturing method is such that an opening is formed from the back of the substrate so as to expose the metal layer formed on the semiconductor substrate, and a wiring layer is connected to the metal layer through the opening. A monitor opening for monitoring the formation state of the opening is formed.

  In the present invention, by having the monitor opening for monitoring the formation state of the opening, the formation state of the opening can be confirmed without performing cross-sectional observation as in the prior art.

  In addition, it is possible to easily observe the formation state of the opening by merely forming the monitor opening on the scribe line and preventing the metal layer from being disposed under the monitor opening.

  Moreover, the opening diameter of the opening can be easily observed by providing a monitor pattern made of the same layer as the metal layer and having a rectangular pattern for observing the opening diameter under the monitor opening.

  Next, a semiconductor device and a method for manufacturing the same according to an embodiment of the present invention will be described with reference to FIGS.

  First, as shown in FIG. 1, a pad electrode 3 made of a metal layer containing aluminum as a main component is formed on the surface of a semiconductor substrate 1 made of a silicon wafer via an insulating layer 2 made of a silicon oxide film or a silicon nitride film. Form. And the support body 5 which consists of glass substrates, for example is adhere | attached on the semiconductor substrate 1 containing the pad electrode 3 via the adhesive agent 4 which consists of an epoxy resin layer. Incidentally, after the silicon wafer of this embodiment is divided into individual silicon chips, it becomes, for example, a CCD (Charge Coupled Device) image sensor chip. Therefore, it is necessary to receive light from the outside with a CCD device on the surface of the silicon chip, and the support 5 needs to use a transparent substrate such as a glass substrate or a translucent substrate.

  The support 5 may be an opaque substrate when the silicon chip does not receive or emit light, but when the opening state of the opening 36 is observed from the support 34 side as in the prior art. An opaque substrate is not suitable. However, an opaque substrate may be used when the support 5 is peeled off after opening a monitor opening 6b, which will be described later, and then the opening state of the monitor opening 6b is observed. Furthermore, the present invention may be applied to the case where the monitor opening 6b is opened in the semiconductor substrate 1 to which the support 5 is not bonded from the beginning, and the opening state is observed.

  Further, the support 5 is not limited to a glass substrate, and may be a plate material such as plastic, or may be a tape.

  The pad electrode 3 may be a metal other than aluminum, such as copper (Cu) or a copper alloy.

Next, as shown in FIG. 2, a resist layer PR having an opening is formed on the back surface of the semiconductor substrate 1 corresponding to the pad electrode 3, and using this as a mask, plasma etching is performed using at least SF ₆ and O ₂ as etching gases. Is performed on the semiconductor substrate 1 to form the opening 6a. At this time, the opening 6b is also formed on the scribe line shown in FIG. The opening 6b corresponds to the monitor opening of the present invention (hereinafter referred to as the monitor opening 6b). By observing the monitor opening 6b with a microscope from the lower side of the sheet of FIG. 3A, the state in which the opening 6b is formed can be confirmed, and the opening on the semiconductor chip formed under the same conditions. The formation state of the part 6a can be confirmed.

  In this case, the monitor opening 6b can be visually observed through a microscope by forming a metal layer to be the pad electrode 3 under the monitor opening 6b.

  Further, as shown in FIG. 3B, a plurality of patterned metal layers 3a may be arranged at equal intervals under the monitor opening 6b. By forming such a monitor pattern 50 made of a plurality of metal layers 3a so as to overlap the monitor opening 6b, the opening diameter of the monitor opening 6b can be observed. That is, for example, when the monitor pattern 50 made of the rectangular metal layer 3 in which 5 μm wide metal layers 3 a are arranged at intervals of 5 μm is used, the metal layer 3 a overlapping the monitor opening 6 b is 4 as shown in FIG. Since there are four gaps without the metal layer 3a corresponding to the metal layer 3a, it can be observed that the opening 6b is formed with a size of approximately 5 × 8 = 40 μm.

  Accordingly, by observing the monitor opening 6b, it is possible to determine whether or not the forming operation of the opening 6a on the semiconductor chip has been properly performed. 11 where the semiconductor substrate 30 as shown in FIG. 11 is not completely open, or conversely, overetching has progressed and the opening diameter is increased at the bottom of the opening 36, or the opening 36 The opening diameter can be confirmed.

  In the present embodiment, the monitor opening 6b is formed on the scribe line, but it may be formed in an empty area in the semiconductor chip. In this case, the monitor pattern 50 may be arranged in accordance with the position of the monitor opening 6b.

  Furthermore, the monitor pattern 50 is not limited to a rectangular pattern. For example, various monitor patterns 50 having a round shape, a cross shape, a diamond shape, or the like may be formed on the scribe line or the semiconductor chip. good.

  Further, the opening diameter of the monitor opening 6b is not necessarily the same as the opening diameter of the opening 6a, and the formation state of the opening 6a is determined by observing the monitor opening 6b having a different opening diameter. You can do it. Furthermore, the formation state of the opening 6a may be determined by forming a plurality of monitor openings 6b having different opening diameters. By forming such a plurality of types of monitor openings 6b, it is possible to determine the formation state of various openings 6a in accordance with the actual pattern conditions of the semiconductor device, and to improve the observation workability.

  Then, as shown in FIG. 5, the insulating layer 2 is etched to form an opening 6 that reaches the pad electrode 3 from the back surface of the semiconductor substrate 1.

  Subsequently, as shown in FIG. 6, an insulating layer 7 made of a silicon oxide film or the like is formed on the back surface of the semiconductor substrate 1 including the inside of the opening 6. After removing the insulating layer 7 on the pad electrode 3, a barrier is formed on the entire surface. Layer 8 is formed. The barrier layer 8 is preferably a titanium nitride (TiN) layer, for example. Alternatively, the barrier layer 8 may be made of a refractory metal such as TiW, Ta, TaN or the like and a compound thereof other than a titanium nitride layer as long as it is a compound thereof, and may have a laminated structure thereof. .

  Further, a seed layer 9 (for example, Cu layer) for plating is formed on the barrier layer 8, and a plating process is performed on the seed layer 9 to form a wiring layer 10 made of, for example, copper (Cu).

  Further, as shown in FIG. 7, a protective layer 11 is formed on the wiring layer 10, an opening 12 is provided at a predetermined position of the protective layer 11, and, for example, a Ni layer 13 and an Au layer are formed in the exposed portion of the wiring layer 10. After forming 14, conductive terminals 15 that are in contact with the wiring layer 10 through the Ni layer 13 and the Au layer 14 are formed by screen printing. In this embodiment, a resist layer is used as the protective layer 11 and the conductive terminal 15 made of solder is formed as the conductive terminal 15. However, the present invention is not limited to this.

  Thereafter, although not shown, the semiconductor substrate 1 and each of the layers stacked thereon are cut and separated into individual semiconductor chips. Thus, a BGA type semiconductor device in which the pad electrode 3 and the conductive terminal 15 are electrically connected is formed.

  In the present embodiment, the wiring layer 10 is formed by plating. However, the present invention is not limited to this. For example, without forming the seed layer 9 for plating, the wiring layer 10 may be other than plating. The wiring layer 10 may be formed by a method. For example, a layer made of aluminum or an alloy thereof may be formed by sputtering.

  Further, although the present embodiment is described as being applied to a semiconductor device in which the conductive terminal 15 is formed, the present invention is not limited to this. For example, the opening 6 penetrating the semiconductor substrate 1 is formed. If applicable, the present invention can be applied to a semiconductor device in which the conductive terminal 15 is not formed. For example, the present invention can also be applied to an LGA (Land Grid Array) type semiconductor device.

It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention. It is sectional drawing which shows the manufacturing method of the conventional semiconductor device. It is sectional drawing which shows the manufacturing method of the conventional semiconductor device. It is sectional drawing which shows the manufacturing method of the conventional semiconductor device. It is sectional drawing in the middle of manufacture of the semiconductor device for demonstrating the conventional subject.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Insulating layer 3 Pad electrode 4 Adhesive 5 Support body 6a Opening 6b Monitor opening 7 Insulating layer 8 Barrier layer 9 Seed layer 10 Wiring layer 11 Protective layer 12 Opening 13 Ni layer 14 Au layer 15 Conductive terminal 50 Monitor pattern

Claims (14)

In a semiconductor device in which an opening is formed from the back surface of the substrate so as to expose a metal layer formed on the semiconductor substrate, and a wiring layer is connected to the metal layer through the opening.
A semiconductor device comprising a monitor opening for monitoring the formation state of the opening.   The semiconductor device according to claim 1, wherein the monitor opening is formed on a scribe line. The monitoring opening in the subordinate semiconductor device according to claim 1 or claim 2, characterized in that the metal layer is not disposed. The monitoring opening in the subordinates, made from the metal layer and the same layer, the semiconductor device according to claim 1 or claim 2, characterized in that a monitor pattern for observing the opening diameter is provided. 5. The semiconductor device according to claim 4, wherein the monitor pattern is a pattern made of a rectangle, a circle, a cross, or a rhombus . 6. The semiconductor device according to claim 1, wherein a conductive terminal is formed on the wiring layer exposed through an opening formed in a protective layer covering the wiring layer. The semiconductor device according to claim 1, further comprising a support on the semiconductor substrate including the metal layer. In the method of manufacturing a semiconductor device, an opening is formed from the back surface of the substrate so as to expose the metal layer formed on the semiconductor substrate, and a wiring layer is connected to the metal layer through the opening.
A method for manufacturing a semiconductor device, comprising: forming a monitor opening for monitoring a formation state of the opening.   9. The method of manufacturing a semiconductor device according to claim 8, wherein the monitor opening is formed on a scribe line. The monitoring opening in the subordinate, a method of manufacturing a semiconductor device according to claim 8 or claim 9, characterized in that a metal layer such that the metal layer is not disposed. Wherein the monitoring opening subordinates, made from the metal layer and the same layer, a method of manufacturing a semiconductor device according to claim 8 or claim 9 characterized by forming a monitoring pattern for observing the aperture diameter. 12. The method of manufacturing a semiconductor device according to claim 11, wherein the monitor pattern is a pattern formed of a rectangle, a circle, a cross, or a rhombus . 13. The method of manufacturing a semiconductor device according to claim 8, wherein a conductive terminal is formed on the wiring layer exposed through an opening formed in a protective layer covering the wiring layer. The method of manufacturing a semiconductor device according to claim 8, further comprising a step of bonding a support body on the semiconductor substrate including the metal layer.