JP4828515B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP4828515B2 JP4828515B2 JP2007335688A JP2007335688A JP4828515B2 JP 4828515 B2 JP4828515 B2 JP 4828515B2 JP 2007335688 A JP2007335688 A JP 2007335688A JP 2007335688 A JP2007335688 A JP 2007335688A JP 4828515 B2 JP4828515 B2 JP 4828515B2
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- metal layer
- internal connection
- layer
- connection terminal
- wiring pattern
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Description
図11は、本発明の第1の実施の形態に係る半導体装置の断面図である。
図27は、本発明の第2の実施の形態に係る半導体装置の断面図である。図27において、第1の実施の形態の半導体装置10と同一構成部分には同一符号を付す。
図38は、本発明の第3の実施の形態に係る半導体装置の断面図である。図38において、第2の実施の形態の半導体装置60と同一構成部分には同一符号を付す。
11 半導体チップ
12 内部接続端子
12A 上端
12B,13A,33A,61A,62A 上面
13 樹脂層
14,15 配線パターン
14A,15A 外部接続端子配設領域
16 ソルダーレジスト層
16A,16B 開口部
17 外部接続端子
21,31 半導体基板
21A,31A 表面
22 半導体集積回路
22A 面
23 電極パッド
24 保護膜
25 合金層
31B 裏面
33 金属層
33B,44A 下面
41 接続パッド
44 第1の金属層
45 第2の金属層
47,66,68 レジスト膜
51 保護層
61 メタルポスト
62 封止樹脂
64 第3の金属層
A 半導体装置形成領域
B スクライブ領域
C 切断位置
Claims (13)
- 複数の半導体チップが形成される半導体基板と、電極パッドを有した前記複数の半導体チップと、前記電極パッドに設けられた内部接続端子と、前記内部接続端子と電気的に接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記内部接続端子が設けられた側の前記複数の半導体チップと前記内部接続端子とを覆うように樹脂層を形成する樹脂層形成工程と、
前記樹脂層の上面に金属層を形成する金属層形成工程と、
前記金属層を押圧して、前記金属層と前記内部接続端子とを接触させる接触工程と、
前記接触工程後に、レーザ溶接法、超音波溶接法、及び抵抗溶接法からなる群のうちの少なくとも1つの方法により、前記内部接続端子と接触している部分の前記金属層と、前記金属層と接触している部分の前記内部接続端子とを接合させ、前記金属層と前記内部接続端子との接合部分に合金層を形成する接合工程と、
前記接合工程後に、前記金属層をパターニングして前記配線パターンを形成する配線パターン形成工程と、を含むことを特徴とする半導体装置の製造方法。 - 複数の半導体チップが形成される半導体基板と、電極パッドを有した前記複数の半導体チップと、前記電極パッドに設けられた内部接続端子と、前記内部接続端子と電気的に接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記内部接続端子が設けられた側の前記複数の半導体チップと前記内部接続端子とを覆うように樹脂層を形成する樹脂層形成工程と、
前記樹脂層の上面に金属層を形成する金属層形成工程と、
前記金属層を押圧して、前記金属層と前記内部接続端子とを接触させる接触工程と、
前記接触工程後に、前記金属層をパターニングして前記配線パターンを形成する配線パターン形成工程と、
前記配線パターン形成工程後に、レーザ溶接法、超音波溶接法、及び抵抗溶接法からなる群のうちの少なくとも1つの方法により、前記内部接続端子と接触している部分の前記配線パターンと、前記配線パターンと接触している部分の前記内部接続端子とを接合させ、前記配線パターンと前記内部接続端子との接合部分に合金層を形成する接合工程と、を含むことを特徴とする半導体装置の製造方法。 - 前記接合工程後に、前記配線パターンの表面を粗化する粗化工程をさらに設けたことを特徴とする請求項1または2記載の半導体装置の製造方法。
- 前記内部接続端子の材料は、Auであり、前記配線パターンの材料は、Cuであることを特徴とする請求項1ないし3のうち、いずれか1項記載の半導体装置の製造方法。
- 前記樹脂層は、絶縁樹脂層又は異方性導電性樹脂層であることを特徴とする請求項1ないし4のうち、いずれか一項記載の半導体装置の製造方法。
- 複数の半導体チップが形成される半導体基板と、電極パッドを有した前記複数の半導体チップと、前記電極パッドに設けられた内部接続端子と、前記内部接続端子と電気的に接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記内部接続端子が設けられた側の前記複数の半導体チップと前記内部接続端子とを覆うように樹脂層を形成する樹脂層形成工程と、
前記樹脂層上に第1の金属層と、第2の金属層とを順次積層させる金属層積層工程と、
前記第2の金属層を押圧して、前記第1の金属層と前記内部接続端子とを接触させる接触工程と、
前記接触工程後に、レーザ溶接法、超音波溶接法、及び抵抗溶接法からなる群のうちの、少なくとも1つの方法により、前記内部接続端子と接触している部分の前記第1の金属層と、前記第1の金属層と接触している部分の前記内部接続端子とを接合させ、前記第1の金属層と前記内部接続端子との接合部分に合金層を形成する接合工程と、
前記第2の金属層をエッチングして接続パッドを形成する接続パッド形成工程と、
前記第1の金属層をエッチングして前記配線パターンを形成する配線パターン形成工程と、を含むことを特徴とする半導体装置の製造方法。 - 複数の半導体チップが形成される半導体基板と、電極パッドを有した前記複数の半導体チップと、前記電極パッドに設けられた内部接続端子と、前記内部接続端子と電気的に接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記内部接続端子が設けられた側の前記複数の半導体チップと前記内部接続端子とを覆うように樹脂層を形成する樹脂層形成工程と、
前記樹脂層上に第1の金属層と、第2の金属層と、前記第2の金属層を保護する保護層とを順次積層させる積層工程と、
前記保護層を押圧して、前記第1の金属層と前記内部接続端子とを接触させる接触工程と、
レーザ溶接法、超音波溶接法、及び抵抗溶接法からなる群のうちの、少なくとも1つの方法により、前記内部接続端子と接触している部分の前記第1の金属層と、前記第1の金属層と接触している部分の前記内部接続端子とを接合させ、前記第1の金属層と前記内部接続端子との接合部分に合金層を形成する接合工程と、
前記接触工程後に、前記保護層を除去する保護層除去工程と、
前記第2の金属層をエッチングして接続パッドを形成する接続パッド形成工程と、
前記第1の金属層をエッチングして前記配線パターンを形成する配線パターン形成工程と、を含むことを特徴とする半導体装置の製造方法。 - 複数の半導体チップが形成される半導体基板と、電極パッドを有した前記複数の半導体チップと、前記電極パッドに設けられた内部接続端子と、前記内部接続端子と電気的に接続された配線パターンと、を備えた半導体装置の製造方法であって、
前記内部接続端子が設けられた側の前記複数の半導体チップと前記内部接続端子とを覆うように樹脂層を形成する樹脂層形成工程と、
前記樹脂層上に第1の金属層と、第2の金属層と、第3の金属層とを順次積層させる金属層積層工程と、
前記第3の金属層を押圧して、前記第1の金属層と前記内部接続端子とを接触させる接触工程と、
レーザ溶接法、超音波溶接法、及び抵抗溶接法からなる群のうちの、少なくとも1つの方法により、前記内部接続端子と接触している部分の前記第1の金属層と、前記第1の金属層と接触している部分の前記内部接続端子とを接合させ、前記第1の金属層と前記内部接続端子との接合部分に合金層を形成する接合工程と、
前記第3の金属層をエッチングしてメタルポストを形成するメタルポスト形成工程と、
前記第2の金属層をエッチングして接続パッドを形成する接続パッド形成工程と、
前記第1の金属層をエッチングして前記配線パターンを形成する配線パターン形成工程と、を含むことを特徴とする半導体装置の製造方法。 - 前記接合工程後に、前記配線パターンの表面を粗化する粗化工程をさらに設けたことを特徴とする請求項6ないし8のうち、いずれか1項記載の半導体装置の製造方法。
- 前記内部接続端子の材料は、Auであり、前記配線パターンの材料は、Cuであることを特徴とする請求項6ないし9のうち、いずれか1項記載の半導体装置の製造方法。
- 前記樹脂層は、絶縁樹脂層又は異方性導電性樹脂層であることを特徴とする請求項6ないし10のうち、いずれか一項記載の半導体装置の製造方法。
- 前記第1の金属層は、前記第2の金属層をエッチングするときのエッチングストッパーであることを特徴とする請求項6ないし11のうち、いずれか1項記載の半導体装置の製造方法。
- 前記第2の金属層は、前記第3の金属層をエッチングするときのエッチングストッパーであることを特徴とする請求項8ないし12のうち、いずれか1項記載の半導体装置の製造方法。
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EP08172649A EP2075833A2 (en) | 2007-12-27 | 2008-12-22 | Method of manufacturing semiconductor device |
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