JP4825012B2 - Wiring board manufacturing method - Google Patents

Description

  The present invention relates to a method for manufacturing a wiring board.

JP 2003-142624 A

  In an integrated circuit device such as a CPU or other LSI that operates at high speed, power lines are allocated to a plurality of circuit blocks in the integrated circuit so as to branch from a common power source. When the elements are simultaneously switched at a high speed, a large current is drawn from the power supply at once, and there is a problem that fluctuations in the power supply voltage become a kind of noise and propagate to each circuit block through the power supply line. Therefore, providing a decoupling capacitor for reducing the power supply impedance for each circuit block is effective in suppressing noise propagation between blocks due to power supply voltage fluctuations.

  By the way, in the case of a large-scale integrated circuit such as a CPU, the number of circuit blocks to be built is large, the number of power supply terminals and ground terminals tends to increase, and the distance between terminals is steadily decreasing. Decoupling capacitors need to be connected to each power supply line going to each circuit block, and it is not only difficult to mount capacitors individually in an integrated circuit where many terminals are densely packed, but also miniaturization, etc. Go backwards in the flow.

  Thus, Patent Document 1 discloses a decoupling capacitor in which a ferroelectric film and a metal film are stacked and a large number of capacitor terminals are individually connected to a dense integrated circuit side terminal. In a high frequency region (especially 100 MHz or more) where the noise problem due to power supply voltage fluctuation at the time of high-speed switching is particularly likely to occur, the specific gravity of the inductive reactance term occupying the power supply impedance becomes large. Making the distance from the terminal as close as possible is effective in reducing the power source impedance. Further, when the inductance of the terminal portion increases, there is a problem that the resonance point is generated by coupling with the capacitance component of the decoupling capacitor, and the bandwidth capable of obtaining a sufficient impedance reduction effect is reduced. Therefore, producing a capacitor with a small distance between terminals as described above has an advantage that it contributes not only to the miniaturization of the element but also to the reduction of the power source impedance, which is the original purpose, and the widening of the band.

However, in Patent Document 1 described above, a capacitor is incorporated in an intermediate board provided between the electronic component and the wiring board, and the number of man-hours for assembling the electronic component on the wiring board by the amount of the intermediate board interposed. In addition, there is a problem that it is difficult to reduce the height of the assembly of the wiring board and the electronic component. In the so-called organic wiring board using a build-up layer made of a polymer material as a dielectric layer, the present inventors incorporate a capacitor using a high dielectric constant ceramic layer in a form that replaces a part of the build-up layer. I examined that. According to this, it is possible to realize a reduction in the height of the assembly as compared with the configuration using the intermediate substrate, but the following problems emerged.
(1) Adhesion strength between the build-up layer and the capacitor portion is likely to be lowered, and particularly when a thermal cycle such as a reflow process for flip-chip connecting electronic components is applied, the linear expansion coefficient between the build-up layer and the high dielectric constant ceramic layer The shear heat stress level between layers due to the difference increases, and problems such as peeling are likely to occur.
(2) A capacitor using a thin layer of a high dielectric constant ceramic is difficult to handle when bonded to a build-up layer for wiring, and has a problem of poor manufacturing efficiency.

  An object of the present invention is to provide a method for easily producing a laminate having a structure in which a ceramic dielectric layer made of a high dielectric constant ceramic and a polymer material dielectric layer are compositely laminated on a wiring board or the like. is there.

Means for Solving the Invention and Effects of the Invention

In order to solve the above problems, a method for manufacturing a wiring board according to the present invention includes:
A method of manufacturing a wiring board having a composite laminated portion in which a polymer material dielectric layer, a conductor layer, and a ceramic dielectric layer made of a high dielectric constant ceramic are laminated in contact with each other in this order,
A first laminate manufacturing step of manufacturing a first laminate by forming a ceramic dielectric layer and a conductor layer in this order on one main surface of the transfer source substrate;
A second laminate manufacturing step of manufacturing a second laminate having a polymer material dielectric layer on the bonding surface side separately from the first laminate;
A bonding step of bonding the conductor layer of the first laminate and the polymer material dielectric layer of the second laminate;
The transfer source substrate removing step of removing the transfer source substrate from the ceramic dielectric layer is performed in this order ,
As the transfer source substrate, using a metal substrate having a melting point higher than the firing temperature of the ceramic constituting the ceramic dielectric layer,
In the first laminate manufacturing step, on the main surface of the transfer source substrate, a ceramic green sheet formed by kneading a ceramic raw material powder with a binding polymer material into a sheet shape is bonded onto the metal substrate, Next, the ceramic green sheet is patterned into the shape of the ceramic dielectric layer to be obtained, and an unfired ceramic material layer forming step of forming an unfired ceramic material layer made of the pre-fired material of the ceramic dielectric layer;
And a firing step of firing the unfired ceramic material layer together with the metal substrate after the unfired ceramic material layer forming step .

  According to the method for manufacturing a wiring board of the present invention, when manufacturing a laminate having a composite laminate portion in which a polymer material dielectric layer, a conductor layer, and a ceramic dielectric layer are laminated in contact with each other in this order, A ceramic dielectric layer and a conductor layer are formed in this order on one main surface of the transfer source substrate to produce a first laminate, and a first laminate having a polymer material dielectric layer on the bonding surface side is manufactured. After the two laminated bodies are stacked and bonded together, the transfer source substrate is removed. That is, the thin and brittle ceramic dielectric layer may be used for the bonding process in a form reinforced with the transfer source substrate, and it is not necessary to handle it alone. It is possible to dramatically improve the manufacturing efficiency and the yield of a laminate having a composite laminate portion in which a layer and a ceramic dielectric layer are laminated.

  In the present invention, the high dielectric constant ceramic means a ceramic having a relative dielectric constant of 10 or more. In particular, when a high dielectric constant is required, a ferroelectric ceramic is preferably used. As the high dielectric constant ceramic, a ferroelectric composite oxide ceramic having a perovskite type crystal structure, for example, a ceramic composed of one or more of barium titanate, strontium titanate and lead titanate is particularly high. Since it has a dielectric constant and is relatively easy to manufacture, it can be suitably used in the present invention.

  The wiring board to which the present invention is applied includes, for example, a wiring laminated portion in which a dielectric layer and a conductor layer are laminated on at least one main surface of the substrate core portion. It can be configured as having a composite laminated part in which a polymer material dielectric layer (so-called build-up resin insulation layer), a conductor layer, and a ceramic dielectric layer are laminated in contact with each other in this order from the part side. Of course, it is also possible to apply the present invention to a so-called coreless substrate or the like that does not have a substrate.

  In the bonding step, when a method of pressing and bonding the first laminate and the second laminate in the stacking direction is adopted, the conductor layer of the first laminate and the polymer material dielectric layer of the second laminate The adhesion strength after bonding can be increased.

  In the laminated body to which the present invention is applied, the composite laminated portion includes a conductor layer-side cutout portion in which a part of the layer is cut away in an in-plane direction, and the ceramic dielectric layer is In the in-plane direction, there is a ceramic side cutout part of the layer cut out, a communication cutout is formed in which the ceramic side cutout and the conductor side cutout communicate with each other. A structure in which the polymer material to be formed is filled in the communicating notch through the conductor-side notch to the ceramic-side notch. In this case, the polymer material constituting the polymer material dielectric layer is filled in the continuous cutout portion formed on the conductor layer and ceramic dielectric layer side, so the adhesion strength between the layers can be increased by the anchor effect. As a result, problems such as peeling during reflow processing can be made difficult to occur.

  The wiring laminated portion having the structure can be manufactured as follows using the manufacturing method of the present invention. That is, the first laminate manufacturing process includes a ceramic-side notch patterning step of patterning a ceramic-side notch on a ceramic dielectric layer formed on one main surface of a transfer source substrate, and a ceramic after the patterning. Conducted as including a conductor layer forming step of forming a conductor layer on the dielectric layer and a conductor side notch patterning step of patterning the conductor side notch to communicate with the ceramic side notch to the conductor layer To do. And in the laminating step, on the main surface on the opening side of the communication cutout portion, the first laminated body in which the communication cutout portion composed of the ceramic side cutout portion and the conductor side cutout portion communicating therewith is formed, The second laminate in which the polymer material dielectric layer is uncured or semi-cured is overlapped with the main surface of the polymer material dielectric layer, and the first laminate and the second laminate are laminated in that state. By pressing in the direction, the uncured or semi-cured polymer material constituting the polymer material dielectric layer is press-fitted into the continuous notch, and then the polymer material is cured. According to this method, the uncured or semi-cured polymer material constituting the polymer material dielectric layer can be reliably filled into the communication notch by pressure bonding, and the structure of the wiring board can be easily obtained. be able to.

  Next, in the present invention, the conductor layer included in the composite laminate portion is the first conductor layer, and the second dielectric layer is laminated from the opposite side of the ceramic conductor layer from the first conductor layer. The first conductor layer, the ceramic dielectric layer, and the second conductor layer can form a capacitor. According to this configuration, a capacitor for decoupling or the like can be incorporated into a wiring laminate including a polymer material dielectric layer (build-up resin insulation layer), and a wiring board and electronic components (see FIG. This eliminates the need to externally attach an intermediate substrate incorporating a capacitor between them (not shown) and contributes to a reduction in the height of the assembly. In this case, the second conductor layer may be formed on the main surface side of the ceramic dielectric layer from which the transfer source substrate has been removed after the transfer source substrate removal step.

  On the other hand, the ceramic dielectric layer can be used not only as a capacitor but also as a dielectric layer constituting a distributed constant circuit laminate such as a microstrip line, a strip line, and a coplanar waveguide. By making the dielectric layer a ceramic dielectric layer, it is possible to improve the wavelength shortening rate of the line conductor included in the distributed constant circuit laminate, contributing to the compactness of circuit elements (for example, λ / 4 line). To do. Moreover, since the line width for obtaining the equivalent characteristic impedance is also reduced, it is possible to easily miniaturize the wiring part while satisfying the requirements specific to the high frequency circuit such as impedance matching. For example, if one main surface of a ceramic dielectric layer is covered with a metal surface conductor (for example, one that functions as a ground layer or a power supply layer) and a line conductor is disposed on the other main surface, a microstrip line or A stripline structure can be obtained. In this case, the line conductor may be the first conductor layer, and the polymer material dielectric layer may be disposed in contact with the main surface of the ceramic dielectric layer that forms the background region of the line conductor. it can.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 schematically shows a cross-sectional structure of a wiring board 1 according to an embodiment of a laminate to which the present invention is applied. The wiring substrate 1 has a predetermined pattern on both surfaces of a plate-like core 2c made of a heat-resistant resin plate (for example, bismaleimide-triazine resin plate), a fiber reinforced resin plate (for example, glass fiber reinforced epoxy resin), or the like. Core conductor layers 4Y and 4y forming wiring metal layers are formed respectively. These core conductor layers 4Y and 4y are formed as a plane conductor pattern covering most of the surface of the plate-like core 2c, and are used as a power supply layer (reference numeral 41 in the figure) or a ground layer (reference numeral 40 in the figure). . On the other hand, a through-hole 112 drilled by a drill or the like is formed in the plate-like core 2, and a through-hole conductor 30 that connects the core conductor layers 4Y and 4y to each other is formed on the inner wall surface thereof. The through hole 112 is filled with a resin hole filling material 31 such as an epoxy resin.

  In addition, on the core conductor layers 4Y and 4y, a polymer material such as an epoxy resin (and an inorganic filler made of silica powder for adjusting dielectric constant or dielectric strength: the same applies to other polymer material dielectric layers) First via layers (build-up layers: dielectric layers) 3Y and 3y are formed. Further, third conductor layers 4A and 4a are formed on the surface by Cu plating. The core conductor layers 4Y and 4y and the third conductor layers 4A and 4a are interconnected by vias 34, respectively. Similarly, second via layers 3A and 3a are formed on the third conductor layers 4A and 4a, respectively. The substrate core portion 2 includes a plate-like core 2c, core conductor layers 4Y and 4y, and first via layers 3Y and 3y.

  On the first main surface side of the substrate core portion 2 (the main surface appearing on the upper side in the figure), a first polymer material dielectric layer 3A and a Cu plating layer are formed on the third conductor layer 4A. Conductor layer 4B, ceramic dielectric layer 5 (concept including notch portion 16; however, the ceramic layer in which notch portion 16 is formed is hereinafter denoted by reference numeral 15; A second conductor layer 4C made of a Cu plating layer, a second polymer material dielectric layer 3B, and a third conductor layer 4D in which a plurality of terminal pads 10 for connecting electronic components are formed in this order. The first side wiring laminated portion 8 is formed by being laminated. The ceramic dielectric layer 5 is made of a high dielectric constant ceramic having a relative dielectric constant of 10 or more (preferably 1000 or more). The first conductor layer 4B, the second conductor layer 4C, and the third conductor layer 4D are conductively connected in the stacking direction through vias 34 formed as Cu filled plated portions, respectively, via the intermediate pads 12. Further, on the second main surface side of the substrate core portion 2 (main surface appearing on the lower side in the drawing), the back surface first conductor layer 4a and the polymer material dielectric layer 3a are formed on the first via layer 3y. The back surface second conductor layer 4 b including the back surface side metal terminal pad 10 ′ is laminated in this order to form the second side wiring laminated portion 7. The back surface side metal terminal pad 10 'is used as a back surface pad for connecting the wiring board 1 itself to a mother board or the like by a pin grid array (PGA) or a ball grid array (BGA).

  The conduction path formed by the via 34, the intermediate pad 12, and the through-hole conductor 30 that connects the terminal pad 10 and the back-side terminal pad 10 'is a signal conduction path SL, a power supply conduction path PL, and a ground conduction path GL. There are types. Note that the through-hole conductor 30 included in the signal conduction path SL is insulated from the power supply layer 41 or the ground layer 40 by the insulating gaps 40i and 41i. In addition, the through-hole conductor 30 included in the power supply conduction path PL has the ground layer 40 through the insulating gap 40i, and the through-hole conductor 30 included in the ground conduction path GL has the power supply layer 41 through the insulation gap 41i. Are insulated from each other.

  As described above, the wiring substrate 1 is formed with the wiring laminated portion 6 in which the dielectric layer and the conductor layer are laminated on at least one main surface of the substrate core portion 2, and the wiring laminated portion 6 has the substrate core portion 2 side. The polymer material dielectric layer 3A, the conductor layer 4B, and the ceramic dielectric layer 5 have a composite laminated portion 8 laminated in contact with each other in this order.

The gist of the method of the present invention for producing this is as follows.
(1) The ceramic laminate 5 and the conductor layer 4B are formed in this order on one main surface of the transfer source substrate 50 to produce the first laminate 60 (first laminate production process: FIG. 4 to FIG. 4). FIG. 5, steps 1-9).
(2) The polymer material dielectric layer 3A is formed on the main surface of the substrate core portion 2 to manufacture the second stacked body 70 (second stacked body manufacturing process: FIG. 6, processes 10 to 11).
(3) The conductor layer 4B of the first laminated body 60 and the polymer material dielectric layer 3A of the second laminated body 70 are bonded together (bonding process: FIGS. 7 to 9 and processes 12 to 13).
(4) The transfer source substrate 50 is removed from the ceramic dielectric layer 5 (transfer source substrate removal step: FIG. 10, steps 14 and 15).

  According to the above-described method for manufacturing a wiring board of the present invention, the ceramic dielectric layer 5 and the conductor layer 4B are formed in this order on one main surface of the transfer source substrate 50, and the first laminate 60 is manufactured. Are laminated and bonded to the second laminated body 70 in which the polymer material dielectric layer 3A is formed on the main surface of the substrate core portion 2, and then the transfer source substrate 50 is removed. That is, the thin and brittle ceramic dielectric layer 5 may be used in the bonding process in a form reinforced with the transfer source substrate 50, and it is not necessary to handle it alone. The production efficiency and yield of the wiring board 1 having the composite laminated portion 8 in which the 3A, the conductor layer 4B, and the ceramic dielectric layer 5 are laminated can be dramatically improved.

  In the bonding step, as shown in FIGS. 7 to 9, the positioning pins 90 are inserted into the guide through holes 50h and 70h formed in the first laminate 60 and the second laminate 70, respectively. The one laminated body 60 and the 2nd laminated body 70 can be bonded together, positioning each other. This effectively eliminates pattern misalignment between the ceramic dielectric layer 5 on the first laminate 60 side and the conductor layer 4B laminated in contact therewith and the polymer material dielectric layer 3A on the second laminate 70 side. Can be prevented. In the present embodiment, as shown in FIG. 2, the transfer source substrate 50 uses a guide through hole 50h formed by drilling or the like.

  As the transfer source substrate 50, a metal substrate 50 having a melting point higher than the firing temperature of the ceramic constituting the ceramic dielectric layer 5 can be used. In this case, in the first laminated body manufacturing step, the unfired ceramic material layer forming step of forming the unfired ceramic material layer 15g made of the material before firing of the ceramic dielectric layer 5 on the main surface of the transfer source substrate 50. (FIG. 4: Step 1 to Step 3) and a firing step (FIG. 5: Step 4) of firing the unfired ceramic material layer 15g together with the metal substrate 50.

  It is important for the ceramic dielectric layer 5 to be formed as a crystalline layer in order to improve the dielectric constant (particularly in the case of a ferroelectric ceramic), and the use of a fired ceramic is effective. If a metal substrate 50 having a melting point higher than the firing temperature of the ceramic constituting the ceramic dielectric layer 5 is used as the transfer source substrate 50, the transfer source substrate 50 can be used for handling even when firing the unfired ceramic material layer 15g, Moreover, since there is no problem even if the transfer source substrate 50 together with the ceramic dielectric layer 5 is exposed to the thermal history of firing, the handling is extremely simple.

  The ceramic dielectric layer 5 can also be formed by a vapor deposition method such as a sputtering method or a chemical solution deposition method such as a sol-gel method. However, when employing a vapor phase film formation method, it is important to promote crystallization by forming a film while heating the plate-like substrate. When employing a chemical solution film formation method, It is necessary to advance the crystallization of the film by baking treatment.

  For example, the ceramic dielectric layer 5 used for the capacitor is made of a composite oxide having a perovskite crystal structure, for example, one or more of barium titanate, strontium titanate and lead titanate in order to improve capacitance. In particular, the structure constituted by the above has a high dielectric constant and is relatively easy to manufacture, so that it can be suitably used in the present invention. In this case, the metal substrate 50 may be an Fe-based or Ni-based metal plate, or a Mo-based, W-based, or Ta-based metal plate having a high melting point.

  The unfired ceramic material layer 15g can be a ceramic green sheet 15g obtained by kneading ceramic raw material powder with a binding polymer material (so-called binder) and forming it into a sheet shape. The thin layer of the ceramic green sheet 15g can be easily manufactured by a doctor blade method or the like, and is easy to handle because of its high flexibility. The thickness of the ceramic dielectric layer 5 obtained by the firing is, for example, 1 μm or more and 70 μm or less.

  The ceramic dielectric layer 5 needs to be patterned into an appropriate shape for the later-described via formation and capacitor capacitance adjustment. However, since the ceramic dielectric is chemically stable, patterning by chemical etching is not easy, and since it has a high melting point, patterning by a laser or the like becomes difficult when it is densified by firing. However, the above patterning can be carried out very easily by taking the following method. That is, the ceramic green sheet 15g is bonded onto the metal substrate 50 (FIG. 4: step 1), and then patterned into the shape of the ceramic dielectric layer 15 from which the ceramic green sheet 15g is to be obtained (step 2). FIG. 5: Step 4) is carried out. In the state of the ceramic green sheet 15g, the ceramic powder is simply bonded by the bonding polymer material, so that unnecessary portions of the sheet can be easily burned off by laser light irradiation. The same method can achieve the same effect even when the ceramic dielectric layer 5 is formed by firing an unfired ceramic dry-coating layer obtained by a sol-gel method.

  As shown in FIG. 3, the ceramic green sheet 15g can be formed on a carrier sheet 51 made of a polymer material. In this method, the ceramic green sheet 15g can be manufactured with high efficiency by a known doctor blade method or the like. Specifically, a binding polymer material, a dispersant, a plasticizer, a solvent, and the like are added to the ceramic raw material powder to form a slurry, which is applied onto the carrier sheet 51 and dried to obtain a ceramic green sheet 15 g.

  The green sheet 15g is formed in a long shape as a ceramic green sheet 52 with a carrier sheet by applying slurry while pulling out the carrier sheet 51 wound in a roll shape. The carrier sheet 51 is preferably made of a polyethylene terephthalate resin from the viewpoint of securing strength at the time of manufacturing the green sheet, such as slurry application / drying, and releasability of the green sheet 15g.

  The thickness of the ceramic dielectric layer obtained by firing is desirably adjusted so as to be 1 μm or more and 100 μm or less when it is used for forming a high-capacity capacitor. Accordingly, the thickness of the ceramic green sheet 15g used for firing the ceramic dielectric layer is also adjusted as appropriate so that the thickness after firing is obtained (for example, 2 μm or more and 200 μm or less). On the other hand, when the ceramic green sheet 52 with a carrier sheet is used for the production of a substrate (laminated body), it is necessary to use it by cutting it into an appropriate size using a cutting blade. When the thickness of the ceramic green sheet 15g is adjusted to be thin as described above, if the carrier sheet 51 is excessively thin, the ceramic green sheet 15g is likely to be cracked in the vicinity of the cutting blade, causing a problem in cutting accuracy. It becomes easy. In order to avoid such problems, it is desirable to set the thickness of the carrier sheet 51 made of polyethylene terephthalate resin to 20 μm or more. The upper limit of the thickness of the carrier sheet 51 is not particularly limited. However, when the thickness is set to 100 μm or less, moderate flexibility in terms of convenience such as winding is expressed.

  In the cut ceramic green sheet 52 with a carrier sheet, a guide through hole 52h is formed by punching or the like. In addition, as shown in FIG. 2, guide through holes 50 h are also formed in the corresponding positions in the metal substrate 50. The guide through-hole 50h can be easily formed by chemical etching (particularly when the thickness of the metal substrate is 100 μm or less (20 μm or more in consideration of handling)). Specifically, the metal substrate 50 is formed by covering the main surface with an etching resist, forming an etching window corresponding to the shape of the guide through hole in this, and immersing it in an etching solution. The same etchant as that used when removing the metal substrate 50 (described later) can be used.

  In this case, as in step 1 of FIG. 4, the ceramic green sheet 15g in a state where the carrier sheet 51 is integrated on the side opposite to the bonding surface is bonded onto the metal substrate 50, and the state is changed as in step 2. Then, the ceramic green sheet 15g is laser-patterned together with the carrier sheet 51, and then, as shown in step 3, the carrier sheet 51 is removed and the firing step can be performed. When the ceramic green sheet 15g is laser-patterned together with the carrier sheet 51, the periphery of the patterning region is protected by the carrier sheet 51, so that the sprayed ceramic green sheet 15g can be removed together with the carrier sheet 51. There is an advantage that contamination due to the splash is less likely to occur on the subsequent ceramic green sheet 15g.

  In this embodiment, as is well known, a wiring board to be a final product is manufactured as a collective board integrated in a plurality of in-plane directions, and individual wiring boards are obtained by cutting and separating the collective board. Yes. Therefore, the first laminated body 60 or the second laminated body 70 generated in the process described below is also manufactured as an intermediate product in a collective form corresponding to this. In the following description, a portion that is individually incorporated into the separated wiring board in the aggregated intermediate product is referred to as a “unit”. When the step of firing the unfired ceramic material layer 15g together with the metal substrate 50 is employed, as shown in FIG. 6 (step 11), the second laminated body 70 including the substrate core portion 2 includes a plurality of the above-described units 70u. It is integrated with. As shown in Step 10 of FIG. 6, the second laminated body 70 is formed by forming polymer material dielectric layers 3A and 3a on both main surfaces of the substrate core portion 2 prepared in advance, and drilling as shown in Step 11. Thus, the guide through hole 70h is formed. The guide through holes 70h are formed at the four corners of each unit 70u.

  In the bonding step, as shown in FIG. 7, the first laminate 60 is combined on the second laminate 70 with a plurality of units 70 u that are included less than the second laminate 70. It is effective to adopt a process of arranging the The unfired ceramic material layer 15g is shrunk by firing, and when the large-area metal substrate 50 is used, the warp of the first laminate 60 obtained by the shrinkage may increase. However, by dividing the plurality of first laminated bodies 60 with respect to the second laminated body 70, the influence of warpage during firing is compared with the case where the entire first laminated body 60 is integrally formed. Can be kept low. In this case, as shown in FIG. 8, positioning pins 90 are provided in the guide through holes 60h formed at the four corners of the first laminated body 60 and the corresponding guide through holes 70h on the second laminated body 70 side. If the first laminated bodies 60 are bonded to each other while positioning the first laminated bodies 60 on the second laminated bodies 70, the positioning accuracy of the individual first laminated bodies 60 with respect to the second laminated bodies 70 is improved. be able to.

  In the transfer source substrate removing step, the metal substrate 50 can be removed by chemical etching. According to this method, the metal substrate 50 can be removed while minimizing mechanical damage to the thin ceramic dielectric layer 5. As the etchant in the case of using the Fe-based or Ni-based metal substrate 50, for example, an iron (III) chloride aqueous solution, a copper chloride (II) aqueous solution, or an acid-based etchant such as hydrochloric acid can be employed. Note that the entire metal substrate 50 may be chemically etched. For example, when an Fe-based or Ni-based metal substrate 50 is used, the metal substrate 50 includes a main body layer and an Fe content higher than that of the main body layer. It is also possible to reduce the overall substrate etching amount by comprising the separation layer and etching the separation layer to peel off the substrate body.

  Returning to FIG. 1, in the wiring board 1, in the composite laminate portion 8, the conductor layer 4 </ b> B has a conductor-side notch 18 in which a part of the layer is notched in the in-plane direction, and the ceramic dielectric layer 5 is A polymer cutout 21 having a ceramic cutout 16 in which a part of the layer is cut out in the in-plane direction, and the ceramic cutout 16 and the conductor cutout 18 communicating with each other is formed. The polymer material constituting the dielectric layer 3 </ b> A is filled in the communication cutout portion 21 so as to reach the ceramic side cutout portion 16 through the conductor side cutout portion 18.

  According to the configuration of the wiring substrate 1, in the composite laminated portion 8 in which the polymer material dielectric layer 3A, the conductor layer 4B, and the ceramic dielectric layer 5 are laminated in this order from the substrate core portion 2 side, Since the polymer material constituting the molecular material dielectric layer 3A is filled on the side of the notch 21 formed on the conductor layer 4B and the ceramic dielectric layer 5 side, the adhesion strength between the layers is increased by the anchor effect. As a result, problems such as peeling during reflow processing can be made difficult to occur.

The said structure can be obtained by performing a 1st laminated body manufacturing process as follows.
(5) The ceramic side notch 16 is formed by patterning on the ceramic green sheet 15g formed on one main surface of the transfer source substrate 50 (ceramic side notch patterning step: FIG. 4, step 3).
(6) A conductor layer 54 (which will later become 4B) is formed on the patterned ceramic dielectric layer 5 (conductor layer forming step: FIG. 5, step 5).
(7) The conductor-side notch 18 is patterned and formed on the conductor layer 4B so as to communicate with the ceramic-side notch 16 (conductor-side notch patterning step: steps 6 to 9).

  In FIG. 5, as shown in Step 5, the conductor layer 54 is formed as a Cu plating layer that encloses the transfer source substrate 50 and the ceramic dielectric layer 15 that has been subjected to patterning and firing. In step 6, a photosensitive etching resist layer 55 is formed, and in step 7, this is exposed and developed to pattern the etching window 55p. As shown in Step 8, after etching the conductor layer 54 using the etching resist layer 55, the etching resist layer 55 is removed as shown in Step 9.

  As shown in FIGS. 7 and 8, in the bonding step, the first laminate 60 in which the communication notch portion 21 including the ceramic side notch portion 16 and the conductor side notch portion 18 communicating therewith is formed. On the other hand, the second laminated body 70 in which the polymer material dielectric layer 3A is uncured or semi-cured is disposed on the main surface of the open side of the communication cutout 21 on the main surface of the polymer material dielectric layer 3A. And overlap. Here, from the upper side, the upper base 80 (having guide through-holes 80h), an auxiliary plate 81 (having guide through-holes 81h) made of stainless steel or the like, a release film 82 (having guide through-holes 82h), each first Spacer 83 in which housing portion 83W of laminated body 60 is formed, first laminated body 60, second laminated body 70, release film 84 (having guide through hole 84h), auxiliary plate 85 made of stainless steel (guide through) A lower base 86 (having a pin holding hole 86h for holding the base end portion of the positioning pin 90), a cushion sheet 87, and a carrier plate 88 are laminated in this order.

  And as shown in FIG. 9, said laminated body is pressurized using the well-known hydraulic press apparatus etc. which are not shown in figure. When the first laminated body 60 and the second laminated body 70 are pressed in the laminating direction, the uncured or semi-cured polymer material constituting the polymer material dielectric layer 3A is press-fitted into the continuous cutout portion 21. The Thereafter, the polymer material is cured by heating or the like. The uncured or semi-cured polymer material constituting the polymer material dielectric layer 3A can be reliably filled into the communication notch 21 by pressure bonding, and the structure of the wiring board 1 can be easily obtained. it can.

  Returning to FIG. 1, the wiring substrate 1 is laminated on the ceramic dielectric layer 5 from the side opposite to the first conductor layer 4 </ b> B, with the conductor layer 4 </ b> B included in the composite laminate portion 8 being the first conductor layer 4 </ b> B. It has two conductor layers 4C, and these first conductor layer 4B, ceramic dielectric layer 5 and second conductor layer 4C can form a capacitor. The first electrode 20 of the capacitor is formed on the first conductor layer 4B, and the second electrode 11 is formed on the second conductor layer 4C. One of the first electrode 20 and the second electrode 11 is connected to the power supply conduction path PL, and the other is connected to the ground conduction path GL. The first electrode 20 and the second electrode 11 are divided in the in-plane direction due to the formation of the notch for passing the via 34 and the like, and the projected overlapping area in the surface is also small, but actually, other than the notch In the portion, a continuous thin film is formed in the in-plane direction, and the projected overlap area is much larger than that shown in the cross section. The same applies to the ceramic dielectric layer 5. According to this configuration, a capacitor for decoupling or the like can be incorporated in the wiring laminated portion 6 including the molecular material dielectric layer (build-up layer), and a wiring board and electronic components (not shown) mounted thereon ), It is not necessary to externally attach an intermediate board incorporating a capacitor, which contributes to a reduction in the height of the assembly. In this case, after the transfer source substrate removal step, the second conductor layer 4C may be formed on the main surface side of the ceramic dielectric layer 5 from which the transfer source substrate 50 has been removed.

  In the configuration in which the first conductor layer 4B, the ceramic dielectric layer 5 and the second conductor layer 4C form a capacitor, at least one of the communication notches 21 is filled with the ceramic side polymer material that fills the ceramic notch 16. A conductor pattern (second electrode) 11 forming a part of the second conductor layer 4C is disposed in contact with the portion 17 on the side opposite to the portion 17 communicating with the conductor-side cutout portion 18. The boundary surface between the conductor pattern 11 and the ceramic-side polymer material filling portion 17 is formed flush with the main surface of the ceramic dielectric layer 5 on the second conductor layer 4C side. As a result, the flatness of the main surface of the ceramic dielectric layer 5 on the second conductor layer 4C side is improved, and this is also taken over by the flatness of the surface of the wiring laminated portion 6, for example, the outermost layer portion of the wiring laminated portion 6 The coplanarity of the pad 12 for connecting an electronic component formed in this way becomes good.

  In such a structure, as described above, a polymer material is press-fitted into the communication cutout portion 21 and cured in the bonding process, so that the ceramic-side polymer material filling portion 17 is made ceramic dielectric by the main surface of the transfer source substrate 50. The body layer 5 can be formed in a form that is flush with the body layer 5 (FIG. 10: step 14), and then the transfer source substrate removing step can be performed (step 15).

  Returning to FIG. 1, the wiring substrate 1 is formed with a third conductor layer 4A in contact with the polymer material dielectric layer 3A from the side opposite to the first conductor layer 4B, thereby forming a second conductor layer 4C. 11 and the third conductor layer 4A are conductively connected by a via 34 penetrating the ceramic dielectric layer 5, the first conductor layer 4B and the polymer material dielectric layer 3A in this order, and the first conductor layer 4B and the third conductor layer 4A A ceramic in which the via 34 is insulated from each other by a polymer material filling the conductor-side notch 18 and a through-hole 34 h for forming a via in the ceramic-side notch 16 fills the ceramic-side notch 16. The side polymer material filling portion 17 is formed. In this configuration, the through-hole for via is not directly drilled in the ceramic dielectric layer 5 having an insulating function, but the through-hole is formed in the ceramic-side polymer material filling portion 17 inside the via-hole. Therefore, there is an advantage that the formation of the through hole 34h is easy. Specifically, as shown in steps 15 and 16 of FIG. 10, the through-holes (vias) for forming vias from the main surface side exposed by removing the transfer source substrate 50 are formed in the ceramic-side polymer material filling portion 17. The holes 34h) can be easily formed by laser drilling (LB).

  Further, in the wiring board 1, the second conductor side cutout portion 18 in which a part of the layer is cut out in the in-plane direction communicates with a part of the communication cutout portion 21 in the second conductor layer 4 </ b> C. It is formed with. The second conductor-side polymer material filling portion 19 </ b> S filling the second conductor-side notch portion 18 is joined to the ceramic-side polymer material filling portion 17 filling the ceramic side notch portion 16 in the communication region with the communication notch portion 21. In addition, a part of the periphery of the communication cutout 21 is formed so as to wrap around the main surface of the ceramic dielectric layer 5. According to this, a structure in which the inside and the front and back of the communication notch 21 are integrally connected by the polymer material is obtained, and the second conductor side height is increased from the periphery of the communication notch 21 to the main surface side of the ceramic dielectric layer 5. When the molecular material filling portion 19S wraps around, the edge portion including the side surface of the communication cutout portion 21 of the ceramic dielectric layer 5 is embedded in the polymer material. As a result, peeling or the like with the main surface of the ceramic dielectric layer 5 as a boundary is extremely difficult to occur. This effect is particularly remarkable when the communication notch 21 and the second conductor side notch 18 are formed along the outer peripheral edge of the ceramic dielectric layer 5.

  The structure as described above forms the second conductor layer 4C after the transfer source substrate removing step is completed, and forms the second conductor side cutout portion 18 in communication with a part of the communication cutout portion 21. (FIG. 11: Step 17 to FIG. 12: Step 21). Next, another polymer material dielectric layer 3B is laminated on the main surface of the second conductor layer 4C in which the second conductor side cutout 18 is formed (step 22), and the polymer material dielectric layer 3B is formed. Can be easily obtained by filling the second conductor side cutout portion 18 with the polymer material constituting the material and joining to the ceramic side polymer material filling portion 17.

  In step 17, the exposed surface portion of the ceramic-side polymer material filling portion 17 and the inner surface of the via hole 34h are covered with an electroless Cu plating layer 91 for plating conduction, and in step 18, a plating resist layer 92 is further formed. In step 19, the plating resist layer 92 is exposed and developed to form a plating window 92p corresponding to the portion to be plated. In step 20 of FIG. 12, the via hole 34 is filled and plated by electrolytic Cu plating to form the via 34 and the intermediate pad 12. In step 21, the plating resist layer 92 is removed, and the electric field Cu plating is not formed, and the exposed electroless Cu plating layer is removed by quick etching, whereby the second conductor on which the second conductor side notch 18 is formed. Layer 4C is formed. Thereafter, in step 22, a polymer material dielectric layer 3B is formed. After that, in step 23 of FIG. 13, via holes 34 are formed in the polymer material dielectric layer 3B, and in step 24, the vias 34 filling the via holes 34 and the terminal pads 10, 10 ′ are formed by plating. Yes.

Sectional drawing which shows one Embodiment of the wiring board used as the application object of this invention. The 1st figure which shows the manufacturing process of the wiring board of FIG. Similarly in FIG. Similarly in FIG. FIG. 4 also. Similarly in FIG. Similarly in FIG. Similarly in FIG. Similarly in FIG. Similarly in FIG. FIG. 10 also. FIG. 11 also. FIG. 12 also.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Wiring board 2 Substrate core part 3A Polymer material dielectric layer 4B 1st conductor layer 4C 2nd conductor layer 4A 3rd conductor layer 5 Ceramic dielectric layer 6 Wiring laminated part 11 Conductor pattern 15g Ceramic green sheet (unfired ceramic material) layer)
16 Ceramic-side cutout portion 17 Ceramic-side polymer material filling portion 18 Conductor-side cutout portion 19S Second conductor-side polymer material filling portion 21 Communication cutout portion 50 Transfer source substrate 51 Carrier sheet 60 First laminate 70 Second laminate 70u Wiring board unit to be manufactured 50h, 70h Guide through hole

Claims (8)

A method of manufacturing a wiring board having a composite laminated portion in which a polymer material dielectric layer, a conductor layer, and a ceramic dielectric layer made of a high dielectric constant ceramic are laminated in contact with each other in this order,
A first laminate manufacturing process for manufacturing the first laminate by forming the ceramic dielectric layer and the conductor layer in this order on one main surface of the transfer source substrate;
A second laminate manufacturing step of manufacturing a second laminate having a polymer material dielectric layer on the bonding surface side separately from the first laminate;
A bonding step of bonding the conductor layer of the first laminate and the polymer material dielectric layer of the second laminate;
The transfer source substrate removing step of removing the transfer source substrate from the ceramic dielectric layer is performed in this order ,
As the transfer source substrate, using a metal substrate having a melting point higher than the firing temperature of the ceramic constituting the ceramic dielectric layer,
In the first laminate manufacturing step, on the main surface of the transfer source substrate, a ceramic green sheet formed by kneading a ceramic raw material powder with a binding polymer material into a sheet shape is bonded onto the metal substrate, Next, the ceramic green sheet is patterned into the shape of the ceramic dielectric layer to be obtained, and an unfired ceramic material layer forming step of forming an unfired ceramic material layer made of the pre-fired material of the ceramic dielectric layer;
And a firing step of firing the unfired ceramic material layer together with the metal substrate after the unfired ceramic material layer forming step .   In the bonding step, the first laminated body and the second laminated body are positioned relative to each other by inserting positioning pins through the guide through holes respectively formed in the first laminated body and the second laminated body. The manufacturing method of the wiring board of Claim 1 bonded together. The ceramic green sheet is formed on a carrier sheet made of a polymer material, and the ceramic green sheet in a state where the carrier sheet is integrated on the opposite side of the bonding surface is bonded to the metal substrate, The method for manufacturing a wiring board according to claim 1 or 2 , wherein the ceramic green sheet is laser-patterned together with a carrier sheet, and then the carrier sheet is removed to perform the firing step . 4. The method of manufacturing a wiring board according to claim 3 , wherein the ceramic green sheet is adjusted so that a thickness of the ceramic dielectric layer obtained by firing becomes 1 μm or more and 100 μm or less . 5. The method for manufacturing a wiring board according to claim 4, wherein a polyethylene terephthalate resin film having a thickness of 20 µm to 100 µm is used as the carrier sheet . The method for manufacturing a wiring board according to claim 1, wherein in the transfer source substrate removing step, the metal substrate is removed by chemical etching . The method for manufacturing a wiring board according to any one of claims 1 to 6, wherein, in the bonding step, the first stacked body and the second stacked body are pressed and bonded in the stacking direction . The wiring board has a second conductor layer laminated from the side opposite to the first conductor layer with respect to the ceramic dielectric layer, with the conductor layer included in the composite laminate portion as a first conductor layer. The first conductor layer, the ceramic dielectric layer and the second conductor layer constitute a capacitor,
The method further comprises a second conductor layer forming step of forming the second conductor layer on the main surface side of the ceramic dielectric layer from which the transfer source substrate has been removed after the transfer source substrate removing step. The manufacturing method of the wiring board of any one of Claim 1 thru | or 7 .

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