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JP4893207B2 - Electronic circuit, electro-optical device and electronic apparatus - Google Patents

Electronic circuit, electro-optical device and electronic apparatus Download PDF

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JP4893207B2
JP4893207B2 JP2006267585A JP2006267585A JP4893207B2 JP 4893207 B2 JP4893207 B2 JP 4893207B2 JP 2006267585 A JP2006267585 A JP 2006267585A JP 2006267585 A JP2006267585 A JP 2006267585A JP 4893207 B2 JP4893207 B2 JP 4893207B2
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period
driving
electro
potential
transistor
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JP2008089684A (en
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成也 ▲高▼橋
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Seiko Epson Corp
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Seiko Epson Corp
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2018Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0819Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0261Improving the quality of display appearance in the context of movement of objects on the screen or movement of the observer relative to the screen
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/06Adjustment of display parameters
    • G09G2320/0626Adjustment of display parameters for control of overall brightness
    • G09G2320/064Adjustment of display parameters for control of overall brightness by time modulation of the brightness of the illumination source

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Electroluminescent Light Sources (AREA)

Description

本発明は、有機EL(Electro Luminescence)材料からなる発光素子など各種の電気光学素子の挙動を制御する技術に関する。   The present invention relates to a technique for controlling the behavior of various electro-optical elements such as a light-emitting element made of an organic EL (Electro Luminescence) material.

面状に配列された各発光素子の輝度を制御することによって画像を表示する電気光学装置が従来から提案されている。この種の電気光学装置のうちひとつのフレーム期間の略全長にわたって各発光素子の発光が維持されるタイプの電気光学装置はホールド型と呼ばれる。   2. Description of the Related Art Conventionally, an electro-optical device that displays an image by controlling the luminance of light emitting elements arranged in a planar shape has been proposed. Of this type of electro-optical device, a type of electro-optical device in which light emission of each light-emitting element is maintained over substantially the entire length of one frame period is called a hold type.

非特許文献1に開示されるように、ホールド型の表示装置においては、画像に含まれる被写体の移動とこれに追従しようとする観察者の視点の移動とのズレに起因して、観察者によって知覚される被写体の輪郭が不明瞭となる現象(以下「動画ボケ」という)が発生する。この動画ボケを解決するための方策としては、各発光素子の階調をフレーム期間の全長にわたって維持するのではなく、CRT(Cathode Ray Tube)に代表されるインパルス型の表示装置のように各発光素子を間欠的に発光させるという方法がある。有機発光ダイオード素子(以下、OLED(Organic Light Emitting Diode))素子と称する。)を用いた表示装置でも動画ボケを低減するためには、インパルス型の駆動を行う必要がある。   As disclosed in Non-Patent Document 1, in a hold-type display device, due to a shift between a movement of a subject included in an image and a movement of an observer's viewpoint that follows the movement, A phenomenon (hereinafter referred to as “moving image blur”) in which the outline of the perceived subject becomes unclear occurs. As a measure for solving this motion blur, each light emitting element does not maintain the gradation of each light emitting element over the entire length of the frame period, but instead emits each light like an impulse type display device represented by CRT (Cathode Ray Tube). There is a method in which the element emits light intermittently. An organic light-emitting diode element (hereinafter referred to as OLED (Organic Light Emitting Diode)) element is referred to. In order to reduce moving image blur even in a display device using the above), it is necessary to perform impulse type driving.

図12にOLED素子を用いた画素回路の一例を示す。この画素回路では、選択期間にトランジスタQ1がオン状態となり表示すべき階調に応じたデータ電位が容量Cに取り込まれ保持される。そして、データ電位に応じた駆動電流がトランジスタQ2から出力される。トランジスタQ3は、OLED素子ELとトランジスタQ2との間に設けたれており、OLED素子ELの発光期間を制御する。
信学技法,EID2001-84(2002-01)p13-p18「ディスプレイの時間応答と動画の高画質化」,栗田泰市郎/電子情報通信学会(特に図3)
FIG. 12 shows an example of a pixel circuit using an OLED element. In this pixel circuit, the transistor Q1 is turned on during the selection period, and the data potential corresponding to the gradation to be displayed is taken in and held in the capacitor C. A drive current corresponding to the data potential is output from the transistor Q2. The transistor Q3 is provided between the OLED element EL and the transistor Q2, and controls the light emission period of the OLED element EL.
Shingaku Techniques, EID2001-84 (2002-01) p13-p18 “Time Response of Display and High Quality of Video”, Yashiro Kurita / The Institute of Electronics, Information and Communication Engineers (especially Figure 3)

ところで、インパルス型の駆動を行うと、ホールド型の駆動に比較して発光期間が減少するため、輝度が低下してしまう。この輝度を補うためには、図13に示すように発光期間に対する輝度を大きくする必要がある。
しかしながら、瞬間的に高い輝度でOLED素子ELを発光させるためには、大きな駆動電流が必要となり、耐圧などの問題で回路負担が増大するといった問題があった。
本発明は上述した問題に鑑みてなされたものであり、簡易な構成で動画ボケを抑制することなどを解決課題とする。
By the way, when the impulse type drive is performed, the light emission period is reduced as compared with the hold type drive, so that the luminance is lowered. In order to compensate for this luminance, it is necessary to increase the luminance for the light emission period as shown in FIG.
However, in order to cause the OLED element EL to emit light with instantaneously high luminance, a large drive current is required, and there is a problem that the circuit load increases due to problems such as withstand voltage.
The present invention has been made in view of the above-described problems, and an object of the present invention is to suppress moving image blur with a simple configuration.

以上の課題を解決するために、本発明に係る電子回路は、ゲート電位に応じた駆動電流を生成する駆動トランジスタと、駆動期間内で前記ゲート電位を変化させるゲート電位制御部と、前記駆動電流の供給により発光する電気光学素子と、前記駆動電流を前記電気光学素子に供給する経路の導通または遮断を切り替える第1スイッチング素子と、前記駆動期間を区分した複数の単位期間の各々において、前記第1スイッチング素子のオン状態またはオフ状態を、表示すべき階調に応じて制御する発光期間制御部とを具備し、前記ゲート電位制御部は、前記駆動トランジスタのゲートに接続された第1電極と前記駆動トランジスタのソースに接続された第2電極とを有し、前記第1電極と前記第2電極との間の電圧が所定の時定数で連続的に減少することで前記ゲート電位を前記駆動期間内で変化させる第1容量と、前記駆動トランジスタのゲートに印加されることで前記駆動電流の初期値を設定する基準電位が供給される電位線と前記第1容量の前記第1電極との間に設けられ、前記駆動期間の直前の初期化期間にてオン状態となり、前記駆動期間にてオフ状態となる第2スイッチング素子とを含む。
In order to solve the above problems, an electronic circuit according to the present invention includes a drive transistor that generates a drive current according to a gate potential, a gate potential control unit that changes the gate potential within a drive period, and the drive current. In each of a plurality of unit periods that divide the driving period, an electro-optical element that emits light when supplied, a first switching element that switches conduction or interruption of a path for supplying the driving current to the electro-optical element, and A light emission period control unit that controls an on state or an off state of one switching element according to a gradation to be displayed , wherein the gate potential control unit includes a first electrode connected to a gate of the driving transistor; A second electrode connected to a source of the driving transistor, and a voltage between the first electrode and the second electrode is continuously reduced with a predetermined time constant. The first capacitor for changing the gate potential within the driving period, the potential line to which the reference potential for setting the initial value of the driving current by being applied to the gate of the driving transistor is supplied, and the first capacitor A second switching element provided between the first electrode of one capacity and turned on in an initialization period immediately before the driving period and turned off in the driving period.

この発明によれば、第1スイッチング素子と発光期間制御部とを用いて、単位期間ごとに電気光学素子を発光させるか否かを制御できるので、駆動方式をインパルス型の駆動に近づけることができ、ホールド型の駆動と比較して、動画ぼけを抑制することが可能となる。また、仮に、各単位期間における駆動電流の大きさが一定であるとすれば、駆動期間に刻むことができる階調数は、そこに含まれる単位期間の数で制限される。これに対して、本発明によれば、ゲート電位制御部が駆動トランジスタのゲート電位を駆動期間にて変化させるので、駆動電流の大きさはこれに伴って変化する。そして、駆動期間を構成するどの単位期間で駆動電流を電気光学素子に供給するかを制御するので、多階調を刻むことが可能となる。 According to the present invention, since it is possible to control whether or not the electro-optic element emits light for each unit period using the first switching element and the light emission period control unit , the drive method can be brought close to impulse type drive. Compared with hold-type driving, it is possible to suppress moving image blur. If the magnitude of the drive current in each unit period is constant, the number of gradations that can be engraved in the drive period is limited by the number of unit periods included therein. On the other hand, according to the present invention, since the gate potential control unit changes the gate potential of the drive transistor during the drive period , the magnitude of the drive current changes accordingly. In addition, since it is controlled in which unit period constituting the drive period the drive current is supplied to the electro-optic element, it is possible to engrave multiple gradations.

また、第1容量は所定の時定数で保持する電圧が変化する。この時定数は、第1容量の容量成分とこれに並列な抵抗成分とによって定まる。これによって、駆動期間の直前に第1容量の第1電極の電位を基準電位に設定することによって、駆動トランジスタのゲート電位を駆動期間内で基準電位から所定の時定数で変化させることができる。時定数は、駆動期間において第1容量が保持する電圧が100%から20%以下に変化するように定めてもよい。こうすることにより容量成分を従来よりも小さい値に設計できる。すなわち第1容量の占有面積を小さくすることができる。 The voltage held in the first capacitor changes with a predetermined time constant. This time constant is determined by the capacitance component of the first capacitor and the resistance component in parallel therewith. Thus, by setting the potential of the first electrode of the first capacitor to the reference potential immediately before the driving period, the gate potential of the driving transistor can be changed from the reference potential with a predetermined time constant within the driving period . The time constant may be determined such that the voltage held by the first capacitor in the driving period changes from 100% to 20% or less. By doing so, the capacitance component can be designed to be smaller than the conventional value. That is, the area occupied by the first capacitor can be reduced.

上述した電子回路において、前記第1スイッチング素子は、その制御端子の論理レベルが第1レベルでオン状態となって前記経路を導通し、制御端子の論理レベルが第2レベルでオフ状態となって前記経路を遮断し、前記発光期間制御部は、前記制御端子の電位を保持する第2容量と、データ信号が供給されるデータ線と前記制御端子との間に設けられた第3スイッチング素子とを備え、前記第3スイッチング素子は、前記単位期間の開始から一定時間だけオン状態となり、前記データ信号は、前記電気光学素子が所定の期間で表示すべき階調に応じて前記所定の期間を区分した複数の単位期間の各々において、前記第1レベルまたは前記第2レベルの一方となることが好ましい。 In the electronic circuit described above, the first switching element is turned on when the logic level of the control terminal is the first level and is conducted through the path, and is turned off when the logic level of the control terminal is the second level. The light emission period control unit shuts off the path, the light emission period control unit includes a second capacitor that holds the potential of the control terminal, a third switching element provided between a data line to which a data signal is supplied and the control terminal, And the third switching element is turned on for a predetermined time from the start of the unit period, and the data signal has the predetermined period according to the gradation to be displayed by the electro-optical element in the predetermined period. In each of the plurality of divided unit periods, it is preferable to be one of the first level and the second level.

この発明によれば、第2容量素子によって2値のデータ信号が保持されるので、単位期間の開始からごく短い所定時間に第3スイッチング素子をオン状態することデータ信号を取り込むことができる According to the present invention, since the binary data signal is held by the second capacitor element, the data signal can be taken in by turning on the third switching element in a very short predetermined time from the start of the unit period .

次に、本発明に係る電気光学装置は、複数の走査線と、複数のデータ線と、複数の発光制御線と、前記走査線と前記データ線との交差に対応して設けられた複数の電子回路とを備え、初期化期間と複数の単位期間からなる駆動期間とに分けて、前記複数の電子回路の各々を駆動する電気光学装置であって、前記初期化期間において有効となる走査信号を前記複数の走査線に順次供給する走査線駆動手段と、前記複数の単位期間の各々において、当該単位期間の開始から所定時間だけ有効となる発光制御信号を前記複数の発光制御線に順次供給する発光制御手段と、前記複数のデータ線の各々に2値のデータ信号を各々供給するデータ線駆動手段と、を備え、前記複数の電子回路の各々は、ゲート電位に応じた駆動電流を生成する駆動トランジスタと、前記走査信号に基づいて前記初期化期間に前記駆動トランジスタのゲート電位を基準電位に設定し、駆動期間において前記ゲート電位を前記基準電位から変化させるゲート電位制御部と、前記駆動電流の供給により発光する電気光学素子と、前記駆動電流を前記電気光学素子に供給する経路の導通または遮断を切り替える第1スイッチング素子と、前記複数の単位期間の各々において、前記発光制御信号に基づいて前記データ信号をサンプルホールドすることで、前記第1スイッチング素子のオン状態またはオフ状態を、表示すべき階調に応じて制御する発光期間制御部とを具備し、前記ゲート電位制御部は、前記駆動トランジスタのゲートに接続された第1電極と前記駆動トランジスタのソースに接続された第2電極とを有し、前記第1電極と前記第2電極との間の電圧が所定の時定数で連続的に減少することで前記ゲート電位を前記駆動期間内で変化させる第1容量と、前記駆動トランジスタのゲートに印加されることで前記駆動電流の初期値を設定する前記基準電位が供給される電位線と前記第1容量の前記第1電極との間に設けられ、前記駆動期間の直前の前記初期化期間にてオン状態となり、前記駆動期間にてオフ状態となる第2スイッチング素子とを含む。 Next, an electro-optical device according to the present invention includes a plurality of scanning lines, a plurality of data lines, a plurality of light emission control lines, and a plurality of scanning lines provided corresponding to the intersections of the scanning lines and the data lines. An electro-optical device that drives each of the plurality of electronic circuits by dividing into an initialization period and a drive period composed of a plurality of unit periods, the scanning signal being effective in the initialization period Scanning line driving means for sequentially supplying the plurality of scanning lines to each of the plurality of scanning lines, and in each of the plurality of unit periods, a light emission control signal that is valid for a predetermined time from the start of the unit period is sequentially supplied to the plurality of light emission control lines. Light emission control means and data line driving means for supplying binary data signals to each of the plurality of data lines, and each of the plurality of electronic circuits generates a drive current according to a gate potential. Driving transition And a gate potential controller configured to set the gate potential of the drive transistor to a reference potential in the initialization period based on the scanning signal, and to change the gate potential from the reference potential in the drive period; and An electro-optical element that emits light when supplied; a first switching element that switches between conduction and interruption of a path for supplying the driving current to the electro-optical element; and each of the plurality of unit periods based on the light emission control signal. A light emission period control unit that controls an on state or an off state of the first switching element according to a gradation to be displayed by sample-holding a data signal, and the gate potential control unit includes the drive A first electrode connected to the gate of the transistor and a second electrode connected to the source of the driving transistor; The voltage between the first electrode and the second electrode is continuously applied with a predetermined time constant so that the gate potential is changed within the driving period, and applied to the gate of the driving transistor. Thus, it is provided between the potential line to which the reference potential for setting the initial value of the drive current is supplied and the first electrode of the first capacitor, and in the initialization period immediately before the drive period. A second switching element that is turned on and turned off during the driving period.

この発明によれば、単位期間ごとに電気光学素子を発光させるか否かを制御できるので、駆動方式をインパルス型の駆動に近づけることができ、ホールド型の駆動と比較して、動画ぼけを抑制することが可能となる。また、仮に、各単位期間における駆動電流の大きさが一定であるとすれば、駆動期間に刻むことができる階調数は、そこに含まれる単位期間の数で制限される。これに対して、本発明によれば、駆動トランジスタのゲート電位を駆動期間にわたって変化させるので、駆動電流の大きさはこれに伴って変化する。そして、どの単位期間で駆動電流を電気光学素子に供給するかを制御するので、多階調を刻むことが可能となる。 According to the present invention, since it is possible to control whether or not the electro-optic element emits light for each unit period, the driving method can be brought close to the impulse type driving, and the moving image blur is suppressed as compared with the hold type driving. It becomes possible to do. If the magnitude of the drive current in each unit period is constant, the number of gradations that can be engraved in the drive period is limited by the number of unit periods included therein. On the other hand, according to the present invention, since the gate potential of the driving transistor is changed over the driving period, the magnitude of the driving current changes accordingly. Since it is controlled in which unit period the drive current is supplied to the electro-optical element, it becomes possible to engrave multiple gradations.

次に、本発明に係る電子機器は、上述した電気光学装置を備える。この電子機器の典型例は、電気光学装置を表示装置として利用した機器である。この種の電子機器としては、パーソナルコンピュータや携帯電話機などがある。もっとも、本発明に係る電気光学装置の用途は画像の表示に限定されない。例えば、光線の照射によって感光体ドラムなどの像担持体に潜像を形成するための露光装置(露光ヘッド)、液晶装置の背面側に配置されてこれを照明する装置(バックライト)、あるいは、スキャナなどの画像読取装置に搭載されて原稿を照明する装置など各種の照明装置など、様々な用途に本発明の電気光学装置を適用することができる。
また、本発明に係る電気光学素子は、電気エネルギーによって光学特性が変化する素子の意味であって、例えば、有機発光ダイオードや無機発光ダイオードなどの発光ダイオード、あるいは、印加電圧によって透過率が変化する液晶素子、電界放出素子、表面導電型電子放出素子、弾道電子放出素子など様々な発光素子が該当する。
Next, an electronic apparatus according to the invention includes the above-described electro-optical device. A typical example of this electronic apparatus is an apparatus using an electro-optical device as a display device. Examples of this type of electronic device include a personal computer and a mobile phone. However, the use of the electro-optical device according to the present invention is not limited to image display. For example, an exposure device (exposure head) for forming a latent image on an image carrier such as a photosensitive drum by irradiation of light, a device (backlight) that is arranged on the back side of the liquid crystal device and illuminates it, or The electro-optical device of the present invention can be applied to various applications such as various illumination devices such as a device that illuminates a document by being mounted on an image reading device such as a scanner.
The electro-optical element according to the present invention means an element whose optical characteristics change depending on electric energy. For example, a light-emitting diode such as an organic light-emitting diode or an inorganic light-emitting diode, or a transmittance changes depending on an applied voltage. Various light emitting elements such as a liquid crystal element, a field emission element, a surface conduction electron emission element, and a ballistic electron emission element are applicable.

<A:実施形態>
図1は、画像を表示する手段として各種の電子機器に使用される電気光学装置の具体的な形態を示すブロック図である。同図に示すように、電気光学装置Dは、画像を表示する表示パネル10と、電気光学装置Dの各部を制御する制御回路40と、電源電位VELおよび接地電圧Gndを生成して表示パネル10に供給する電源回路50とを具備する。
<A: Embodiment>
FIG. 1 is a block diagram showing a specific form of an electro-optical device used in various electronic devices as means for displaying an image. As shown in the figure, the electro-optical device D generates a display panel 10 that displays an image, a control circuit 40 that controls each part of the electro-optical device D, a power supply potential VEL, and a ground voltage Gnd. And a power supply circuit 50 to be supplied to

表示パネル10は、複数の単位回路(画素回路)Uが配列された素子アレイ部11と、制御回路40による制御のもとに各単位回路Uを制御する走査線駆動回路22、発光制御回路23およびデータ線駆動回路25とを具備する。各単位回路Uは、電気エネルギの供給によって発光する発光素子Eを含む。各発光素子Eは、複数の発光色(赤色・緑色・青色)の何れかに発光する。赤色・緑色・青色に発光する3個の発光素子Eによって、画像の最小の単位である画素が構成される。本実施形態の発光素子Eは、有機EL(ElectroLuminescent)材料からなる発光層が陽極と陰極との間に介在するOLED素子である。発光素子Eの光量は、駆動電流IELの大きさに応じて定まる。   The display panel 10 includes an element array unit 11 in which a plurality of unit circuits (pixel circuits) U are arranged, a scanning line driving circuit 22 that controls each unit circuit U under the control of the control circuit 40, and a light emission control circuit 23. And a data line driving circuit 25. Each unit circuit U includes a light emitting element E that emits light by supplying electric energy. Each light emitting element E emits light in any of a plurality of light emission colors (red, green, and blue). The three light-emitting elements E that emit red, green, and blue constitute a pixel that is the minimum unit of an image. The light emitting element E of the present embodiment is an OLED element in which a light emitting layer made of an organic EL (ElectroLuminescent) material is interposed between an anode and a cathode. The light quantity of the light emitting element E is determined according to the magnitude of the drive current IEL.

素子アレイ部11には、X方向に延在するm本の走査線12と、各走査線12に対をなしてX方向に延在するm本の発光制御線13と、X方向に直交するY方向に延在するn本のデータ線15とが形成される(mおよびnの各々は2以上の自然数)。各単位回路U(電子回路)は、走査線12および発光制御線13の対とデータ線15との各交差に対応した位置に配置される。したがって、これらの単位回路Uは、縦m行×横n列のマトリクス状に配列する。また、素子アレイ部11には、電源回路50から各単位回路Uに至る給電線17および電位線18が形成される。電源回路50から出力された電源電位VELは給電線17を経由して各単位回路Uに供給され、電源回路50から出力された基準電位Vrefは電位線18を経由して各単位回路Uに供給される。   The element array unit 11 includes m scanning lines 12 extending in the X direction, m light emission control lines 13 extending in the X direction in pairs with the scanning lines 12, and orthogonal to the X direction. N data lines 15 extending in the Y direction are formed (each of m and n is a natural number of 2 or more). Each unit circuit U (electronic circuit) is arranged at a position corresponding to each intersection of the pair of scanning lines 12 and light emission control lines 13 and the data lines 15. Accordingly, these unit circuits U are arranged in a matrix of m rows × n columns. In the element array section 11, a power supply line 17 and a potential line 18 extending from the power supply circuit 50 to each unit circuit U are formed. The power supply potential VEL output from the power supply circuit 50 is supplied to each unit circuit U via the feeder line 17, and the reference potential Vref output from the power supply circuit 50 is supplied to each unit circuit U via the potential line 18. Is done.

制御回路40は、クロック信号や同期信号など各種の制御信号の供給によって電気光学装置Dの各部の動作のタイミングを規定する。本実施形態の制御回路40は、入力階調データG1を所定の規則に従って変換し出力画像データG2を生成する変換回路42を含む。入力階調データG1は、各発光素子Eの階調(輝度)を指定するデータであり、電気光学装置Dが搭載される電子機器のCPUなど各種の上位装置から変換回路42に供給される。   The control circuit 40 defines the operation timing of each part of the electro-optical device D by supplying various control signals such as a clock signal and a synchronization signal. The control circuit 40 of this embodiment includes a conversion circuit 42 that converts the input gradation data G1 according to a predetermined rule to generate output image data G2. The input gradation data G1 is data that designates the gradation (luminance) of each light emitting element E, and is supplied to the conversion circuit 42 from various host devices such as a CPU of an electronic device in which the electro-optical device D is mounted.

図2に単位回路Uの動作の概略を示す。単位回路Uが動作する1フィールド期間1Fは、初期化期間Tiniと駆動期間Td(所定の期間)とに区分される。初期化期間Tiniは、駆動電流IELの初期値を設定する期間である。本実施形態では、初期化期間Tiniに設定された駆動電流IELの大きさを駆動期間Tdで変化させている。駆動期間Tdは複数のサブフィールド期間FS(単位期間)に分割される。この例では、駆動期間Tdが16個のサブフィールド期間FSから構成される。そして、サブフィールド期間FSごとに駆動電流IELを発光素子Eに供給するか否かを制御する。発光素子Eの階調は、各サブファールド期間FSにおける発光素子Eの光量の平均で定まる。出力画像データG2は各サブフィールド期間FSにおいて、駆動電流IELを発光素子Eに供給するか否かを指定する。上述した変換回路42は入力階調データG1の値と出力画像データG2の値とを対応付けて記憶したテーブルを備え、このテーブルを参照して、出力画像データG2を生成する。   FIG. 2 shows an outline of the operation of the unit circuit U. One field period 1F in which the unit circuit U operates is divided into an initialization period Tini and a driving period Td (predetermined period). The initialization period Tini is a period for setting an initial value of the drive current IEL. In this embodiment, the magnitude of the drive current IEL set in the initialization period Tini is changed in the drive period Td. The driving period Td is divided into a plurality of subfield periods FS (unit period). In this example, the driving period Td is composed of 16 subfield periods FS. Then, it is controlled whether or not the drive current IEL is supplied to the light emitting element E every subfield period FS. The gradation of the light emitting element E is determined by the average light amount of the light emitting element E in each sub-fard period FS. The output image data G2 designates whether or not the drive current IEL is supplied to the light emitting element E in each subfield period FS. The conversion circuit 42 described above includes a table in which the values of the input gradation data G1 and the values of the output image data G2 are stored in association with each other, and the output image data G2 is generated with reference to this table.

説明を図1に戻す。走査線駆動回路22は、m本の走査線12の各々を選択するための走査信号Gwrt[1]〜Gwrt[m]を生成して各走査線12に出力する。駆動期間において走査信号Gwrt[1]〜Gwrt[m]の各々は順番にハイレベルに遷移する。すなわち、第i行目(iは1≦i≦mを満たす整数)の走査線12に出力される走査信号Yiは、フレーム期間のうち第i番目の水平走査期間にてハイレベルとなり(すなわち第i行目の走査線12が選択され)、それ以外の期間にてローレベルを維持する。   Returning to FIG. The scanning line driving circuit 22 generates scanning signals Gwrt [1] to Gwrt [m] for selecting each of the m scanning lines 12 and outputs the scanning signals Gwrt [1] to Gwrt [m] to each scanning line 12. In the driving period, each of the scanning signals Gwrt [1] to Gwrt [m] sequentially changes to a high level. That is, the scanning signal Yi output to the scanning line 12 in the i-th row (i is an integer satisfying 1 ≦ i ≦ m) is at a high level in the i-th horizontal scanning period in the frame period (that is, the first line). The i-th scanning line 12 is selected), and the low level is maintained in other periods.

また、走査線駆動回路22は、各サブフィールド期間FSの開始から所定時間だけハイレベルとなる発光制御信号GEL[1]〜GEL[m]を生成して各発光制御線13に出力する。
データ線駆動回路25は、各データ線15にデータ信号X1〜Xnを出力する。データ信号X1〜Xnは、出力画像データG2に基づいて生成され、各サブフィールド期間FSにおいて駆動電流IELを発光素子Eに供給するか否かを指定する信号である。データ信号X(X1〜Xn)は、2値の論理レベルとなる。論理レベル「0」では接地電位Gndとなり、第1トランジスタTr1をオフ状態に設定する。一方、論理レベル「1」では電源電位VEL以上の電位となり第1トランジスタTr1をオン状態とする。なお、上述した初期化期間Tiniの開始から所定時間だけデータ信号X(X1〜Xn)は「0」に設定され、これに同期して発光制御信号GEL[1]〜GEL[m]はハイレベルとなる。これによって、初期化期間Tiniにおいて第1トランジスタTr1がオフ状態となる。
Further, the scanning line driving circuit 22 generates the light emission control signals GEL [1] to GEL [m] that become high level for a predetermined time from the start of each subfield period FS, and outputs the light emission control signals GEL [1] to GEL [m] to each light emission control line 13.
The data line driving circuit 25 outputs data signals X1 to Xn to each data line 15. The data signals X1 to Xn are signals that are generated based on the output image data G2, and specify whether or not to supply the drive current IEL to the light emitting element E in each subfield period FS. The data signal X (X1 to Xn) has a binary logic level. At the logic level “0”, the ground potential Gnd is set, and the first transistor Tr1 is set to the OFF state. On the other hand, at the logic level “1”, the potential becomes equal to or higher than the power supply potential VEL, and the first transistor Tr1 is turned on. Note that the data signal X (X1 to Xn) is set to “0” for a predetermined time from the start of the initialization period Tini, and the light emission control signals GEL [1] to GEL [m] are at a high level in synchronization with this. It becomes. As a result, the first transistor Tr1 is turned off in the initialization period Tini.

次に、図3を参照して、各単位回路Uの構成を説明する。なお、同図においては第i行に属する第j列目のひとつの単位回路Uのみが図示されているが、素子アレイ部11の総ての単位回路Uは同様の構成である。図3に示すように、単位回路Uは、給電線17から接地線(接地電圧Gnd)に至る経路上に配置された発光素子Eを含む。本実施形態の発光素子Eは、駆動電流IELの電流値に応じた輝度(光度)で発光する。発光素子Eの陰極は接地(接地電位Gnd)される。   Next, the configuration of each unit circuit U will be described with reference to FIG. In the figure, only one unit circuit U in the j-th column belonging to the i-th row is shown, but all unit circuits U of the element array unit 11 have the same configuration. As shown in FIG. 3, the unit circuit U includes a light emitting element E disposed on a path from the power supply line 17 to the ground line (ground voltage Gnd). The light emitting element E of the present embodiment emits light with luminance (luminous intensity) corresponding to the current value of the drive current IEL. The cathode of the light emitting element E is grounded (ground potential Gnd).

電流IELの経路上(給電線17と発光素子Eとの間)にはpチャネル型のトランジスタ(以下「駆動トランジスタ」という)Tdrが配置される。駆動トランジスタTdrは、電流IELの電流値をゲート電位に応じて制御するMOSFET(Metal Oxide Semiconductor FIELd Effect Transistor)であり、ソースが給電線17に接続される。駆動トランジスタTdrのドレインと発光素子Eの陽極との間には両者間の電気的な接続(導通/非導通)を制御するnチャネル型の第1トランジスタTr1が介在する。そして、ゲート電位制御部Uaは、駆動期間Tdにわたって駆動トランジスタTdrのゲート電位を変化させる手段として機能する。さらに、発光期間制御部Ubは、サブフィールド期間FSごとに第1トランジスタTr1をオン状態にするかオフ状態にするかを制御する手段として機能する。   A p-channel transistor (hereinafter referred to as “driving transistor”) Tdr is disposed on the path of the current IEL (between the feeder line 17 and the light emitting element E). The drive transistor Tdr is a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) that controls the current value of the current IEL according to the gate potential, and the source is connected to the power supply line 17. Between the drain of the drive transistor Tdr and the anode of the light emitting element E, an n-channel first transistor Tr1 for controlling electrical connection (conduction / non-conduction) between the two is interposed. The gate potential control unit Ua functions as means for changing the gate potential of the drive transistor Tdr over the drive period Td. Further, the light emission period control unit Ub functions as means for controlling whether the first transistor Tr1 is turned on or off for each subfield period FS.

図4に単位回路Uの詳細な構成を示す。ゲート電位制御部Uaは、第1容量素子C1とnチャネル型の第2トランジスタTr2とを備える。第1容量素子C1の第1電極C1aは駆動トランジスタTdrのゲートと接続され、その第2電極C1bは駆動トランジスタTdrのソースと接続される。駆動トランジスタTdrのソースには電源電位VELが供給されるので、第2電極C1bの電位は固定される。第2トランジスタTr2は第1容量素子C1の第1電極C1aと電位線18との間に設けられ、そのゲートは走査線12と電気的に接続される。第2トランジスタTr2は電位線18を介して供給される基準電位Vrefを駆動トランジスタTdrの初期電位として設定するスイッチング素子として機能する。   FIG. 4 shows a detailed configuration of the unit circuit U. The gate potential control unit Ua includes a first capacitive element C1 and an n-channel second transistor Tr2. The first electrode C1a of the first capacitive element C1 is connected to the gate of the driving transistor Tdr, and the second electrode C1b is connected to the source of the driving transistor Tdr. Since the power supply potential VEL is supplied to the source of the driving transistor Tdr, the potential of the second electrode C1b is fixed. The second transistor Tr2 is provided between the first electrode C1a of the first capacitor C1 and the potential line 18, and the gate thereof is electrically connected to the scanning line 12. The second transistor Tr2 functions as a switching element that sets the reference potential Vref supplied via the potential line 18 as the initial potential of the drive transistor Tdr.

第2トランジスタTr2がオフ状態になると、第1容量素子C1は理想的には基準電位Vrefを保持するが、この例の第1容量素子C1にはリーク電流が存在する。第1容量素子C1の等価回路を図5に示す。この図に示すように第1容量素子C1は、等価的には抵抗Rxと容量Cxとを並列に接続した素子であり、その時定数はRx・Cxである。第2トランジスタTr2がオン状態になると基準電位Vrefが第1電極C1aに印加される一方、第2電極C1bには電源電位VELが印加される。したがって、第1容量素子C1の保持する電圧ΔVは、ΔV=VEL−Vrefとなる。この電圧ΔVは、上述した時定数にしたがって減少する。このため、駆動トランジスタTdrのゲート電位は次第に上昇する。したがって、ゲート電位制御部Uaは、駆動期間Tdにおいて駆動トランジスタTdrのゲート電位を基準電位Vrefから単調増加させる手段として機能する。また、ゲート電位制御部Uaを、駆動期間Tdにおいて駆動トランジスタTdrのゲート電位を基準電位Vrefから単調減少させるように構成してもよい。   When the second transistor Tr2 is turned off, the first capacitor element C1 ideally holds the reference potential Vref, but there is a leakage current in the first capacitor element C1 in this example. An equivalent circuit of the first capacitive element C1 is shown in FIG. As shown in this figure, the first capacitive element C1 is equivalently an element in which a resistor Rx and a capacitor Cx are connected in parallel, and its time constant is Rx · Cx. When the second transistor Tr2 is turned on, the reference potential Vref is applied to the first electrode C1a, while the power supply potential VEL is applied to the second electrode C1b. Therefore, the voltage ΔV held by the first capacitive element C1 is ΔV = VEL−Vref. This voltage ΔV decreases according to the time constant described above. For this reason, the gate potential of the drive transistor Tdr gradually increases. Therefore, the gate potential control unit Ua functions as means for monotonically increasing the gate potential of the drive transistor Tdr from the reference potential Vref in the drive period Td. The gate potential control unit Ua may be configured to monotonously decrease the gate potential of the drive transistor Tdr from the reference potential Vref in the drive period Td.

説明を図4に戻す。発光期間制御部Ubは、第2容量素子C2とnチャネル型の第3トランジスタTr3とを備える。第2容量素子C2の第1電極C2aは第1トランジスタTr1のゲートと接続され、その第2電極C2bは接地される。第3トランジスタTr3は第2容量素子C2の第1電極C2aとデータ線15との間に設けられ、そのゲートは発光制御線13と電気的に接続される。発光制御線13を介して供給される発光制御信号GEL[i]は、各サブフィールド期間FSの開始から所定時間だけハイレベルとなる。この所定時間にデータ信号Xjが第2容量素子C2に取り込まれ保持される。   Returning to FIG. The light emission period control unit Ub includes a second capacitive element C2 and an n-channel third transistor Tr3. The first electrode C2a of the second capacitive element C2 is connected to the gate of the first transistor Tr1, and the second electrode C2b is grounded. The third transistor Tr3 is provided between the first electrode C2a of the second capacitive element C2 and the data line 15, and its gate is electrically connected to the light emission control line 13. The light emission control signal GEL [i] supplied via the light emission control line 13 becomes high level for a predetermined time from the start of each subfield period FS. During this predetermined time, the data signal Xj is captured and held in the second capacitor element C2.

図6は、電気光学装置Dの動作を説明するためのタイミングチャートである。この図に示すように走査信号Gwrt[1]〜Gwrt[m]は、1水平走査期間1Hごどに順次ハイレベルとなる。これにより、各単位回路Uに基準電位Vrefが順次取り込まれる。
図7に示すように、i行j列の単位回路Uでは、走査信号Gwrt[i]がハイレベルとなる初期化期間Tiniにおいて、第2トランジスタTr2がオン状態となり、基準電位Vrefが第1容量素子C1に印加される。これにより、第1容量素子C1には電圧VEL−Vrefが保持される。一方、初期化期間Tiniから所定時間が経過するまで発光制御信号GEL[i]がハイレベルとなる。このとき、データ信号Xjは「0」となる。したがって、初期化期間Tiniにおいて、第2容量素子C2は接地電位Gndを保持し、第1トランジスタTr1はオフ状態となる。なお、初期化期間Tiniが駆動期間Tdと比較して極めて短く、この期間において発光素子Eが発光しても表示すべき階調に与える影響が許容できるほど小さい場合には、初期化期間Tiniにおいて発光制御信号GEL[i]をローレベルとしてもよい。
FIG. 6 is a timing chart for explaining the operation of the electro-optical device D. As shown in this figure, the scanning signals Gwrt [1] to Gwrt [m] are sequentially set to the high level every horizontal scanning period 1H. Thereby, the reference potential Vref is sequentially taken into each unit circuit U.
As shown in FIG. 7, in the unit circuit U of i row and j column, in the initialization period Tini in which the scanning signal Gwrt [i] is at the high level, the second transistor Tr2 is turned on and the reference potential Vref is set to the first capacitance. Applied to element C1. As a result, the voltage VEL−Vref is held in the first capacitor element C1. On the other hand, the light emission control signal GEL [i] remains at a high level until a predetermined time has elapsed from the initialization period Tini. At this time, the data signal Xj is “0”. Therefore, in the initialization period Tini, the second capacitor element C2 holds the ground potential Gnd, and the first transistor Tr1 is turned off. Note that the initialization period Tini is extremely short compared to the driving period Td, and if the light emitting element E emits light during this period and the influence on the gradation to be displayed is small enough to be allowed, the initialization period Tini The light emission control signal GEL [i] may be set to a low level.

ここで、第1電極C1aの電位を基準として第1容量素子C1に保持される電圧をΔVとしたとき、保持電圧ΔVは図6に示すように駆動期間Tdにおいて次第に減少する。発光制御信号GEL[i]は、駆動期間Tdを構成する各サブフィールド期間FSの開始から所定時間だけハイレベルとなる。このとき、j番目のデータ線15には、i行j列目の単位回路Uの階調を指定するデータ信号Xjが発光性制御信号GEL[i]と同期して供給される。この例では、「0,0,1,0,0,1,1,0,0,0,0,1,0,0,0,0」となり、第1トランジスタTr1のゲート電位は、第3番目、第6番目、第7番目、および第12番目のサブフィールド期間FSにおいてハイレベルとなる。例えば、第3番目のサブフィールド期間FSの開始から発光制御信号GEL[i]がハイレベルとなる期間では、i行j列の単位回路Uは、図8に示すように動作する。そして、第3番目のサブフィールド期間FSにおいて発光性制御信号GEL[i]がハイレベルからローレベルに遷移すると、第3トランジスタTr3はオフ状態となる。このとき、第2容量素子C2にはハイレベルの電位が保持されているので、第3番目のサブフィールド期間FSにおいて第1トランジスタTr1はオン状態を維持する。   Here, when the voltage held in the first capacitive element C1 is ΔV with the potential of the first electrode C1a as a reference, the holding voltage ΔV gradually decreases in the driving period Td as shown in FIG. The light emission control signal GEL [i] becomes high level for a predetermined time from the start of each subfield period FS constituting the driving period Td. At this time, the data signal Xj specifying the gradation of the unit circuit U in the i-th row and j-th column is supplied to the j-th data line 15 in synchronization with the light emission control signal GEL [i]. In this example, “0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0” is obtained, and the gate potential of the first transistor Tr1 is third. It becomes the high level in the sixth, seventh, twelfth and twelfth subfield periods FS. For example, in the period in which the light emission control signal GEL [i] is at a high level from the start of the third subfield period FS, the unit circuit U in the i row and j column operates as shown in FIG. When the light emission control signal GEL [i] transits from the high level to the low level in the third subfield period FS, the third transistor Tr3 is turned off. At this time, since the high-level potential is held in the second capacitor element C2, the first transistor Tr1 is kept on in the third subfield period FS.

このように、第3番目、第6番目、第7番目、および第12番目のサブフィールド期間FSにおいて第1トランジスタTr1はオン状態となる。このため、駆動電流IELは図6に示すようになる。第1容量素子C1の保持電圧ΔVは駆動期間Tdにおいて変化するから、第3番目、第6番目、第7番目、および第12番目のサブフィールド期間FSにおいて発光素子Eに流れる駆動電流IELも変化する。   Thus, the first transistor Tr1 is turned on in the third, sixth, seventh, and twelfth subfield periods FS. Therefore, the drive current IEL is as shown in FIG. Since the holding voltage ΔV of the first capacitive element C1 changes in the driving period Td, the driving current IEL flowing through the light emitting element E also changes in the third, sixth, seventh, and twelfth subfield periods FS. To do.

仮に、各サブフィールド期間FSにおける駆動電流IELの大きさを一定にすると、16個のサブフィールド期間FSでは階調0から階調16までしか刻むことができない。これに対して、本実施形態では、駆動期間Tdにおいて駆動電流IELの大きささを変化させるようにゲート電位制御部Uaを用いて駆動トランジスタTdrのゲート電位を制御したので、各サブフィールド期間FSで発光素子Eの発光輝度が相違する。このため、発光素子Eを発光させるサブフィールド期間FSの組み合わせによって多階調を刻むことができる。さらに、本実施形態においては、サブフィールド期間FSごとに駆動電流IELを発光素子Eに供給するか否かを制御したので、駆動方式をインパルス型に近づけることができ、動画ぼけを減少させることができる。この結果、動画ばけを改善しつつ、多階調化を実現でき、表示品質を大幅に向上させることができる。   If the magnitude of the drive current IEL in each subfield period FS is constant, only the gradations 0 to 16 can be carved in the 16 subfield periods FS. On the other hand, in this embodiment, since the gate potential of the drive transistor Tdr is controlled using the gate potential control unit Ua so as to change the magnitude of the drive current IEL in the drive period Td, each subfield period FS The light emission luminance of the light emitting element E is different. Therefore, multiple gradations can be engraved by a combination of subfield periods FS in which the light emitting element E emits light. Further, in the present embodiment, since it is controlled whether or not the driving current IEL is supplied to the light emitting element E every subfield period FS, the driving method can be made to be an impulse type, and motion blur can be reduced. it can. As a result, it is possible to realize multi-gradation while improving blurring of moving images, and to greatly improve display quality.

なお、上述した実施形態においては発光素子Eとして有機発光ダイオード素子を例示したが、これ以外の発光素子を利用した電気光学装置にも本発明は適用される。例えば、無機EL材料からなる発光層を含む発光素子や発光ダイオード素子、電界放出(FE:FIELd Emission)素子、表面導電型電子放出(SE:Surface-conduction Electron-emitter)素子、弾道電子放出(BS:Ballistic electron Surface emitting)素子など様々な発光素子を本発明の電気光学装置に採用することができる。   In the above-described embodiment, an organic light-emitting diode element is exemplified as the light-emitting element E. However, the present invention is also applied to an electro-optical device using other light-emitting elements. For example, a light-emitting element or light-emitting diode element including a light-emitting layer made of an inorganic EL material, a field emission (FE) element, a surface-conduction electron-emitter (SE) element, a ballistic electron emission (BS) : Various ballistic electron surface emitting elements can be used in the electro-optical device of the present invention.

<B:応用例>
次に、本発明に係る電気光学装置を利用した電子機器について説明する。図9ないし図11には、以上の何れかの形態に係る電気光学装置Dを表示装置として採用した電子機器の形態が図示されている。
図9は、電気光学装置Dを採用したモバイル型のパーソナルコンピュータの構成を示す斜視図である。パーソナルコンピュータ2000は、各種の画像を表示する電気光学装置Dと、電源スイッチ2001やキーボード2002が設置された本体部2010とを具備する。電気光学装置Dは有機発光ダイオード素子を発光素子Eとして使用しているので、視野角が広く見易い画面を表示できる。
<B: Application example>
Next, electronic equipment using the electro-optical device according to the invention will be described. 9 to 11 show a form of an electronic apparatus that employs the electro-optical device D according to any one of the above forms as a display device.
FIG. 9 is a perspective view showing the configuration of a mobile personal computer employing the electro-optical device D. The personal computer 2000 includes an electro-optical device D that displays various images, and a main body 2010 on which a power switch 2001 and a keyboard 2002 are installed. Since the electro-optical device D uses an organic light-emitting diode element as the light-emitting element E, it is possible to display an easy-to-see screen with a wide viewing angle.

図10は、電気光学装置Dを適用した携帯電話機の構成を示す斜視図である。携帯電話機3000は、複数の操作ボタン3001およびスクロールボタン3002と、各種の画像を表示する電気光学装置Dとを備える。スクロールボタン3002を操作することによって、電気光学装置Dに表示される画面がスクロールされる。   FIG. 10 is a perspective view illustrating a configuration of a mobile phone to which the electro-optical device D is applied. The cellular phone 3000 includes a plurality of operation buttons 3001, scroll buttons 3002, and an electro-optical device D that displays various images. By operating the scroll button 3002, the screen displayed on the electro-optical device D is scrolled.

図11は、電気光学装置Dを適用した携帯情報端末(PDA:Personal Digital Assistants)の構成を示す斜視図である。携帯情報端末4000は、複数の操作ボタン4001および電源スイッチ4002と、各種の画像を表示する電気光学装置Dとを備える。電源スイッチ4002を操作すると、住所録やスケジュール帳といった様々な情報が電気光学装置Dに表示される。   FIG. 11 is a perspective view illustrating a configuration of a personal digital assistant (PDA) to which the electro-optical device D is applied. The portable information terminal 4000 includes a plurality of operation buttons 4001, a power switch 4002, and an electro-optical device D that displays various images. When the power switch 4002 is operated, various information such as an address book and a schedule book are displayed on the electro-optical device D.

なお、本発明に係る電気光学装置が適用される電子機器としては、図9から図11に示した機器のほか、デジタルスチルカメラ、テレビ、ビデオカメラ、カーナビゲーション装置、ページャ、電子手帳、電子ペーパー、電卓、ワードプロセッサ、ワークステーション、テレビ電話、POS端末、プリンタ、スキャナ、複写機、ビデオプレーヤ、タッチパネルを備えた機器等などが挙げられる。また、本発明に係る電気光学装置の用途は画像の表示に限定されない。例えば、光書込型のプリンタや電子複写機といった画像形成装置においては、用紙などの記録材に形成されるべき画像に応じて感光体を露光する光ヘッド(書込ヘッド)が使用されるが、この種の光ヘッドとしても本発明の電気光学装置は利用される。   The electronic apparatus to which the electro-optical device according to the present invention is applied includes the digital still camera, the television, the video camera, the car navigation device, the pager, the electronic notebook, and the electronic paper in addition to the apparatuses shown in FIGS. Calculators, word processors, workstations, videophones, POS terminals, printers, scanners, copiers, video players, devices with touch panels, and the like. The use of the electro-optical device according to the invention is not limited to image display. For example, in an image forming apparatus such as an optical writing type printer or an electronic copying machine, an optical head (writing head) that exposes a photosensitive member according to an image to be formed on a recording material such as paper is used. The electro-optical device of the present invention is also used as this type of optical head.

本発明の実施形態に係る電気光学装置の構成を示すブロック図である。1 is a block diagram illustrating a configuration of an electro-optical device according to an embodiment of the invention. FIG. 単位回路の動作の概略を示すタイミングチャートである。It is a timing chart which shows the outline of operation | movement of a unit circuit. 単位回路の構成を示すブロック図である。It is a block diagram which shows the structure of a unit circuit. 単位回路の詳細構成を示す回路図である。It is a circuit diagram which shows the detailed structure of a unit circuit. 第1容量素子の等価回路を示す回路図である。It is a circuit diagram which shows the equivalent circuit of a 1st capacitive element. 電気光学装置の動作を示すタイミングチャートである。6 is a timing chart showing the operation of the electro-optical device. 初期化期間おける単位回路の動作を示す説明図である。It is explanatory drawing which shows operation | movement of the unit circuit in an initialization period. 単位期間おける単位回路の動作を示す説明図である。It is explanatory drawing which shows operation | movement of the unit circuit in a unit period. 本発明に係る電子機器の形態(パーソナルコンピュータ)を示す斜視図である。It is a perspective view which shows the form (personal computer) of the electronic device which concerns on this invention. 本発明に係る電子機器の形態(携帯電話機)を示す斜視図である。It is a perspective view which shows the form (cellular phone) of the electronic device which concerns on this invention. 本発明に係る電子機器の形態(携帯情報端末)を示す斜視図である。It is a perspective view which shows the form (mobile information terminal) of the electronic device which concerns on this invention. 従来のOLED素子を用いた画素回路の一例を示す回路図である。It is a circuit diagram which shows an example of the pixel circuit using the conventional OLED element. インパルス型の駆動とホールド型の駆動とを比較するグラフである。It is a graph which compares an impulse type drive and a hold type drive.

符号の説明Explanation of symbols

D……電気光学装置、10……表示パネル、11……素子アレイ部、U……単位回路、E……発光素子、12……走査線、13……発光制御線、15……データ線、17……給電線、18……電位線、22……走査線駆動回路、25……データ線駆動回路、40……制御回路、Tdr……駆動トランジスタ、Tr1……第1トランジスタ、Tr2……第2トランジスタ、Tr3……第3トランジスタ、C1……第1容量素子、C2……第2容量素子、Ua……データ電位制御部、Ub……発光期間制御部。 D: Electro-optical device, 10: Display panel, 11: Element array section, U: Unit circuit, E: Light emitting element, 12: Scan line, 13: Light emission control line, 15: Data line , 17... Power supply line, 18... Potential line, 22... Scanning line drive circuit, 25... Data line drive circuit, 40... Control circuit, Tdr ... drive transistor, Tr1 ... first transistor, Tr2. ... second transistor, Tr3 ... third transistor, C1 ... first capacitor element, C2 ... second capacitor element, Ua ... data potential control unit, Ub ... light emission period control unit.

Claims (4)

ゲート電位に応じた駆動電流を生成する駆動トランジスタと、
駆動期間内で前記ゲート電位を変化させるゲート電位制御部と、
前記駆動電流の供給により発光する電気光学素子と、
前記駆動電流を前記電気光学素子に供給する経路の導通または遮断を切り替える第1スイッチング素子と、
前記駆動期間を区分した複数の単位期間の各々において、前記第1スイッチング素子のオン状態またはオフ状態を、表示すべき階調に応じて制御する発光期間制御部とを具備し、
前記ゲート電位制御部は、
前記駆動トランジスタのゲートに接続された第1電極と前記駆動トランジスタのソースに接続された第2電極とを有し、前記第1電極と前記第2電極との間の電圧が所定の時定数で連続的に減少することで前記ゲート電位を前記駆動期間内で変化させる第1容量と、
前記駆動トランジスタのゲートに印加されることで前記駆動電流の初期値を設定する基準電位が供給される電位線と前記第1容量の前記第1電極との間に設けられ、前記駆動期間の直前の初期化期間にてオン状態となり、前記駆動期間にてオフ状態となる第2スイッチング素子とを含む
電子回路。
A drive transistor that generates a drive current according to the gate potential;
A gate potential controller that changes the gate potential within a driving period;
An electro-optical element that emits light by supplying the driving current;
A first switching element that switches between conduction and interruption of a path for supplying the driving current to the electro-optic element;
A light emission period control unit configured to control an on state or an off state of the first switching element according to a gradation to be displayed in each of a plurality of unit periods into which the driving period is divided;
The gate potential controller is
A first electrode connected to a gate of the driving transistor; and a second electrode connected to a source of the driving transistor, wherein a voltage between the first electrode and the second electrode is a predetermined time constant. A first capacitor that continuously decreases to change the gate potential within the driving period;
Immediately before the driving period, provided between a potential line to which a reference potential for setting an initial value of the driving current is applied by being applied to the gate of the driving transistor and the first electrode of the first capacitor. And a second switching element that is turned on in the initialization period and turned off in the driving period.
前記第1スイッチング素子は、その制御端子の論理レベルが第1レベルでオン状態となって前記経路を導通し、制御端子の論理レベルが第2レベルでオフ状態となって前記経路を遮断し、
前記発光期間制御部は、
前記制御端子の電位を保持する第2容量と、
データ信号が供給されるデータ線と前記制御端子との間に設けられた第3スイッチング素子とを備え、
前記第3スイッチング素子は、前記単位期間の開始から一定時間だけオン状態となり、
前記データ信号は、前記電気光学素子が所定の期間で表示すべき階調に応じて前記所定の期間を区分した複数の単位期間の各々において、前記第1レベルまたは前記第2レベルの一方となる、
請求項1に記載の電子回路。
The first switching element is turned on when the logic level of the control terminal is at the first level to conduct the path, and the logic level of the control terminal is turned off at the second level to block the path.
The light emission period controller is
A second capacitor for holding the potential of the control terminal;
A third switching element provided between a data line to which a data signal is supplied and the control terminal;
The third switching element is turned on for a predetermined time from the start of the unit period,
The data signal is one of the first level and the second level in each of a plurality of unit periods in which the predetermined period is divided according to the gradation that the electro-optic element should display in a predetermined period. ,
The electronic circuit according to claim 1.
複数の走査線と、複数のデータ線と、複数の発光制御線と、前記走査線と前記データ線との交差に対応して設けられた複数の電子回路とを備え、初期化期間と複数の単位期間からなる駆動期間とに分けて、前記複数の電子回路の各々を駆動する電気光学装置であって、
前記初期化期間において有効となる走査信号を前記複数の走査線に順次供給する走査線駆動手段と、
前記複数の単位期間の各々において、当該単位期間の開始から所定時間だけ有効となる発光制御信号を前記複数の発光制御線に順次供給する発光制御手段と、
前記複数のデータ線の各々に2値のデータ信号を各々供給するデータ線駆動手段と、を備え、
前記複数の電子回路の各々は、
ゲート電位に応じた駆動電流を生成する駆動トランジスタと、
前記走査信号に基づいて前記初期化期間に前記駆動トランジスタのゲート電位を基準電位に設定し、駆動期間において前記ゲート電位を前記基準電位から変化させるゲート電位制御部と、
前記駆動電流の供給により発光する電気光学素子と、
前記駆動電流を前記電気光学素子に供給する経路の導通または遮断を切り替える第1スイッチング素子と、
前記複数の単位期間の各々において、前記発光制御信号に基づいて前記データ信号をサンプルホールドすることで、前記第1スイッチング素子のオン状態またはオフ状態を、表示すべき階調に応じて制御する発光期間制御部とを具備し、
前記ゲート電位制御部は、
前記駆動トランジスタのゲートに接続された第1電極と前記駆動トランジスタのソースに接続された第2電極とを有し、前記第1電極と前記第2電極との間の電圧が所定の時定数で連続的に減少することで前記ゲート電位を前記駆動期間内で変化させる第1容量と、
前記駆動トランジスタのゲートに印加されることで前記駆動電流の初期値を設定する前記基準電位が供給される電位線と前記第1容量の前記第1電極との間に設けられ、前記駆動期間の直前の前記初期化期間にてオン状態となり、前記駆動期間にてオフ状態となる第2スイッチング素子とを含む
電気光学装置。
A plurality of scanning lines, a plurality of data lines, a plurality of light emission control lines, and a plurality of electronic circuits provided corresponding to intersections of the scanning lines and the data lines. An electro-optical device that drives each of the plurality of electronic circuits divided into a driving period consisting of a unit period,
A scanning line driving means for sequentially supplying a scanning signal effective in the initialization period to the plurality of scanning lines;
In each of the plurality of unit periods, a light emission control unit that sequentially supplies a light emission control signal that is valid for a predetermined time from the start of the unit period to the plurality of light emission control lines;
Data line driving means for supplying a binary data signal to each of the plurality of data lines,
Each of the plurality of electronic circuits is
A drive transistor that generates a drive current according to the gate potential;
A gate potential controller configured to set a gate potential of the driving transistor to a reference potential in the initialization period based on the scanning signal, and to change the gate potential from the reference potential in the driving period;
An electro-optical element that emits light by supplying the driving current;
A first switching element that switches between conduction and interruption of a path for supplying the driving current to the electro-optic element;
In each of the plurality of unit periods, the data signal is sampled and held based on the light emission control signal, so that the on state or the off state of the first switching element is controlled according to the gradation to be displayed. A period control unit,
The gate potential controller is
A first electrode connected to a gate of the driving transistor; and a second electrode connected to a source of the driving transistor, wherein a voltage between the first electrode and the second electrode is a predetermined time constant. A first capacitor that continuously decreases to change the gate potential within the driving period;
The drive transistor is provided between a potential line to which the reference potential for setting an initial value of the drive current is applied by being applied to the gate of the drive transistor and the first electrode of the first capacitor, An electro-optical device including: a second switching element that is turned on in the immediately preceding initialization period and turned off in the driving period.
請求項3に記載の電気光学装置を備えた電子機器。
An electronic apparatus comprising the electro-optical device according to claim 3.
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