JP4602148B2 - Optical receiver - Google Patents

Description

  The present invention relates to an optical receiver that feeds back logical and tributary information when stabilizing the optical phase of two 1-bit delay interferometers that decode a DQPSK (Differential Quadrature Phase Shift Keying) signal.

  In the long-distance optical transmission system, an optical repeater amplification transmission system using an erbium-doped fiber amplifier (hereinafter abbreviated as EDFA (Erubium Doped Fiber Amplifier)) capable of directly amplifying light in the 1.5 μm band is mainly used. Further, in recent years, a large-capacity transmission system using a wavelength division multiplexing transmission system has been realized by realizing an EDFA that can be amplified in a wide band.

  In recent years when a further increase in capacity is required, effective use of the amplification band (narrowing of the wavelength multiplexing interval) can be considered as a means for realizing this, but a normal binary signal has a frequency utilization efficiency of 1 bit / s / Hz. It is considered an upper limit.

  In recent years, attention has been focused on multilevel signals, particularly phase four-value (hereinafter referred to as DQPSK) modulation methods, as means for increasing frequency utilization efficiency.

  The DQPSK modulation method is a method in which the phase of an optical carrier wave is modulated with an in-phase component and a quadrature component, and converted into two different intensity signals by delay detection with two 1-bit delay detectors at the receiving end.

  FIG. 4 is a diagram illustrating a configuration example of a conventional DQPSK modulation optical transceiver (see, for example, Patent Document 1). 4 includes a light source 26, an integrated Mach-Zehnder modulator 27, an encoder 28, a transmission line 1, an optical coupler 2, and two 1-bit delay interferometers 3, 4, 2 Two differential light receivers 5 and 6 are provided.

  In FIG. 4, the CW light generated from the light source 26 is subjected to DQPSK modulation in the integrated Mach-Zehnder modulator 27 and transmitted to the transmission line 1. Two differential signals (Ik, Qk) for performing DQPSK modulation are generated from the two data signals (Vk, Uk) in the encoder 28. In the integrated Mach-Zehnder modulator 27, phase modulation is performed by two differential signals in the two Mach-Zehnder modulators, the optical phase on one side is advanced by π / 2, and the signals are combined again to obtain a quaternary signal of the optical phase. Yes. The encoder 28 performs the following logical operation (the + sign in the circle represents an exclusive OR).

  On the receiving side, the DQPSK signal is equally branched by the optical coupler 2, and then the two 1-bit delay interferometers 3 and 4 convert the phase difference information from adjacent bits into intensity information. Receive light. The two 1-bit delay interferometers 3 and 4 decode the two data signals (Vk and Uk) by setting the optical phase to π / 4 and −π / 4, respectively. In other words, the optical phase shifted by −π / 2 with respect to the optical phase (π / 4) of one 1-bit delay interferometer 3 can be correctly decoded by giving the other 1-bit delay interferometer 4 to the optical phase.

  The 1-bit delay interferometers 3 and 4 require high optical phase accuracy and stability, but errors in the optical phase occur due to internal factors (such as composition changes) and external factors (such as temperature and pressure changes). Therefore, phase stabilization control is necessary (for example, see Non-Patent Document 1).

  When the same method is applied to the DQPSK signal, phase stabilization control is performed on one 1-bit delay interferometer 3, and the other 1-bit delay interferometer 4 is phase-shifted by −π / 2. This makes it possible to stabilize the phase.

  However, when the stabilization control method of Non-Patent Document 1 or the like is applied, it is uncertain which one-bit delay interferometer 3 or 4 decodes the two data signals (Vk or Uk), and its logic ( Positive logic and inverted logic) are also undefined. If there is a difference in the environment such as the ambient temperature between the two 1-bit delay interferometers 3 and 4, it is necessary to individually control the phase stabilization.

JP-T-2004-516743 B. Milivojevic et al., “Practical 40 Gbit / s CSRZ-DPSK transmission system with signed online chromatographic detection”, ECOC 2003, TU36

  As described above, the conventional optical receiver has a problem that the output destination and logic of the two data signals decoded when receiving the DQPSK signal are indefinite. Further, when there is an environmental difference between the two 1-bit delay interferometers, there is a problem that it is necessary to individually control the phase stabilization.

  The present invention has been made to solve the above-described problems, and its purpose is to provide a function capable of arbitrarily selecting the output destination and logic of two data signals, and to accurately select the two data signals. An optical receiver capable of correctly decoding is obtained.

Optical receiver according to the present invention, an optical coupler for equally splitting the input optical differential quaternary phase shift keying signal, the first and second 1-bit decoding the optical differential quaternary phase shift keying signal A delay interferometer, first and second differential photodetectors for photoelectrically converting optical signals from the first and second 1-bit delay interferometers, and the first and second differential photodetectors, respectively. And a first discriminator for discriminating the signals photoelectrically converted by the first discriminator, wherein the signal logic and tributary of the data identified and reproduced by the first discriminator are determined. Logic / tributary determination circuit, error signal detection means for detecting an error signal by branching the output of the first differential optical receiver, amplifier for amplifying the error signal, and determination result of the logic / tributary determination circuit Based on optical phase A first voltage source that generates a first fixed voltage corresponding to the error signal amplified by the amplifier and the first fixed voltage are added to generate a first control signal, and the first control signal is generated. A first adder for controlling the phase of the first one-bit delay interferometer based on a control signal; a second voltage source for generating a second fixed voltage that gives −π / 2 with respect to the optical phase difference; The second control signal is generated by adding the first control signal and the second fixed voltage, and the second one-bit delay interferometer is phase-controlled based on the second control signal. The adder is provided.

  The optical receiver according to the present invention has an effect that two data signals can be accurately and correctly decoded.

Embodiment 1 FIG.
An optical receiver according to Embodiment 1 of the present invention will be described with reference to FIG. 1 is a diagram showing a configuration of an optical receiver according to Embodiment 1 of the present invention. In addition, in each figure, the same code | symbol shows the same or equivalent part.

  In FIG. 1, the optical receiver according to the first embodiment includes an optical coupler 2 that equally branches an optical DQPSK signal (optical differential quaternary phase shift keying signal) input from a transmission line 1, and two consecutive bits. Two 1-bit delay interferometers 3 and 4 that take a correlation between them, two differential optical receivers 5 and 6 that photoelectrically convert signals, and identifiers 7 and 8 that identify and reproduce the original two data signals An error signal detection means 10 for detecting an error signal, an amplifier 11 for amplifying the error signal, a logic / tributary determination circuit 12 for determining the signal logic and tributary of the identified and reproduced data, and generating a fixed voltage from the determination result A voltage source 13 for adding, an adder 14 for adding the amplified error signal and the fixed voltage, a voltage source 16 for generating a fixed voltage, and an adder 17 for adding the branch signal from the adder 14 and the fixed voltage. Provided There.

  The phase control unit 9 includes an error signal detection means 10, an amplifier 11, a voltage source 13, and an adder 14. The phase control unit 15 includes a voltage source 16 and an adder 17.

  The optical DQPSK signal input from the transmission line 1 is equally branched by the optical coupler 2 and input to the two 1-bit delay interferometers 3 and 4. In these two 1-bit delay interferometers 3 and 4, the optical phase information is converted into optical intensity information by taking a correlation between two consecutive bits. At this time, it is known that two data signals can be correctly decoded when the optical phases of the two 1-bit delay interferometers 3 and 4 are π / 4 and −π / 4, respectively.

  The two decoded data signals are photoelectrically converted by the two differential light receivers 5 and 6 arranged at the subsequent stage of the two 1-bit delay interferometers 3 and 4, respectively. Two data signals are identified and reproduced. A signal obtained by partially branching the output signal of one of the differential optical receivers 5 is input to the phase controller 9, and the optical phase of the 1-bit delay interferometer 3 is stabilized and controlled by a control signal that is an output.

  In the phase controller 9, an error signal is detected by the error signal detection means 10 based on the input signal, amplified by the amplifier 11, and a fixed voltage generated by the voltage source 13 is superposed by the adder 14. Output a signal. The voltage source 13 determines the signal logic and tributary (Vk or Uk) of the data identified and reproduced by the discriminator 7 from the result of determination by the logic / tributary determination circuit 12 to -π, −π / A voltage corresponding to 2, 0, + π / 2 is generated. As a method for detecting this error signal, the method disclosed in Non-Patent Document 1 can be applied.

  A part of the control signal of the phase control unit 9 is branched, and a fixed voltage (voltage that gives −π / 2 with respect to the optical phase difference) generated by the voltage source 16 in the other phase control unit 15 is added to the adder 17. Is used as a phase stabilization control signal for the 1-bit delay interferometer 4.

  Next, the operation of the optical receiver according to the first embodiment will be described with reference to the drawings.

  When the error signal detection means 10 disclosed in Non-Patent Document 1 or the like is applied to a DQPSK signal, the optical phase of the 1-bit delay interferometer 3 in FIG. 1 is shifted by π phase to −π / 4 and π / 4, respectively. Since 3π / 4 and 5π / 4 can be selected, Uk, Vk, and data signals of the respective inverted logic are output at the output of the discriminator 7 with the same probability.

  Therefore, the identified / reproduced data signal is determined by the logic / tributary determination circuit 12 and the fixed voltage of the voltage source 13 is determined based on the information. By transmitting a training bit or the like on the transmission side in advance, the logic / tributary determination circuit 12 can determine which data (tributary) is identified and reproduced by which logic.

  If the logic is inverted (the optical phase is 5π / 4), the voltage source 13 outputs a fixed voltage corresponding to −π with respect to the optical phase difference, so that the output of the discriminator 7 is a correct data signal. (Vk). Similarly, when the data is switched (the optical phase is −π / 4), the voltage corresponding to + π / 2 with respect to the optical phase difference, and the logic is inverted (the optical phase is 3π /). In 4), a correct data signal (Vk) is obtained by outputting a voltage corresponding to −π / 2 from the voltage source 13.

  At this time, as for the optical phase of the 1-bit delay interferometer 4, a control voltage corresponding to an optical phase difference of −π / 2 with respect to the optical phase of the 1-bit delay interferometer 3 is always supplied from the voltage source 16 via the adder 17. Therefore, the correct data signal (Uk) is also identified and reproduced in the discriminator 8.

  In FIG. 1, the signal to be given to the logic / tributary determination circuit 12 is obtained from the output of the discriminator 7. However, even if the logic / tributary determination is performed based on the output signal of an error corrector or the like arranged in the subsequent stage The effect is obtained.

Embodiment 2. FIG.
An optical receiver according to Embodiment 2 of the present invention will be described with reference to FIG. FIG. 2 is a diagram showing a configuration of an optical receiver according to Embodiment 2 of the present invention.

  In FIG. 2, the optical receiver according to the second embodiment includes an optical coupler 2 that equally branches an optical DQPSK signal input from a transmission line 1, and two 1-bit delay interferences that correlate between two consecutive bits. A total of 3 and 4; two differential optical receivers 5 and 6 for photoelectrically converting signals; discriminators 7 and 8 for discriminating and reproducing the original two data signals; and error signal detecting means 10 for detecting an error signal An amplifier 11 that amplifies the error signal, a logic / tributary determination circuit 12 that determines the signal logic and tributary of the identified and reproduced data, a voltage source 13 that generates a fixed voltage from the determination result, and an amplified error signal And an adder 14 for adding a fixed voltage, an error signal detecting means 19 for detecting an error signal, an amplifier 20 for amplifying the error signal, and a logic value for determining the signal logic and tributary of the identified and reproduced data. And Byutari determination circuit 21, a voltage source 22 for generating a fixed voltage from the determination result, an adder 23 for adding the amplified error signal and a fixed voltage is provided.

  The phase control unit 18 includes an error signal detection means 19, an amplifier 20, a voltage source 22, and an adder 23.

  The difference from the first embodiment is that the 1-bit delay interferometer 4 is also provided with a phase control unit 18 and independently performs phase stabilization control. These perform the same operation as the phase stabilization control for the 1-bit delay interferometer 3 described in the first embodiment, and the contents regarding the phase stabilization control for the 1-bit delay interferometer 4 are the same as those in the first embodiment. It is the same as that of description. In the second embodiment, since the logic / tributary determination is performed individually, the two 1-bit delay interferometers 3 and 4 can be controlled completely independently.

Embodiment 3 FIG.
An optical receiver according to Embodiment 3 of the present invention will be described with reference to FIG. FIG. 3 is a diagram showing a configuration of an optical receiver according to Embodiment 3 of the present invention.

  In FIG. 3, the optical receiver according to the third embodiment includes an optical coupler 2 that equally divides an optical DQPSK signal input from a transmission line 1, and two 1-bit delay interferences that correlate between two consecutive bits. A total of 3 and 4; two differential optical receivers 5 and 6 for photoelectrically converting signals; discriminators 7 and 8 for discriminating and reproducing the original two data signals; and error signal detecting means 10 for detecting an error signal An amplifier 11 that amplifies the error signal, a logic / tributary determination circuit 12 that determines the signal logic and tributary of the identified and reproduced data, a voltage source 16 that generates a fixed voltage, and a branch signal from the amplifier 11 is fixed. An adder 17 for adding voltages and a switch circuit (SW circuit) 25 connected to the two discriminators 7 and 8 are provided.

  The phase control unit 24 includes the error signal detection means 10 and the amplifier 11.

  Next, the operation of the optical receiver according to the third embodiment will be described with reference to the drawings.

  The difference from the first embodiment is that the phase control unit 24 having a simplified function and the result determined by the logic / tributary determination circuit 12 are given to the switch circuit 25 connected to the two discriminators 7 and 8. It is. It should be noted that the same operations as those shown in FIG. 1 are performed.

  The phase control unit 24 is given a branch signal output from the differential optical receiver 5, and the amplifier 11 amplifies the signal detected by the error signal detection means 10 based on this branch signal, so that the 1-bit delay interferometer 3 Output a control signal. The switch circuit 25 inverts the logic of the data signals output from the discriminators 7 and 8 or changes (replaces) the output destination of each data signal from the information of the logic / tributary determination circuit 12.

  Since the control signal for shifting the phase by -π / 2 with respect to the phase control signal for the 1-bit delay interferometer 3 is given to the 1-bit delay interferometer 4, the two data signals output from the discriminators 7 and 8 are Different data signals and the same logic. Therefore, a correct data signal can be obtained by inverting the logic of the data signal output from the discriminator 8 based on the result determined by the logic / tributary determination circuit 12 based on the data signal output from the discriminator 7.

Embodiment 4 FIG.
In the optical receivers shown in the first to third embodiments, two decoded data can be obtained even during operation by superimposing logic and tributary information on the main signal on the transmission side. It becomes possible to monitor the logic and tributary of the signal.

It is a figure which shows the structure of the optical receiver which concerns on Embodiment 1 of this invention. It is a figure which shows the structure of the optical receiver which concerns on Embodiment 2 of this invention. It is a figure which shows the structure of the optical receiver which concerns on Embodiment 3 of this invention. It is a figure which shows the structure of the conventional optical receiver.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Transmission path, 2 Optical coupler, 3 1-bit delay interferometer, 4 1-bit delay interferometer, 5, 6 Differential receiver, 7, 8 Discriminator, 9 Phase control part, 10 Error signal detection means, 11 Amplifier, 12 logic / tributary determination circuit, 13 voltage source, 14 adder, 15 phase control unit, 16 voltage source, 17 adder, 18 phase control unit, 19 error signal detection means, 20 amplifier, 21 logic / tributary determination circuit, 22 Voltage source, 23 adder, 24 phase controller, 25 switch circuit.

Claims (2)

An optical coupler for equally splitting the input optical differential quaternary phase shift keying signal,
First and second 1-bit delay interferometers for decoding the optical differential quaternary phase shift keying signal;
First and second differential optical receivers for photoelectrically converting optical signals from the first and second 1-bit delay interferometers, respectively;
An optical receiver comprising first and second discriminators for respectively identifying the signals photoelectrically converted by the first and second differential optical receivers;
A logic / tributary determination circuit for determining the signal logic and tributary of the data identified and reproduced by the first classifier;
Error signal detection means for detecting an error signal by branching the output of the first differential photodetector;
An amplifier for amplifying the error signal;
A first voltage source for generating a first fixed voltage corresponding to an optical phase difference based on a determination result of the logic / tributary determination circuit;
A first control signal is generated by adding the error signal amplified by the amplifier and the first fixed voltage, and phase control is performed on the first 1-bit delay interferometer based on the first control signal. 1 adder,
A second voltage source for generating a second fixed voltage that gives -π / 2 to the optical phase difference;
A second control signal is generated by adding the first control signal and the second fixed voltage, and a phase control is performed on the second 1-bit delay interferometer based on the second control signal. optical receiver is characterized in that an adder. An optical coupler for equally splitting the input optical differential quaternary phase shift keying signal,
First and second 1-bit delay interferometers for decoding the optical differential quaternary phase shift keying signal;
First and second differential optical receivers for photoelectrically converting optical signals from the first and second 1-bit delay interferometers, respectively;
An optical receiver comprising first and second discriminators for respectively identifying the signals photoelectrically converted by the first and second differential optical receivers;
A first logic / tributary determination circuit for determining the signal logic and tributary of the data identified and reproduced by the first classifier;
First error signal detection means for branching the output of the first differential optical receiver to detect a first error signal;
A first amplifier for amplifying the first error signal;
A first voltage source for generating a first fixed voltage corresponding to an optical phase difference based on a determination result of the first logic / tributary determination circuit;
The first error signal amplified by the first amplifier and the first fixed voltage are added to generate a first control signal, and the first 1-bit delay interference is generated based on the first control signal. A first adder for phase controlling the meter;
A second logic / tributary determination circuit for determining the signal logic and tributary of the data identified and reproduced by the second classifier;
Second error signal detection means for branching the output of the second differential optical receiver to detect a second error signal;
A second amplifier for amplifying the second error signal;
A second voltage source for generating a second fixed voltage corresponding to the optical phase difference based on a determination result of the second logic / tributary determination circuit;
The second error signal amplified by the second amplifier and the second fixed voltage are added to generate a second control signal. Based on the second control signal, the second 1-bit delayed interference is generated. And a second adder for phase-controlling the meter .

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