JP4522167B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a surface-mount type semiconductor device and a method for manufacturing the same, and more particularly to a semiconductor device for exposing an electrode of a built-in semiconductor element from a sealing resin and a method for manufacturing the same.

  With reference to FIG. 17, the structure of the semiconductor device 100 which is a 1st prior art example is demonstrated (for example, refer patent document 1). FIG. 17A is a plan view of the semiconductor device 100, and FIG. 17B is a cross-sectional view of the semiconductor device 100.

  The semiconductor element 103 includes a semiconductor element 103 placed on the upper surface of the land 102 and a lead 101 disposed so as to surround the semiconductor element 103.

  The electrode provided on the surface of the semiconductor element 103 and the lead 101 are electrically connected through a thin metal wire 104. The sealing resin 105 seals the semiconductor element 103, the land 102, the fine metal wire 104, and the lead 101. When a semiconductor element having a light receiving portion or a light emitting portion is employed as the semiconductor element 103 described above, a resin having transparency is employed as the sealing resin 103.

  With reference to FIG. 18, the configuration of CSP 110 as the second conventional example will be described. 18A is a perspective view of the CSP 110, and FIG. 18B is a cross-sectional view thereof.

  The CSP 110 includes a semiconductor element 111 having an electric circuit formed on the surface, and a coating resin 112 that covers the surface of the semiconductor element 111 on the surface on which the electric circuit is formed. Furthermore, the external electrode 113 is electrically connected to an electric circuit formed on the surface of the semiconductor element 111, and is exposed to the outside through the coating resin 112. Thus, since the planar size of the CSP 110 is equivalent to that of the semiconductor element 111, a small semiconductor device can be provided.

The electrode 114 formed on the surface of the semiconductor element 111 and the external electrode 113 are electrically connected via a rewiring 115. By using the rewiring 115, the external electrodes 113 separated by a predetermined distance can be rearranged even when the electrodes 114 are formed at a narrow pitch.
JP-A-5-102449 (page 3, FIG. 1)

  The conventional example described above has the following problems.

  In the first conventional example, there is a problem that lands having different sizes have to be prepared depending on the size of the built-in semiconductor element 103. Specifically, since the semiconductor element 103 is placed on the upper surface of the land 102, the planar sizes of the two are made equal in order to perform stable mounting. Therefore, it is necessary to prepare a lead frame having lands having different sizes in accordance with the size of the semiconductor element 103, which causes an increase in cost.

  In the second conventional example, since the boundary between the semiconductor element 111 and the coating resin 112 is exposed on the side surface, there is a problem that reliability is lowered depending on the use atmosphere. For example, there has been a problem that moisture and the like enter the inside from the boundary. In particular, when the CSP is mounted in an environment where the temperature changes drastically, such as the inside of an automobile, thermal stress is applied to the coating resin and the semiconductor chip, and this problem occurs remarkably.

  The present invention has been made in view of the above-described problems, and one object of the present invention is to provide a semiconductor device configured by omitting a land on which a semiconductor element is placed and a method for manufacturing the same. is there. Another object of the present invention is to provide a semiconductor device having a configuration in which a boundary between different materials is not exposed to the outside, and a method for manufacturing the same.

  In the semiconductor device of the present invention, an electrical circuit is formed on one main surface, and a semiconductor element in which an electrode electrically connected to the electric circuit is provided on another main surface opposite to the one main surface, and the electrode And a sealing resin that covers the semiconductor element by exposing the semiconductor element.

  Furthermore, in the semiconductor device of the present invention, an electric circuit including a light receiving portion or a light emitting portion is formed on one main surface, and an electrode electrically connected to the electric circuit is provided on the other main surface opposite to the one main surface. And a coating layer that covers the boundary between the semiconductor element and the coating layer by exposing the electrode and the coating layer. And

  Furthermore, a semiconductor device of the present invention includes a semiconductor element having a first electrode and a second electrode electrically connected to a built-in electric circuit on both one main surface and the other main surface opposite to the main surface. A conductive member electrically connected to the first electrode via a connecting means; and a sealing resin for sealing the semiconductor element in a state where both the second electrode and the conductive member are exposed. It is characterized by comprising.

  Furthermore, the semiconductor device of the present invention includes the first main surface formed on the one main surface and electrically connected to the electric circuit including the light receiving portion or the light emitting portion on both the one main surface and the other main surface opposite thereto. A semiconductor element having an electrode and a second electrode; a conductive member electrically connected to the first electrode via a connecting means; a coating layer covering the one main surface; the coating layer; And a sealing resin that seals the semiconductor element with the conductive member exposed.

  The method of manufacturing a semiconductor device of the present invention includes a step of attaching a main surface on which an electrode of a semiconductor element is formed to a surface of a sheet, forming a sealing resin on the surface of the sheet, and attaching the electrode to the sealing resin And a step of covering the semiconductor element in a state where the semiconductor element is exposed.

  Furthermore, the method of manufacturing a semiconductor device according to the present invention includes a step of attaching a semiconductor element and a conductive member having one end approaching to the surface of the sheet, and electrically connecting the electrode provided on the surface of the semiconductor element and the conductive member. And a step of forming a sealing resin on the surface of the sheet and covering the semiconductor element with the conductive member exposed from the sealing resin.

  Furthermore, the method for manufacturing a semiconductor device of the present invention provides a frame in which a plurality of units composed of a plurality of leads arranged so that one end is close to a mounting region on which a semiconductor element is to be mounted. Electrically attaching the frame to the surface of the sheet, attaching the semiconductor element to the surface of the sheet in an area corresponding to the placement area, and electrically connecting the semiconductor element and the lead. A step of connecting, a step of forming a sealing resin on the surface of the sheet so that the semiconductor element and the lead are sealed, and cutting the sealing resin on an outer peripheral portion of each unit. The unit is separated.

  Furthermore, the method for manufacturing a semiconductor device according to the present invention includes forming a first separation groove, a second separation groove formed larger in plan than the semiconductor element to be placed, and both the separation grooves. A step of preparing a conductive foil having a convexly projecting pad in the thickness direction formed on the surface, and one main surface and the other main surface opposite thereto were electrically connected to the built-in electric circuit Disposing the semiconductor element having the first electrode and the second electrode in the second separation groove such that the first electrode contacts the bottom of the second separation groove; and the semiconductor Electrically connecting the second electrode located on the upper surface of the element and the pad; forming a sealing resin so that the semiconductor element is sealed and the separation groove is filled; The sealing resin and the semiconductor element filled in the separation groove Until said first electrode is exposed, characterized by comprising the step of removing the conductive foil from the backside.

  According to the semiconductor device of the present invention, the type in which the interface between the coating resin formed on the surface and the semiconductor chip and the interface between the insulating layers formed in the semiconductor chip are exposed, such as the wafer scale CSP, Since it is coated with resin, stable characteristics can be obtained. For example, it is possible to provide a semiconductor device with extremely high reliability with respect to a temperature change under a severe environment such as a vehicle.

  According to the method for manufacturing a semiconductor device of the present invention, it is possible to realize a manufacturing method in which a land of a conventional example is not required by sticking a semiconductor element to a sheet. Therefore, it is not necessary to prepare a frame having a land having a corresponding size according to the size of the semiconductor element to be incorporated. Therefore, the frame can be shared.

(First embodiment)
With reference to FIGS. 1 to 2, a semiconductor device 10A of this embodiment and a method for manufacturing the same will be described. 1A is a perspective view of the semiconductor device 10A, FIG. 1B is a cross-sectional view thereof, and FIG. 1C is a back view thereof. 1D and 1E are cross-sectional views of another form of semiconductor device 10A.

  The semiconductor device 10 </ b> A includes a semiconductor element 11 having an external electrode 14 provided on a lower surface, and a sealing resin 12 that covers the semiconductor element 11 by exposing the external electrode 14.

  The semiconductor element 11 is an LSI chip having an electric circuit formed on its upper surface by diffusion, polysilicon, and a metal material. On the upper surface of the semiconductor element 11, electrodes 11 </ b> A functioning as input / output terminals and power supply terminals of a built-in electric circuit are formed. Furthermore, a first rewiring 13 </ b> A electrically connected to the electrode 11 </ b> A is formed on the upper surface of the semiconductor element 11. The position of the through electrode 13 is adjusted by the first rewiring 13A, and the electrode 11A and the through electrode 13 are electrically connected.

  The through electrode 13 is an electrode formed by embedding a conductive member such as copper or polysilicon in a hole formed through the semiconductor element 11 in the thickness direction. An electrical circuit formed on the surface of the semiconductor element 11 and an external electrode 14 formed on the back surface are connected via the through electrode 13. Specifically, the upper part of the through electrode 13 is connected to an electric circuit formed on the surface of the semiconductor element 11 through the first rewiring 13A. The lower part of the through electrode 13 is connected to the external electrode 14 via the second rewiring 13B. Thus, by using the through electrode 13, the electrode can be disposed on the back surface of the chip. Furthermore, it becomes possible to connect the electric circuit formed on the surface of the semiconductor element 11 and the outside through a relatively short path. Therefore, it is possible to realize a semiconductor device configuration that supports high-speed operation and high heat dissipation. The through electrode 13 is formed in a cylindrical shape, and its diameter is about 40 μm. Further, although the through electrode 13 is formed in the vicinity of the peripheral portion of the semiconductor element 11, the through electrode 13 can be provided in another region.

  The external electrode 14 is formed on the lower surface of the semiconductor element 11, and the lower surface is exposed to the outside from the sealing resin 12. The external electrode 14 is an electrode that functions as an input / output terminal of the entire semiconductor element 10A. Here, the external electrode 14 is disposed away from the through electrode 13 via the second rewiring 13 </ b> B formed on the lower surface of the semiconductor element 11. However, it is also possible to eliminate the second rewiring 13B and form the external electrode 14 directly below the through electrode 13. The planar size of the external electrode 14 is, for example, a circle having a diameter of about 300 μm.

  Referring to the rear view of FIG. 1C, the external electrodes 14 are exposed in a matrix from the sealing resin 12 that forms the outer shape of the semiconductor element 10A. Furthermore, in this figure, the planar position where the through electrode 13 is formed is indicated by a black circle. The through electrode 13 and the external electrode 14 are formed at different positions in a plan view, and both are connected by a second rewiring 13B. As shown in the figure, by adopting the second rewiring 13B, it is possible to form the external electrode 14 at an arbitrary position on the back surface of the semiconductor element 11. Here, an LGA (Land Grid Array) is formed in which the external electrode 14 exposed from the sealing resin 12 functions as an input / output pad. Further, it is possible to form a BGA (Ball Grid Array) in which a brazing material such as a solder ball is attached to the exposed external electrode 14.

  The sealing resin 12 seals the semiconductor element 11 by exposing the external electrode 14 from the lower surface. Specifically, the main outline of the semiconductor device 10 </ b> A is formed by the sealing resin 12, and other components are sealed by the sealing resin 12 except for the exposed external electrodes 14. As the material of the sealing resin 12, both a thermosetting resin or a thermoplastic resin can be generally used. Further, in consideration of heat dissipation, a resin mixed with a filler is adopted as the material of the sealing resin 12.

  In the semiconductor device 10A described above, the interface formed on the side surface of the CSP, the interface between the sealing resin and the semiconductor chip, and the interface between the insulating layers such as SiO2, TEOS, and SiN formed on the semiconductor chip are protected by the sealing resin 12. ing. Therefore, the structure is such that moisture and the like can be prevented from entering from the boundary between the constituent elements.

  With reference to the cross-sectional view of FIG. 1D, another form of semiconductor device 10A will be described. In the semiconductor device 10A shown in this figure, an external electrode 14 is formed on the main surface of a semiconductor element 11 on which an electric circuit is formed. Here, the main surface of the semiconductor element 11 is located on the lower surface in the drawing. Here, since the external electrode 14 protrudes in the thickness direction, a gap for filling the sealing resin 12 under the semiconductor element 11 can be secured. Other configurations are basically the same as those of the semiconductor device 10A illustrated in FIG.

  With reference to FIG. 1E, the structure of another form of semiconductor device 10A will be described. Here, the coating resin 12A is covered on the back surface of the chip except for the electrical contact portion of the external electrode. With this configuration, since the lower surface of the semiconductor element 11 is covered with the coating resin 12A, it is not necessary to fill the lower surface of the semiconductor element 11 with the sealing resin 12 in the molding process. Therefore, the generation of voids due to the sealing resin 12 not entering the lower surface of the semiconductor element 11 can be suppressed.

  Next, a method for manufacturing the semiconductor device 10A shown in FIG. 1 will be described with reference to FIG. Each drawing in FIG. 2 is a cross-sectional view showing each step.

  With reference to FIG. 2A, first, the semiconductor element 11 is attached to the surface of the sheet 36. The sheet 36 is made of a material having low elasticity with respect to heat. For example, a PET (polyethylene terephthalate) material or the like can be used. Furthermore, an adhesive is applied to the surface of the sheet 36 in advance to adhere the semiconductor element 11. Here, the semiconductor element 11 is fixed by sticking the back surface of the external electrode 14 protruding below the semiconductor element 11 to the surface of the sheet 36. A plurality of semiconductor elements 11 are arranged at equal intervals on the surface of the sheet 36. Here, a plurality of semiconductor elements 11 are arranged in a matrix. In this embodiment, a set of components forming one semiconductor device is expressed as a unit 19. Therefore, here, a plurality of units 19 are formed on the surface of the sheet 36. When manufacturing the semiconductor device as shown in FIG. 1E, a coating resin 12A that covers the surface of the semiconductor element 11 is attached to the surface of the sheet 36.

  Referring to FIG. 2B, next, a sealing resin 12 is formed so as to cover each semiconductor element 11. As a method for forming the sealing resin 12, a sealing method such as transfer molding, injection molding, or potting can be employed. Here, the transfer mold method using the upper mold 20A and the lower mold 20B is described.

  First, the sheet 36 on which the semiconductor element 11 is placed is placed on the surface of the lower mold 20B. Next, the upper mold 20A and the lower mold 20B are brought into contact with each other, and the plurality of semiconductor elements 11 are accommodated in the cavity 20C. Next, the sealing resin 12 is injected into the cavity 20C from a gate (not shown) provided in the mold. Thus, the semiconductor element 11 placed on the surface of the sheet 36 is sealed with the sealing resin 12. Moreover, since the back surface of the external electrode 14 of the semiconductor element 11 is in contact with the surface of the sheet 36, it is exposed by peeling the sheet after sealing. Furthermore, in this step, the coating resin 12 is also filled between the lower surface of the semiconductor element 11 and the surface of the sheet 36.

  Next, with reference to FIG. 2C, a method for mounting and molding the semiconductor element 11 of the type shown in FIG. 1E on the upper surface of the sheet 36 will be described. Here, the coating resin 12 </ b> A formed on the lower surface of the semiconductor element 11 is in contact with the surface of the sheet 36. Furthermore, in this embodiment, the semiconductor element 11 sinks into the sheet 36. Thus, in this embodiment, the interface K between the coating resin 12A and the semiconductor element 11 is sealed with the sealing resin 12 by making the thickness L1 of the coating resin 12A larger than the sinking amount L2. As a result, the semiconductor element 12 can be sealed including the boundary K between the semiconductor element 11 and the coating resin 12. Specifically, considering the case where the thickness L1 of the coating resin 12A is equal to or less than the sinking amount L2, the boundary K is positioned below the surface of the sheet 36. Therefore, in this case, the boundary K is not sealed with the sealing resin 12 and may be exposed to the outside. Therefore, in this embodiment, the thickness L1 of the coating resin 12A is made larger than L2, so that the boundary K is positioned above the upper surface of the sheet 36, and the semiconductor element 11 including the boundary K is sealed. . By the above-described process, the coating resin 12A slightly protrudes from the sealing resin 12 to the outside.

  Referring to FIG. 2D, next, each unit 19 is divided to obtain individual semiconductor devices. Specifically, dicing is performed along the dividing line 21.

  In the manufacturing process described above, the sealing resin 12 can be formed in a state where the external electrode 14 is exposed without depending on a process such as grinding. Accordingly, a semiconductor device with improved connection reliability can be provided.

(Second Embodiment)
With reference to FIG. 3 and FIG. 4, the semiconductor device 10B and the manufacturing method thereof will be described. In the semiconductor device 10 </ b> B described in this embodiment, an electric circuit including a light receiving portion or a light emitting portion is formed on the surface of the semiconductor element 11. A transparent coating layer 15 such as glass is disposed on at least the light emitting surface or the light receiving surface. Moreover, you may coat | cover a transparent resin. The coating layer 15 is sealed with a normal sealing resin 12 that blocks light except for the surface.

  Referring to FIG. 3A, one surface of coating layer 15 is exposed to the outside from the upper surface of sealing resin 12 that forms the main outline of semiconductor device 10B. Furthermore, as can be seen from FIG. 3C, the external electrode 14 is exposed from the back surface of the sealing resin 12.

  Referring to FIG. 3B, an electric circuit including a light receiving portion or a light emitting portion is formed on the surface of the semiconductor element 11. That is, the semiconductor element 11 is a so-called optical semiconductor element. As the light receiving element, a solid-state imaging device such as a CCD (Charged Coupled Device) image sensor or a CMOS (Complementary Metal Oxide Semiconductor) image sensor, or a photosensor such as a photodiode or a phototransistor can be employed. As the light emitting element, a light emitting diode or a semiconductor laser can be employed.

  The covering layer 15 is formed on the surface of the semiconductor element 11 so as to cover at least the light receiving part or the light emitting part. Furthermore, the upper surface of the coating layer 15 is exposed to the outside from the sealing resin 12 that seals the whole. As the material of the covering layer 15, a material that is transparent to light entering / outputting the semiconductor element 11 is used. For example, if the semiconductor element 11 is an element that senses visible light, a material having transparency with respect to visible light is used as the coating layer 15. Specifically, a glass plate or an acrylic plate can be used as the coating layer 15. Further, when the semiconductor element 11 is an imaging element such as a CCD image sensor, a filter or the like is added.

  The sealing resin 12 seals the constituent elements in a state where the external electrode 14 and the coating layer 15 are exposed. Further, the sealing resin 12 covers a boundary surface between the semiconductor element 11 and the covering layer 15, an interface of an insulating film laminated on the semiconductor element, and the like. Accordingly, intrusion of moisture and the like from this boundary surface is suppressed by the sealing resin. Other details of the sealing resin 12 are the same as those in the first embodiment.

  With reference to FIG. 3C, the lower surface of the external electrode 14 is exposed to the outside from the sealing resin 12. The details of the through electrode 13 and the external electrode 14 are the same as those in the first embodiment. In the semiconductor device 10B described above, the encapsulating resin 12 is coated so that the electrical connection portion between the coating layer 15 and the external electrode 14 is exposed.

  Next, with reference to FIG. 4, a manufacturing method of the above-described semiconductor device 10B will be described.

  Referring to FIG. 4A, first, a plurality of semiconductor elements 11 are arranged on the surface of first sheet 36A. The upper surface of each semiconductor element 11 is covered with a covering layer 15. And the external electrode 14 which protrudes from the lower surface of each circuit element 11 is affixed on the surface of the 1st sheet | seat 36A. As the first sheet 36A, a sheet similar to the sheet 36 described in the first embodiment can be employed. When glass or acrylic is used as the covering layer 15, it is possible to assemble relatively easily by using a material to which an adhesive has been applied in advance.

  Next, referring to FIG. 4B, each semiconductor element 11 is sealed. Here, a method of forming the sealing resin 12 using a mold will be described. First, the first sheet 36A on which the semiconductor element 11 is disposed is disposed on the upper surface of the lower mold 20B. Next, the semiconductor element 11 is accommodated inside the cavity 20C by meshing the upper mold 20A and the lower mold 20B. Here, the second sheet 36B is adhered to the inner wall of the upper mold 20A constituting the cavity 20C. And the upper surface of the coating layer 15 arrange | positioned at the upper part of each semiconductor element 11 is coat | covered with this 2nd sheet | seat 36B. Next, each semiconductor element 11 is sealed by sealing the sealing resin 12 into the cavity 20 </ b> C from the gate provided in the mold.

  As the 2nd sheet | seat 36B, the thing similar to the 1st sheet | seat 36A mentioned above is employable. Furthermore, in the above description, most of the inner wall of the upper mold 20 is covered with the second sheet 36B, but the upper surface of each coating layer 15 may be individually protected with the second sheet 36B. it can. Even in this case, the sealing resin 12 can be formed with the upper surface of the coating layer 15 exposed. Furthermore, in this case, the surface of the coating layer 15 is formed in a concave shape from the sealing resin 12 in accordance with the thickness of the second sheet 36B.

  The presence of the sheet makes it possible to protect the surface of the coating layer, and furthermore, since the sheet is soft and the contact member sinks slightly, the coating layer and the external electrode protrude from the sealing resin when the sheet is peeled off after sealing. Project slightly.

  Referring to FIG. 4C, next, the individual semiconductor devices 10B are obtained by cutting the sealing resin 12 located at the boundaries of the units 19. Details of this step are the same as those in the first embodiment described above.

(Third embodiment)
With reference to FIG. 5 and FIG. 6, a semiconductor device 10C of this embodiment and a method for manufacturing the same will be described. In the semiconductor device 10C of this embodiment, the first electrode 11A is formed on the surface of the semiconductor element 11 incorporated therein, and the second electrode 11B is formed on the back surface. Here, an electrode formed on the same surface as the surface on which the electric circuit is formed is referred to as a first electrode 11A. An electrode formed on the surface opposite to the surface on which the electric circuit is formed is referred to as a second electrode 11B.

  Referring to FIGS. 5A and 5B, in semiconductor device 10C, semiconductor element 11 and pad 16 electrically connected thereto are covered with sealing resin 12. The second electrode 11 </ b> B and the pad 16 protruding from the back surface of the semiconductor element 11 are exposed from the back surface of the sealing resin 12.

  Details of the semiconductor element 11 will be described with reference to FIG. An electric circuit is formed on the surface of the semiconductor element 11. A first electrode 11 </ b> A that is electrically connected to the electric circuit is formed on the periphery of the surface of the semiconductor element 11. Here, the first electrode 11 </ b> A is formed closer to the outer peripheral portion than the through electrode 13. However, it is also possible to form the first electrode 11 </ b> A inside the through electrode 13.

  The through electrode 13 is electrically connected to an electric circuit formed on the surface of the semiconductor element 11, penetrates the semiconductor element 11 in the thickness direction, and extends to the back surface thereof. The second electrode 11 </ b> B is an electrode formed on the back surface of the semiconductor element 11, and is electrically connected to the electrical circuit on the surface via the through electrode 13.

  The pad 16 is a conductive member that is electrically connected to the semiconductor element 11 and whose back surface is exposed to the outside. The pad 16 is electrically connected to the first electrode 11 </ b> A formed on the upper surface of the semiconductor element 11 through the fine metal wire 17. Further, a plurality of pads 16 are arranged so as to surround the semiconductor element 11.

  With reference to FIG. 5C, the configuration of the back surface of the semiconductor device 10C will be described. From the back surface of the sealing resin 12, the second electrode 11B and the pad 16 are exposed. The second electrode 11B is exposed on the back surface of the region where the semiconductor element 11 is placed. The pad 16 is located on the outer periphery of the chip and exposed around the back surface.

  In the semiconductor device 10C of this embodiment, the external terminal and the semiconductor element 11 are electrically connected through two paths. The first path is a path including the first electrode 11 </ b> A, the thin metal wire 17, and the pad 16 formed on the surface of the semiconductor element 11. The second path is an electric circuit, the through electrode 13, and the second electrode 11 </ b> B formed on the surface of the semiconductor element 11. When the first path and the second path are compared, the resistance value of the path becomes relatively large because the first path is through the thin metal wire. Therefore, the paths can be properly used according to the magnitude of the current value of the electric signal input / output to / from the semiconductor element 11. Specifically, an electric signal having a large current value can be input / output using the second path, and an electric signal having a small current value can be input / output using the first path. As a result, adverse effects such as heat generation due to the passage of an electric signal having a large current value through the first path having a large resistance value can be suppressed. If the first electrode inevitably overlaps with the coating layer due to the shape of the coating layer, this must be formed through the through electrode.

  Next, with reference to FIG. 6, a method for manufacturing the above-described semiconductor device 10C will be described. Each drawing in FIG. 6 is a cross-sectional view showing each step.

  With reference to FIG. 6A, first, the semiconductor element 11 and the pad 16 are attached to the surface of the sheet 36. Here, one unit 19 is formed by the semiconductor element 11 and the pads 16 arranged in the peripheral portion thereof. In the semiconductor element 11, the second electrode 11 </ b> B exposed on the lower surface is attached to the surface of the sheet 36.

  With reference to FIG. 6B, the first electrode 11A formed in the peripheral portion of the surface of the semiconductor element 11 and the upper surface of the pad 16 are electrically connected through a thin metal wire 17.

  Next, referring to FIG. 6C, each unit 19 is sealed. Specifically, the sheet 36 having the semiconductor element 11 and the pad 16 attached to the surface is placed on the surface of the lower mold 20B. Then, after the cavity 20C is formed by the upper mold 20A and the lower mold 20B, sealing is performed by injecting the sealing resin 12 into the cavity 20C. In this step, the second electrode 11 </ b> B formed on the back surface of the semiconductor element 11 and the back surface of the pad 16 are exposed from the sealing resin 12.

  With reference to FIG. 6D, next, the individual semiconductor devices 10C are obtained by cutting the sealing resin 12 at the boundaries between the units 19.

  In the semiconductor device manufacturing method of the present embodiment described above, the land on which the semiconductor element 11 is placed is omitted. Therefore, the manufacturing method of the present embodiment can cope with the case where the size of the built-in element is changed only by adjusting the position where the pad 16 is placed. Therefore, the manufacturing cost can be reduced as compared with the conventional example in which the land is formed according to the semiconductor element incorporated.

(Fourth embodiment)
With reference to FIG. 7 and FIG. 8, a semiconductor device 10D of the present embodiment and a manufacturing method thereof will be described. The basic configuration of the semiconductor device 10 </ b> D of this embodiment is the same as that of the semiconductor device 10 </ b> C described in the third embodiment, and the difference is that the coating layer 15 is provided. The following explanation will be made focusing on this difference.

  Referring to FIGS. 7A and 7B, in semiconductor device 10D, a pad 16 is built in the periphery, and semiconductor element 11 is arranged inside surrounded by pad 16. And the coating layer 15 which coat | covers the surface of the semiconductor element 11 is exposed outside from the upper surface of the sealing resin 12. FIG. Further, the back surfaces of the second electrode 11 </ b> B and the pad 16 provided on the back surface of the semiconductor element 11 are exposed from the back surface of the sealing resin 12.

  An electric circuit including a light receiving element or a light emitting element is formed on the surface of the semiconductor element 11. The details of the light receiving element and the light emitting element are the same as those in the second embodiment described above. A first electrode 11 </ b> A is formed on the periphery of the semiconductor element 11. The surface of the semiconductor element 11 in the region where the first electrode 11 </ b> A is formed is not covered with the covering layer 15. The first electrode 11 </ b> A and the pad 16 are electrically connected through a fine metal wire 17.

  With reference to the back view of FIG. 7C, the back surfaces of the second electrode 11 </ b> B and the pad 16 are exposed on the back surface of the sealing resin 12. Here, the second electrode 11B is exposed inside the region where the semiconductor element 11 is placed. Furthermore, the back surface of the pad 16 is exposed so as to surround the second electrode 11B.

  Next, a method for manufacturing the semiconductor device 10D described above will be described with reference to FIG. Each drawing in FIG. 8 is a cross-sectional view showing each step.

  Referring to FIG. 8A, first, semiconductor element 11 and pad 16 constituting each unit 19 are attached to the surface of first sheet 36A. In each unit 19, the semiconductor element 11 is disposed near the center, and the pad 16 is disposed so as to surround the semiconductor element 11. The position of the semiconductor element 11 is fixed by sticking the second electrode 11B formed on the back surface thereof to the surface of the first sheet 36A. Further, the surface of the semiconductor element 11 is covered with a covering layer 15.

  Referring to FIG. 8B, next, the semiconductor element 11 of each unit 19 and the pad 16 are electrically connected by the thin metal wire 17.

  Next, referring to FIG. 8C, each unit 19 is sealed. Specifically, the first sheet 36A provided with the semiconductor element 11 is accommodated in the lower mold 20B, and the resin 12 is injected into the cavity 20C formed by the upper mold 20A and the lower mold 20B. The second electrode 11B and the back surface of the pad 16 are sealed while being protected by the first sheet 36A. Further, the covering layer 15 is sealed in a state protected by the second sheet 36B.

  Referring to FIG. 8D, individual semiconductor devices are manufactured by peeling off the first sheet 36A and the second sheet 36B and performing dicing on the dividing line 21.

(Fifth embodiment)
In this embodiment, a manufacturing method for manufacturing a large number of semiconductor devices using the frame 22 will be described with reference to FIGS. 9 to 13. In addition, the manufacturing method of this form is applicable to each embodiment mentioned above.

  Referring to FIG. 9, first, a frame 22 is prepared. FIG. 9A is a plan view showing the entire frame 22, and FIG. 9B is an enlarged plan view of one of the blocks 23 formed in the frame 22.

  Referring to FIG. 9A, the frame 22 is a plate-like sheet mainly made of copper, and is formed by punching or etching.

  A plurality of blocks 23 are formed on the frame 22. Here, the five blocks 23 are arranged in a row at a predetermined distance. A slit 24 is formed between each block 23. By providing the slit 24, it is possible to absorb thermal stress during the molding process. A guide hole 25 penetrating the frame 22 is formed in the peripheral portion of the frame 22 in the longitudinal direction. This guide hole 25 is used when adjusting the position of the frame 22 in each step.

  Details of the block 23 will be described with reference to FIG. Inside the block 23, connecting portions extend in a lattice shape to form each unit 19. Specifically, the first connecting portions 28 extend at equal intervals in the horizontal direction on the paper surface. Furthermore, the 2nd connection part 29 is extended in the perpendicular direction on the paper surface. And the mounting area | region 26 of the semiconductor element 11 is prescribed | regulated inside the unit 19 enclosed by these connection parts. A plurality of leads 27 extend inward from the first connecting portion 28 and the second connecting portion 29 located on the outer peripheral portion of the unit 19.

  When there are several sizes of the semiconductor elements 11 to be placed, the placement area 26 is preferably set to a size corresponding to the semiconductor element 11 having the largest size. If the semiconductor element 11 has a size equal to or smaller than the placement region 26, it can be mounted with a common frame.

  With reference to FIG. 10A and FIG. 10B, the entire surface of the frame 22 is affixed to the sheet 36 so that the back surface of the lead 27 is also affixed to the sheet 36. Then, the semiconductor element 11 is attached to the surface of the sheet 36 inside each unit 19. Here, the second electrode 11 </ b> B formed on the back surface of the semiconductor element 11 is attached to the surface of the sheet 36. Further, in the semiconductor element 11 having no electrode on the back surface, the back surface of the element is directly attached to the surface of the sheet 36.

  Referring to FIG. 11, next, the semiconductor element 11 of each unit 19 and the lead 27 are electrically connected. Here, the first electrode 11 </ b> A provided on the upper surface of the semiconductor element 11 and the lead 27 are electrically connected via the thin metal wire 17.

  Next, referring to FIG. 12, the semiconductor element 11 is sealed. FIG. 12A is a cross-sectional view showing this step, and FIG. 12B is a plan view showing a state after sealing.

  Referring to FIG. 12A, here, the semiconductor element 11 is sealed by injecting resin into a cavity 20C formed by the upper mold 20A and the lower mold 20B. Specifically, by placing the sheet 36 on the upper surface of the lower mold 20B and engaging the upper mold 20A and the lower mold 20B, the plurality of units 19 in one block 23 can be combined with each other. The two cavities 20C are accommodated. Next, the semiconductor element 11 is sealed by sealing the sealing resin 12 in the cavity 20C. Here, the sealing is performed in a state where the second electrode 11B formed on the back surface of the semiconductor element 11 and the lead 27 are attached to the sheet 36. Therefore, the second electrode 11 </ b> B and the lead 27 are exposed to the outside from the lower surface of the sealing resin 12.

  Referring to FIG. 12B, each block 23 is covered with one integrated sealing resin 12. It is also possible to mold all the blocks 23 integrally. However, there is a problem that the entire warp occurs after molding.

  Next, referring to the sectional view of FIG. 13, dicing is performed along the dividing line 21 of each unit 19. In addition, this step may be performed after separating each resin-encapsulated block 23 from the frame 22.

(Sixth embodiment)
In the present embodiment, a semiconductor device 10E of another form and a method for manufacturing the same will be described with reference to FIGS.

  First, the configuration of the semiconductor device 10E will be described with reference to FIG. 14A is a perspective view of the semiconductor device 10E, FIG. 14B is a cross-sectional view thereof, and FIG. 14C is a back view thereof. FIG. 14D is a cross-sectional view of another form of semiconductor device 10E.

  Referring to FIGS. 14A to 14C, coating layer 15 is exposed from the surface of sealing resin 12 forming the main outline of semiconductor device 10E. Further, the back surface of the pad 16 and the second electrode 11B constituting the external terminal are exposed from the sealing resin 12 on the surface facing the surface on which the coating layer 15 is exposed.

  An electric circuit having a light receiving portion or a light emitting portion is formed on the surface of the semiconductor element 11. Furthermore, the surface of the semiconductor element 11 on which the electric circuit is formed is covered with a covering layer 15. A first electrode 11 </ b> A is formed on the periphery of the semiconductor element 11. The first electrode 11 </ b> A and the pad 16 are electrically connected via a fine metal wire 17. The electric circuit formed on the front surface of the semiconductor element 11 and the second electrode 11B formed on the back surface are electrically connected through the through electrode 13. An adhesive resin 35 is formed on the back surface of the semiconductor element 11. The adhesive resin 35 is used for fixing the semiconductor element 11 to the surface of a metal material. Therefore, it is possible to configure the whole without the adhesive resin 35.

  The back surfaces of the second electrode 11 </ b> B and the pad 16 are exposed from the lower surface of the sealing resin 12. The lower surface of the sealing resin 12 is entirely covered with a resist 30, and the second electrode 11 </ b> B and the back surface of the pad 16 are exposed from the opening formed in the resist 30. Further, solder electrodes 31 to which a brazing material such as solder is attached are formed on the back surfaces of the exposed second electrodes 11B and the pads 16.

  The side surface of the pad 16 formed by etching has a shape that curves inward. With this shape, mechanical coupling between the pad 16 and the sealing resin 12 is ensured.

  With reference to FIG. 14C, a structure of another form of semiconductor device 10E will be described. Here, a configuration in which the coating resin 15 covering the surface of the semiconductor element 11 is omitted is realized. Therefore, the constituent elements exposed from the sealing resin 12 are only the second electrode 11 </ b> B and the back surface of the pad 16. From this, the semiconductor device shown in this figure is excellent in moisture resistance.

  Next, with reference to FIGS. 15 and 16, a method for manufacturing the above-described semiconductor device 10E will be described. Each of FIGS. 15 and 16 is a cross-sectional view showing each configuration.

  Referring to FIG. 15A, first, a conductive foil 32 made of a metal such as copper is prepared, and the surface of the conductive foil 32 corresponding to a region to be a conductive pattern such as the pad 16 is covered with a resist 33. Next, by performing wet etching from the surface of the conductive foil 32, the separation groove 34 is formed on the surface of the conductive foil. In this step, the first separation groove 34A and the second separation groove 34B are formed. The first separation groove 34 </ b> A is a separation groove that separates the conductive patterns such as the pads 16. On the other hand, the second separation groove 34B is a separation groove in which the semiconductor element 11 built in the semiconductor device is disposed at the bottom. Therefore, the planar size of the second separation groove 34B is formed larger than that of the semiconductor element 11 to be placed in this portion.

  Referring to FIG. 15B, next, the semiconductor element 11 is placed in the second separation groove 34B, and the semiconductor element 11 and the pad 16 are electrically connected. The semiconductor element 11 is attached to the bottom surface of the second separation groove 34 </ b> B via the adhesive resin 35. Here, the second electrode 11B formed on the back surface of the semiconductor element 11 is in contact with the bottom surface of the second separation groove 34B. Thus, the second electrode 11B can be exposed to the outside in a step after removing the back surface of the conductive foil 32. The first electrode 11 </ b> A formed in the peripheral portion of the semiconductor element 11 and the surface of the pad 16 are electrically connected through a fine metal wire 17. If the semiconductor element 11 can be fixed without using the adhesive resin 35, the adhesive resin 35 may be omitted.

  Referring to FIG. 15C, next, the sealing resin 12 is formed on the surface of the conductive foil 32 so as to cover the semiconductor element 11. Here, molding using the upper mold 20A and the lower mold 20B is performed. Specifically, the conductive foil 32 is placed on the surface of the lower mold 20B. Next, the semiconductor element 11 is accommodated in the cavity 20C by meshing the upper mold 20A and the lower mold 20B. Next, the semiconductor element 11 is sealed by sealing the sealing resin 12 in the cavity 20C. The upper surface of the coating layer 15 covering the semiconductor element 11 is sealed in a protected state by a sheet 36 attached to the inner wall of the upper mold 20A.

  With reference to FIG. 16 (A), sectional drawing of the state in which resin sealing was performed in the previous process is shown. The first separation groove 34A and the second separation groove 34B are filled with the sealing resin 12. And the surface of the coating layer 15 protected by the sheet 36 is exposed to the outside from the sealing resin 12. Note that when the process without the adhesive resin 35 is performed, the lower portion of the semiconductor element 11 is also filled with the sealing resin 12.

  Referring to FIG. 16B, the conductive foil 32 is removed from the back surface until the sealing resin 12 filled in the separation groove 34 is exposed. As a result, the pads 16 are electrically separated. Further, the sealing resin 12 and the adhesive resin 35 filled in the second separation groove 34B are also exposed from the back surface. Further, the second electrode 11 </ b> B formed on the back surface of the semiconductor element 11 is exposed to the outside from the adhesive resin 35. In the case of the process in which the adhesive resin 35 is omitted, the second electrode 11B is exposed from the sealing resin 12.

  Referring to FIG. 16C, next, a resist 30 is formed on the sealing resin 12 on the surface where the pad 16 and the like are exposed. Further, external electrodes are formed on the back surface of the second electrode 11 </ b> B exposed from the opening of the resist 30 and the pad 16. Thereafter, the sealing resin 12 is separated at the parting line 21 to obtain the semiconductor device 10E.

1A is a perspective view illustrating a semiconductor device according to a first embodiment of the present invention, FIG. It is sectional drawing (A)-(D) explaining the manufacturing method of the semiconductor device of the 1st Embodiment of this invention. It is the perspective view (A), sectional drawing (B), and back view (C) explaining the semiconductor device of the 2nd Embodiment of this invention. It is sectional drawing (A)-(C) explaining the manufacturing method of the semiconductor device of the 2nd Embodiment of this invention. It is the perspective view (A), sectional drawing (B), and back view (C) explaining the semiconductor device of the 3rd Embodiment of this invention. It is sectional drawing (A)-(D) explaining the manufacturing method of the semiconductor device of the 3rd Embodiment of this invention. It is the perspective view (A), sectional drawing (B), and back view (C) explaining the semiconductor device of the 4th Embodiment of this invention. It is sectional drawing (A)-(D) explaining the manufacturing method of the semiconductor device of the 4th Embodiment of this invention. 9A and 9B are a plan view and a plan view illustrating a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention. 9A and 9B are a cross-sectional view and a plan view illustrating a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention. 9A and 9B are a cross-sectional view and a plan view illustrating a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention. 9A and 9B are a cross-sectional view and a plan view illustrating a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention. It is sectional drawing explaining the manufacturing method of the semiconductor device of the 5th Embodiment of this invention. 9A is a perspective view illustrating a semiconductor device according to a sixth embodiment of the present invention, FIG. 8B is a cross-sectional view, FIG. It is sectional drawing (A)-(C) explaining the manufacturing method of the semiconductor device of the 6th Embodiment of this invention. It is sectional drawing (A)-(C) explaining the manufacturing method of the semiconductor device of the 6th Embodiment of this invention. It is the top view (A) and sectional drawing (B) explaining the conventional semiconductor device. 2A and 2B are a perspective view and a cross-sectional view illustrating a conventional semiconductor device.

Explanation of symbols

10A to 10E Semiconductor device 11 Semiconductor element 12 Sealing resin 13 Through electrode 14 External electrode 15 Cover layer 16 Pad 17 Metal fine wire 19 Unit 20A Upper mold 20B Lower mold 21 Dividing line 22 Frame 23 Block 24 Slit 25 Guide hole 26 Mounted Placement region 27 Lead 28 First connection portion 29 Second connection portion 30 Resist 31 Solder electrode 32 Conductive foil 33 Resist 34A First separation groove 34B Second separation groove 35 Adhesive resin 36 Sheet

Claims (10)

A semiconductor element having a first electrode and a second electrode electrically connected to a built-in electric circuit on both one main surface and the other main surface opposite to the main surface;
A conductive member electrically connected to the first electrode via connection means;
Comprising a sealing resin for sealing the semiconductor element,
Both the second electrode and the conductive member are exposed from the sealing resin . The first electrode and the second electrode formed on the one main surface and electrically connected to the electric circuit including the light receiving unit or the light emitting unit are provided on both the one main surface and the other main surface opposite to the one main surface. A semiconductor element;
A conductive member electrically connected to the first electrode via connection means;
A coating layer covering the one principal surface;
Comprising a sealing resin for sealing the semiconductor element,
The semiconductor device , wherein the covering layer, the second electrode, and the conductive member are exposed from the sealing resin .   3. The semiconductor device according to claim 1, wherein the electric circuit of the semiconductor element and the second electrode are connected through the semiconductor element in a thickness direction. The sealing resin, the covering the other main surface of the semiconductor element, and semiconductor device according to claim 1, wherein that you have to expose the second electrode to the outside.   The semiconductor device according to claim 1, wherein the second electrode and the conductive member are exposed from the same surface of the sealing resin.   The semiconductor device according to claim 1, wherein the conductive member is disposed so as to surround the semiconductor element.   3. The semiconductor device according to claim 2, wherein the covering layer is made of a material that is transparent to light received by the light receiving unit or light emitted from the light emitting unit. A step of preparing a frame in which a plurality of units composed of a plurality of leads arranged so that one end approaches a placement region on which a semiconductor element is to be placed;
Adhering the frame to the surface of the sheet, and adhering the semiconductor element to the surface of the sheet in a region corresponding to the placement region;
Electrically connecting the semiconductor element and the lead;
Forming a sealing resin on the surface of the sheet so that the semiconductor element and the lead are sealed;
In the method of manufacturing a semiconductor device in which each unit is separated by cutting the sealing resin on the outer peripheral portion of each unit,
The semiconductor element has a first electrode and a second electrode electrically connected to an electric circuit built in the semiconductor element on both one main surface and the other main surface opposite to the main surface.
The first electrode is electrically connected to the lead via a connecting means,
The method of manufacturing a semiconductor device, wherein the second electrode is sealed in a state of being attached to the sheet, and is exposed from the sealing resin when the sheet is peeled off. A first separation groove, a second separation groove formed larger in plan than the semiconductor element to be placed, and a pad protruding in the thickness direction in a convex shape by forming the both separation grooves are on the surface. Preparing a conductive foil formed on,
The semiconductor element having a first electrode and a second electrode electrically connected to a built-in electric circuit on both one main surface and the other main surface opposite to the main surface, wherein the first electrode is the first electrode Arranging the second separation groove so as to abut against the bottom of the second separation groove;
Electrically connecting the second electrode located on the upper surface of the semiconductor element and the pad;
Forming a sealing resin so that the semiconductor element is sealed and the separation groove is filled;
And a step of removing the conductive foil from the back surface until the sealing resin filled in the separation grooves and the first electrode of the semiconductor element are exposed. An electrical circuit including a light receiving portion or a light emitting portion is formed on one main surface of the semiconductor element,
Sealing with the sealing resin in a state where the upper surface of the covering layer covering the one main surface is covered with a sheet different from the sheet,
The method for manufacturing a semiconductor device according to claim 9, wherein the coating layer is exposed from the sealing resin.

Images