JP4583904B2 - Method for manufacturing display device - Google Patents

Description

  The present invention relates to a droplet discharge device that discharges (ejects) droplets to form a pattern, a pattern formation method, and a method for manufacturing a display device using the method.

  A thin film transistor (hereinafter referred to as “TFT”) and an electronic circuit using the thin film transistor are manufactured by laminating various thin films such as a semiconductor, an insulator, and a conductor on a substrate and appropriately forming a predetermined pattern by a photolithography technique. Has been. Photolithographic technology is a technology that uses a light to transfer a circuit pattern or other pattern formed on a transparent flat plate called a photomask onto a target substrate. It is widely used in the manufacturing process.

  In the manufacturing process using the conventional photolithography technology, a multi-step process such as exposure, development, baking, and peeling is required only for handling a mask pattern formed using a photosensitive organic resin material called a photoresist. Become. Therefore, the manufacturing cost inevitably increases as the number of photolithography processes increases. In order to improve such problems, attempts have been made to manufacture TFTs by reducing the photolithography process (see, for example, Patent Document 1).

However, the technique described in Patent Document 1 is merely a replacement of a part of the photolithography process performed a plurality of times in the TFT manufacturing process by the printing method, and drastically contributes to the reduction in the number of processes. It is not possible. In addition, an exposure apparatus used for transferring a mask pattern in photolithography technology transfers a pattern of several microns to 1 micron or less by equal-magnification projection exposure or reduced projection exposure. It is technically difficult to expose a large area substrate exceeding 1 meter at a time.
Japanese Patent Laid-Open No. 11-251259

  The present invention simplifies the manufacturing process by reducing the number of photolithography processes in the manufacturing process of the TFT, the electronic circuit using the TFT, and the display device formed by the TFT, or eliminating the process itself. It is an object of the present invention to provide a technique capable of manufacturing a substrate having a large area exceeding 1 mm with a high yield at a low cost.

  Another object of the present invention is to provide a technique capable of forming a pattern such as a wiring constituting these display devices in a desired shape with good controllability.

  In order to solve the above-described problems of the prior art, the following measures are taken in the present invention.

  The present invention selectively selects at least one or more of patterns necessary for manufacturing a display panel, such as a conductive layer for forming a wiring layer or an electrode, or a mask layer for forming a predetermined pattern. A display device is manufactured by forming a pattern by a method capable of forming a pattern. As a method for selectively forming a pattern, a conductive layer, an insulating layer, or the like is formed, and droplets of a composition prepared for a specific purpose are selectively ejected (ejected) to form a predetermined pattern. A possible droplet discharge (ejection) method (also called an inkjet method depending on the method) is used. In addition, a method by which a pattern can be transferred or drawn, for example, a printing method (a method for forming a pattern such as screen printing or offset printing) can be used.

  In the present invention, the droplet having the composition attached to the formation region by the above method is shaped (deformed) into a desired pattern by shaping (processing) means. In the case of wiring that requires miniaturization, it is possible to form a thinner wiring pattern by drawing the ejected droplets into a thin linear shaping part of the shaping means and drawing the line. become.

  In addition, the droplets are not directly attached to the formation region from the ejection port, but are drawn on the formation region with a desired thickness after the shape of the droplet is deformed via a shaping unit (shaping unit). As shaping means (shaping section), fine wiring is formed by adjusting the amount of liquid droplets by passing a thin linear thread and scanning the formation area. The shaping means (shaping unit) may be a brush like a collection of a plurality of linear yarns, and is not limited to the shape of the yarn or plate. When it is desired to form a pattern in a relatively wide range, a shaping means (shaping part) that can adhere to a wide area at a time may be selected.

  According to the present invention, it is possible to form a pattern with a desired width with good controllability regardless of the size of the ejection port that ejects droplets.

  The shaping means and the shaped article may be formed of an inorganic material, an organic material, or a material in which a skeleton structure is formed by a bond of silicon and oxygen. Since it is only a means for processing the droplet, it may be a conductive material such as metal or an insulating material such as resin. Moreover, a fiber etc. can also be used. Considering the installation in the apparatus, a relatively light weight and easy processing is preferable. When drawing a fine wiring pattern or the like, a nanotube material such as a carbon nanotube can be used. As the ultrafine carbon fiber such as carbon nanotube, graphite nanofiber, carbon nanofiber, tube-like graphite, carbon nanocone, cone-like graphite, or the like can also be used. As a material for the processing means, a material that does not cause a reaction or the like may be selected depending on the composition of the droplet to be processed.

  The display device of the present invention includes a light-emitting element and a TFT in which a medium including light-emitting organic matter or a mixture of organic and inorganic substances called electroluminescence (hereinafter also referred to as “EL”) is interposed between electrodes. And a liquid crystal display device using a liquid crystal element having a liquid crystal material as a display element.

  In addition, according to the present invention, when a pattern is formed by a droplet discharge method, means for improving adhesion (base pretreatment) is performed on a region to be formed, thereby improving the reliability of the display device.

  The present invention is characterized in that a display device including wiring, other semiconductor films, insulating films, masks, and the like is formed using a substance having an effect of improving adhesion. In the process, when a predetermined pattern is formed by discharging droplets containing a predetermined composition from the pores, a substance made of a refractory metal is formed as a base pretreatment in order to improve the adhesion. Specifically, a wiring material mixed in a solvent (including a material in which a wiring material (conductive material) is dissolved or dispersed in a solvent) on a conductive layer made of a refractory metal or on both ends thereof by a coating method or the like. And forming a wiring. For example, a conductor mixed in a solvent is discharged onto a conductive layer made of a refractory metal or a 3d transition element by a droplet discharge method. In addition to the droplet discharge method, a spin coating method, a dip method, other coating methods, and a printing method (a method for forming a pattern such as screen printing or offset printing) can be used as a solvent on the conductive layer made of the refractory metal. A mixed conductor may be formed.

Substances used as the base pretreatment are titanium oxide (TiO _x ), strontium titanate (SrTiO ₃ ), cadmium selenide (CdSe), potassium tantalate (KTaO ₃ ), cadmium sulfide (CdS), zirconium oxide (ZrO ₂ ). ), Niobium oxide (Nb ₂ O ₅ ), zinc oxide (ZnO), iron oxide (Fe ₂ O ₃ ), tungsten oxide (WO ₃ ), and the like.

  Sol-gel dip coating method, spin coating method, droplet discharge method, ion plating method, ion beam method, CVD method, sputtering method, RF magnetron sputtering method, plasma spraying method, plasma spraying method, or anodic oxidation method can do. The substance may not have continuity as a film depending on the formation method.

  As the refractory metal or 3d transition element, Ti (titanium), W (tungsten), Cr (chromium), Al (aluminum), Ta (tantalum), Ni (nickel), Zr (zirconium), Hf (hafnium) , V (vanadium), Ir (iridium), Nb (niobium), Pd (lead), Pt (platinum), Mo (molybdenum), Co (cobalt), Rh (rhodium), Sc (scandium), Mn (manganese) , Fe (iron), Cu (copper), or Zn (zinc), and oxides, nitrides, oxynitrides thereof, and the like can be used. The conductive layer is formed by a known method such as a sputtering method, a vapor deposition method, an ion implantation method, a CVD method, a dip method, or a spin coating method, preferably a sputtering method, a dip method, or a spin coating method. It is characterized by forming in. Further, when the conductive layer is insulated later, it is convenient and preferable that the conductive layer is formed with a thickness of 0.01 to 10 nm and insulated by natural oxidation.

As another method, there is a method of performing plasma treatment on a formation region (formation surface). The plasma treatment is performed using air, oxygen, or nitrogen as a treatment gas, and a pressure of several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (13300 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (93100 Pa) to 800 Torr ( 106400 Pa), that is, a pulse voltage is applied in a state where the pressure becomes atmospheric pressure or a pressure near atmospheric pressure. At this time, the plasma density is set to 1 × 10 ¹⁰ to 1 × 10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without material dependency. As a result, surface modification can be performed on any material.

  As another method, an organic material substance that functions as an adhesive may be formed in order to improve the adhesion between a pattern formed by a droplet discharge method and a formation region thereof. Materials include photosensitive or non-photosensitive organic materials (organic resin materials) (polyimide, acrylic, polyamide, polyimide amide, resist, benzocyclobutene, etc.), a low-k material having a low dielectric constant, or a plurality of materials. A film made of seeds or a stack of these films can be used. In addition, a skeleton structure is formed by a bond of silicon (Si) and oxygen (O), and at least one of a material containing at least hydrogen as a substituent, or fluorine, an alkyl group, or an aromatic hydrocarbon as a substituent. You may use the material which has. As a manufacturing method, a droplet discharge method or a printing method (a method of forming a pattern such as screen printing or offset printing) can be used. A TOF film or an SOG film obtained by a coating method can also be used.

  The above-described processes for improving the adhesion and surface modification of the conductor region formed by using the droplet discharge method are performed on the pattern formed by using the droplet discharge method. In addition, it may be performed when a conductor is further formed. In addition, as a base pretreatment in that case, after forming the first conductive layer by a droplet discharge method, an ultraviolet irradiation process of irradiating ultraviolet rays is performed, and a second conductive layer is formed in the processing region by a droplet discharge method. It may be formed. For example, after a wide pattern is formed using a discharge port having a large diameter, a thin pattern is formed by the shaping means so as to partially overlap the wide pattern by using the present invention, and a fine pattern is formed. You can also

  In order to form a conductor (conductive layer), a composition in which a conductive material is dissolved or dispersed in a solvent is used as a composition discharged from a discharge port by a droplet discharge method. Conductive materials include metals such as Ag, Au, Cu, Ni, Pt, Pd, Ir, Rh, W, and Al, metal sulfides of Cd, Zn, Fe, Ti, Si, Ge, Si, Zr, Ba It corresponds to oxides such as silver halide fine particles or dispersible nanoparticles. Further, it corresponds to indium tin oxide (ITO) used as a transparent conductive film, ITSO composed of indium tin oxide and silicon oxide, organic indium, organic tin, zinc oxide, titanium nitride, and the like. However, it is preferable to use a composition in which any of gold, silver and copper is dissolved or dispersed in a solvent in consideration of the specific resistance value, more preferably the composition discharged from the discharge port. It is preferable to use low resistance silver or copper. However, when silver or copper is used, a barrier film may be provided as a countermeasure against impurities. As the barrier film, a silicon nitride film or nickel boron (NiB) can be used.

  Alternatively, particles in which a conductive material is coated with another conductive material to form a plurality of layers may be used. For example, particles having a three-layer structure in which nickel boron (NiB) is coated around copper and silver is coated around it may be used. As the solvent, esters such as butyl acetate and ethyl acetate, alcohols such as isopropyl alcohol and ethyl alcohol, organic solvents such as methyl ethyl ketone and acetone are used. The viscosity of the composition is preferably 20 cp or less, in order to prevent drying from occurring or to allow the composition to be smoothly discharged from the discharge port. The surface tension of the composition is preferably 40 mN / m or less. However, the viscosity and the like of the composition may be appropriately adjusted according to the solvent to be used and the application. As an example, the viscosity of a composition in which ITO, organic indium, or organic tin is dissolved or dispersed in a solvent is 5 to 20 mPa · S, and the viscosity of a composition in which silver is dissolved or dispersed in a solvent is 5 to 20 mPa · S. The viscosity of the composition in which gold is dissolved or dispersed in a solvent is preferably set to 5 to 20 mPa · S.

  In the present invention, the conductive layer constituting the display device can be formed by a droplet discharge method. First, a conductive layer (also referred to as a bus line) formed with a relatively wide line width such as a gate line, a source line, and other routing wirings is directly formed by a droplet discharge method. By the shaping means of the present invention, a conductive layer having a relatively narrow line width such as a gate electrode, a source electrode, a drain electrode, and other wiring in a pixel portion that is connected to be branched from the source line or the gate line, Fine wiring can be drawn and formed by shaping. According to the present invention, the line width of the gate wiring is 10 μm or more and 40 μm or less, the line width of the gate electrode is 5 μm or more and 20 μm or less, preferably 0.3 μm or more and 10 μm or less, and the line width of the gate wiring is about twice the line width of the gate electrode. Such a wiring can be formed. According to the present invention, it is possible to satisfy both of the requirements of low resistance for allowing a large current to flow efficiently and at high speed and miniaturization of a pattern without disconnection to the electrode. According to the present invention, a smaller fine wiring can be formed without being limited to the diameter of the droplet discharge port.

  One of the droplet discharge devices of the present invention has discharge means for discharging a composition containing a pattern forming material, and shaping means for shaping the shape of the composition before the composition adheres to the formation region. The shaping means is provided between the discharge means and the formation region.

  One of the droplet discharge devices of the present invention includes discharge means for discharging a composition containing a pattern forming material and shaping means for shaping the shape of the composition after the composition has adhered to the formation region.

  In the above structure, the shaping means may be provided in contact with the discharge port of the droplet discharge means, or may be provided separately and scanned separately. The shaping means has a shaping portion, and the shape of the shaping portion can be various shapes such as a needle shape, a column shape, a rod shape, a thread shape, a plate shape, or a tubular shape.

  One of the pattern forming methods of the present invention is selected by discharging a composition containing a pattern forming material toward a formation region and shaping the shape of the composition before the composition adheres to the formation region. Pattern is formed.

  One of the pattern forming methods of the present invention is a method in which a composition containing a pattern forming material is discharged toward a formation region, and after the composition adheres to the formation region and before solidification, A pattern is selectively formed by shaping the shape.

  In the above configuration, the shape of the composition is shaped by the shaping part of the shaping means, but if the shaping part is a thin shape such as a needle shape or a thread shape, it can be shaped into a fine pattern, such as a columnar shape or a plate shape. A large pattern can be formed at a time when the shape has a large area.

  One embodiment of a method for manufacturing a display device of the present invention includes a semiconductor layer, a wiring, and an electrode, and a composition containing a conductive material is discharged onto a formation region, and a part of the shape of the composition is shaped. By selectively expanding objects, wiring and electrodes are formed.

  In the above structure, the wiring and the electrode can be formed using a material for forming the above-described conductor by a droplet discharge method. The electrode can be used as a gate electrode layer, and the width of the gate electrode layer in the channel direction is preferably 5 μm to 100 μm, more preferably 0.3 μm to 10 μm. By the droplet discharge method, the liquid volume can be discharged from 0.1 pl to 40 pl to form a pattern.

  In the above structure, the semiconductor layer may be a semi-amorphous semiconductor including a crystal structure formed by a gas including hydrogen and a halogen element. It may be a non-single crystal semiconductor formed with a gas containing hydrogen and a halogen element, or a polycrystalline semiconductor formed with a gas containing hydrogen and a halogen element. The length in the channel direction of the region where the electrode and the semiconductor layer intersect is preferably 5 μm to 100 μm, more preferably 0.3 μm to 10 μm. In addition, a television device in which a display screen is configured using the display device having the above structure can be manufactured.

  The gate insulating layer is formed by sequentially laminating the first silicon nitride film, the silicon oxide film, and the second silicon nitride film, so that the gate electrode can be prevented from being oxidized and formed on the upper layer side of the gate insulating layer. It is possible to form a favorable interface with the semiconductor layer.

  The present invention is characterized in that it is performed by a droplet discharge method when forming a gate electrode layer, a wiring layer, and a mask used for patterning, but at least of the patterns necessary for manufacturing a display device. The object of the present invention is achieved by manufacturing one or more by a method capable of selectively forming a pattern and manufacturing a display device.

  An insulating layer used for a partition wall or the like may be formed using an organic material, an inorganic material, or a material in which a skeleton structure is formed by a bond of silicon and oxygen. Since the organic material has excellent flatness, the film thickness is not extremely reduced at the step portion or disconnection occurs even when the conductor is formed later. Organic materials have a low dielectric constant. Therefore, when used as an interlayer insulator for a plurality of wirings, the wiring capacity is reduced, multilayer wiring can be formed, and high performance and high functionality are realized.

  On the other hand, a typical example of a material in which a skeleton structure is formed by a bond of silicon and oxygen is a siloxane polymer. Specifically, a skeleton structure is formed by a bond of silicon and oxygen, and at least hydrogen is added to a substituent. Or a material having at least one of fluorine, an alkyl group, and an aromatic hydrocarbon as a substituent. This material is also excellent in flatness, has transparency and heat resistance, and can be subjected to heat treatment at a temperature of about 300 ° C. to 600 ° C. or less after forming an insulator made of a siloxane polymer.

  According to the present invention, since the pattern of the conductive layer can be created according to the line width, among the wirings constituting the display device, both the low-width wiring with a large width and the fine wiring used for the pixel portion and the like Can be configured to satisfy the functions required by its role.

  According to the present invention, a wiring layer and a mask can be directly patterned by a droplet discharge method. Therefore, a TFT in which a material use efficiency is improved and a manufacturing process is simplified, and a reliability using the TFT. High-performance display device can be obtained

  Embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in structures of the present invention described below, the same portions or portions having similar functions are denoted by the same reference numerals in different drawings, and description thereof is not repeated.

  FIG. 29 is a top view showing a structure of a display panel according to the present invention. A pixel portion 2701 in which pixels 2702 are arranged in a matrix on a substrate 2700 having an insulating surface, a scanning line side input terminal 2703, and a signal line side input. A terminal 2704 is formed. The number of pixels may be provided in accordance with various standards. For XGA, 1024 × 768 × 3 (RGB), for UXGA, 1600 × 1200 × 3 (RGB), and for full specification high vision, 1920 × 1080. X3 (RGB) may be used.

  The pixels 2702 are arranged in a matrix by a scan line extending from the scan line side input terminal 2703 and a signal line extending from the signal line side input terminal 2704 intersecting. Each of the pixels 2702 includes a switching element and a pixel electrode connected to the switching element. A typical example of the switching element is a TFT. By connecting the gate electrode side of the TFT to a scanning line and the source or drain side to a signal line, each pixel can be controlled independently by a signal input from the outside. Yes.

  A TFT includes a semiconductor layer, a gate insulating layer, and a gate electrode layer as main components, and a wiring layer connected to a source region and a drain region formed in the semiconductor layer is attached to the TFT. Structurally, the top gate type in which the semiconductor layer, the gate insulating layer and the gate electrode layer are arranged from the substrate side, and the bottom gate type in which the gate electrode layer, the gate insulating layer and the semiconductor layer are arranged from the substrate side are representative. In the present invention, any of those structures may be used.

  As a material for forming the semiconductor layer, an amorphous semiconductor (hereinafter also referred to as “AS”) manufactured by a vapor deposition method or a sputtering method using a semiconductor material gas typified by silane or germane is used. A polycrystalline semiconductor crystallized using energy or thermal energy, a semi-amorphous (also referred to as microcrystal or microcrystal, hereinafter, also referred to as “SAS”) semiconductor, or the like can be used.

SAS is a semiconductor having an intermediate structure between amorphous and crystalline structures (including single crystal and polycrystal) and having a third state that is stable in terms of free energy and has a short-range order and a lattice. It includes a crystalline region with strain. A crystal region of 0.5 to 20 nm can be observed in at least a part of the film, and when silicon is the main component, the Raman spectrum shifts to a lower wave number side than 520 cm ^−1. Yes. In X-ray diffraction, diffraction peaks of (111) and (220) that are derived from the silicon crystal lattice are observed. At least 1 atomic% or more of hydrogen or halogen is contained as a neutralizing agent for dangling bonds. The SAS is formed by glow discharge decomposition (plasma CVD) of a silicide gas. As the silicide gas, SiH ₄ , Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4, and the} like can be used. Further, GeF ₄ may be mixed. This silicide gas may be diluted with H ₂ , or H ₂ and one or more kinds of rare gas elements selected from He, Ar, Kr, and Ne. The dilution rate is in the range of 2 to 1000 times. The pressure is generally in the range of 0.1 Pa to 133 Pa, and the power supply frequency is 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz. The substrate heating temperature may be 300 ° C. or less. As an impurity element in the film, impurities of atmospheric components such as oxygen, nitrogen, and carbon are desirably 1 × 10 ²⁰ cm ⁻¹ or less, and in particular, the oxygen concentration is 5 × 10 ¹⁹ / cm ³ or less, preferably 1 × 10 ¹⁹ / cm ³ or less

  FIG. 29 shows a configuration of a display panel in which signals input to the scanning lines and signal lines are controlled by an external drive circuit. As shown in FIG. 30, a driver IC is formed by COG (Chip on Glass). You may mount on the board | substrate 700. FIG. In FIG. 30, a substrate 701 is attached to a sealing substrate 703 with a sealant 702. A driver IC 707a, a driver IC 707b, a driver IC 707c, a driver IC 705a, and a driver IC 705b provided over the substrate 700 are FPC 704a, FPC 704b, and FPC 704c, respectively. , FPC 706a and FPC 706b. The driver IC may be formed on a single crystal semiconductor substrate or may be a circuit in which a TFT is formed on a glass substrate.

  In the case where a TFT provided for a pixel is formed using SAS, a driver circuit 3702 on the scanning line side can be formed over the substrate 3700 and integrated as shown in FIG. In FIG. 31, reference numeral 3701 denotes a pixel region, and the signal line side driver circuit is mounted with driver ICs 3705a and 3705b by COG and connected to the FPCs 3704a and 3704b.

(Embodiment 1)
An embodiment of the present invention will be described with reference to FIGS.

  1A to 1D are detailed views of the pattern forming method of the apparatus of the present invention. The present invention uses a method of discharging droplets to form a pattern.

  In FIG. 1A, 50 is a formation region, 11 is a head part, 12b is a control means for droplet discharge means, 18 is a nozzle, 10 is a shaping means, 14 is a shaping part, 14a is a shaping part. It is a control means of the means. The droplet 13 having the pattern forming material discharged from the nozzle 18 by the control means 12b adheres to the brush-shaped shaping portion 14 and is formed in a shape like the pattern 15 on the formation region 50 through the shaping portion 14. Is done. By scanning the shaping means and the head portion in the direction 16, the pattern 15 becomes a linear pattern.

  In the case where the shaping unit 14 is formed in a needle shape with the diameter narrowed toward the tip as in the present embodiment, the size of the liquid droplets discharged from the discharge port of the nozzle 18 is attached to the formation region 50. The fine pattern 15 with a narrower line width can be formed. By scanning the shaping unit 14, the amount of droplets attached to the formation region 50 can be adjusted. Therefore, by controlling the shape of the shaping unit 14 and the scanning speed, the pattern 15 can be formed in a desired width and shape without depending on the diameter of the discharge port of the nozzle.

  FIG. 1A shows an example in which a droplet is shaped into a desired shape by a shaping unit after it is ejected from the ejection port of the nozzle until it adheres to the surface to be formed. FIG. 1B shows a method of shaping a shape after discharging a droplet to a formation region and before the composition is solidified.

  In FIG. 1B, reference numeral 60 denotes a region to be formed, 21 is a head unit, 22b is a control unit of a droplet discharge unit, 28 is a nozzle, 20 is a shaping unit, 24 is a shaping unit, 22a Is a control means of the shaping means. The droplets having the pattern forming material ejected from the nozzles 28 by the control means 22b adhere to the formation region 60 as the droplets 23. Before the droplet 23 is completely solidified, the shaping means 20 and the shaping unit 24 are moved in the direction 27 by the control means 22a and scanned on the droplet 23 in the direction 26. At that time, the shaping unit 24 shapes the droplet 23 and deforms its shape to form a pattern 25. At this time, since the droplet 23 is before being completely solidified, the shaping unit 24 can freely shape the pattern.

  By adjusting the shape of the shaping unit 24, the scanning speed in the direction 26, the moving distance in the direction 27, and the like, the pattern 25 is formed in a desired width and shape regardless of the diameter of the nozzle outlet. Can do.

  In the present embodiment, the shape of the shaping portions 14 and 24 is a needle-like shape having a diameter that decreases according to the tip. . When it is desired to form a wide pattern, a spatula-shaped pattern may be used so that the area in contact with the droplets increases as it goes to the tip. Moreover, you may use the thing in which several thin hair (thread) was bundled like a brush.

  Next, FIGS. 1C and 1D show another shaping means method. 1C and 1D are examples in which the shaping portion is integrally formed with the nozzle. In FIG. 1C, 70 is a formation region, 30 is a head unit, 32 is a control unit for droplet discharge means, 38 is a nozzle, and a shaping unit 34 as a shaping unit is installed in the nozzle 38. The shaping unit 34 has a tube (tube) shape having a space 33 therein, and droplets having the pattern forming material discharged from the nozzle 38 pass through the space 33 of the shaping unit 34 to be controlled. It is shaped into the shape of 31 and adheres to the formation region. Since the shape of the droplet 31 can be freely controlled by the size of the space 33 of the shaping portion 34, a fine pattern can also be formed.

  As shown in FIG. 1D, a fine linear pattern 41 can be formed on the formation region 80 by discharging droplets continuously and scanning in the direction 46. By controlling the size of the space 33 of the shaping unit 34 and the scanning speed, a desired pattern can be freely formed without depending on the size of the ejection port. Therefore, by selecting and installing the shape of the shaping unit 34 so as to change the pen tip, it is possible to deal with patterns of various shapes. Of course, FIGS. 1A and 1B can be combined with FIGS. Since more precise shaping can be performed, it is effective for forming a fine pattern.

  The shape and material of the shaping portion can be freely selected depending on the pattern desired to be formed in the formation region. The material may be hard or soft and may be selected according to the viscosity of the material forming the pattern to be shaped. At this time, when the droplet is physically shaped, it is desirable that the material forming the pattern does not react with the material of the shaping portion. However, it is also possible to change the physical properties by contacting the shaping portion and form a pattern on the formation region.

  The material of the shaping means and the shaping part may be silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride or other inorganic materials such as acrylic acid, methacrylic acid and derivatives thereof, or polyimide. Including Si—O—Si bond among compounds composed of silicon, oxygen, and hydrogen formed from heat-resistant polymers such as aromatic polyamide, polybenzimidazole, other organic materials, or siloxane-based materials It can be formed of inorganic siloxane or an organic siloxane-based material in which hydrogen on silicon is substituted by an organic group such as methyl or phenyl. Since it is only a means for shaping the droplet, it may be a conductive material such as metal or an insulating material such as resin. Moreover, a fiber etc. can also be used. Or considering that it is installed in the apparatus, it is preferable to be relatively lightweight and easy to shape. When drawing a fine wiring pattern or the like, a nanotube material such as a carbon nanotube can be used. As the ultrafine carbon fiber such as carbon nanotube, graphite nanofiber, carbon nanofiber, tube-like graphite, carbon nanocone, cone-like graphite, or the like can also be used.

  In the present invention, the shaping means freely draws a desired pattern so as to draw a picture with a paintbrush or a pen without depending on the shape and size of the discharge port that discharges the droplet to the formation area. Can be formed.

(Embodiment 2)
Embodiments of the present invention will be described with reference to FIGS. 2 to 7 and FIGS. 8 to 13. More specifically, a method for manufacturing a display device to which the present invention is applied will be described. First, a method for manufacturing a display device having a channel-etched thin film transistor to which the present invention is applied will be described. 2 to 7 correspond to FIGS. 8 to 13, respectively. FIGS. 2 to 7 are top views of the display device pixel portion, and FIG. 8 to FIG. FIG. 5B is a sectional view taken along line AA ′, FIG. 5B is a sectional view taken along line BB ′, and FIG. 5C is a sectional view taken along line CC ′.

  A base film 101 for improving adhesion is formed on the substrate 100 as a base pretreatment, and a gate wiring layer 103 is formed as shown in FIGS. 2 and 8A, 8B, and 8C. As the substrate 100, a glass substrate made of barium borosilicate glass, alumino borosilicate glass, or the like, a quartz substrate, a silicon substrate, a metal substrate, a stainless steel substrate, or a plastic substrate having heat resistance that can withstand the processing temperature in this manufacturing process is used. Further, polishing may be performed by a CMP method or the like so that the surface of the substrate 100 is planarized. Note that an insulating layer may be formed over the substrate 100. The insulating layer is formed as a single layer or a stacked layer using an oxide material or a nitride material containing silicon by a known method such as a CVD method, a plasma CVD method, a sputtering method, or a spin coating method. This insulating layer may not be formed, but has an effect of blocking contaminants from the substrate 100. In the case of forming a base layer for preventing contamination from the glass substrate, the base film 101 is formed thereon as a base pretreatment for the gate wiring layer 103 formed by a droplet discharge method.

  One mode of a droplet discharge apparatus used for forming a pattern is shown in FIG. The individual heads 1405 and 1412 of the droplet discharge means 1403 are connected to the control means 1407, which can draw a pre-programmed pattern under the control of the computer 1410. The drawing timing may be performed with reference to a marker 1411 formed on the substrate 1400, for example. Alternatively, the reference point may be determined based on the edge of the substrate 1400. This is detected by an imaging means 1404 such as a CCD, and converted into a digital signal by the image processing means 1409 is recognized by the computer 1410 to generate a control signal and sent to the control means 1407. Of course, the information on the pattern to be formed on the substrate 1400 is stored in the storage medium 1408. Based on this information, a control signal is sent to the control means 1407, and each head 1405 of the droplet discharge means 1403 is sent. , 1412 can be individually controlled. Reference numeral 1413 denotes shaping means. In this embodiment, scanning is controlled by the control means 1407.

  The nozzles of the heads 1405 and 1412 are different in size, and different materials can be drawn simultaneously with different widths. With one head, conductive material, organic material, inorganic material, etc. can be discharged and drawn respectively. When drawing in a wide area like an interlayer film, the same material is simultaneously used from multiple nozzles to improve throughput. It can be discharged and drawn. The droplets containing the composition discharged from the heads 1405 and 1412 are shaped into a desired pattern by the shaping means 1413. In this embodiment mode, the heads 1405 and 1414 included in the droplet discharge unit 1403 and the shaping unit 1413 are separately scanned. However, as described in Embodiment Mode 1, the heads 1405 and 1414 may be installed adjacent to each other. , May be installed so as to be integrally formed. In the case of using a large substrate, the head 1405 can freely scan on the substrate in the direction of the arrow, and a drawing area can be freely set, so that a plurality of the same patterns can be drawn on one substrate.

  The base film 101 formed as the base pretreatment in this embodiment is a sol-gel dip coating method, spin coating method, droplet discharge method, ion plating method, ion beam method, CVD method, sputtering method, RF magnetron sputtering. It can be formed by a method, a plasma spraying method, a plasma spraying method, or an anodizing method. The substance may not have continuity as a film depending on the formation method. When the film is formed by a coating method such as a dip coating method or a spin coating method, it may be fired or dried when the solvent needs to be removed.

In this embodiment, a case where a TiO _x (typically TiO ₂ ) crystal having a predetermined crystal structure is formed as the base film 101 by a sputtering method will be described. Metal titanium (titanium tube) is used as a target, and sputtering is performed using argon gas and oxygen. Further, He gas may be introduced. TiO _x may be formed while heating a substrate provided with a film formation chamber or a processed material.

Thus TiO _X to be formed may be a very thin film.

  In addition, a metal material such as Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), or Mo (molybdenum) or an oxide thereof can be formed by a method such as sputtering or vapor deposition. The base film 101 to be formed may be formed.

  The base film 101 may be formed with a thickness of 0.01 to 10 nm. However, since the base film 101 may be formed with a very small thickness, the base film 101 does not necessarily have a layer structure. When the base film is conductive using a refractory metal material or a 3d transition element as the base film, it is desirable to perform the following two methods for the base film other than the conductive layer formation region. .

As a first method, the base film 101 that does not overlap with the gate wiring layer 103 is insulated to form an insulating layer. That is, the base film 101 that does not overlap with the gate wiring layer 103 is oxidized and insulated. As described above, when the base film 101 is oxidized to be insulated, it is preferable to form the base film 101 with a thickness of 0.01 to 10 nm, so that the base film 101 can be easily oxidized. . As a method of oxidizing, a method of exposing to an oxygen atmosphere or a method of performing heat treatment may be used. Further, an oxygen plasma method, an O ₃ oxidation method, a UV-O ₃ oxidation method, or the like can also be used.

  As a second method, the gate wiring layer 103 is selectively formed in a formation region (a composition containing a conductive material and a discharge region). The base film 101 may be selectively formed over the substrate by a droplet discharge method or the like, or after being formed over the entire surface, the base film 101 is selectively etched using the gate wiring layer 103 as a mask. It may be removed. When this process is used, the thickness of the base film 101 is not limited.

Further, as another method for the base pretreatment, there is a method for performing plasma treatment on a formation region (formation surface). The plasma treatment is performed using air, oxygen, or nitrogen as a treatment gas, and a pressure of several tens of Torr to 1000 Torr (133000 Pa), preferably 100 (13300 Pa) to 1000 Torr (133000 Pa), more preferably 700 Torr (93100 Pa) to 800 Torr ( 106400 Pa), that is, a pulse voltage is applied in a state where the pressure becomes atmospheric pressure or a pressure near atmospheric pressure. At this time, the plasma density is set to 1 × 10 ¹⁰ to 1 × 10 ¹⁴ m ⁻³ , so-called corona discharge or glow discharge. By using plasma treatment using a treatment gas of air, oxygen, or nitrogen, surface modification can be performed without material dependency. As a result, surface modification can be performed on any material.

  As another method, an organic material substance that functions as an adhesive may be formed in order to improve the adhesion of the pattern formed by the droplet discharge method to the formation region. Organic material (organic resin material) (polyimide, acrylic) or skeleton structure is composed of a bond of silicon (Si) and oxygen (O), a material containing at least hydrogen as a substituent, or fluorine, alkyl group as a substituent, Alternatively, a material having at least one of aromatic hydrocarbons may be used.

  A gate wiring layer 103 is formed by a droplet discharge method (see FIGS. 2 and 8). The present invention relates to a gate wiring layer, a capacitor wiring layer, and a gate formed with a relatively thin line in each pixel, straddling pixels among conductive layers constituting a display device. Separate electrode layers such as electrode layers. A conductive layer having a large line width, such as a gate wiring layer and a capacitor wiring layer, is formed first by adjusting the diameter of the discharge port, so that there is no disconnection or the like, and a highly reliable and low resistance gate wiring layer and capacitance. A wiring layer can be formed.

  The gate wiring layer 103 is formed using a droplet discharge unit. The droplet discharge means is a general term for a device having means for discharging droplets such as a nozzle having a composition discharge port and a head having one or a plurality of nozzles. The diameter of the nozzle provided in the droplet discharge means is set to 0.02 to 100 μm (preferably 30 μm or less), and the discharge amount of the composition discharged from the nozzle is 0.001 pl to 100 pl (preferably 0). .1pl or more and 40pl or less, more preferably 10pl or less). The discharge amount increases in proportion to the size of the nozzle diameter. In addition, the distance between the object to be processed and the nozzle outlet is preferably as close as possible in order to drop it at a desired location, preferably about 0.1 to 3 mm (preferably about 1 mm or less). Set.

  A composition in which a conductive material is dissolved or dispersed in a solvent is used as the composition discharged from the discharge port. Conductive materials include metals such as Ag, Au, Cu, Ni, Pt, Pd, Ir, Rh, W, and Al, metal sulfides of Cd, Zn, Fe, Ti, Si, Ge, Si, Zr, Ba It corresponds to oxides such as silver halide fine particles or dispersible nanoparticles. Further, it corresponds to indium tin oxide (ITO) used as a transparent conductive film, ITSO composed of indium tin oxide and silicon oxide, organic indium, organic tin, zinc oxide, titanium nitride, and the like. However, it is preferable to use a composition in which any of gold, silver and copper is dissolved or dispersed in a solvent in consideration of the specific resistance value, more preferably the composition discharged from the discharge port. It is preferable to use low resistance silver or copper. However, when silver or copper is used, a barrier film may be provided as a countermeasure against impurities. As the barrier film, a silicon nitride film or nickel boron (NiB) can be used.

  Alternatively, particles in which a conductive material is coated with another conductive material to form a plurality of layers may be used. For example, particles having a three-layer structure in which nickel boron (NiB) is coated around copper and silver is coated around it may be used. As the solvent, esters such as butyl acetate and ethyl acetate, alcohols such as isopropyl alcohol and ethyl alcohol, organic solvents such as methyl ethyl ketone and acetone are used. The viscosity of the composition is preferably 20 Pa · s or less, in order to prevent the drying from occurring or to allow the composition to be smoothly discharged from the discharge port. The surface tension of the composition is preferably 40 mN / m or less. However, the viscosity and the like of the composition may be appropriately adjusted according to the solvent to be used and the application. As an example, the viscosity of a composition in which ITO, organic indium, or organic tin is dissolved or dispersed in a solvent is 5 to 20 mPa · s, the viscosity of a composition in which silver is dissolved or dispersed in a solvent is 5 to 20 mPa · s, The viscosity of the composition in which gold is dissolved or dispersed in a solvent is preferably set to 5 to 20 mPa · s.

  The conductive layer may be a stack of a plurality of conductive materials. Alternatively, first, silver may be used as a conductive material, and a conductive layer may be formed by a droplet discharge method, followed by plating with copper or the like. Plating may be performed by electroplating or chemical (electroless) plating. For plating, the substrate surface may be immersed in a container filled with a solution having a plating material, but the substrate is placed at an angle (or vertically) so that the solution having the material to be plated flows on the substrate surface. It may be applied. When plating is performed so that the solution is applied while standing the substrate, there is an advantage that the process apparatus is reduced in size.

  Although depending on the diameter of each nozzle and the desired pattern shape, the diameter of the conductor particles is preferably as small as possible for preventing nozzle clogging and producing a high-definition pattern. 1 μm or less is preferable. The composition is formed by a known method such as an electrolytic method, an atomizing method, or a wet reduction method, and its particle size is generally about 0.01 to 10 μm. However, when formed by a gas evaporation method, the nanoparticles protected by the dispersant are as fine as about 7 nm, and these nanoparticles are aggregated in the solvent when the surface of each particle is covered with a coating agent. And stably disperse at room temperature and shows almost the same behavior as liquid. Therefore, it is preferable to use a coating agent.

  When the step of discharging the composition is performed under reduced pressure, the solvent of the composition is volatilized between the time of discharging the composition and landing on the object to be processed, and the subsequent drying and baking steps are omitted. be able to. Further, it is preferable to perform under reduced pressure because an oxide film or the like is not formed on the surface of the conductor. In addition, after discharging the composition, one or both steps of drying and baking are performed. The drying and firing steps are both heat treatment steps. For example, drying is performed at 100 degrees for 3 minutes, and firing is performed at 200 to 350 degrees for 15 minutes to 60 minutes. Time is different. The drying process and the firing process are performed under normal pressure or reduced pressure by laser light irradiation, rapid thermal annealing, a heating furnace, or the like. In addition, the timing which performs this heat processing is not specifically limited. In order to satisfactorily perform the drying and firing steps, the substrate may be heated, and the temperature at that time depends on the material of the substrate or the like, but is generally 100 to 800 degrees (preferably 200). ~ 350 degrees). By this step, the solvent in the composition is volatilized or the dispersant is chemically removed, and the surrounding resin is cured and contracted to bring the nanoparticles into contact with each other, thereby accelerating fusion and fusion.

For the laser light irradiation, a continuous wave or pulsed gas laser or solid-state laser may be used. Examples of the former gas laser include an excimer laser and a YAG laser, and examples of the latter solid laser include a laser using a crystal such as YAG or YVO ₄ doped with Cr, Nd, or the like. Note that it is preferable to use a continuous wave laser because of the absorption rate of the laser light. In addition, a so-called hybrid laser irradiation method combining pulse oscillation and continuous oscillation may be used. However, depending on the heat resistance of the substrate 100, the heat treatment by laser light irradiation may be performed instantaneously within a few microseconds to several tens of seconds so that the substrate 100 is not destroyed. Instantaneous thermal annealing (RTA) uses an infrared lamp or a halogen lamp that irradiates ultraviolet light or infrared light in an inert gas atmosphere, and rapidly raises the temperature for several minutes to several microseconds. This is done by applying heat instantaneously. Since this treatment is performed instantaneously, only the outermost thin film can be heated substantially without affecting the lower layer film. That is, it does not affect a substrate having low heat resistance such as a plastic substrate.

  Although the above-described step of forming the base film 101 is performed as the base pretreatment of the conductive layer formed using the droplet discharge method, this treatment step may be performed after the gate wiring layer 103 is formed.

  Further, after the gate wiring layer 103 is formed by discharging a composition by a droplet discharge method, the surface may be flattened by pressing with pressure in order to improve the flatness. As a pressing method, unevenness may be reduced by scanning a roller-like object on the surface, or the surface may be pressed vertically with a flat plate-like object. A heating step may be performed when pressing. Alternatively, the surface may be softened or melted with a solvent or the like, and the surface irregularities may be removed with an air knife. Further, polishing may be performed using a CMP method. This step can be applied when the surface is flattened when unevenness is generated by the droplet discharge method.

  Next, the gate electrode layer 104 and the gate electrode layer 105 are formed. The gate electrode layer 104 is formed in contact with the gate wiring layer 103 (see FIG. 3). The gate electrode layer 104 can be formed by drawing a fine wiring by shaping the gate wiring layer 103 and then shaping it by the shaping means 90 of the present invention. In this embodiment, after the gate wiring layer 103 is formed and before the gate wiring layer 103 is completely solidified, a part of the gate wiring layer is expanded by the shaping portion of the shaping means 90 to form the gate electrode layer 104. (See FIG. 9). When the gate wiring layer 103 and the gate electrode layer 104 are integrally formed in the same layer as described above, the gate wiring layer 103 and the gate electrode layer 104 can be formed without a boundary, so that resistance can be further reduced. On the other hand, the gate electrode layer 105 is newly ejected with a conductive material and shaped so as to be thinned using the shaping unit 91, thereby forming the gate electrode layer 105. Needless to say, the gate electrode layer 104 may not be formed integrally with part of the gate wiring layer 103, and similarly to the gate electrode layer 105, a new conductive material may be discharged and shaped by a shaping unit. In this case, the above-described base pretreatment may be performed on the region where the gate electrode layers 104 and 105 are formed. As the base pretreatment, the gate electrode layer 104 may be formed in a region where the gate wiring layer 103 and the gate electrode layer 104 are in contact with each other after the ultraviolet irradiation treatment as a treatment for improving adhesion. According to the present invention, the line width of the gate wiring layer is 10 μm or more and 40 μm or less, the line width of the gate electrode layer is 5 μm or more and 20 μm or less, preferably 0.3 or more and 10 μm or less, and the line width of the gate wiring layer is the line width of the gate electrode layer. Wiring that can be doubled can be formed.

  Alternatively, the gate wiring layer 103 and the gate electrode layers 104 and 105 may be formed at the same time. In that case, shaping means having different sizes of the shaping portions are respectively installed in the nozzles of the plurality of heads of the droplet discharge device, and the gate wiring layer 103 and the gate electrode layers 104 and 105 are simultaneously formed by one scanning. . For example, a nozzle head in which only a nozzle is provided in a region where the gate wiring layer 103 is formed, and a shaping unit having a shaping portion which can be shaped into a fine pattern is provided in a region where the gate electrode layers 104 and 105 are formed. Scan. The conductive material is continuously discharged from the discharge port for forming the gate wiring layer 103, and the conductive material is discharged from the discharge port for forming the gate electrode layers 104 and 105 when the head is scanned in the formation region. Shaping is performed by the discharge and shaping means. Even in this case, patterns having different line widths can be formed, and throughput can be improved.

  Next, the gate insulating layer 106 is formed over the gate electrode layers 104 and 105 (see FIGS. 4 and 10). The gate insulating layer 106 may be formed of a known material such as a silicon oxide material or a nitride material, and may be a stacked layer or a single layer. In this embodiment, a stacked layer of a silicon nitride film, a silicon oxide film, and a silicon nitride film is used. Alternatively, a single layer or a double layer of silicon oxynitride film may be used. A silicon nitride film having a dense film quality is preferably used. In addition, when silver or copper is used for a conductive layer formed by a droplet discharge method, if a silicon nitride film or a NiB film is formed thereon as a barrier film, diffusion of impurities can be prevented and the surface can be planarized. is there. Note that in order to form a dense insulating film with low gate leakage current at a low deposition temperature, a rare gas element such as argon is preferably contained in the reaction gas and mixed into the formed insulating film.

  Next, a semiconductor layer is formed. A semiconductor layer having one conductivity type may be formed as necessary. In this embodiment mode, semiconductor layers 107 and 108 and N-type semiconductor layers 109 and 110 are stacked as a semiconductor layer having one conductivity type (see FIGS. 4 and 10). In addition, an N-type semiconductor layer is formed, and an NMOS structure of an N-channel TFT, a PMOS structure of a P-channel TFT having a P-type semiconductor layer, and a CMOS structure of an N-channel TFT and a P-channel TFT are manufactured. it can. In order to impart conductivity, an element imparting conductivity is added by doping, and an impurity region is formed in the semiconductor layer, whereby an N-channel TFT or a P-channel TFT can be formed.

  The semiconductor layer may be formed by a known means (such as sputtering, LPCVD, or plasma CVD). There is no limitation on the material of the semiconductor layer, but it is preferably formed of silicon or a silicon germanium (SiGe) alloy.

  The semiconductor layer uses an amorphous semiconductor (typically hydrogenated amorphous silicon) or a crystalline semiconductor (typically polysilicon) as a material. For polysilicon, so-called high-temperature polysilicon using polycrystalline silicon formed at a process temperature of 800 ° C. or higher as a main material, or polycrystalline silicon formed at a process temperature of 600 ° C. or lower as a main material is used. It includes so-called low-temperature polysilicon and crystalline silicon that is crystallized by adding an element that promotes crystallization.

As another substance, a semi-amorphous semiconductor or a semiconductor including a crystal phase in part of a semiconductor layer can be used. A semi-amorphous semiconductor is a semiconductor having an intermediate structure between amorphous and crystalline (including single crystal and polycrystal), and has a third state that is stable in terms of free energy, and has a short distance. It is crystalline with order and lattice distortion. Typically, it is a semiconductor layer containing silicon as a main component and having a Raman spectrum shifted to a lower wave number side than 520 cm ⁻¹ with lattice distortion. Further, hydrogen or halogen is contained at least 1 atomic% or more as a neutralizing agent for dangling bonds. Here, such a semiconductor is referred to as a semi-amorphous semiconductor (hereinafter referred to as “SAS”). This SAS is also called a so-called microcrystalline semiconductor (typically microcrystalline silicon).

This SAS can be obtained by glow discharge decomposition (plasma CVD) of a silicide gas. A typical silicide gas is SiH ₄ , and in addition, Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4 and the} like can be used. Further, GeF ₄ and F ₂ may be mixed. The formation of the SAS can be facilitated by diluting the silicide gas with hydrogen or one or plural kinds of rare gas elements selected from hydrogen and helium, argon, krypton, and neon. It is preferable that the dilution ratio of hydrogen with respect to the silicide gas is, for example, 2 to 1000 times in flow rate ratio. Of course, formation of the SAS by glow discharge decomposition is preferably performed under reduced pressure, but it can also be formed by utilizing discharge at atmospheric pressure. Typically, it may be performed in a pressure range of 0.1 Pa to 133 Pa. The power supply frequency for forming the glow discharge is 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz. What is necessary is just to set high frequency electric power suitably. The substrate heating temperature is preferably 300 ° C. or lower, and can be formed even at a substrate heating temperature of 100 to 200 ° C. Here, as an impurity element mainly taken in during film formation, impurities derived from atmospheric components such as oxygen, nitrogen, and carbon are desirably 1 × 10 ²⁰ cm ⁻³ or less, and in particular, the oxygen concentration is 5 × 10. It is preferable to be ¹⁹ cm ⁻³ or less, preferably 1 × 10 ¹⁹ cm ⁻³ or less. Further, by adding a rare gas element such as helium, argon, krypton, or neon to further promote lattice distortion, stability is improved and a favorable SAS can be obtained. In addition, a SAS layer formed of a hydrogen-based gas may be stacked on a SAS layer formed of a fluorine-based gas as a semiconductor layer.

In the case where a crystalline semiconductor layer is used for the semiconductor layer, a method for manufacturing the crystalline semiconductor layer is a known method (laser crystallization method, thermal crystallization method, or heat using an element that promotes crystallization such as nickel. A crystallization method or the like may be used. In the case where an element for promoting crystallization is not introduced, the amorphous silicon film is heated at 500 ° C. for 1 hour in a nitrogen atmosphere before irradiating the amorphous silicon film with laser light, whereby the concentration of hydrogen contained in the amorphous silicon film is set to 1 ×. Release to 10 ²⁰ atoms / cm ³ or less. This is because the film is destroyed when the amorphous silicon film containing a large amount of hydrogen is irradiated with laser light.

  The method of introducing the metal element into the amorphous semiconductor layer is not particularly limited as long as the metal element can be present on the surface of the amorphous semiconductor layer or inside the amorphous semiconductor layer. For example, sputtering, CVD, A plasma treatment method (including a plasma CVD method), an adsorption method, or a method of applying a metal salt solution can be used. Among these, the method using a solution is simple and useful in that the concentration of the metal element can be easily adjusted. At this time, in order to improve the wettability of the surface of the amorphous semiconductor layer and to spread the aqueous solution over the entire surface of the amorphous semiconductor layer, irradiation with UV light in an oxygen atmosphere, thermal oxidation method, hydroxy radical It is desirable to form an oxide film by treatment with ozone water or hydrogen peroxide.

  The crystallization of the amorphous semiconductor layer may be a combination of heat treatment and crystallization by laser light irradiation, or may be performed multiple times by heat treatment or laser light irradiation alone.

  Alternatively, the crystalline semiconductor layer may be directly formed over the substrate by a linear plasma method. Alternatively, the crystalline semiconductor layer may be selectively formed over the substrate by a linear plasma method.

  An organic semiconductor using an organic material may be used as the semiconductor. As the organic semiconductor, a low molecular material, a polymer material, or the like is used, and materials such as an organic dye or a conductive polymer material can also be used.

  In this embodiment mode, an amorphous semiconductor is used as the semiconductor. A semiconductor layer is formed, and then an N-type semiconductor layer is formed as a semiconductor layer having one conductivity type by a plasma CVD method or the like.

  Subsequently, using a mask made of an insulator such as resist or polyimide, the semiconductor layer and the N-type semiconductor layer are simultaneously patterned to form the semiconductor layers 107 and 108 and the N-type semiconductor layers 109 and 110 (FIG. 4, FIG. 4). See FIG. The mask can be formed by selectively discharging a composition. For the mask, a resin material such as an epoxy resin, an acrylic resin, a phenol resin, a novolac resin, a melamine resin, or a urethane resin is used. Also, using organic materials such as benzocyclobutene, parylene, flare, permeable polyimide, compound materials made by polymerization of siloxane polymers, composition materials containing water-soluble homopolymers and water-soluble copolymers, etc. And formed by a droplet discharge method. Alternatively, a commercially available resist material containing a photosensitizer may be used. For example, a novolak resin that is a typical positive resist and a naphthoquinonediazide compound that is a photosensitizer, a base resin that is a negative resist, diphenylsilanediol, and An acid generator or the like may be used. Whichever material is used, the surface tension and viscosity are appropriately adjusted by adjusting the concentration of the solvent or adding a surfactant or the like.

Again, a mask made of an insulator such as resist or polyimide is formed by a droplet discharge method, and a through-hole 145 is formed in a part of the gate insulating layer 106 by etching using the mask, and a lower layer thereof is formed. A part of the gate electrode layer 105 disposed on the side is exposed. The etching process may be either plasma etching (dry etching) or wet etching, but plasma etching is suitable for processing a large area substrate. As an etching gas, a fluorine-based or chlorine-based gas such as CF ₄ , NF ₃ , Cl ₂ , or BCl ₃ may be used, and an inert gas such as He or Ar may be appropriately added. Further, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate.

  After the mask is removed, the source wiring layer 118 and the power supply line 119 are formed by a droplet discharge method (see FIGS. 5 and 11). The process of forming the source wiring layer 118 and the power supply line 119 can be performed in the same manner as the gate wiring layer 103 is formed.

  The conductive material for forming the source wiring layer 118 and the power supply line 119 is mainly composed of metal particles such as Ag (silver), Au (gold), Cu (copper), W (tungsten), and Al (aluminum). The composition can be used. Further, light-transmitting indium tin oxide (ITO), ITSO made of indium tin oxide and silicon oxide, organic indium, organic tin, zinc oxide, titanium nitride, or the like may be combined.

A composition containing a conductive material is discharged and shaped by a shaping unit to form the source and drain electrode layers 111, 113, 115, and 116 and the conductive layer 112, and the source and drain electrode layers 111, 113, 115, and 116 are formed. Is used as a mask to pattern the N-type semiconductor layer (see FIGS. 6 and 12). Although not shown, before the source and drain electrode layers 111, 113, 115, and 116 and the conductive layer 112 are formed, the source and drain electrode layers 111, 113, 115, 116, and the conductive layer 112 are selected. In particular, the above-described base pretreatment process for forming a TiO _x film or the like may be performed. Then, the conductive layer can be formed with good adhesion.

  In addition, as the base pretreatment of the conductive layer formed using a droplet discharge method, the above-described step of forming the base film may be performed, and this treatment step may be performed after the conductive layer is formed. This step improves the adhesion between the layers, so that the reliability of the display device can also be improved.

  Since the source or drain electrode layers 111 and 115 and the conductive layer 112 are formed in contact with the source wiring layer 118 and the power supply line 119, the gate electrode layer 104 and the gate electrode layer 105 are formed. You may form integrally using a shaping means. In this embodiment mode, the source or drain electrode layer 111 is formed by shaping means before the source wiring layer 118 is completely solidified, and the conductive layer 112 and the source or drain electrode layer 115 are shaped before the power supply line 119 is solidified. Form by means. If a material such as an ultrafine nanotube is used for the shaping portion, a finer pattern can be formed.

  In the through hole 145 formed in the gate insulating layer 106, the source or drain electrode layer 116 and the gate electrode layer 105 are electrically connected. The conductive layer 112 forms a capacitor element. As the conductive material for forming the source or drain electrode layers 111, 113, 115, 116 and the conductive layer 112, Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminum) A composition mainly composed of metal particles such as the above can be used. Further, light-transmitting indium tin oxide (ITO), ITSO made of indium tin oxide and silicon oxide, organic indium, organic tin, zinc oxide, titanium nitride, or the like may be combined.

  In the step of forming the through-hole 145 in part of the gate insulating layer 106, the source or drain electrode layers 111, 113, 115, 116, and the conductive layer 112 are formed after the source or drain electrode layers 111, 113, 115, and 116 and the conductive layer 112 are formed. The through-hole 145 may be formed using the layer 112 as a mask. Then, a conductive layer is formed in the through hole 145 to electrically connect the source / drain electrode layer 116 and the gate electrode layer 105. In this case, there is an advantage that the process is simplified.

Subsequently, a composition containing a conductive material is selectively discharged over the gate insulating layer 106 to form the first electrode layer 117 (see FIGS. 7 and 13). The first electrode layer 117 is formed of indium tin oxide (ITO) or indium tin oxide containing silicon oxide (ITSO) when light is emitted from the substrate 100 side or when a transmissive EL display panel is manufactured. ), Zinc oxide (ZnO), tin oxide (SnO ₂ ), or the like, a predetermined pattern may be formed and fired.

Further, it is preferably formed of indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), zinc oxide (ZnO), or the like by a sputtering method. More preferably, indium tin oxide containing silicon oxide is used by a sputtering method using a target containing 2 to 10% by weight of silicon oxide in ITO. In addition, an oxide conductive material containing silicon oxide and in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide may be used. After the first electrode layer 117 is formed by a sputtering method, a mask layer may be formed by a droplet discharge method and formed into a desired pattern by etching. In this embodiment mode, the first electrode layer 117 is formed using a light-transmitting conductive material by a droplet discharge method, and specifically includes indium tin oxide, ITO, and silicon oxide. It is formed using ITSO. Although not shown, a TiO _x film may be formed and base pretreatment may be performed in the same manner as when the gate wiring layer 103 is formed in a region where the first electrode layer 117 is formed. By the base pretreatment, the adhesion is improved and the first electrode layer 117 can be formed in a desired pattern.

  In this embodiment mode, the example in which the gate insulating layer is a three-layer structure including a silicon nitride film made of silicon nitride, a silicon oxynitride film (silicon oxide film), and a silicon nitride film has been described above. As a preferable structure, the first electrode layer 117 formed of indium tin oxide containing silicon oxide is formed in close contact with the insulating layer made of silicon nitride included in the gate insulating layer 106, thereby emitting light in the electroluminescent layer. The effect that the ratio of the emitted light to the outside can be increased can be exhibited. In addition, the gate insulating layer is interposed between the gate wiring layer, the gate electrode layer, and the first electrode layer, and can function as a capacitor.

  In addition, when a structure in which emitted light is emitted to the side opposite to the substrate 100 side, in the case of manufacturing a reflective EL display panel, Ag (silver), Au (gold), Cu (copper)), A composition composed mainly of metal particles such as W (tungsten) and Al (aluminum) can be used. As another method, a transparent conductive film or a light reflective conductive film is formed by a sputtering method, a mask pattern is formed by a droplet discharge method, and the first electrode layer 117 is formed by combining etching processes. Also good.

  The first electrode layer 117 may be wiped with a CMP method or a polyvinyl alcohol-based porous body and polished so that the surface thereof is planarized. Further, after the polishing using the CMP method, the surface of the first electrode layer 117 may be subjected to ultraviolet irradiation, oxygen plasma treatment, or the like.

  Through the above steps, a substrate 100 having a display panel TFT in which a bottom gate TFT (also referred to as an inverted staggered TFT) and a pixel electrode are connected to the substrate 100 is completed. The TFT of this embodiment mode is a channel etch type.

  Next, an insulating layer (also referred to as a partition wall or a bank) 121 is selectively formed (see FIG. 33). The insulating layer 121 is formed over the first electrode layer 117 so as to have an opening. In this embodiment mode, the insulating layer 121 is formed over the entire surface, and is etched and patterned with a mask such as a resist. When the insulating layer 121 is formed using a droplet discharge method, a printing method, or the like that can be directly and selectively formed, patterning by etching is not necessarily required. The insulating layer 121 can also be shaped into a desired shape by the shaping means of the present invention. If the shape of the shaping portion is a columnar shape or a plate shape such as a spatula, depending on the area of the region where the insulating layer 121 is formed, productivity is improved.

  The insulating layer 121 is formed using silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, or other inorganic insulating materials, or acrylic acid, methacrylic acid, and derivatives thereof, polyimide, aromatic Heat-resistant polymers such as polyamide, polybenzimidazole, or inorganic siloxanes containing Si-O-Si bonds among silicon, oxygen, and hydrogen compounds formed from siloxane-based materials as starting materials It can be formed of an organic siloxane insulating material in which hydrogen is substituted with an organic group such as methyl or phenyl. You may form using photosensitive and non-photosensitive materials, such as an acryl and a polyimide.

  Alternatively, after the insulating layer 121 is formed by discharging a composition by a droplet discharge method, the surface may be pressed and flattened by pressure in order to improve the flatness. As a pressing method, unevenness may be reduced by scanning a roller-like object on the surface, or the surface may be pressed vertically with a flat plate-like object. Alternatively, the surface may be softened or melted with a solvent or the like, and the surface irregularities may be removed with an air knife. Further, polishing may be performed using a CMP method. This step can be applied when the surface is flattened when unevenness is generated by the droplet discharge method. When flatness is improved by this step, display unevenness of the display panel can be prevented and a high-definition image can be displayed.

  A light emitting element is formed over a substrate 100 having a TFT for a display panel (see FIG. 33).

  Before forming the electroluminescent layer 122, heat treatment at 200 ° C. is performed in atmospheric pressure to remove moisture adsorbed in the insulating layer 121 or on the surface thereof. In addition, it is preferable to perform heat treatment at 200 to 400 ° C., preferably 250 to 350 ° C. under reduced pressure, and to form the electroluminescent layer 122 by vacuum deposition or droplet discharge under reduced pressure without being exposed to the air as it is. .

  As the electroluminescent layer 122, materials that emit red (R), green (G), and blue (B) light are selectively formed by an evaporation method using an evaporation mask or the like. A material that emits red (R), green (G), and blue (B) light can be formed by a droplet discharge method (such as a low-molecular or high-molecular material) in the same manner as a color filter. In this case, a mask is not used. Both are preferable because RGB can be separately applied. A second electrode layer 123 is stacked over the electroluminescent layer 122 to complete a display device having a display function using a light emitting element (see FIG. 33). In this embodiment mode, since an EL (light emitting) element is used as a display element, an EL (light emitting) display device is obtained. When a liquid crystal display element using a liquid crystal material of the display element is used, a liquid crystal display device is completed. can do.

Although not shown, it is effective to provide a passivation film so as to cover the second electrode layer 123. As the passivation film, silicon nitride (SiN), silicon oxide (SiO ₂ ), silicon oxynitride (SiON), silicon nitride oxide (SiNO), aluminum nitride (AlN), aluminum oxynitride (AlON), nitrogen content is oxygen It is made of an insulating film containing aluminum nitride oxide (AlNO) or aluminum oxide, diamond-like carbon (DLC), or nitrogen-containing carbon film (CN _X ) that is higher than the content, and a single layer or a combination of the insulating films is used. Can do. For example, a laminate such as a nitrogen-containing carbon film (CN _x ) \ silicon nitride (SiN), an organic material can be used, and a polymer laminate such as a styrene polymer may be used. In addition, a skeleton structure is formed by a bond of silicon (Si) and oxygen (O), and at least one of a material containing at least hydrogen as a substituent, or fluorine, an alkyl group, or an aromatic hydrocarbon as a substituent. You may use the material which has.

At this time, it is preferable to use a film with good coverage as the passivation film, and it is effective to use a carbon film, particularly a DLC film. Since the DLC film can be formed in a temperature range from room temperature to 100 ° C., it can be easily formed over the electroluminescent layer having low heat resistance. The DLC film is formed by a plasma CVD method (typically, an RF plasma CVD method, a microwave CVD method, an electron cyclotron resonance (ECR) CVD method, a hot filament CVD method, etc.), a combustion flame method, a sputtering method, or an ion beam evaporation method. It can be formed by laser vapor deposition. The reaction gas used for film formation was hydrogen gas and a hydrocarbon gas (for example, CH ₄ , C ₂ H ₂ , C ₆ H _6, etc.), ionized by glow discharge, and negative self-bias was applied. Films are formed by accelerated collision of ions with the cathode. The CN film may be formed using C ₂ H ₄ gas and N ₂ gas as the reaction gas. The DLC film has a high blocking effect against oxygen and can suppress oxidation of the electroluminescent layer. Therefore, the problem that the electroluminescent layer is oxidized during the subsequent sealing process can be prevented.

  Subsequently, a sealing material is formed and sealed using a sealing substrate. After that, a flexible wiring board may be connected to the gate wiring layer 103 and electrically connected to the outside. The same applies to the source wiring layer 118.

  Note that in this embodiment mode, a case where a light-emitting element is sealed with a glass substrate is shown; however, the sealing process is a process for protecting the light-emitting element from moisture and is mechanically sealed with a cover material. Any of a method, a method of encapsulating with a thermosetting resin or an ultraviolet light curable resin, or a method of encapsulating with a thin film having a high barrier ability such as a metal oxide or a nitride is used. As the cover material, glass, ceramics, plastic, or metal can be used. However, when light is emitted to the cover material side, it must be translucent. In addition, the cover material and the substrate on which the light emitting element is formed are bonded together using a sealing material such as a thermosetting resin or an ultraviolet light curable resin, and the resin is cured by heat treatment or ultraviolet light irradiation treatment to form a sealed space. Form. It is also effective to provide a hygroscopic material typified by barium oxide in this sealed space. This hygroscopic material may be provided in contact with the sealing material, or may be provided on the partition wall or in the peripheral portion so as not to block light from the light emitting element. Further, the space between the cover material and the substrate on which the light emitting element is formed can be filled with a thermosetting resin or an ultraviolet light curable resin. In this case, it is effective to add a moisture absorbing material typified by barium oxide in the thermosetting resin or the ultraviolet light curable resin.

  In this embodiment mode, the switching TFT has a single gate structure, but a multi-gate structure such as a double gate structure may be used.

  As described above, in this embodiment mode, the process can be omitted by not using a light exposure process using a photomask. In addition, by forming various patterns directly on the substrate using the droplet discharge method, a display panel can be easily manufactured even if a glass substrate of 5th generation or later with one side exceeding 1000 mm is used. Can do.

  In addition, since a pattern having a desired width can be formed with good controllability regardless of the size of the discharge port that discharges the droplets, electrical characteristics and reliability are improved.

(Embodiment 3)
An embodiment of the present invention will be described with reference to FIGS. In this embodiment mode, a top gate type (forward stagger type) thin film transistor is used as the thin film transistor in Embodiment Mode 2. Therefore, repetitive description of the same portion or a portion having a similar function is omitted. 15A is a cross-sectional view taken along line AA ′ in FIG. 14, FIG. 15B is a cross-sectional view taken along line BB ′, and FIG. 15C is a cross-sectional view taken along line CC ′.

  A source wiring layer 118 and a power supply line 119 are formed over the substrate 100 by discharging a composition containing a conductive material by a droplet discharge method. Next, the source or drain electrode layers 111, 113, 115, and 116 and the conductive layer 112 are formed using the shaping means of the present invention. Since the source or drain electrode layers 111 and 115 and the conductive layer 112 are formed in contact with the source wiring layer 118 and the power supply line 119, the gate electrode layer 104 and the gate electrode layer 105 are formed. You may form integrally using a shaping means. In this embodiment mode, the source or drain electrode layer 111 is formed by shaping means before the source wiring layer 118 is completely solidified, and the conductive layer 112 and the source or drain electrode layer 115 are shaped before the power supply line 119 is solidified. Form by means. If a material such as an ultrafine nanotube is used for the shaping portion, a finer pattern can be formed.

  An N-type semiconductor layer is formed on the source and drain electrode layers 111, 113, 115, and 116, and is etched using a mask made of resist or the like. The resist may be formed using a droplet discharge method. A semiconductor layer is formed on the N-type semiconductor layer and patterned again using a mask or the like. Therefore, N-type semiconductor layers 109 and 110 and semiconductor layers 107 and 108 are formed.

  Next, the gate insulating layer 106 is formed with a single layer or a stacked structure by a plasma CVD method or a sputtering method. As a particularly preferable embodiment, a three-layered structure including an insulating layer 106a made of silicon nitride, an insulating layer 106b made of silicon oxide, and an insulating layer 106c made of silicon nitride corresponds to the gate insulating layer.

  A mask made of an insulator such as resist or polyimide is formed using a droplet discharge method, and through holes 146 and 147 are formed in part of the gate insulating layer 106 by etching using the mask, and the lower layer A part of the source or drain electrode layers 113 and 116 disposed on the side is exposed.

A gate wiring layer 103 is formed by discharging a composition containing a conductive material. Next, the gate electrode layers 104 and 105 are formed using the shaping means of the present invention. Since the gate electrode layer 104 is formed in contact with the previously formed gate wiring layer 103, the gate electrode layer 104 may be integrally formed using a shaping unit as in the case where the source or drain electrode layer 111 is formed. In this embodiment mode, the gate electrode layer 104 is formed by a shaping unit before the gate wiring layer 103 is completely solidified. If a material such as an ultrafine nanotube is used for the shaping portion, a finer pattern can be formed. Since the width of the gate electrode layer 104 in the channel direction can be narrowed, resistance is further reduced and mobility is improved.

  In the through hole 146 formed in the gate insulating layer 106, the gate electrode layer 105 and the source / drain electrode layer 116 are electrically connected. In addition, the gate electrode layer 105, the gate insulating layer 106, and the conductive layer 112 form a capacitor.

  The first electrode layer 117 is formed by a droplet discharge method. Of course, it can be shaped and formed into a desired pattern by the shaping means of the present invention. The first electrode layer and the source or drain electrode layer 113 are electrically connected through the previously formed through hole 147.

  After that, an insulating layer is formed as in the second embodiment, an opening is provided on the first electrode layer, and then an electroluminescent layer and a second conductive layer are formed. Further, a sealing material is formed and sealed using a sealing substrate. After that, a flexible wiring substrate may be connected to the gate wiring layer 103 or the source wiring layer 118. Through the above, a display panel having a display function can be manufactured.

  As described above, in this embodiment mode, the process can be omitted by not using a light exposure process using a photomask. In addition, by forming various patterns directly on the substrate using the droplet discharge method, a display panel can be easily manufactured even if a glass substrate of 5th generation or later with one side exceeding 1000 mm is used. Can do.

  In addition, since a pattern having a desired width can be formed with good controllability regardless of the size of the discharge port that discharges the droplets, electrical characteristics and reliability are improved.

(Embodiment 4)
A thin film transistor is formed by applying the present invention, and a display device can be formed using the thin film transistor. When a light emitting element is used and an N-type transistor is used as a transistor for driving the light emitting element, The light emitted from the light emitting element performs any one of bottom emission, top emission, and dual emission. Here, a stacked structure of light-emitting elements corresponding to each case will be described with reference to FIGS.

  In this embodiment, a channel protective thin film transistor 481 including a channel protective film to which the present invention is applied is used. For the channel protective film, polyimide, polyvinyl alcohol, or the like may be dropped using a droplet discharge method. As a result, the exposure process can be omitted. Channel protective films include inorganic materials (silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, etc.), photosensitive or non-photosensitive organic materials (organic resin materials) (polyimide, acrylic, polyamide, polyimide amide, resist , Benzocyclobutene, etc.), a low-k material having a low dielectric constant, or a film made of a plurality of kinds, or a stack of these films. In addition, a skeleton structure is formed by a bond of silicon (Si) and oxygen (O), and at least one of a material containing at least hydrogen as a substituent, or fluorine, an alkyl group, or an aromatic hydrocarbon as a substituent. You may use the material which has. As a manufacturing method, a vapor deposition method such as a plasma CVD method or a thermal CVD method, or a sputtering method can be used. Alternatively, a droplet discharge method or a printing method (a method for forming a pattern such as screen printing or offset printing) can be used. A TOF film or an SOG film obtained by a coating method can also be used.

  First, the case where light is emitted to the substrate 480 side, that is, the case where bottom emission is performed will be described with reference to FIG. In this case, a source / drain wiring 483, a first electrode 484, an electroluminescent layer 485, and a second electrode 486 are stacked in this order so as to be electrically connected to the transistor 481. Next, the case where light is emitted to the side opposite to the substrate 480, that is, the case where top emission is performed will be described with reference to FIG. A source / drain wiring 462 electrically connected to the transistor 481, a first electrode 463, an electroluminescent layer 464, and a second electrode 465 are sequentially stacked. With the above structure, even when light is transmitted through the first electrode 463, the light is reflected by the wiring 462 and is emitted to the side opposite to the substrate 480. Note that in this structure, it is not necessary to use a light-transmitting material for the first electrode 463. Lastly, a case where light is emitted to the substrate 480 side and both sides on the opposite side, that is, a case where dual emission is performed will be described with reference to FIG. A source / drain wiring 471 electrically connected to the transistor 481, a first electrode 472, an electroluminescent layer 473, and a second electrode 474 are sequentially stacked. At this time, when both the first electrode 472 and the second electrode 474 are formed using a light-transmitting material or a thickness capable of transmitting light, dual emission is realized.

  The light emitting element has a structure in which an electroluminescent layer is sandwiched between a first electrode and a second electrode. It is necessary to select materials for the first electrode and the second electrode in consideration of a work function, and both the first electrode and the second electrode can be an anode or a cathode depending on a pixel configuration. In this embodiment mode, since the polarity of the driving TFT is an N-channel type, it is preferable that the first electrode be a cathode and the second electrode be an anode. In the case where the polarity of the driving TFT is a p-channel type, the first electrode may be an anode and the second electrode may be a cathode.

  When the first electrode is an anode, the electroluminescent layer is formed from the anode side from the HIL (hole injection layer), HTL (hole transport layer), EML (light-emitting layer), ETL (electron transport layer), EIL ( It is preferable to laminate in the order of the electron injection layer). When the first electrode is a cathode, the reverse is true, and from the cathode side, EIL (electron injection layer), ETL (electron transport layer), EML (light emitting layer), HTL (hole transport layer), HIL (hole injection) Layer) and the anode as the second electrode are preferably laminated in this order. The electroluminescent layer can have a single layer structure or a mixed structure in addition to the laminated structure.

  In addition, as the electroluminescent layer, materials that emit red (R), green (G), and blue (B) light are selectively formed by an evaporation method using an evaporation mask, respectively. A material that emits red (R), green (G), and blue (B) light can be formed by a droplet discharge method (such as a low-molecular or high-molecular material) in the same manner as a color filter. Both are preferable because RGB can be separately applied.

Specifically, CuPc or PEDOT is used as HIL, α-NPD is used as HTL, BCP or Alq _{3 is used} as ETL, and BCP: Li or CaF ₂ is used as EIL. In the case of a top emission type, in the case where light-transmitting ITO or ITSO is used for the second electrode, BzOS-Li in which Li is added to a benzoxazole derivative (BzOS) or the like can be used. Further, for example, EML may be Alq ₃ doped with a dopant corresponding to each emission color of R, G, and B (DCM in the case of R, DMQD in the case of G).

  Note that the electroluminescent layer is not limited to the above materials. For example, instead of CuPc or PEDOT, an oxide such as molybdenum oxide (MoOx: x = 2 to 3) and α-NPD or rubrene can be co-evaporated to improve the hole injection property. The material of the electroluminescent layer can be used as an organic material (including a low molecule or a polymer), or a composite material of an organic material and an inorganic material.

  Although not shown in FIG. 32, a color filter may be formed on the counter substrate of the substrate 480. The color filter can be formed by a droplet discharge method, and in this case, an optical plasma treatment or the like can be applied as the above-described base pretreatment. With the base film of the present invention, a color filter can be formed in a desired pattern with good adhesion. When a color filter is used, high-definition display can be performed. This is because the color filter can correct a broad peak to be sharp in the emission spectrum of each RGB.

  As described above, the case where a material that emits light of each RGB is formed has been described. However, full color display can be performed by forming a material that emits light of a single color and combining a color filter and a color conversion layer. For example, when an electroluminescent layer that emits white or orange light is formed, full color display can be performed by separately providing a color filter, a color conversion layer, or a combination of a color filter and a color conversion layer. The color filter and the color conversion layer may be formed on, for example, a second substrate (sealing substrate) and attached to the substrate. In addition, as described above, any of the material that emits monochromatic light, the color filter, and the color conversion layer can be formed by a droplet discharge method.

  Of course, monochromatic light emission may be displayed. For example, an area color type display device may be formed using monochromatic light emission. As the area color type, a passive matrix type display unit is suitable, and characters and symbols can be mainly displayed.

  In the above configuration, a material having a small work function can be used as the cathode, and for example, Ca, Al, CaF, MgAg, AlLi, or the like is desirable. The electroluminescent layer may be any of a single layer type, a laminated type, and a mixed type having no layer interface, and a singlet material, a triplet material, or a combination thereof, a low molecular material, a polymer material, and a medium molecule. Any of organic materials including materials, inorganic materials typified by molybdenum oxide having excellent electron injection properties, and composite materials of organic materials and inorganic materials may be used. The first electrodes 484, 463, and 472 are formed using a transparent conductive film that transmits light. For example, in addition to ITO and ITSO, a transparent conductive film in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide is used. Use. Note that plasma treatment in an oxygen atmosphere or heat treatment in a vacuum atmosphere is preferably performed before the first electrodes 484, 463, and 472 are formed. A partition wall (also referred to as a bank) is formed using a material containing silicon, an organic material, and a compound material. A porous film may be used. However, it is preferable to use a photosensitive or non-photosensitive material such as acrylic or polyimide because the side surface has a shape in which the radius of curvature continuously changes and the upper thin film is formed without being cut off. This embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 5)
In the display panel manufactured in Embodiment Modes 2 to 4, the semiconductor layer is formed using SAS, whereby the driver circuit on the scan line side can be formed over the substrate 3700 as described with reference to FIG.

FIG. 22 shows a block diagram of a scanning line side driving circuit constituted by an n-channel TFT using SAS capable of obtaining a field effect mobility of 1 to 15 cm ² / V · sec.

  In FIG. 22, a block denoted by 500 corresponds to a pulse output circuit that outputs a sampling pulse for one stage, and the shift register includes n pulse output circuits. Reference numeral 541 denotes a buffer circuit, to which a pixel 542 is connected.

  FIG. 23 shows a specific configuration of the pulse output circuit 500, and the circuit is configured by n-channel TFTs 601 to 613. At this time, the size of the TFT may be determined in consideration of the operating characteristics of the n-channel TFT using SAS. For example, if the channel length is 8 μm, the channel width can be set in the range of 10 to 80 μm.

  A specific configuration of the buffer circuit 541 is shown in FIG. Similarly, the buffer circuit is composed of n-channel TFTs 620 to 635. At this time, the size of the TFT may be determined in consideration of the operating characteristics of the n-channel TFT using SAS. For example, if the channel length is 10 μm, the channel width is set in the range of 10 to 1800 μm.

  In order to realize such a circuit, the TFTs need to be connected to each other by wiring, and a configuration example of the wiring in that case is shown in FIG. In FIG. 25, as in Embodiment Mode 2, the gate electrode layer 104, the gate insulating layer 106 (an insulating layer 106a made of silicon nitride, an insulating layer 106b made of silicon oxide, and an insulating layer 106c made of silicon nitride are stacked in three layers. ), A semiconductor layer 107 formed of SAS, an N-type semiconductor layer 109 for forming a source and a drain, and source and drain electrode layers 111 and 116 are formed. In this case, connection wiring layers 170, 171, and 172 are formed on the substrate 100 in the same process as the gate electrode layer 104. Then, a part of the gate insulating layer is etched so that the connection wiring layers 170, 171, and 172 are exposed, and the TFTs are appropriately formed by the source and drain electrode layers 111 and 116 and the connection wiring layer 173 formed in the same process. Various circuits can be realized by connection.

(Embodiment 6)
Next, a mode in which a driver circuit for driving is mounted on the display panel manufactured in Embodiment Modes 2 to 4 will be described.

  First, a display device employing a COG method is described with reference to FIG. Over the substrate 3700, a pixel region 3701 for displaying information such as characters and images, and a driving circuit 3702 on the scanning side are provided. A substrate provided with a plurality of drive circuits is divided into rectangles, and the divided drive circuits (hereinafter referred to as driver ICs) 3705a and 3705b are mounted on the substrate 3700. FIG. 31 shows a form in which a plurality of driver ICs 3705 and a tape 3704 are mounted on the tip of the driver IC 3705. Further, the size to be divided may be substantially the same as the length of the side of the pixel portion on the signal line side, and a tape may be mounted on the tip of the driver IC on a single driver IC.

  Alternatively, a TAB method may be employed. In that case, a plurality of tapes may be attached and a driver IC may be mounted on the tapes. As in the case of the COG method, a single driver IC may be mounted on a single tape. In this case, a metal piece or the like for fixing the driver IC may be attached together due to strength problems.

  A plurality of driver ICs mounted on these display panels may be formed on a rectangular substrate having a side of 300 mm to 1000 mm or more from the viewpoint of improving productivity.

  That is, a plurality of circuit patterns having a drive circuit portion and an input / output terminal as one unit may be formed on the substrate, and finally divided and taken out. The long side of the driver IC may be formed in a rectangular shape having a long side of 15 to 80 mm and a short side of 1 to 6 mm in consideration of the length of one side of the pixel portion and the pixel pitch. Or a length obtained by adding one side of the pixel portion and one side of each driver circuit.

  The advantage of the external dimensions of the driver IC over the IC chip lies in the length of the long side. When a driver IC formed with a long side of 15 to 80 mm is used, the number required for mounting corresponding to the pixel portion is as follows. This is less than when an IC chip is used, and the manufacturing yield can be improved. Further, when a driver IC is formed over a glass substrate, the shape of the substrate used as a base is not limited, and thus productivity is not impaired. This is a great advantage compared with the case where the IC chip is taken out from the circular silicon wafer.

  In FIG. 31, driver ICs 3705a and 3705b in which a drive circuit is formed are mounted in a region outside the pixel region 3701. These driver ICs 3705a and 3705b are drive circuits on the signal line side. In order to form a pixel region corresponding to RGB full color, the number of signal lines in the XGA class is 3072 and the number in the UXGA class is 4800. The signal lines formed in such a number are divided into several blocks at the end of the pixel region 3701 to form lead lines, and are collected according to the pitch of the output terminals of the driver ICs 3705a and 3705b.

  The driver IC is preferably formed of a crystalline semiconductor formed over a substrate, and the crystalline semiconductor is preferably formed by irradiating continuous-emitting laser light. Therefore, a continuous light emitting solid state laser or gas laser is used as an oscillator for generating the laser light. When a continuous light emission laser is used, a transistor can be formed using a polycrystalline semiconductor layer having a large grain size with few crystal defects. In addition, since the mobility and response speed are good, high-speed driving is possible, the operating frequency of the element can be improved as compared with the prior art, and there is less variation in characteristics, so that high reliability can be obtained. Note that for the purpose of further improving the operating frequency, the channel length direction of the transistor and the scanning direction of the laser light are preferably matched. This is because, in the laser crystallization process using a continuous emission laser, the highest mobility is obtained when the channel length direction of the transistor and the scanning direction of the laser beam with respect to the substrate are substantially parallel (preferably −30 ° to 30 °). It is because it is obtained. Note that the channel length direction corresponds to the direction in which current flows in the channel formation region, in other words, the direction in which charges move. The transistor thus fabricated has an active layer composed of a polycrystalline semiconductor layer in which crystal grains extend in the channel direction, which means that the crystal grain boundaries are formed substantially along the channel direction. means.

  In order to perform laser crystallization, it is preferable to significantly narrow the laser beam, and the width of the beam spot is preferably about 1 to 3 mm, which is the same width of the short side of the driver IC. In order to ensure a sufficient and efficient energy density for the irradiated object, the laser light irradiation region is preferably linear. However, the line shape here does not mean a line in a strict sense, but means a rectangle or an ellipse having a large aspect ratio. For example, the aspect ratio is 2 or more (preferably 10 to 10,000). In this manner, a method for manufacturing a display device with improved productivity can be provided by setting the width of the beam spot of the laser light to the same length as the short side of the driver IC.

  In FIG. 31, the scanning line driving circuit is formed integrally with the pixel portion, and a driver IC is mounted as a signal line driving circuit. However, the present invention is not limited to this mode, and a driver IC may be mounted as both the scanning line driving circuit and the signal line driving circuit. In that case, the specifications of the driver ICs used on the scanning line side and the signal line side may be different.

In the pixel region 3701, signal lines and scanning lines intersect to form a matrix, and a transistor is disposed corresponding to each intersection. The present invention is characterized in that a TFT having an amorphous semiconductor or a semi-amorphous semiconductor as a channel portion is used as a transistor arranged in the pixel region 3701. The amorphous semiconductor is formed by a method such as a plasma CVD method or a sputtering method. A semi-amorphous semiconductor can be formed at a temperature of 300 ° C. or less by a plasma CVD method. For example, even a non-alkali glass substrate having an outer dimension of 550 × 650 mm has a film thickness necessary for forming a transistor. Is formed in a short time. Such a feature of the manufacturing technique is effective in manufacturing a large-screen display device. In addition, a semi-amorphous TFT can obtain a field effect mobility of ² to 10 cm ² / V · sec by forming a channel formation region with SAS. Therefore, this TFT can be used as a switching element for a pixel or an element constituting a driving circuit on the scanning line side. Therefore, a display panel that realizes system-on-panel can be manufactured.

  Note that FIG. 31 shows the premise that the scanning line side driver circuit is also integrally formed on the substrate by using a TFT having a semiconductor layer formed of SAS. When a TFT having a semiconductor layer formed of AS is used, a driver IC may be mounted on both the scanning line side driver circuit and the signal line side driver circuit.

  In that case, it is preferable that the specifications of the driver ICs used on the scanning line side and the signal line side are different. For example, although a transistor constituting the driver IC on the scanning line side is required to have a withstand voltage of about 30 V, the driving frequency is 100 kHz or less, and a relatively high speed operation is not required. Therefore, it is preferable to set the channel length (L) of the transistors forming the driver on the scanning line side to be sufficiently large. On the other hand, it is sufficient for the transistor of the driver IC on the signal line side to have a withstand voltage of about 12V, but the drive frequency is about 65 MHz at 3V, and high speed operation is required. Therefore, it is preferable to set the channel length and the like of the transistors constituting the driver on the micron rule.

  The method for mounting the driver IC is not particularly limited, and a known COG method, wire bonding method, or TAB method can be used.

  By setting the thickness of the driver IC to be the same as that of the counter substrate, the height between the two becomes substantially the same, which contributes to the reduction in thickness of the entire display device. In addition, since each substrate is made of the same material, thermal stress is not generated even when a temperature change occurs in the display device, and the characteristics of a circuit made of TFTs are not impaired. In addition, the number of driver ICs to be mounted in one pixel region can be reduced by mounting the drive circuit with a driver IC that is longer than the IC chip as shown in this embodiment.

  As described above, a driver circuit can be incorporated in the display panel.

(Embodiment 7)
A structure of a pixel of the display panel described in this embodiment will be described with reference to an equivalent circuit diagram illustrated in FIG.

  In the pixel shown in FIG. 26A, a signal line 410 and power supply lines 411 to 413 are arranged in the column direction, and a scanning line 414 is arranged in the row direction. In addition, the pixel includes a TFT 401 that is a switching TFT, a TFT 403 that is a driving TFT, a TFT 404 that is a current control TFT, a capacitor element 402, and a light emitting element 405.

  The pixel shown in FIG. 26C is different from the pixel shown in FIG. 26A except that the gate electrode of the TFT 303 is connected to the power supply line 412 arranged in the row direction. is there. That is, both pixels shown in FIGS. 26A and 26C show the same equivalent circuit diagram. However, in the case where the power supply line 412 is arranged in the column direction (FIG. 26A) and in the case where the power supply line 412 is arranged in the row direction (FIG. 26C), each power supply line is conductive on a different layer. Formed with body layers. Here, attention is paid to the wiring to which the gate electrode of the TFT 403 is connected, and FIGS. 26A and 26C are shown separately to show that the layers for producing these are different.

As a feature of the pixel shown in FIGS. 26A and 26C, TFTs 403 and 404 are connected in series in the pixel. The channel length L ₃ and channel width W _{3 of} the TFT 403, the channel length L ₄ and channel width of the TFT 404 are shown. W ₄ may be set to satisfy L ₃ / W ₃ : L ₄ / W ₄ = 5 to 6000: 1. As an example when 6000: 1 is satisfied, there is a case where L ₃ is 500 μm, W ₃ is 3 μm, L ₄ is 3 μm, and W ₄ is 100 μm.

Note that the TFT 403 operates in a saturation region and has a role of controlling a current value flowing through the light emitting element 405, and the TFT 404 has a role of controlling a current supply to the light emitting element 405 by operating in a linear region. Both TFTs preferably have the same conductivity type in terms of manufacturing process. The TFT 403 may be a depletion type TFT as well as an enhancement type. In the present invention having the above structure, since the TFT 404 operates in a linear region, a slight change in V _GS of the TFT 404 does not affect the current value of the light emitting element 405. That is, the current value of the light emitting element 405 is determined by the TFT 403 operating in the saturation region. The present invention having the above structure can provide a display device in which luminance unevenness of a light emitting element due to variation in TFT characteristics is improved and image quality is improved.

  In the pixel shown in FIGS. 26A to 26D, the TFT 401 controls input of a video signal to the pixel. When the TFT 401 is turned on and a video signal is input into the pixel, the capacitor 402 The video signal is held in Note that FIGS. 26A and 26C illustrate a structure in which the capacitor 402 is provided; however, the present invention is not limited to this, and the capacity for holding a video signal can be covered by a gate capacity or the like. In this case, the capacitor 402 is not necessarily provided explicitly.

  The light-emitting element 405 has a structure in which an electroluminescent layer is sandwiched between two electrodes, and a potential difference is generated between the pixel electrode and the counter electrode (between the anode and the cathode) so that a forward bias voltage is applied. Is provided. The electroluminescent layer is composed of a wide variety of materials such as organic materials and inorganic materials. The luminescence in the electroluminescent layer includes light emission (fluorescence) when returning from a singlet excited state to a ground state, and a triplet excited state. And light emission (phosphorescence) when returning to the ground state.

  The pixel illustrated in FIG. 26B has the same pixel structure as that illustrated in FIG. 26A except that a TFT 406 and a scanning line 415 are added. Similarly, the pixel illustrated in FIG. 26D has the same pixel structure as that illustrated in FIG. 26C except that a TFT 406 and a scanning line 415 are added.

  The TFT 406 is controlled to be turned on or off by a newly arranged scanning line 415. When the TFT 406 is turned on, the charge held in the capacitor 402 is discharged and the TFT 404 is turned off. That is, a state in which no current flows through the light emitting element 405 can be created by the arrangement of the TFT 406. 26B and 26D can improve the duty ratio because the lighting period can be started simultaneously with or immediately after the start of the writing period without waiting for signal writing to all the pixels. It becomes possible.

  In the pixel shown in FIG. 26E, signal lines 450, power supply lines 451 and 452 are arranged in the column direction, and scanning lines 453 are arranged in the row direction. In addition, the pixel includes a switching TFT 441, a driving TFT 443, a capacitor element 442, and a light emitting element 444. The pixel illustrated in FIG. 26F has the same pixel structure as that illustrated in FIG. 26E except that a TFT 445 and a scanning line 454 are added. Note that the duty ratio can also be improved in the structure of FIG.

(Embodiment 8)
One mode in which protective diodes are provided in the scanning line side input terminal portion and the signal line side input terminal portion will be described with reference to FIG. In FIG. 27, the pixel 3400 is provided with TFTs 501 and 502. This TFT has a configuration similar to that of the second embodiment.

  Protection diodes 561 and 562 are provided in the signal line side input terminal portion. This protective diode is manufactured in the same process as the TFT 501 or 502, and is operated as a diode by connecting a gate and one of a drain and a source. An equivalent circuit diagram of the top view shown in FIG. 27 is shown in FIG.

  The protection diode 561 includes a gate electrode layer 550, a semiconductor layer 551, a channel protection insulating layer 552, and a wiring layer 553. The protective diode 562 has a similar structure. The common potential lines 554 and 555 connected to the protection diode are formed in the same layer as the gate electrode layer. Therefore, in order to be electrically connected to the wiring layer 553, a contact hole needs to be formed in the gate insulating layer.

  The contact hole for the gate insulating layer may be etched by forming a mask layer by a droplet discharge method. In this case, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate.

  The signal wiring layer 237 is formed of the same layer as the source and drain wiring layer 212 in the TFT 501, and has a structure in which the signal wiring layer 237 connected thereto is connected to the source or drain side.

  The input terminal portion on the scanning signal line side has the same configuration. Thus, according to the present invention, the protection diode provided in the input stage can be formed simultaneously. Note that the position at which the protective diode is inserted is not limited to this embodiment mode, and can be provided between the driver circuit and the pixel.

(Embodiment 9)
FIG. 20 shows an example in which an EL display module is formed using a TFT substrate 2800 manufactured by a droplet discharge method. In the drawing, a pixel portion composed of pixels is formed on a TFT substrate 2800.

  In FIG. 20, the same TFT as that formed in the pixel or the gate of the TFT and one of the source and the drain is connected between the driving circuit and the pixel, outside the pixel portion. The protection circuit portion 2801 operated in the above is provided. As the driver circuit 2809, a driver IC formed of a single crystal semiconductor, a stick driver IC formed of a polycrystalline semiconductor film over a glass substrate, a driver circuit formed of SAS, or the like is applied.

  The TFT substrate 2800 is fixed to the sealing substrate 2820 through spacers 2806a and 2806b formed by a droplet discharge method. The spacer is preferably provided to keep the distance between the two substrates constant even when the substrate is thin and the area of the pixel portion is increased. A space between the TFT substrate 2800 and the sealing substrate 2820 over the light-emitting elements 2804 and 2805 may be filled with a light-transmitting resin material to be solidified, or anhydrous nitrogen or inert Gas may be filled.

  FIG. 20 shows a case where the light emitting elements 2804 and 2805 have a top emission type structure, and the light is emitted in the direction of the arrow shown in the drawing. Each pixel can perform multicolor display by changing the emission color of the pixels to red, green, and blue. At this time, by forming the colored layers 2807a, 2807b, and 2807c corresponding to the respective colors on the sealing substrate 2820 side, the color purity of the emitted light can be increased. Alternatively, the pixel may be combined with the colored layers 2807a, 2807b, and 2807c as a white light emitting element.

  The driver circuit 2809 is connected to a scanning line or a signal line connection terminal provided at one end of the external circuit board 2811 through a wiring board 2810. Further, a heat pipe 2813 and a heat radiating plate 2812 may be provided in contact with or in proximity to the TFT substrate 2800 to enhance the heat radiation effect.

  Although the top emission EL module is shown in FIG. 20, the bottom emission structure may be changed by changing the configuration of the light emitting element and the arrangement of the external circuit board. In the case of a top emission type structure, an insulating layer serving as a partition wall may be colored and used as a black matrix. This partition wall can be formed by a droplet discharge method, and may be formed by mixing carbon black or the like with a resin material such as polyimide, or may be a laminate thereof.

  Further, in the TFT substrate 2800, a sealing structure may be formed by attaching a resin film to the side where the pixel portion is formed using a sealing material or an adhesive resin. A gas barrier film for preventing the permeation of water vapor may be provided on the surface of the resin film. By adopting a film sealing structure, further reduction in thickness and weight can be achieved.

(Embodiment 10)
A television device can be completed with the display device formed according to the present invention. FIG. 19 is a block diagram showing a main configuration of the television device. In the display panel, only the pixel portion is formed as shown in FIG. 29 and the scanning line side driving circuit and the signal line side driving circuit are mounted by the TAB method, and the structure as shown in FIG. In the case where the scanning line side driving circuit and the signal line side driving circuit are mounted on the pixel portion and its periphery by the COG method, as shown in FIG. 31, a TFT is formed by SAS, and the pixel portion and the scanning line side driving circuit are There are cases where the signal line side driver circuit is separately formed as a driver IC and formed integrally on the substrate, but any form may be adopted.

  As other external circuit configurations, on the input side of the video signal, among the signals received by the tuner 804, the video signal amplifier circuit 805 that amplifies the video signal, and the signals output from the video signal amplifier circuit 805 are red, green, and blue colors. And a control circuit 807 for converting the video signal into the input specification of the driver IC. The control circuit 807 outputs signals to the scanning line side and the signal line side, respectively. In the case of digital driving, a signal dividing circuit 808 may be provided on the signal line side so that an input digital signal is divided into m pieces and supplied.

  Of the signals received by the tuner 804, the audio signal is sent to the audio signal amplifier circuit 809, and the output is supplied to the speaker 813 through the audio signal processing circuit 810. The control circuit 811 receives control information on the receiving station (reception frequency) and volume from the input unit 812, and sends a signal to the tuner 804 and the audio signal processing circuit 810.

  As shown in FIG. 17, this module can be incorporated into a housing 2001 to complete a television device. When the EL display module as shown in FIG. 20 is used, the liquid crystal television device can be completed when the liquid crystal display module as shown in FIG. 21 is used for the EL television device. A main screen 2003 is formed by the display module, and a speaker portion 2009, operation switches, and the like are provided as other accessory equipment. Thus, a television device can be completed according to the present invention.

  In addition, the television apparatus may block reflected light of light incident from the outside using a wave plate or a polarizing plate. As a wave plate, a λ / 4 plate or a λ / 2 plate may be used and designed so that light can be controlled. The structure is a TFT element substrate, a light emitting element, a sealing substrate (sealing material), a wave plate (λ / 4, λ / 2), and a polarizing plate in order, and light emitted from the light emitting element passes through them. Radiated to the outside from the polarizing plate side. The wave plate and the polarizing plate may be installed on the side from which light is emitted, and may be installed on both sides as long as the display is a double-sided emission type that emits light on both sides. Further, an antireflection film may be provided outside the polarizing plate. This makes it possible to display a higher-definition and precise image.

  A display panel 2002 using a liquid crystal or an EL element is incorporated in the housing 2001, and a general television broadcast is received by the receiver 2005 and connected to a wired or wireless communication network via the modem 2004. Information communication can be performed in the direction (from the sender to the receiver) or in both directions (between the sender and the receiver, or between the receivers). The television receiver can be operated by a switch incorporated in the housing or a separate remote control device 2006. Even if this remote control device is provided with a display unit 2007 for displaying information to be output. good.

  In addition, the television device may have a configuration in which a sub screen 2008 is formed using the second display panel in addition to the main screen 2003 to display channels, volume, and the like. In this configuration, the main screen 2003 may be formed using an EL display panel with an excellent viewing angle, and the sub screen may be formed using a liquid crystal display panel that can display with low power consumption. In order to prioritize the reduction in power consumption, the main screen 2003 may be formed using a liquid crystal display panel, the sub screen may be formed using an EL display panel, and the sub screen may blink. When the present invention is used, a highly reliable display device can be obtained even when such a large substrate is used and a large number of TFTs and electronic components are used.

  Of course, the present invention is not limited to a television device, but can be applied to various uses such as a monitor for a personal computer, an information display board in a railway station or airport, an advertisement display board in a street, etc. can do.

(Embodiment 11)
Various display devices can be manufactured by applying the present invention. That is, the present invention can be applied to various electronic devices in which these display devices are incorporated in a display portion.

  Such electronic devices include cameras such as video cameras and digital cameras, projectors, head mounted displays (goggles type displays), car navigation systems, car stereos, personal computers, game machines, personal digital assistants (mobile computers, mobile phones or An electronic book), and an image reproducing apparatus (specifically, an apparatus having a display capable of reproducing a recording medium such as a digital versatile disc (DVD) and displaying the image). Examples thereof are shown in FIG.

  FIG. 18A illustrates a personal computer, which includes a main body 2101, a housing 2102, a display portion 2103, a keyboard 2104, an external connection port 2105, a pointing mouse 2106, and the like. The present invention is applied to manufacturing the display portion 2103. When the present invention is used, a highly reliable high-quality image can be displayed even if the size is reduced and wiring and the like are refined.

  FIG. 18B shows an image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2201, a housing 2202, a display portion A 2203, a display portion B 2204, and a recording medium (DVD etc.) reading portion 2205. , An operation key 2206, a speaker portion 2207, and the like. The display portion A 2203 mainly displays image information, and the display portion B 2204 mainly displays character information. The present invention is applied to the production of the display portions A, B 2203, and 2204. When the present invention is used, a highly reliable high-quality image can be displayed even if the size is reduced and wiring and the like are refined.

  FIG. 18C shows a mobile phone, which includes a main body 2301, an audio output portion 2302, an audio input portion 2303, a display portion 2304, operation switches 2305, an antenna 2306, and the like. By applying the display device manufactured according to the present invention to the display portion 2304, a highly reliable and high-quality image can be displayed even in a mobile phone that is downsized and wiring and the like are precise.

  FIG. 18D shows a video camera, which includes a main body 2401, a display portion 2402, a housing 2403, an external connection port 2404, a remote control receiving portion 2405, an image receiving portion 2406, a battery 2407, an audio input portion 2408, operation keys 2409, and the like. . The present invention can be applied to the display portion 2402. By applying the display device manufactured according to the present invention to the display portion 2304, a highly reliable and high-quality image can be displayed even with a video camera that is downsized and wiring and the like are precise. This embodiment mode can be freely combined with the above embodiment modes.

The figure explaining this invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 2A and 2B illustrate a structure of a droplet discharge device that can be applied to the present invention. FIG. 11 illustrates an electronic device to which the present invention is applied. FIG. 11 illustrates an electronic device to which the present invention is applied. 1 is a block diagram illustrating a main configuration of an electronic device of the present invention. Sectional drawing explaining the structural example of EL display module of this invention. Sectional drawing explaining the structural example of the liquid crystal display module of this invention. 6A and 6B illustrate a circuit structure in the case where a scan line side driver circuit is formed using TFTs in an EL display panel of the present invention. 6A and 6B illustrate a circuit configuration in the case where a scan line side driver circuit is formed using TFTs in an EL display panel of the present invention (shift register circuit). 4A and 4B illustrate a circuit configuration in the case where a scan line side driver circuit is formed using TFTs in an EL display panel of the present invention (buffer circuit). 4A to 4D illustrate a method for manufacturing a display device of the present invention. FIG. 10 is a circuit diagram illustrating a structure of a pixel that can be applied to an EL display panel of the present invention. It is a top view illustrating an EL display panel of the present invention. FIG. 28 is an equivalent circuit diagram of the EL display panel described in FIG. 27. The top view of the display apparatus of this invention. The top view of the display apparatus of this invention. The top view of the display apparatus of this invention. Sectional drawing of the display apparatus of this invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention.

Claims (2)

  A first step of forming a base film 101 on the substrate 100;
  A second step of forming a gate wiring layer 103 on the base film 101 by discharging a conductive material from a droplet discharge device;
  A third step of forming the gate electrode layer 104 and the gate electrode layer 105;
      The gate electrode layer 104 is formed by expanding a part of the gate wiring layer 103 by shaping means before the gate wiring layer 103 is solidified.
      The gate electrode layer 105 is formed by discharging a conductive material from a droplet discharge device and then shaping it so as to be thinned using shaping means.
      The line width of the gate wiring layer 103 is 10 μm or more and 40 μm or less, and the line widths of the gate electrode layer 104 and the gate electrode layer 105 are 5 μm or more and 20 μm or less,
  A fourth step of forming a gate insulating layer 106 on the gate electrode layer 104 and the gate electrode layer 105;
  After forming a semiconductor layer on the gate insulating layer 106, forming a N-type semiconductor layer on the semiconductor layer;
  After forming a mask made of an insulator over the N-type semiconductor layer by a droplet discharge method, the N-type semiconductor layer and the semiconductor layer are etched using the mask, whereby the gate electrode layer 104 is formed. A semiconductor 107 and an N-type semiconductor layer 109 are formed thereon via the gate insulating layer 106, and a semiconductor layer 108 and an N-type semiconductor layer are formed on the gate electrode layer 105 via the gate insulating layer 106. Having a sixth step of forming 110;
  A seventh step of forming a through hole 145 in the gate insulating layer 106 by forming a mask made of an insulator by a droplet discharge method and then etching the gate insulating layer 106 using the mask; ,
      A portion of the gate electrode layer 105 is exposed through the through-hole 145,
  An eighth step of forming a source wiring layer 118 and a power supply line 119 on the gate insulating layer 106 by a droplet discharge method;
  A ninth step of forming the source or drain electrode layer 111, 113, 115, 116 and the conductive layer 112;
      The source or drain electrode layer 111 is formed by expanding a part of the source wiring layer 118 by shaping means before the source wiring layer 118 is solidified.
      The source or drain electrode layer 115 and the conductive layer 112 are formed by expanding a part of the power supply line 119 by shaping means before the power supply line 119 is solidified.
      The source or drain electrode layers 113 and 116 are formed by discharging a conductive material by a droplet discharge method and then shaping using a shaping means.
      The source or drain electrode layers 111 and 116 are formed on and in contact with the gate insulating layer 106 and the N-type semiconductor layer 109, and the source or drain electrode layer 116 is connected to the gate through the through hole 145. In contact with the electrode layer 105;
      The source or drain electrode layers 113 and 115 are formed on and in contact with the gate insulating layer 106 and the N-type semiconductor layer 110,
      The conductive layer 112 is formed on the gate electrode layer 105 with the gate insulating layer 106 interposed therebetween,
      The conductive layer 112, the gate insulating layer 106, and the gate electrode layer 105 form a capacitor,
  The N-type semiconductor layer 109 and the N-type semiconductor layer 110 are etched using the source or drain electrode layers 111, 113, 115, and 116 as a mask, so that the source region and the semiconductor region 107 are in contact with each other. A tenth step of forming a drain region and forming a source region and a drain region in contact with the semiconductor layer 108;
      In the tenth step, a part of the upper surface of the semiconductor layer 107 and the semiconductor layer 108 is etched,
  There is an eleventh step of forming a first electrode layer 117 to be a pixel electrode by discharging a conductive material over the gate insulating layer 106 and the source or drain electrode layer 113 by a droplet discharge method. And
  By performing the 11 steps in order from the first step,
      Channel etch having the source and drain regions and the source or drain electrode layers 111 and 116 formed from the gate electrode layer 104, the gate insulating layer 106, the semiconductor layer 107, and the N-type semiconductor layer 109. Type thin film transistor,
      And the gate electrode layer 105, the gate insulating layer 106, the semiconductor layer 108, the source and drain regions formed from the N-type semiconductor layer 110, and the source or drain electrode layers 113 and 115. A method for manufacturing a display device, wherein a channel-etch thin film transistor is formed over the substrate 100.   In claim 1,
  A twelfth step of forming an insulating layer 121 so as to have an opening on the first electrode layer 117;
  A thirteenth step of forming an electroluminescent layer 122 on the first electrode layer 117 in the opening;
  A 14th step of forming a second electrode layer 123 on the electroluminescent layer 122;
  A method for manufacturing a display device, comprising: a fifteenth step of forming a passivation film so as to cover the second electrode layer 123.

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