JP4439955B2 - Semiconductor device and manufacturing method of semiconductor laser device - Google Patents

Description

  The present invention relates to a semiconductor device made of a group III-V nitride semiconductor and a method for manufacturing a semiconductor laser device.

Group III-V nitride semiconductor, i.e. gallium nitride (GaN), aluminum nitride (AlN), aluminum indium nitride (InN) and the general formula is represented by _{Al X Ga y In z N (} x + y + z = 1) (Al) , Gallium (Ga) and indium (In) mixed crystals are not only applied to optical elements utilizing the physical characteristics of the large band gap and direct transition band structure, but also have a breakdown electric field and saturation electron velocity. Applications to electronic devices that take advantage of its large size are also being studied.

In particular, heterogeneity using a two-dimensional electron gas (hereinafter referred to as 2DEG) that appears at the interface between an Al _x Ga _1-x N (0 <X ≦ 1) layer epitaxially grown on a semi-insulating substrate and a GaN layer. Development of a junction field effect transistor (hereinafter referred to as HFET) and a hetero-bipolar transistor (hereinafter referred to as HBT) are being developed as high-power high-frequency devices.

For HFET, in addition to the supply of electrons from the n-type AlGaN barrier layer, which is a carrier supply layer, there is charge supply due to the effect of piezoelectric polarization, which is spontaneous polarization, the electron density exceeds 10 ¹³ cm ⁻² , and the AlGaAs type It has characteristics such as about one digit larger than FET. Furthermore, the withstand voltage characteristics are improved due to the large band gap of the III-V nitride semiconductor (3.4 eV in the case of GaN).

  Since high breakdown voltage and high current density characteristics can be expected in this way, electronic devices of group III-V nitride semiconductors centering on HFETs and HBTs can be used as ultra-high-speed elements or with large output with element dimensions smaller than conventional elements. Application to devices is being studied.

  As described above, electronic devices of III-V nitride semiconductors are promising as ultrahigh-speed and high-power elements, but various devices are required to actually realize ultrahigh-speed and high-power elements.

  As a problem for realizing the above ultra-high speed and high output element, damage to the semiconductor layer due to etching can be cited. Various etching processes are performed to improve device characteristics such as a recess structure or a mesa structure. This etching process also includes a demerit of damage to the semiconductor layer. As a method for reducing this disadvantage, low damage etching or the like has been known so far.

As a prior art example of this low damage etching, for example, fluorine, which is an element having a high electronegativity, is adsorbed on the surface of the cap layer in the gate recess formation region, and a water washing process is performed to generate an oxide layer in the fluorine adsorption region. For example, a method of forming a gate recess by removing it and then forming a gate electrode in the gate recess (see Patent Document 1) can be given.
JP 2002-176065 A

  According to the above conventional technique, damage to the semiconductor layer due to etching is reduced. However, there is definitely residual damage, which is insufficient from the viewpoint of preventing deterioration of device characteristics.

  Accordingly, an object of the present invention is to realize a semiconductor device manufacturing method capable of easily obtaining a semiconductor device and a semiconductor laser device excellent in high frequency characteristics and high output characteristics without causing any residual damage to the semiconductor layer due to etching. And

  In order to achieve the above object, a method of manufacturing a semiconductor device and a semiconductor laser device according to the present invention includes a protective film on a group III-V nitride semiconductor layer after the step of etching the group III-V nitride semiconductor layer. And a damage recovery step including a step of performing heat treatment.

  Specifically, the first method for manufacturing a semiconductor device according to the present invention includes a semiconductor layer stacking step of stacking a semiconductor layer made of a group III-V nitride semiconductor on a substrate, and an etching step of etching the semiconductor layer. And a damage recovery step of depositing a protective film on the semiconductor layer and heat-treating the semiconductor layer and the protective film after the etching step.

  According to the first method for manufacturing a semiconductor device, after the etching process, a protective film is deposited on the group III-V nitride semiconductor layer, and the damage generated in the etching process is recovered by a damage recovery process in which heat treatment is performed. be able to. The III-V nitride semiconductor layer is damaged by etching, and its sheet resistance increases. However, the damage of the III-V nitride semiconductor layer can be sufficiently recovered by the damage recovery process, and the value of the sheet resistance can be returned to the value before etching. In addition, it is possible to recover defects inherent in the III-V nitride semiconductor layer. For this reason, it becomes possible to easily manufacture a semiconductor device excellent in high frequency characteristics and high output characteristics free from etching damage.

  In the first method for manufacturing a semiconductor device, it is preferable to simultaneously perform the deposition of the protective film and the heat treatment. With such a configuration, the process can be simplified, and a semiconductor device without performance deterioration can be easily manufactured.

  In the first method for manufacturing a semiconductor device, the protective film is preferably made of silicon, and may be an oxide film containing silicon or a nitride film containing silicon. Further, the heat treatment is preferably performed at a temperature of 200 ° C. or higher and lower than 1200 ° C. Thereby, it is possible to reliably recover the damage without causing a cap removal or the like.

  The first method for manufacturing a semiconductor device preferably further includes a peeling step of peeling the protective film using a mixed solution of hydrofluoric acid and nitric acid after the damage recovery step. Thereby, the protective film can be easily removed without damaging the III-V nitride semiconductor layer again after the damage recovery.

  In the first method for manufacturing a semiconductor device of the present invention, the protective film is preferably made of magnesium. In this case, the heat treatment is preferably performed at a temperature of 100 ° C. or higher and lower than 650 ° C., and further preferably includes a peeling step of peeling the protective film using sulfuric acid after the damage recovery step.

  By adopting such a configuration, damage to the p-type doped semiconductor layer can be reliably recovered.

  Furthermore, the first method for manufacturing a semiconductor device further includes an insulating film deposition step of depositing an insulating film on the semiconductor layer after the semiconductor layer stacking step, and the etching step is a step of etching the semiconductor layer and the insulating film. It is preferable that

  With such a configuration, damage caused by the insulating film etching step can be reliably recovered. The insulating film is preferably a silicon oxynitride film, a silicon oxide film, a silicon nitride film, an aluminum oxide film, or an aluminum nitride film.

  In the first method for manufacturing a semiconductor device of the present invention, the semiconductor layer stacking step includes a step of stacking an operation layer, a barrier layer, and a cap layer each made of a III-V nitride semiconductor, and the etching step includes a cap step. It is preferable to include a gate recess forming step of forming a gate recess portion by etching a part of the layer until the barrier layer is exposed.

  With this configuration, it is possible to reliably recover etching damage that occurs in the group III-V nitride semiconductor layer when the recess structure is formed. Therefore, it is possible to easily manufacture a semiconductor device having a gate recess and excellent in high frequency characteristics and high output characteristics.

  Furthermore, it is preferable that the gate recess forming step includes a step of forming a second gate recess portion by etching a part of the barrier layer on the bottom surface of the gate recess portion.

  With this configuration, it is possible to reliably recover etching damage that occurs in the group III-V nitride semiconductor layer when the double recess structure is formed.

  Moreover, it is preferable to further include a step of forming a recess structure in the ohmic electrode formation region by etching the ohmic electrode formation region in the cap layer until the barrier layer is exposed.

  In the first method for manufacturing a semiconductor device of the present invention, the etching step preferably includes a step of forming an element isolation region by etching a part of the semiconductor layer.

  According to this preferable configuration, the damage generated in the group III-V nitride semiconductor layer in the step of forming the element isolation region can be reliably recovered, and there is no deterioration in isolation characteristics between devices, high frequency characteristics and high output. A semiconductor element having excellent characteristics can be easily manufactured.

  In the first method for fabricating a semiconductor device of the present invention, the etching step preferably includes a step of forming a via hole by etching the group III-V nitride semiconductor layer and the substrate.

  With this configuration, it is possible to recover damage when forming the via hole. Therefore, it is possible to easily manufacture a semiconductor device excellent in high frequency characteristics and high output characteristics, in which generation of a leakage current from the via portion to the element is suppressed.

  In the method for manufacturing a semiconductor device of the present invention, it is preferable that the damage recovery step includes an insulating film forming step of forming an insulating film from the protective film by performing the heat treatment in a gas atmosphere containing oxygen.

  According to this preferred configuration, damage can be recovered and an insulating film can be formed. Therefore, a semiconductor device having an insulating film and excellent in high frequency characteristics and high output characteristics can be easily manufactured.

  The gas containing oxygen is preferably a single gas of oxygen, nitrogen oxide, or dinitrogen oxide, or a mixed gas containing at least one of them.

  The insulating film formed by the insulating film forming step may be a gate insulating film, an insulating protective film protecting the element isolation region, or an insulating protective film protecting the wall surface of the via hole.

  The second method for manufacturing a semiconductor device according to the present invention includes an n-type semiconductor layer and a p-type semiconductor formed on the n-type semiconductor layer, each of which is made of a group III-V nitride semiconductor. A semiconductor layer stacking step of stacking a semiconductor layer including a layer, an etching step of exposing a part of the p-type semiconductor layer by etching the semiconductor layer, and a semiconductor layer including the p-type semiconductor layer after the etching step A damage recovery step of depositing a protective film made of magnesium and heat-treating the semiconductor layer together with the deposited protective film.

  According to the second method for manufacturing a semiconductor device, it is possible to recover etching damage that occurs in the process of forming the base electrode formation region of the HBT, and to reliably obtain an HBT excellent in high frequency characteristics and high output characteristics. Become.

  The third method for manufacturing a semiconductor device according to the present invention includes an n-type semiconductor layer and a p-type formed on the n-type semiconductor layer, each made of a group III-V nitride semiconductor on a substrate plate. A semiconductor layer stacking step of stacking a semiconductor layer including a semiconductor layer, an etching step of exposing a part of the n-type semiconductor layer by etching the semiconductor layer, and a semiconductor layer including the n-type semiconductor layer after the etching step And a damage recovery step of depositing a protective film made of silicon on the substrate and heat-treating the semiconductor layer together with the deposited protective film.

  According to the third method for manufacturing a semiconductor device, it is possible to recover etching damage that occurs in the process of forming the collector electrode type region of the HBT, and to reliably obtain an HBT having excellent high frequency characteristics and high output characteristics. Become.

  According to a fourth method of manufacturing a semiconductor device of the present invention, an n-type semiconductor layer and a p-type semiconductor formed on the n-type semiconductor layer are each formed of a group III-V nitride semiconductor on a substrate. A semiconductor layer stacking step of stacking a semiconductor layer including a layer, an etching step of exposing a part of the p-type semiconductor layer and a part of the n-type semiconductor layer by etching the semiconductor layer, and recovering damage to the semiconductor layer A damage recovery step, wherein the damage recovery step includes a first protective film deposition step of depositing a first protective film made of magnesium on the p-type semiconductor layer, and a semiconductor layer including the first protective film A second protective film deposition step of depositing a second protective film made of silicon on the semiconductor layer; and a heat treatment step of heat-treating the semiconductor layer together with the first protective film and the second protective film. .

  According to the fourth method for manufacturing a semiconductor device, the etching damage generated in the collector electrode formation region and the base electrode formation region formation step can be reliably recovered by a single heat treatment step.

  A first method of manufacturing a semiconductor laser device according to the present invention is a semiconductor layer stacking in which a semiconductor layer including a n-type semiconductor layer, an active layer, and a p-type semiconductor layer is sequentially stacked. And a step of etching the p-type semiconductor layer to form a ridge portion having a convex section in the p-type semiconductor layer, and a protective film made of silicon is deposited after the etching step, and the deposited protective film And a damage recovery step of performing a heat treatment on the p-type semiconductor layer.

  According to the first method for manufacturing a semiconductor laser device, it is possible to recover the etching damage of the semiconductor laser device in which the ridge portion is doped p-type and to manufacture a semiconductor laser device having greatly improved light emission characteristics. It becomes possible.

  According to the second method of manufacturing the semiconductor laser device of the present invention, each of the semiconductor layer stacks is formed of a group III-V nitride semiconductor and sequentially stacks a semiconductor layer including an n-type semiconductor layer, an active layer and a p-type semiconductor layer. A step of etching the n-type semiconductor layer to form a ridge having a convex cross section in the n-type semiconductor layer; and a protective film made of silicon is deposited after the etching step, and the deposited protective film And a damage recovery step of performing a heat treatment on the n-type semiconductor layer.

  According to the second method for manufacturing a semiconductor laser device, it is possible to recover the etching damage of the semiconductor laser device in which the ridge portion is doped n-type and to manufacture a semiconductor laser device having greatly improved light emission characteristics. It becomes possible.

  According to the present invention, damage at the time of etching, which is a problem when realizing the ultra-high speed and high output characteristics of III-V nitride electronic devices, can be recovered. An improved III-V nitride electronic device can be easily manufactured.

(First embodiment)
A first embodiment according to the present invention will be described with reference to FIG.

  FIG. 1A to FIG. 1D schematically show cross-sectional configurations in the order of steps in the method for manufacturing a semiconductor device according to this embodiment.

As shown in FIG. 1 (a), SiC, Al ₂ O _{3 is} formed by an organic chemical vapor deposition method (hereinafter referred to as MOCVD method) or a molecular beam epitaxy method (hereinafter referred to as MBE method). A buffer layer 2 made of AlN or GaN having a thickness of 200 nm, an operation layer 3 made of an i-type GaN layer having a thickness of 2 μm, and an AlGaN having a thickness of 25 nm on a substrate 1 made of Si, GaAs or the like. A barrier layer 4 and a cap layer 5 made of n ⁺ -type GaN having a thickness of 30 nm are sequentially deposited, and a group III-V nitride semiconductor layer 11 is laminated.

  Next, as shown in FIG. 1B, the gate electrode formation scheduled portion of the cap layer 5 is etched as an etching step to expose the barrier layer 4 and form the gate recess portion 5a.

Subsequently, as shown in FIG. 1C, as a damage recovery process, a silicon (Si) film 6 is deposited to a thickness of 100 nm on the group III-V nitride semiconductor layer 11 in which the gate recess portion 5a is formed, and nitrogen (N ₂ ) Heat treatment is performed at 1000 ° C. for 30 minutes in an atmosphere.

  Thereafter, the Si film 6 is peeled off by wet etching (hydrofluoric acid: nitric acid = 1: 1). By peeling the Si film 6 using wet etching, the III-V group nitride semiconductor layer 11 can be prevented from being damaged again.

  Further, as shown in FIG. 1D, a source electrode 7 and a drain electrode which are ohmic electrodes are formed on the cap layer 5 by a method using a normal electron beam evaporation method (hereinafter referred to as EB evaporation method) and a lift-off process. 8 is formed, and a gate electrode 9 is formed on a part of the gate recess structure 5b by a method using a normal EB vapor deposition method, a lift-off process, or the like to obtain a semiconductor device, that is, an FET.

  According to the method for manufacturing a semiconductor device of the present embodiment, the sheet resistance of the III-V nitride semiconductor layer 11 that is 400Ω / □ before the etching step increases to 1150Ω / □ after the etching step. However, it recovers to 400 Ω / □ before the etching process after the damage recovery process.

  FIG. 2 shows the relationship between the heat treatment temperature and the sheet resistance of the III-V nitride semiconductor layer. As shown in FIG. 2, as the heat treatment temperature in the damage recovery process increases, the sheet resistance of the III-V nitride semiconductor layer decreases and the damage recovery effect increases. A practically preferable heat treatment temperature in view of the value of the sheet resistance is a temperature of 200 ° C. or higher, more preferably 500 ° C. or higher, more preferably 800 ° C. or higher. The upper limit of the heat treatment temperature is determined by the deterioration of the device due to heat, the melting point of the protective film, etc., but when silicon is used as the protective film, it is preferably less than 1200 ° C.

  In the semiconductor device manufacturing method of the present embodiment, the gas in the heat treatment atmosphere is not particularly limited, and oxygen or the like may be used as well as an inert gas such as nitrogen or helium.

  In addition, by depositing the Si film 6 in a temperature range of 200 ° C. or higher and lower than 1200 ° C., it is possible to perform heat treatment simultaneously with the deposition of the protective film.

  As described above, according to the manufacturing method of the semiconductor device of this embodiment, the etching damage generated in the group III-V nitride semiconductor layer when the recess structure is formed can be recovered. A group III-V nitride semiconductor device having excellent output characteristics can be obtained.

  In the present embodiment, the mixing ratio of hydrofluoric acid and nitric acid, which is an etching solution when the Si film 6 is peeled, is set to 1: 1. However, the present invention is not limited to this, and the mixing ratio used for normal wet etching is not limited. Can be used in a range.

(First modification of the first embodiment)
Below, only the difference with 1st Embodiment is demonstrated, referring FIG. 3 for the 1st modification of 1st Embodiment which concerns on this invention.

  FIG. 3A to FIG. 3D schematically show cross-sectional configurations in the order of steps in the method for manufacturing a semiconductor device according to this modification. In FIG. 3, the same components as those in FIG. 1 are denoted by the same reference numerals.

  The step of forming the group III-V nitride semiconductor layer 11 on the substrate is the same as that in the first embodiment, and thus the description thereof is omitted (FIG. 3A).

  In this modification, as shown in FIG. 3B, in the etching process, a part of the cap layer 5 is etched to the surface of the barrier layer 4 to form the gate recess portion 5a in the portion where the gate electrode is to be formed, and the ohmic contact. The ohmic digging portions 5b are respectively formed in portions where the source electrode and drain electrode which are electrodes are to be formed.

Following the etching, as shown in FIG. 3C, a Si film 6 is deposited to a thickness of 100 nm on the III-V nitride semiconductor layer 11 in which the gate recess portion 5a and the ohmic digging portion 5b are formed as a damage recovery process. Then, heat treatment is performed at 1000 ° C. for 30 minutes in an N ₂ atmosphere.

  Thereafter, as shown in FIG. 3D, the Si film 6 is removed by wet etching, the source electrode 7 and the drain electrode 8 are respectively formed in the ohmic digging portion 5b, and the gate electrode 9 is a part of the gate recess portion 5a. To form.

  According to the manufacturing method of the semiconductor device of this modification, it is possible to sufficiently recover the etching damage generated in the group III-V nitride semiconductor layer when the gate recess portion 5a and the ohmic digging portion 5b are formed. The sheet resistance of the III-V nitride semiconductor layer, which increases to 1150 Ω / □ due to etching damage, can be recovered to 400 Ω / □ before the etching process. As a result, a III-V nitride-based semiconductor device excellent in high frequency characteristics and high output characteristics free from etching damage can be obtained.

  The source electrode 7 and the drain electrode 8 may be formed over the cap layer 5. Further, the gate recess portion 5a and the ohmic digging portion 5b may be formed by etching separately.

(Second modification of the first embodiment)
Hereinafter, only a difference from the first embodiment will be described with reference to FIG. 4 regarding a second modification of the first embodiment according to the present invention.

  FIG. 4A to FIG. 4C schematically show cross-sectional configurations in the order of steps in the method for manufacturing a semiconductor device according to the first embodiment of the present invention. In FIG. 4, the same components as those in FIG. 1 are denoted by the same reference numerals.

  The steps from the formation of the group III-V nitride semiconductor layer 11 on the substrate to the formation of the gate recess portion 5a are the same as those in the first embodiment, and thus description thereof is omitted.

  In the present modification, unlike the first embodiment, as shown in FIG. 4A, after forming the gate recess portion 5a, a part of the barrier layer 4 which is the bottom surface of the gate recess portion 5a is further etched by 1 nm, A second gate recess portion 5c is formed.

As shown in FIG. 4B following the etching process, the Si film 6 is formed to 100 nm on the III-V nitride semiconductor layer 11 in which the gate recess part 5a and the second gate recess part 5c are formed as a damage recovery process. Deposited and heat-treated at 1000 ° C. for 30 minutes in N ₂ atmosphere.

  Thereafter, as shown in FIG. 4C, the Si film 6 is removed by wet etching, the source electrode 7 and the drain electrode 8 are formed on the cap layer 5, and the gate electrode 9 is formed in the second gate recess portion 5c. Form. Thereby, an FET having a double recess structure in which the gate electrode portion is recessed in two stages can be obtained.

  According to this modification, it is possible to sufficiently recover the etching damage generated in the III-V nitride semiconductor layer when forming a double recess structure in which the damage to the III-V nitride semiconductor layer becomes more remarkable. Thus, it is possible to obtain a group III-V nitride semiconductor device having excellent high frequency characteristics and high output characteristics.

  In the present embodiment, the depth of the second gate recess structure 5d is 1 nm. However, the depth may be set to an arbitrary depth within the range in which 2DEG is formed at the interface between the i-type GaN layer 3 and the barrier layer 4. it can.

  The gate electrode 9 may be formed across the gate recess portion 5a and the second gate recess portion 5c.

(Third Modification of First Embodiment)
Below, only the difference from 1st Embodiment is demonstrated, referring FIG. 5 for the 3rd modification of 1st Embodiment which concerns on this invention.

  FIG. 5A to FIG. 5D schematically show cross-sectional configurations in the order of steps in the method for manufacturing a semiconductor device according to this modification.

  Since the step of forming the gate recess portion 5a after forming the group III-V nitride semiconductor layer 11 on the substrate is the same as in the first embodiment, the description thereof is omitted.

In this modified example, as shown in FIG. 5A, after a Si film 6 is deposited to a thickness of 100 nm on the group III-V nitride semiconductor layer 11 in which the gate recess portion 5a is formed as a damage recovery process, Heat treatment is performed at 1000 ° C. for 30 minutes in a nitrogen (N ₂ O) atmosphere. As a result, as shown in FIG. 5B, a silicon oxynitride film 16 that is an insulating film is formed from the Si film 6.

  In this modification, as shown in FIG. 5C, the silicon oxynitride film 16 is peeled off by wet etching only at the portions where the source electrode 7 and the drain electrode 8 which are ohmic electrodes are to be formed, and formed in the gate recess portion 5a and the like. The formed silicon oxynitride film 16 is left as it is to form an electrode.

  Thereby, a MISFET (Metal Insulator Semiconductor FET) in which the gate electrode 9 as shown in FIG. 5D is formed on the silicon oxynitride film 16 can be obtained.

  According to the semiconductor manufacturing method of this modification, when forming the recess structure, not only the etching damage generated in the III-V nitride semiconductor layer can be sufficiently recovered, but also the gate insulating film is formed by the damage recovery process. Therefore, it is possible to easily create a MISFET without increasing a new process.

Also in this modification, the heat treatment can be performed in the same temperature range as in the first embodiment. In addition to N ₂ O, the gas in the heat treatment atmosphere may be a single gas such as oxygen or nitrogen oxide, or a mixed gas containing these as constituent elements. Further, similarly to the first embodiment, the deposition of the protective film and the heat treatment can be simultaneously performed by depositing the Si film in a temperature range of 200 ° C. or more and less than 1200 ° C.

  In this modification, the silicon oxynitride film 16 formed in the damage recovery process is used as it is as the gate insulating film, but the gate electrode 9 may be formed after the silicon oxynitride film 16 is thinned to an arbitrary thickness. Good.

(Fourth modification of the first embodiment)
Below, only the difference with the 2nd modification of 1st Embodiment is demonstrated about the 4th modification of 1st Embodiment which concerns on this invention, referring FIG.

  FIG. 6A to FIG. 6D schematically show cross-sectional configurations in the order of steps in the method for manufacturing a semiconductor device according to this modification. In FIG. 6, the same components as those in FIG. 4 are given the same reference numerals.

  Since the processes from the formation of the group III-V nitride semiconductor layer 11 on the substrate to the formation of the second gate recess portion 5c are the same as those of the second modification of the first embodiment, the description thereof is omitted. To do.

In the present modification, unlike the second modification of the first embodiment, as shown in FIG. 6A, a III-V group nitridation in which a gate recess portion 5a and a second gate recess portion 5c are formed as a damage recovery process. After the Si film 6 is deposited to a thickness of 100 nm on the physical semiconductor layer 11, a heat treatment is performed at 1000 ° C. for 30 minutes in an N ₂ O atmosphere. By performing heat treatment in an N ₂ O atmosphere, a silicon oxynitride film 16 that is an insulating film is formed from the Si film 6 (FIG. 6B).

  Further, as shown in FIG. 6C, the silicon oxynitride film 16 is peeled off by wet etching only on the portions where the source electrode 7 and the drain electrode 8 are to be formed, and the silicon oxynitride film 16 formed on the other portions is left as it is. The source electrode 7, the drain electrode, and the gate electrode 9 are formed by a normal process.

  In this modification, a MISFET having a double recess structure as shown in FIG. 6D is obtained.

  According to the semiconductor manufacturing method of this modification, the etching damage generated in the III-V nitride semiconductor layer is sufficiently recovered when forming a double recess structure in which the damage to the III-V nitride semiconductor layer becomes more remarkable. In addition, since the gate insulating film can be formed by a damage recovery process, a MISFET can be easily formed without increasing a new process.

  In this modification, the gate electrode 9 is provided so as to straddle the gate recess portion and the second gate recess portion, but may be provided only in the second gate recess portion.

  Further, the depth of the second gate recess portion 5c can be set to an arbitrary depth within the range in which 2DEG is formed at the interface between the i-type GaN layer 3 and the barrier layer 4 as in the second modification of the first embodiment. Can be

(Fifth modification of the first embodiment)
Below, only the difference with 1st Embodiment is demonstrated, referring FIG. 7 for the 5th modification of 1st Embodiment which concerns on this invention.

  FIG. 7A to FIG. 7E schematically show cross-sectional configurations in the order of steps in the method for manufacturing a semiconductor device according to this modification. In FIG. 7, the same components as those in FIG.

As shown in FIG. 7A, a buffer layer 2 made of AlN or GaN having a thickness of 200 nm is formed on a substrate 1 made of SiC, Al ₂ O ₃ , Si or GaAs by MOCVD or MBE. An operation layer 3 made of an i-type GaN layer having a thickness of 2 μm and a barrier layer 4 made of AlGaN having a thickness of 25 nm are sequentially deposited, and a group III-V nitride semiconductor layer 11 is laminated.

  Subsequently, in the present modification, as shown in FIG. 7B, a silicon nitride film 15 having a thickness of 100 nm is further formed on the group III-V nitride semiconductor layer 11 by a chemical vapor deposition method (CVD method). accumulate.

Next, as shown in FIG. 7C, as the etching process, the silicon nitride film 15 is dry-etched in a CHF ₃ gas atmosphere to open windows in the ohmic electrode formation scheduled portion and the gate electrode formation scheduled portion.

Thereafter, as shown in FIG. 7D, as a damage recovery step, a Si film 6 is deposited to a thickness of 100 nm, and heat treatment is performed at 1000 ° C. for 30 minutes in an N ₂ atmosphere.

  Then, after the Si film 6 is removed by wet etching, the source electrode 7 and the drain electrode 8 in which, for example, titanium (Ti) 50 nm and aluminum (Al) 200 nm are stacked on the barrier layer 4 and nickel (Ni), for example. A gate electrode 9 in which 50 nm and gold (Au) 500 nm are stacked is formed to obtain an FET as shown in FIG.

According to the manufacturing method of the semiconductor device of this modification, it is possible to recover the damage generated in the group III-V nitride semiconductor layer when the insulating film is dry-etched with a gas such as CHF ₃ .

In this modification, a silicon nitride film is used as the insulating film, but a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum nitride film, or the like can be used similarly. As the etching gas, CF ₄ , Cl ₂ , CHF ₃ , BCl _3, SiCl _4, or the like can be used depending on the type of the insulating film.

  In this modification, the gate electrode 9 is formed on the upper surface of the barrier layer 4, but the barrier layer 4 may be further etched to form a gate recess structure.

(Second Embodiment)
Hereinafter, a second embodiment of the present invention will be described with reference to FIG.

  8A to 8D schematically show cross-sectional configurations in the order of steps in the method for manufacturing a semiconductor device according to this embodiment.

As shown in FIG. 8A, a buffer layer 22 made of AlN or GaN having a thickness of 200 nm is formed on a substrate 1 such as SiC, Al ₂ O ₃ , Si or GaAs by MOCVD or MBE. An operation layer 23 made of i-type GaN having a thickness of 2 μm, a barrier layer 24 made of AlGaN having a thickness of 25 nm, and a cap layer 25 made of n ⁺ -type GaN having a thickness of 30 nm are sequentially deposited, and III-V nitride A semiconductor layer 31 is formed.

  Next, as shown in FIG. 8B, as an etching process, the cap layer 25, the barrier layer 24, and a part of the operation layer 23 are selectively etched to form element isolation regions 31a and mesas 31b.

Following the etching process, as shown in FIG. 8C, a Si film 26 is deposited to a thickness of 100 nm on the surface of the group III-V nitride semiconductor layer 31 on which the element isolation region 31a and the mesa 31b are formed as a damage recovery process. Heat treatment is performed at 1000 ° C. for 30 minutes in an N ₂ atmosphere.

  After the Si film 26 is removed by wet etching, semiconductor elements 41 and 42 are formed on the mesa 31b by a normal process (FIG. 8D).

  Before the Si film 26 is deposited, various etchings for forming the semiconductor elements 41 and 42 on the mesa 31b are performed, and each of the etching for forming the element isolation region 31a and the semiconductor elements 41 and 42 is performed. It is also possible to recover damage at the same time.

  Even in such a configuration, the damage recovery process is effective, and it is possible to suppress the deterioration of the isolation characteristics between devices due to etching damage and the generation of leakage current in the element. Therefore, the III-V group having excellent high frequency characteristics and high output characteristics. A nitride-based semiconductor device can be easily obtained.

(One Modification of Second Embodiment)
Below, only the difference from 2nd Embodiment is demonstrated, referring FIG. 9 about the modification of 2nd Embodiment which concerns on this invention.

  FIG. 9A and FIG. 9B schematically show cross-sectional configurations in the order of steps in a method for manufacturing a semiconductor device according to a modification of the second embodiment of the present invention. In FIG. 9, the same components as those in FIG. 8 are denoted by the same reference numerals.

  Since the steps from the formation of the group III-V nitride semiconductor layer 31 on the substrate to the deposition of the Si film 26 are the same as those in the second embodiment, the description thereof is omitted.

In the present modification, unlike the second embodiment, as shown in FIG. 9A, the heat treatment after the deposition of the Si film 26 is performed at 1000 ° C. for 30 minutes in an N ₂ O atmosphere. A silicon oxynitride film 36 which is an insulating film is formed.

  Thereafter, the silicon oxynitride film 36 formed on the mesa 31b is removed, and semiconductor elements 41 and 42 are formed by a normal process. The silicon oxynitride film 36 is left in the element isolation region 31a and functions as an insulating protective film for the element isolation region 31a (FIG. 9B).

  According to the semiconductor manufacturing method of this modification, it is possible to suppress degradation of device isolation characteristics due to etching damage and generation of leakage current in the element, and further isolation by using an insulating protective film as a mask used for recovery. A semiconductor device with improved characteristics and reduced leakage current can be realized.

(Third embodiment)
A third embodiment according to the present invention will be described below with reference to FIG.

  FIG. 10A to FIG. 10C schematically show cross-sectional configurations in the order of steps in the method for manufacturing a semiconductor device according to the third embodiment of the present invention.

As shown in FIG. 10A, a buffer layer 52 made of AlN or GaN having a thickness of 200 nm is formed on a substrate 51 made of SiC, Al ₂ O ₃ , Si or GaAs by MOCVD or MBE. A GaN layer having a low n-type carrier density of 15 nm, i.e., an i-type GaN layer 53, and a GaN layer having a thickness of 500 nm having a high n-type carrier density, i.e., an n-type semiconductor layer 54 made of n ⁺ -type GaN (Si density = 1 × 10 ¹⁹ cm ^-3 ), an Al _0.1 Ga _0.9 N layer 55 having a thickness of 500 nm, a GaN layer having a p-type carrier density of 70 nm, that is, a p-type semiconductor layer 56 made of p ⁺ -type GaN (Mg density = 4 × 10 ¹⁹ cm ^{− 3} ) and an Al _0.25 Ga _0.75 N layer 57 having a thickness of 30 nm are sequentially formed to form a group III-V nitride semiconductor layer 61. The Al _0.25 Ga _0.75 N layer 57 is doped n ⁺ type (Si density = 2 × 10 ¹⁷ cm ⁻³ ).

Next, as shown in FIG. 10B, the Al _0.25 Ga _0.75 N layer 57 is dry etched using a chlorine-based gas to expose a part of the p-type semiconductor layer 56. Subsequently, a magnesium (Mg) film 67 is deposited to a thickness of 100 nm on the group III-V nitride semiconductor layer 61 including the exposed portion of the p-type semiconductor layer 56 as a damage recovery step, and is performed at 500 ° C. for 30 hours in an N ₂ atmosphere. The heat treatment is performed.

Thereafter, as shown in FIG. 10C, the Mg film 67 is peeled off using a solution such as H ₂ SO ₄ , and the Al _0.1 Ga _0.9 N layer 55 and the p-type semiconductor layer 56 are made of chlorine-based gas. Then, a part of the n-type semiconductor layer 54 is exposed by dry etching, and then a normal EB deposition method and lift-off are performed on the surfaces of the Al _0.25 Ga _0.75 N layer 57, the p-type semiconductor layer 56 and the n-type semiconductor layer 54. An electrode 59 is formed by a method using a process or the like to obtain a bipolar transistor (BJT).

  As in the case where Si is used as the protective film, the heat treatment becomes more effective as the processing temperature is higher, but if it is processed at a temperature of 100 ° C. or higher, a practically sufficient effect can be obtained, and more preferably 200 ° C. or higher. More preferably, the treatment may be performed at a temperature of 500 ° C. or higher. Moreover, the upper limit of processing temperature should just be less than melting | fusing point (650 degreeC) of Mg. Further, the gas in the heat treatment atmosphere is not particularly limited, and oxygen or the like may be used as well as an inert gas such as nitrogen or helium.

  It is possible to simultaneously deposit the protective film and heat treatment by depositing the Mg film 67 at a temperature of 100 ° C. or more and less than 650 ° C. The Mg film 67 is deposited only on the exposed portion of the p-type semiconductor layer 56. A heat treatment may be performed.

  According to the manufacturing method of the semiconductor device of this embodiment, it is possible to recover the deterioration of the contact resistance to the p-type semiconductor layer 56 caused by etching damage, and excellent in high frequency characteristics and high output characteristics without etching damage. A III-V nitride semiconductor device can be obtained.

(First Modification of Third Embodiment)
Below, only the difference with 3rd Embodiment is demonstrated, referring FIG. 11 for the 1st modification of 3rd Embodiment which concerns on this invention.

  FIG. 11A and FIG. 11B schematically show cross-sectional configurations in the order of steps in the method for manufacturing a semiconductor device according to this modification. In FIG. 11, the same components as those in FIG. 10 are given the same reference numerals.

  The process of forming the group III-V nitride semiconductor layer 61 on the substrate is the same as that in the third embodiment, and thus the description thereof is omitted.

In this modification, as shown in FIG. 11A, the Al _0.25 Ga _0.75 N layer 57, the p-type semiconductor layer 56, and the Al _0.1 Ga _0.9 N layer 55 are dry-etched by using a chlorine-based gas, thereby making n A part of the type semiconductor layer 54 is exposed. Subsequently, as a damage recovery process, a Si film 66 is deposited to a thickness of 100 nm on the group III-V nitride semiconductor layer 61 including the exposed portion of the n-type semiconductor layer 54, and a heat treatment is performed at 1000 ° C. for 30 minutes in an N ₂ atmosphere. Do.

After that, as shown in FIG. 11B, the Si film 66 is removed by wet etching, and the Al _0.25 Ga _0.75 N layer 57 is further dry-etched using a chlorine-based gas, thereby part of the p-type semiconductor layer 56. To expose. Subsequently, an electrode 59 is formed on the surfaces of the Al _0.25 Ga _0.75 N layer 57, the p-type semiconductor layer 56, and the n-type semiconductor layer 54 by a method using a normal electron beam evaporation method, a lift-off process, or the like.

  According to the manufacturing method of the semiconductor device of this modification, it is possible to recover the deterioration of the contact resistance to the n-type semiconductor layer 54 caused by etching damage, and excellent in high frequency characteristics and high output characteristics without etching damage. A III-V nitride semiconductor device can be obtained.

  Note that if the p-type semiconductor layer is partially exposed before the Si film 66 is removed and damage is recovered using Mg, the damage to the p-type semiconductor layer is recovered at the same time. can do.

(Second modification of the third embodiment)
Hereinafter, only the difference from the third embodiment will be described with reference to FIG. 12 for the second modification of the second embodiment according to the present invention.

  FIG. 12A to FIG. 12C schematically show cross-sectional configurations in the order of steps in the method for manufacturing a semiconductor device according to this modification. In FIG. 12, the same components as those in FIG. 10 are given the same reference numerals.

  The process of forming the group III-V nitride semiconductor layer 61 on the substrate is the same as that in the third embodiment, and thus the description thereof is omitted.

As shown in FIG. 12A, a part of the p-type semiconductor layer 56 is exposed by dry etching the Al _0.25 Ga _0.75 N layer 57 using a chlorine-based gas, and the p-type semiconductor layer 56 and Al A part of the n-type semiconductor layer 54 is exposed by etching the _0.1 Ga _0.9 N layer 55.

In this modification, as shown in FIG. 12B, an Mg film 67 is deposited to a thickness of 100 nm only on the exposed portion of the p-type semiconductor layer 56, and subsequently, including the portion where the Mg film 67 is deposited, A Si film 66 is deposited to a thickness of 100 nm on the group V nitride semiconductor layer 61, and heat treatment is performed at 1000 ° C. for 30 minutes in an N ₂ atmosphere.

  Note that the heat treatment is preferably performed at a temperature of 200 ° C. or higher and lower than 1200 ° C. In this modification, since the Mg film 67 is covered with the Si film 66, cap removal does not occur even when the temperature is raised above the melting point of the Mg film 67.

Thereafter, as shown in FIG. 12C, the Si film 66 and the Mg film 67 are peeled off, and an Al _0.25 Ga _0.75 N layer 57, a p-type semiconductor layer are formed by a method using a normal electron beam evaporation method and a lift-off process. 56 and an electrode 59 are formed on the surface of the n-type semiconductor layer 54.

  According to the manufacturing method of the semiconductor device of this modification, it is possible to simultaneously recover the deterioration of the contact resistance to the n-type semiconductor layer 54 and the p-type semiconductor layer 56 caused by etching damage. Improvement is possible.

  Further, the heat treatment step of the Mg film and the Si film can be omitted by depositing the Mg film in a temperature range of 100 ° C. or more and less than 650 ° C. and depositing the Si film in a temperature range of 200 ° C. or more and less than 1200 ° C. is there.

The Si film 66 may be deposited only on the n-type semiconductor layer 54 and the Al _0.25 Ga _0.75 N layer 57. Note that the same effect can be obtained even if the order of etching is arbitrarily changed.

(Fourth embodiment)
Hereinafter, a fourth embodiment according to the present invention will be described with reference to FIG.

  FIG. 13A to FIG. 13F schematically show cross-sectional configurations in the order of steps in the method for manufacturing a semiconductor device according to this embodiment.

As shown in FIG. 13A, a buffer layer 82 made of AlN or GaN having a thickness of 200 nm is formed on a substrate 81 made of SiC, Al ₂ O ₃ , Si or GaAs by MOCVD or MBE. A working layer 83 made of 2 μm i-type GaN, a barrier layer 84 made of AlGaN with a thickness of 25 nm, and a cap layer 85 made of n ⁺ -type GaN with a thickness of 30 nm are sequentially deposited to form a group III-V nitride semiconductor layer 91. .

  Next, as an etching process, the cap layer 85, the barrier layer 84, and a part of the operation layer 83 are dry-etched using a chlorine-based gas to form an element isolation region 91a and a mesa 91b. Further, a part of the cap layer 85 that is the surface layer of the mesa 91b is dry-etched using a chlorine-based gas to expose the barrier layer 84, thereby forming a gate recess portion 85a. Subsequently, the bottom surface of the element isolation region 91a is dug by etching to form a via hole 92a from the operation layer 83 to the middle of the substrate 81 (FIG. 13B).

  Subsequent to the etching process, as a damage recovery process, a Si film 86 is deposited to a thickness of 100 nm on the surface of the group III-V nitride semiconductor layer 91 in which the mesa 91b, the gate recess 85a, and the via hole 92a are formed.

Further, heat treatment is performed at 1000 ° C. for 30 minutes in an N ₂ O atmosphere to form a silicon oxynitride film 96 that is an insulating film from the Si film 86 (FIG. 13C).

  As shown in FIG. 13D, the silicon oxynitride film 96 is removed by wet etching except for the inside of the via hole 92a, a gate electrode 89 is formed in a part of the gate recess portion 85a, and the source electrode is formed on the cap layer 85. 87 and drain electrode 88 are formed. At this time, the source electrode 87 is formed so as to cover the via hole 92a.

  Thereafter, as shown in FIG. 13E, the substrate 81 is polished from the back surface, and the via hole 92a is passed through the back surface. Subsequently, as shown in FIG. 13F, an electrode 90 is formed on the back surface of the substrate 81 using gold plating, and the source electrode 87 and the electrode 90 are electrically connected through a via plug 92b formed in the via hole 92a. Get FET.

  According to the manufacturing method of the semiconductor device of this embodiment, the etching damage is recovered by the damage recovery process and the via portion is protected by the insulating film, so that the leakage current from the via portion to the element caused by the etching damage can be reduced. In addition, it is possible to obtain a group III-V nitride semiconductor device having excellent high frequency characteristics and high output characteristics.

  Note that the order of etching may be changed in the etching process of this embodiment. Further, the structure shown in the present embodiment can also be applied to BJT. Further, the insulating film 96 formed in the damage recovery process may be left as a protective film on a portion of the gate electrode 89 or the like.

(One Modification of Fourth Embodiment)
A modification of the fourth embodiment according to the present invention will be described below with reference to FIG.

  FIG. 14A to FIG. 14C schematically show cross-sectional configurations in the order of steps in the method for manufacturing a semiconductor device according to this modification. In FIG. 14, the same components as those in FIG. 13 are given the same reference numerals.

  Since the steps from forming the group III-V nitride semiconductor layer 91 on the substrate to forming the silicon oxynitride film 96 as an insulating film are the same as those in the fourth embodiment, the description thereof is omitted.

  As shown in FIG. 14A, in this modification, only the silicon oxynitride film 96 where the ohmic electrode is to be formed is peeled off by wet etching to form a part of the gate recess 85 a covered with the silicon oxynitride film 96. A gate electrode 89 is formed, and a source electrode 87 and a drain electrode 88 are formed on the cap layer 85. At this time, the source electrode 87 is formed so as to cover the via hole 92a.

  Thereafter, as shown in FIG. 14B, the substrate 81 is polished from the back surface, and the via hole 92a penetrates the back surface. Subsequently, as shown in FIG. 14C, an electrode 90 is formed on the back surface of the substrate 81 using gold plating, and the source electrode 87 and the electrode 90 are electrically connected through a via plug 92b formed in the via hole 92a. Obtain a MISFET.

  According to the manufacturing method of the semiconductor device of this modification, the damage recovery process is performed and the via portion is protected by the insulating film, so that the performance deterioration due to the leakage current from the via portion to the element caused by the etching damage is prevented. In addition, a group III-V nitride semiconductor device having excellent high frequency characteristics and high output characteristics can be obtained. In addition, simplification of the process can be realized by simultaneously recovering the recess structure and making it a MISFET.

  The structure shown in this embodiment can also be applied to BJT.

(Fifth embodiment)
The fifth embodiment according to the present invention will be described below with reference to FIG.

  FIG. 15A to FIG. 15E schematically show cross-sectional configurations in the order of steps in the method for manufacturing a semiconductor device according to this embodiment.

As shown in FIG. 15A, an n-type doped GaN buffer having a thickness of 2 μm is formed on a substrate 162 made of SiC, Al ₂ O ₃ , Si, GaAs or the like by MOCVD or MBE. Layer 163, an n-type cladding layer 164 made of n _0.1 -doped Al _0.15 Ga _0.85 N with a thickness of 1 μm, and an In ₀ . ₁ Ga ₀ . _An active layer 165 made of ₉ N, a p-type cladding layer 166 made of p-type Al _0.15 Ga _0.85 N with a thickness of 1.2 μm, and a p-type contact made of p-type doped GaN with a thickness of 50 nm Layers 167 are sequentially deposited to form a III-V nitride semiconductor layer 171.

  Here, the active layer 165 preferably has a multiple quantum well structure including about 2 to 10 pairs of a barrier layer made of gallium nitride and a well layer made of indium gallium nitride.

  Next, as shown in FIG. 15 (b), ridges 166a are formed by performing digging by leaving about 100 nm of the p-type cladding layer 166 by dry etching using a chlorine-based gas.

Subsequently, as shown in FIG. 15C, as a damage recovery step, an Mg film 177 is deposited to a thickness of 100 nm on the group III-V nitride semiconductor layer 171 including the ridge portion 166a, and 600 ° C. in an N ₂ atmosphere. Heat treatment for 30 minutes.

  After the heat treatment, as shown in FIG. 15D, the Mg film is peeled off by wet etching using a solution such as sulfuric acid, and, for example, nickel (Ni), platinum (Pt) and gold are formed on the p-type contact layer 167. A p-side ohmic electrode 168 made of a (Au) laminate is formed by a normal photolithography process, an EB vapor deposition method, or the like. In the damage recovery step, the Mg film 167 formed on the p-type contact layer 167 can be used as an electrode as it is.

  Further, as shown in FIG. 15 (e), the substrate 162 is polished until its thickness becomes 150 μm, and then the n-side ohmic made of, for example, a laminate of Ti and Al on the surface of the substrate 162 opposite to the buffer layer 163. The electrode 161 is formed using a normal photolithography process, an EB vapor deposition method, or the like.

  According to the method for manufacturing a semiconductor device of the present embodiment, the increase in contact resistance due to etching damage, the collapse of the crystal structure, and the like can be recovered, and the III-V nitride semiconductor laser device with greatly improved light emission characteristics can be easily obtained. Can be manufactured.

  In the present embodiment, the method for manufacturing the semiconductor laser device in which the p-type cladding has the ridge portion has been described. However, in the case of manufacturing the semiconductor laser device in which the n-type cladding having the n-type and p-type interchanged has the ridge portion. In this case, after the n-type cladding is etched, a Si film is deposited as a protective film, and an equivalent damage recovery effect can be obtained by heat treatment.

  In each embodiment and each modification according to the present invention, the thickness of the Si film and the Mg film, which are protective films, is set to 100 nm. However, the present invention is not limited to this. The thickness of the protective film may be any thickness as long as it can prevent the cap from coming off and can be easily peeled off after the heat treatment, and the protective film has a thickness in the range of 10 nm to 200 nm.

  The manufacturing method of the semiconductor device and the semiconductor laser device according to the present invention can recover the damage at the time of etching, which becomes a problem when realizing the ultra-high speed and high output characteristics of the III-V nitride electronic device, As a result, a III-V nitride electronic device with improved high-frequency characteristics and high output characteristics can be easily manufactured. Therefore, a semiconductor device and a semiconductor laser device made of a III-V nitride semiconductor are manufactured. This is useful as a method.

(A) to (d) are schematic cross-sectional views showing respective steps of the method for manufacturing the semiconductor device according to the first embodiment of the present invention. It is a graph which shows the relationship between heat processing temperature and sheet resistance. (A) to (d) are schematic cross-sectional views showing respective steps of a method of manufacturing a semiconductor device according to a first modification of the first embodiment of the present invention. (A) to (c) are schematic cross-sectional views showing respective steps of a method of manufacturing a semiconductor device according to a second modification of the first embodiment of the present invention. (A) to (d) are schematic cross-sectional views showing respective steps of a method of manufacturing a semiconductor device according to a third modification of the first embodiment of the present invention. (A) to (d) are schematic cross-sectional views showing respective steps of a method of manufacturing a semiconductor device according to a fourth modification of the first embodiment of the present invention. (A) to (e) are schematic cross-sectional views showing respective steps of a method for manufacturing a semiconductor device according to a fifth modification of the first embodiment of the present invention. (A) to (d) is a schematic cross-sectional view showing each step of a method of manufacturing a semiconductor device according to the second embodiment of the present invention. (A) And (b) is typical sectional drawing which shows each process of the manufacturing method of the semiconductor device which concerns on the modification of the 2nd Embodiment of this invention. (A) to (c) are schematic cross-sectional views showing respective steps of a method for manufacturing a semiconductor device according to a third embodiment of the present invention. (A) And (b) is typical sectional drawing which shows each process of the manufacturing method of the semiconductor device which concerns on the 1st modification of the 3rd Embodiment of this invention. (A) to (c) is a schematic cross-sectional view showing each step of a method of manufacturing a semiconductor device according to a second modification of the third embodiment of the present invention. (A) to (f) is a schematic cross-sectional view showing each step of a manufacturing method of a semiconductor device according to the fourth embodiment of the present invention. (A) to (c) are schematic cross-sectional views showing respective steps of a method for manufacturing a semiconductor device according to a modification of the fourth embodiment of the present invention. (A) to (e) are schematic cross-sectional views showing respective steps of a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Substrate 2 Buffer layer 3 Operation layer 4 Barrier layer 5 Cap layer 5a Gate recess portion 5b Ohmic digging portion 5c Second gate recess portion 6 Silicon film 7 Source electrode 8 Drain electrode 9 Gate electrode 11 III-V nitride semiconductor layer 15 Silicon nitride film 16 Silicon oxynitride film 21 Substrate 22 Buffer layer 23 Operation layer 24 Barrier layer 25 Cap layer 26 Silicon film 27 Source electrode 28 Drain electrode 29 Gate electrode 31 III-V nitride semiconductor layer 31a Element isolation region 31b Mesa 36 Silicon oxynitride film 41 Semiconductor element 42 Semiconductor element 51 Substrate 52 Buffer layer 53 i-type GaN layer 54 n-type semiconductor layer 55 Al _0.1 Ga _0.9 N layer 56 p-type semiconductor layer 57 Al _0.25 Ga _0.75 N layer 59 Electrode 61 III-V Group nitride semiconductor layer 66 Silicon film 67 Magnesium film 81 Substrate 82 Battery Layer 83 operation layer 84 barrier layer 85 cap layer 85a gate recess 86 silicon film 87 source electrode 88 drain electrode 89 gate electrode 90 electrode 91 III-V nitride semiconductor layer 91a element isolation region 91b mesa 92a via hole 92b via plug 96 oxynitriding Silicon film 161 n-side ohmic electrode 162 substrate 163 buffer layer 164 n-type cladding layer 165 active layer 166 p-type cladding layer 166a ridge portion 167 p-type contact layer 168 p-side ohmic electrode 177 magnesium film

Claims (10)

A semiconductor layer stacking step of forming a stacked semiconductor layer including a semiconductor layer of a first conductivity type made of a group III-V nitride semiconductor on a substrate;
An etching step of etching a part of the semiconductor layer of the first conductivity type;
After the etching step, a damage recovery is performed by depositing a protective film including an element serving as a dopant of the first conductivity type on a region including the etched portion, and heat-treating the stacked semiconductor layer together with the deposited protective film. Process,
A peeling step of peeling off at least part of the protective film to expose the electrode forming region;
An electrode forming step of forming an electrode on the electrode forming region,
The first conductivity type semiconductor layer is a p-type semiconductor layer;
The method for manufacturing a semiconductor device, wherein the protective film is made of magnesium.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the deposition of the protective film and the heat treatment are performed simultaneously.   The method for manufacturing a semiconductor device according to claim 1, wherein the heat treatment is performed at a temperature of 100 ° C. or more and less than 650 ° C. 3.   4. The method of manufacturing a semiconductor device according to claim 1, wherein in the peeling step, the protective film is peeled off using sulfuric acid. An insulating film deposition step of depositing an insulating film on the semiconductor layer after the semiconductor layer stacking step;
5. The method of manufacturing a semiconductor device according to claim 1, further comprising an insulating film etching step of selectively etching the insulating film. 6.   6. The method of manufacturing a semiconductor device according to claim 5, wherein the insulating film is a silicon oxynitride film, a silicon oxide film, a silicon nitride film, an aluminum oxide film, or an aluminum nitride film. A semiconductor layer stacked on a substrate, each of which is made of a group III-V nitride semiconductor and includes a stacked semiconductor layer including an n-type semiconductor layer and a p-type semiconductor layer formed on the n-type semiconductor layer Process,
An etching step of exposing an electrode formation region of the p-type semiconductor layer by etching the stacked semiconductor layer;
A damage recovery step of depositing a protective film made of magnesium on the semiconductor layer including the p-type semiconductor layer after the etching step, and heat-treating the laminated semiconductor layer together with the deposited protective film;
A peeling step of peeling off at least a part of the protective film to expose the electrode forming region;
And a method of manufacturing a semiconductor device, comprising: an electrode forming step of forming an electrode on the electrode forming region. A semiconductor layer stacked on a substrate, each of which is made of a group III-V nitride semiconductor and includes a stacked semiconductor layer including an n-type semiconductor layer and a p-type semiconductor layer formed on the n-type semiconductor layer Process,
An etching step of exposing a first electrode formation region of the p-type semiconductor layer and a second electrode formation region of the n-type semiconductor layer by etching the semiconductor layer;
A damage recovery step of recovering damage of the laminated semiconductor layer;
A peeling step of peeling at least a part of the first protective film and the second protective film to expose the first electrode forming region and the second electrode forming region;
An electrode forming step of forming a first electrode on the first electrode formation region and forming a second electrode on the second electrode formation region;
The damage recovery step includes a first protective film deposition step of depositing a first protective film made of magnesium on the p-type semiconductor layer;
A second protective film deposition step of depositing a second protective film made of silicon on the laminated semiconductor layer including the protective film;
A method for manufacturing a semiconductor device, comprising: a heat treatment step of heat-treating the laminated semiconductor layer together with the first protective film and the second protective film. A semiconductor layer stacking step of sequentially stacking stacked semiconductor layers each including a group III-V nitride semiconductor and including an n-type semiconductor layer, an active layer, and a p-type semiconductor layer;
Etching the p-type semiconductor layer to form a ridge having a convex cross section in the p-type semiconductor layer;
A damage recovery step of depositing a protective film made of magnesium after the etching step, and performing a heat treatment on the p-type semiconductor layer together with the deposited protective film;
A peeling step for peeling off the protective film;
And a method of manufacturing a semiconductor laser device, comprising: forming an electrode in contact with the ridge portion. A semiconductor layer stacking step of forming a stacked semiconductor layer including a semiconductor layer of a first conductivity type made of a group III-V nitride semiconductor on a substrate;
An insulating film deposition step of depositing an insulating film on the semiconductor layer of the first conductivity type;
An insulating film etching step of etching a part of the insulating film to expose the semiconductor layer of the first conductivity type;
A damage recovery step of depositing a protective film containing an element serving as a dopant of the first conductivity type on the exposed portion of the semiconductor layer of the first conductivity type, and heat-treating the stacked semiconductor layer together with the deposited protective film;
A peeling step of peeling off at least part of the protective film to expose the electrode forming region;
And a method of manufacturing a semiconductor device, comprising: an electrode forming step of forming an electrode on the electrode forming region.

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