JP4471986B2 - Manufacturing method of semiconductor device - Google Patents

Description

The present invention is related to producing how the semiconductor device.

  In recent years, with the integration of semiconductor devices, semiconductor devices (multi-oxide) in which elements having different gate insulating film thicknesses are integrated in one chip have been developed. A conventional method for manufacturing a semiconductor device having multioxide will be described below with reference to FIGS.

  As shown in FIG. 8A, after the element isolation region 112 is formed on the silicon substrate 100, an oxide film 114 and an oxide film 116 are formed by a thermal oxidation method. Subsequently, as shown in FIG. 8B, a resist layer 118 is formed on the oxide film 116.

  In this state, as shown in FIG. 8C, wet etching is performed using, for example, buffered hydrofluoric acid (BHF). As a result, the oxide film 114 is removed as shown in FIG. Subsequently, as shown in FIG. 9A, a removing liquid is applied. As a result, the resist layer 118 is removed as shown in FIG. Next, as shown in FIG. 9 (c), particulate contamination components (particles) on the surface of the silicon substrate 100 are washed and removed with an ammonia-hydrogen peroxide mixture (APM), and then metal is diluted with dilute hydrofluoric acid (DHF). Wash away etc.

  Subsequently, as shown in FIG. 9D, an oxide film 122 is formed by a thermal oxidation method. As a result, as shown in FIG. 9E, two gate insulating films 126 and 128 having different film thicknesses are formed.

JP 2000-3965 A (page 3, FIGS. 57 to 62) Omi Tadahiro, “Ultra Clean ULSI Technology”, Baifukan Co., Ltd., 1995, p156-157

  Here, generally, as the removing solution for removing organic substances such as the resist layer 118, for example, a sulfuric acid hydrogen peroxide solution (SPM) mainly composed of a sulfuric acid component heated to 100 ° C. or more is used (for example, Non-patent document 1). However, when SPM containing a sulfuric acid component and hydrogen peroxide is used when removing the resist layer 118, a chemical oxide film 120 is formed on the surface of the silicon substrate 100 as shown in FIG. It becomes difficult to control the thickness of the insulating film to be thin. Further, if moisture remains on the surface of the silicon substrate 100, a stain such as a watermark is formed, and it is difficult to control the uniformity of the film.

  By the way, with the recent miniaturization of semiconductor devices, it is required to improve the switching speed by shortening the gate length of the transistor. As the gate length of the transistor is shortened, the thickness of the gate insulating film needs to be reduced. Therefore, a technique capable of controlling the thickness of the gate insulating film to be thin is required.

Further, while a technique for reducing the thickness of the gate insulating film is demanded, there is a problem that when the thickness of the gate insulating film is reduced, the gate leakage current becomes so large that it cannot be ignored. For this reason, by using an insulating film (high-k film) having a higher relative dielectric constant than the conventionally used silicon oxide film (SiO ₂ ) as the gate insulating film, the physical film thickness is increased while maintaining the dielectric characteristics. It is considered to be.

  However, the high-k film generally has a problem of low heat resistance, and when the high-k film is directly formed on the silicon substrate, the device characteristics are caused by the reaction between the high-k film and the silicon substrate during heat treatment. May deteriorate. For this reason, it has been proposed that a silicon oxide film be interposed between the high-k film and the silicon substrate to reduce such deterioration in device characteristics (for example, Japanese Patent Application Laid-Open No. 2001-274378). In this case, in order to maintain the gate drive capability, it is preferable to control the silicon oxide film to be as thin as possible.

According to the present invention,
On a semiconductor substrate, forming a high dielectric constant insulating film is an oxide film containing silicon oxide film dielectric constant than is rather high, zirconium or hafnium,
Forming a conductive film on the high dielectric constant insulating film;
Forming a protective film patterned into a predetermined shape on the conductive film;
Using the protective film as a mask, selectively removing the conductive film by dry etching and selectively removing the high dielectric constant insulating film by dry etching halfway so as not to expose the semiconductor substrate;
Removing the protective film;
The high dielectric constant insulating film is selectively removed by wet etching using a chemical solution containing a fluorinated compound that is BHF or DHF and mainly composed of isopropyl alcohol , and is formed into the predetermined shape. A step of exposing a portion;
A method for manufacturing a semiconductor device is provided.

Here, the semiconductor substrate can be composed of an elemental semiconductor such as Si or Ge, a compound semiconductor such as GaAs, GaN, InP, CdS, or SiC, or a mixed crystal semiconductor such as InGaAs or HgCdTe. The surface of the semiconductor substrate is the main surface of the semiconductor substrate. “Main component” refers to a component having the largest volume content in a chemical solution. Here, the chemical liquid can mainly contain a non-aqueous solvent. Chemical solution can include water, hydrofluoric acid-based component, we have preferred to the free of sulfuric acid based component or hydrogen peroxide.

  In this way, when the surface of the semiconductor substrate is exposed, it is possible to prevent water from adhering to the surface, thereby preventing the formation of a film such as a chemical oxide film or a watermark on the surface of the semiconductor substrate. be able to.

In the method for manufacturing a semiconductor device of the present invention, the protective film can be a resist film, and the protective film can be removed with sulfuric acid hydrogen peroxide (SPM) in the step of removing the protective film.
The method for manufacturing a semiconductor device of the present invention may further include a step of cleaning the surface of the semiconductor substrate with isopropyl alcohol after the step of exposing a part of the surface of the semiconductor substrate.

Protective film Ru can be formed by the resist layer.

In the method for manufacturing a semiconductor device of the present invention, the step of forming the insulating film can include a step of forming a high dielectric constant insulating film composed of a material having a higher relative dielectric constant than the silicon oxide film. The process of removing a part of the high dielectric constant insulating film by dry etching using the protective film as a mask, the process of removing the protective film, and the process of removing the protective film and the high dielectric by wet etching using the conductive film as a mask selectively removing the remaining percentage insulating film may include wet etching, Ru can be accomplished using a removal solution mainly composed of organic solvent comprises a fluorinated compound.

  According to the present invention, a step of forming an insulating film including at least a high dielectric constant insulating film having a relative dielectric constant higher than that of a silicon oxide film on a semiconductor substrate, the insulating film including a fluorinated compound, and an organic solvent as a main component. And a step of selectively removing the surface of the semiconductor substrate by wet etching using a chemical liquid as a component to expose a part of the surface of the semiconductor substrate.

The method for manufacturing a semiconductor device of the present invention may further include a step of forming an element isolation region on the semiconductor substrate before the step of forming the insulating film. In the step of removing the insulating film, the surface of the semiconductor substrate but it may also be exposed.

Here , the high dielectric constant insulating film may be a film containing a 3A group element, a 3B group element, or a 4A group element. A so-called high-k film can be selected as a film containing a group 3A element, a group 3B element, or a group 4A element. Examples of such a film material include zirconium, hafnium, lanthanoid, aluminum, indium, gallium, and oxides thereof. That is, examples include Zr, Hf, Pr, La, Lu, Eu, Yb, Sm, Ho, Ce, Al, In, Ga, and oxides thereof. _{Specifically, ZrO x, HfO x, HfAlO} x, Al 2 O 3, In 2 O 3, Ga 2 O 3 and the like. Among these, ZrO _x , HfO _x , and HfAlO _x are particularly preferable from the viewpoints of characteristics and suitability for semiconductor processes. Further, as a high-k film, for example, barium titanate (BaSrTiO ₃ ), titanium oxide (TiO ₂ ), tantalum oxide (Ta ₂ O ₅ ), silicon nitride (Si ₃ N ₄ ), silicon nitride oxide (SiON), Alternatively, a material having a relative dielectric constant larger than that of the silicon oxide film (3.9 to 4.5) such as alumina (Al ₂ O ₃ ) can be used.

In the method for manufacturing a semiconductor device of the present invention, the organic solvent is preferably a solvent having a polar group. Here, the polar group is a group containing an atom having an electronegativity different from that of carbon, such as a hydroxyl group, an ether bond group, a carbonyl group, or a carboxyl group. Examples of the solvent having a polar group include alcohols such as isopropyl alcohol, isobutyl alcohol, ethylene glycol, and t-butyl alcohol;
Ethers such as glycol ether and propylene glycol monomethyl ether;
Ketones such as cyclopentanone, cyclohexanone, methyl ethyl ketone, 2-heptanone;
Esters such as propylene glycol monomethyl acetate;
Can be used.
Among these, it is preferable to use a solvent containing one or more selected from the group consisting of isopropyl alcohol, ethylene glycol, 2-heptanone, cyclopentanone, methyl ethyl ketone, glycol ether, propylene glycol monomethyl ether, or propylene glycol monomethyl acetate, Isopropyl alcohol is particularly preferable. By using such a solvent, adhesion of a film such as a chemical oxide film to the surface of the semiconductor substrate and formation of a stain such as a watermark can be prevented. The organic solvent is preferably a hydrophilic solvent.

  In the method for manufacturing a semiconductor device of the present invention, the organic solvent may be isopropyl alcohol, and the chemical solution may contain 90% by volume or more of isopropyl alcohol.

  In the method for manufacturing a semiconductor device of the present invention, an i-line resist film can be used as the protective film.

  In the method for manufacturing a semiconductor device of the present invention, the protective film can be made of a material that is not dissolved by buffered hydrofluoric acid.

According to the present invention, the thickness of a film formed on a semiconductor substrate can be controlled to be thin. Further, according to the present invention, Ru prevents the stains, such as coating or watermark is formed on the semiconductor substrate surface.

  Hereinafter, embodiments of a semiconductor device manufacturing method of the present invention will be described in detail with reference to the drawings. Here, each drawing schematically shows components of a semiconductor device in order to facilitate understanding of the present invention.

(First embodiment)
1 and 2 are process diagrams showing a method for manufacturing a semiconductor device in the first embodiment of the present invention. In this embodiment mode, the present invention is applied to manufacturing gate insulating films having different thicknesses.

  As shown in FIG. 1A, after the element isolation region 12 is formed on the silicon substrate 10, the first oxide film 14 (for example, film thickness) is formed on the first region 13a and the second region 13b by thermal oxidation. 5.0 nm) and a second oxide film 16 (for example, a film thickness of 5.0 nm) are formed. Here, the element isolation region 12 is formed by a shallow trench isolation method (STI method), and is composed of an oxide film formed by a thermal oxidation method and a CVD method. Subsequently, as shown in FIG. 1B, a resist layer 18 is formed on the second oxide film 16. The resist layer 18 is an i-line resist film. The resist layer 18 is formed by applying an i-line resist film on the second oxide film 16 and irradiating i-line from a xenon-mercury lamp light source (not shown) using a pattern formation mask (not shown). The i-line resist film is exposed and developed. In this state, as shown in FIG. 1C, wet etching is performed using buffered hydrofluoric acid (BHF). As a result, as shown in FIG. 1D, the first oxide film 14 is removed.

  Subsequently, as shown in FIG. 2A, isopropyl alcohol (IPA) is allowed to act at room temperature, and the resist layer 18 is removed by wet etching. Here, the wet etching can be performed by a dipping method or a single wafer method. As a result, the resist layer 18 is dissolved in IPA, and the resist layer 18 is removed as shown in FIG. Next, particulate contamination components (particles) on the surface of the silicon substrate 10 are washed away with an ammonia-hydrogen peroxide mixture (APM), and then the metal is washed away with dilute hydrofluoric acid (DHF). At this time, a thin chemical oxide film 20 (for example, a film thickness of 0.9 nm) is formed on the surface of the silicon substrate 10 (FIG. 2C).

  Subsequently, as shown in FIG. 2D, a third oxide film 22 (for example, a film thickness of 0.8 nm) is formed by RTO (rapid thermal oxidation). As a result, as shown in FIG. 2E, the two gate insulating films having different film thicknesses, the first gate insulating film 26 (for example, a film thickness of 0.8 nm) and the second gate insulating film 28 (for example, a film thickness) 5 nm) is formed.

  In this embodiment, since the resist layer 18 is removed by IPA, a chemical oxide film does not adhere to the surface of the silicon substrate 10 when the resist layer 18 is removed, and a thin chemical oxide film 20 is formed during cleaning with APM and DHF. It is only done. Therefore, when the third oxide film 22 is subsequently formed by RTO, the film thickness can be controlled to be thin. In addition, since a stain such as a watermark is not formed on the surface of the silicon substrate 10, the uniformity of the third oxide film 22 can be controlled. Thus, the first gate insulating film 26 having a thin and uniform thickness can be formed. In addition, since the resist layer 18 can be removed by applying IPA at normal temperature, a simple process can be stably produced for gate insulating films having different thicknesses.

(Second embodiment)
3 and 4 are process diagrams showing a method for manufacturing a semiconductor device in the second embodiment of the present invention. In the present embodiment, the present invention is applied to an example in which a high dielectric constant insulating film is formed on the first gate insulating film 26 and the second gate insulating film 28 having different film thicknesses as shown in FIG. .

In the first embodiment, the first gate insulating film 26 and the second gate insulating film are formed on the silicon substrate 10 on which the element isolation region 12 is formed in the same manner as described with reference to FIGS. A film 28 is formed (FIG. 3A). Subsequently, as shown in FIG. 3B, an atomic layer chemical vapor deposition (ALCVD) or metal-organic chemical vapor deposition (MOCVD) is formed on the entire surface of the silicon substrate 10. A high dielectric constant insulating film 30 (for example, a film thickness of 3 nm) is formed by a CVD method such as chemical vapor deposition) or a sputtering method. The high dielectric constant insulating film 30 has a relative dielectric constant higher than that of a silicon oxide film (3.9 to 4.5) such as hafnium oxide (HfO ₂ ), zirconium oxide (ZrO ₂ ), HfAlO _x film, etc. It can be made of a large material. Further, a polycrystalline silicon 31 (for example, a film thickness of 200 nm) is formed on the upper surface of the high dielectric constant insulating film 30.

  Subsequently, as shown in FIG. 3C, a resist layer 32 is formed on the polycrystalline silicon 31. Thereafter, as shown in FIG. 3D, the polycrystalline silicon 31 and the high dielectric constant insulating film 30 are selectively removed stepwise by dry etching using the resist layer 32 as a mask. After etching halfway through the high dielectric constant insulating film 30, SPM is applied.

Thereby, as shown in FIG. 4A, the resist layer 32 is removed. Subsequently, as shown in FIGS. 4B and 4C, the high dielectric constant insulating film 30, the first gate insulating film 26, and the second gate insulating film are formed by wet etching using the polycrystalline silicon 31 as a mask. The film 28 is selectively removed. At this time, BHF can be used as an etchant. Further, as an etching solution, a chemical solution obtained by adding a fluorinated compound to an organic solvent such as IPA, a phosphoric acid aqueous solution, a sulfuric acid aqueous solution, or the like can be used. Examples of the phosphoric acid aqueous solution, Ru can be used hot phosphoric acid. After this, rinse the surface of the silicon substrate 10 in the IPA. Thereby, moisture remaining on the surface of the silicon substrate 10 can be removed, and formation of a watermark on the surface of the silicon substrate 10 can be prevented.

  By the above processing, the third gate insulating film 38 constituted by the first gate insulating film 26 and the high dielectric constant insulating film 30 formed on the upper surface, the second gate insulating film 28 and the second gate insulating film 28 are formed thereon. The fourth gate insulating film 40 constituted by the high dielectric constant insulating film 30 thus manufactured can be manufactured.

  In the present embodiment, when the silicon substrate 10 immediately after the production of the third gate insulating film 38 and the fourth gate insulating film 40 is exposed, the surface of the silicon substrate 10 is cleaned with IPA. It is possible to remove water remaining in the water. Thereby, it is possible to prevent a watermark from being formed on the surface of the silicon substrate 10.

(Third embodiment)
This embodiment relates to a method for manufacturing a transistor formed in an element formation region. Hereinafter, a description will be given with reference to FIGS. 5 and 6.

  As shown in FIG. 5A, an oxide insulating film 52 (for example, a film thickness of 0.8 nm) is formed on a silicon substrate 50 by a thermal oxidation method, and a high dielectric constant insulating film 54 is formed thereon by a CVD method or a sputtering method. (For example, a film thickness of 2.0 nm) is formed, and then a polycrystalline silicon layer 56 (for example, a film thickness of 200 nm) is formed thereon by a CVD method.

  Subsequently, as shown in FIG. 5B, a resist film is formed on the polycrystalline silicon layer 56, and a resist layer 58 is formed using a lithography technique using an ArF excimer laser. Thereafter, as shown in FIGS. 5C and 5D, using the resist layer 58 as a mask, the polycrystalline silicon layer 56 and the high dielectric constant insulating film 54 are selectively removed stepwise by dry etching. After etching to the middle of the high dielectric constant insulating film 54, the resist layer 58 is removed by SPM (FIG. 6A).

  Subsequently, using the polycrystalline silicon layer 56 as a mask, the remainder of the high dielectric constant insulating film 54 and the oxide insulating film 52 are selectively removed by wet etching. (FIG. 6 (b) and FIG. 6 (c)). At this time, BHF or DHF can be used as an etchant. Further, as an etching solution, a chemical solution obtained by adding a fluorinated compound to an organic solvent such as IPA, a phosphoric acid aqueous solution, a sulfuric acid aqueous solution, or the like can be used. Here, hot phosphoric acid can be used as the phosphoric acid aqueous solution. Thereby, the gate insulating film 60 constituted by the oxide insulating film 52 and the high dielectric constant insulating film 54 can be manufactured.

  Thereafter, the surface of the silicon substrate 50 is rinsed with IPA. Thereby, moisture remaining on the surface of the silicon substrate 50 can be removed, and formation of a watermark on the surface of the silicon substrate 50 can be prevented.

  Subsequently, after the sidewall 64 is formed, ion implantation is performed on the surface of the silicon substrate 50. As a result, impurity regions 62 are formed at both ends of the lower region of the polycrystalline silicon layer 56 and the gate insulating film 60 (FIG. 6D). Subsequently, after forming a metal layer on the entire surface of the silicon substrate 50 and siliciding a portion in contact with the polycrystalline silicon layer 56 and the impurity region 62, the other metal layer is removed to obtain a gate electrode, a source and a drain region. A metal silicide layer is formed on (not shown). As the gate electrode, a poly SiGe layer can be used instead of the polycrystalline silicon layer 56.

  Thus, when ion implantation is performed on the surface of the silicon substrate 50, if moisture remains on the surface of the silicon substrate 50, a watermark is formed and the ion implantation conditions become non-uniform. In the present embodiment, since the moisture on the surface of the silicon substrate 50 is removed using IPA prior to ion implantation, the impurity region 62 can be formed under uniform conditions.

  EXAMPLES The present invention will be specifically described below with reference to examples, but the present invention is not limited to these.

The first gate insulating film 26 and the second gate insulating film 28 were manufactured in the same manner as described with reference to FIGS. 1 and 2 in the first embodiment.
At that time, the thickness of the oxide film in the region where the first gate insulating film 26 is formed is
(1) After removing the resist layer 18 by IPA shown in FIG.
(2) After cleaning the surface of the silicon substrate 10 with APM and DHF shown in FIG.
(3) After the RTO shown in FIG.
It measured about each of. The film thickness was measured with an ellipsometer.

  For comparison, the thickness of the oxide film in the formation region of the first gate insulating film 26 when the removal of the resist layer 18 of (1) was performed using SPM was also measured in the same manner.

  FIG. 7 is a graph showing the measurement results. After removal of the resist layer 18 in (1), no oxide film was formed on the surface of the silicon substrate 10 when IPA was used. However, when SPM was used, 1.2 nm of chemical oxidation was performed on the surface of the silicon substrate 10. A film was formed. Thereafter, when cleaning with (2) APM and DHF was performed, an oxide film of about 0.9 nm was formed on the surface of the silicon substrate 10 even when the resist layer 18 was removed by IPA. Subsequently, when the RTO of (3) is performed, the chemical oxide film thus formed contracts to some extent. When the resist layer 18 is removed by IPA, the thickness of the oxide film becomes 0.8 nm. When the resist layer 18 was removed, the thickness of the oxide film was 1.0 nm. Thus, when the resist layer 18 is removed using IPA, the thickness of the first gate insulating film 26 is reduced by about 0.2 nm compared to the comparative example in which the resist layer 18 is removed using SPM. I was able to. Further, when the same measurement was repeated, the film thickness of the first gate insulating film 26 could be controlled with good reproducibility.

  As described above, the thickness of the first gate insulating film 26 is equal to the thickness of the oxide film formed when the resist layer 18 is removed and the thickness of the oxide film formed when the silicon substrate 10 is cleaned with APM and DHF. Dependent. In the conventional technique of removing the resist layer 18 using SPM, a thick oxide film is formed on the surface of the silicon substrate 10 when the resist layer 18 is removed due to the influence of SPM. On the other hand, in the method of removing the resist layer 18 using IPA, an oxide film is not formed on the surface of the silicon substrate 10 when the resist layer 18 is removed. Therefore, by removing the resist layer 18 using IPA, the film thickness of the first gate insulating film 26 finally formed can be reduced as compared with the case where SPM is used.

It is process drawing which shows the manufacturing method of the semiconductor device in embodiment. It is process drawing which shows the manufacturing method of the semiconductor device in embodiment. It is process drawing which shows the manufacturing method of the semiconductor device in embodiment. It is process drawing which shows the manufacturing method of the semiconductor device in embodiment. It is process drawing which shows the manufacturing method of the semiconductor device in embodiment. It is process drawing which shows the manufacturing method of the semiconductor device in embodiment. It is a graph which shows the measurement result of the film thickness of the oxide film in each process at the time of using IPA for cleaning removal of a resist layer, and when using SPM. It is process drawing which shows the manufacturing method of the conventional semiconductor device. It is process drawing which shows the manufacturing method of the conventional semiconductor device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Silicon substrate 12 Element isolation area | region 13a 1st area | region 13b 2nd area | region 14 1st oxide film 16 2nd oxide film 18 Resist layer 20 Chemical oxide film 22 3rd oxide film 26 1st gate insulating film 28 Second gate insulating film 30 High dielectric constant insulating film 31 Polysilicon layer 32 Resist layer 38 Third gate insulating film 40 Fourth gate insulating film 50 Silicon substrate 52 Oxide insulating film 54 High dielectric constant insulating film 56 Polycrystalline silicon Layer 58 Resist layer 60 Gate insulating film 62 Impurity region 64 Side wall

Claims (6)

On a semiconductor substrate, forming a high dielectric constant insulating film is an oxide film containing silicon oxide film relative dielectric constant than is rather high, zirconium or hafnium,
Forming a conductive film on the high dielectric constant insulating film;
Forming a protective film patterned into a predetermined shape on the conductive film;
Using the protective film as a mask, selectively removing the conductive film by dry etching and selectively removing the high dielectric constant insulating film by dry etching halfway so as not to expose the semiconductor substrate;
Removing the protective film;
The high dielectric constant insulating film is selectively removed by wet etching using a chemical solution containing a fluorinated compound that is BHF or DHF and mainly composed of isopropyl alcohol , and is formed into the predetermined shape. A step of exposing a portion;
A method of manufacturing a semiconductor device including: In the manufacturing method of the semiconductor device according to claim 1,
The method of manufacturing a semiconductor device, wherein the high dielectric constant insulating film is a hafnium oxide (HfO ₂ ), zirconium oxide (ZrO ₂ ), or HfAlO _x film. In the manufacturing method of the semiconductor device according to claim 2,
The method for manufacturing a semiconductor device, wherein the high dielectric constant insulating film is hafnium oxide (HfO ₂ ). In the manufacturing method of the semiconductor device in any one of Claim 1 to 3,
Before SL chemical solution, a method of manufacturing a semiconductor device including isopropyl alcohol 90% by volume or more. In the manufacturing method of the semiconductor device in any one of Claim 1 to 4,
The method for manufacturing a semiconductor device, wherein the protective film is a resist film, and the protective film is removed with sulfuric acid hydrogen peroxide (SPM) in the step of removing the protective film. In the manufacturing method of the semiconductor device in any one of Claim 1 to 5,
A method of manufacturing a semiconductor device, further comprising a step of cleaning the surface of the semiconductor substrate with isopropyl alcohol after the step of exposing a part of the surface of the semiconductor substrate.

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