JP4024458B2 - Method for mounting semiconductor device and method for manufacturing semiconductor device package - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device mounting method and a semiconductor device mounting body manufacturing method in which a semiconductor device is flip-chip connected on a substrate, and more particularly, a semiconductor device mounting method and a semiconductor device mounting body manufacturing method for improving productivity. About.
[0002]
[Prior art]
Substrates (semiconductor device mounting bodies) including semiconductor devices used in portable devices and the like are required to be further reduced in size and weight. Further, in order to improve the performance of such equipment, the semiconductor device mounting body is required to have excellent electrical characteristics. As a connection technology between a semiconductor device and a substrate that satisfies these requirements at the same time, a flip chip method has been adopted.
[0003]
The flip-chip technique is a technique in which bump electrodes are formed on electrode pads of a semiconductor device (semiconductor chip) and bonded to the pads provided on the substrate side in alignment. Thereby, the mounting area is basically equal to the area of the semiconductor chip. In addition, since a wire such as a bonding wire is not used, excellent electrical characteristics can be ensured even when the wiring length is short and the operating frequency is high.
[0004]
Here, an example of conventional flip chip connection will be described with reference to FIG. FIG. 7 is a diagram for explaining a process flow of conventional flip chip connection.
[0005]
First, as shown in FIG. 1A, an insulating layer 113 including conductive particles 114 is formed on a substrate 111 provided with a pad 112. Next, as shown in FIG. 4B, the semiconductor chip 115 on which the bump 116 is formed is aligned with the pad 112 on the substrate 111 and vacuum-adsorbed by the bonding head 117 with a heating / pressurizing mechanism. And mounted on the substrate 111.
[0006]
At this time, as shown in FIG. 4C, a part of the conductive particles 114 is fixed between the bump 116 and the pad 112 by applying a weight, and an electrical connection between them is established. Moreover, the insulating layer 113 is hardened by heating simultaneously. As a result, the semiconductor chip 115 and the substrate 111 are connected.
[0007]
After the semiconductor chip 115 and the substrate 111 are connected, an insulating resin layer 118 is formed so as to cover the semiconductor chip 115 and cured as shown in FIG. Thereby, the substrate 111 in which the semiconductor chip 115 is sealed with the insulating resin layer 142 is obtained.
[0008]
Next, an example of a conventional flip chip connection different from the above will be described with reference to FIG. FIG. 8 is a diagram illustrating a conventional flip chip connection process flow different from the above.
[0009]
First, an insulating layer 113 is formed on a substrate 111 provided with a pad 112, as shown in FIG. Here, a low melting point metal layer 121 is formed on the upper surface side of the pad 112. Next, as shown in FIG. 4B, the semiconductor chip 115 on which the bump 116 is formed is aligned with the pad 112 on the substrate 111 and vacuum-adsorbed by the bonding head 117 with a heating / pressurizing mechanism. And mounted on the substrate 111.
[0010]
At this time, as shown in FIG. 6C, the bump 116 is applied to the low melting point metal layer 121 on the upper surface side of the pad 112 while applying an applied weight to destroy the oxide film existing on the surface of the low melting point metal layer 121. Let me rub you in. Further, by heating, an alloy 122 of the metal of the low melting point metal layer 121 and the bump 116 is formed at the joint portion, and an electrical connection between them is established. At the same time, the insulating layer 113 is cured by heating. As a result, the semiconductor chip 115 and the substrate 111 are connected.
[0011]
After the semiconductor chip 115 and the substrate 111 are connected, an insulating resin layer 118 is formed so as to cover the semiconductor chip 115 and cured as shown in FIG. Thereby, the substrate 111 in which the semiconductor chip 115 is sealed with the insulating resin layer 142 is obtained.
[0012]
[Problems to be solved by the invention]
In the conventional flip chip technology described above, when the semiconductor chip 115 is mounted on the substrate 111, the insulating layer 113 is hardened and the semiconductor chip 115 and the substrate 111 are fixedly connected. This process usually requires about 20 seconds or more for each semiconductor chip because the resin used for the insulating layer 113 is cured. Therefore, it has become an obstacle to improving productivity.
[0013]
The present invention has been made in consideration of the above-described circumstances, and is necessary for mounting a semiconductor device on a substrate in a mounting method of a semiconductor device in which a semiconductor device is flip-chip connected on a substrate and a manufacturing method of a semiconductor device mounting body. It is an object of the present invention to provide a method for mounting a semiconductor device and a method for manufacturing a semiconductor device mounting body that reduce productivity and improve productivity.
[0014]
[Means for Solving the Problems]
To solve the above problems, a method of producing the mounting method or mounting the semiconductor device of the semiconductor device according to the present invention, first on the substrate with the path head having an alloy layer containing tin layer or tin on the upper surface forming a first insulating resin layer, in the first said substrate having an insulating resin layer is formed of, Ru contacting the collision force electrode of the semiconductor device to the pad of the substrate plus the weighted semiconductor device Forming and curing a second insulating resin layer so as to cover the semiconductor device using a transfer mold that includes heating, pressing, and simultaneously curing the first insulating resin layer by the heating; and and having a said that cause tin layer or alloy of the tin layer or the alloy layer and the protrusion electrode to the junction between the alloy layer and the protruding electrode process.
[0015]
After forming a first insulating resin layer on a substrate having a to be connected to the protruding electrodes of the semiconductor device to be mounted pad and weighted addition to semi-conductor device contacting the projecting electrodes of that to the pad. There is a tin layer or an alloy layer containing tin on the pad. Later, heating, using a transfer molding with pressure, forming and hardening the second insulating resin layer so as to cover the semiconductor device, at the same time, the first Suzu Shikatsu cured insulating resin layer by heating An alloy of the tin layer or the alloy layer and the protruding electrode is formed at the joint between the layer or the alloy layer and the protruding electrode .
[0016]
Thus, as it can be cured first insulating resin layer while forming and hardening the second insulating resin layer, thus, the semiconductor device of the first insulating resin layer which is required upon mounting the substrate The time required for curing can be greatly reduced and productivity can be improved.
[0018]
Examples of the low melting point metal include tin (Sn) and tin-based alloys (Sn—Pb, Sn—Bi, Sn—Ag, Sn—In, etc.).
[0021]
The size of the substrate may be comparable to the size of the semiconductor device (chip) or may be large enough to mount a plurality of semiconductor devices. When the size is comparable to the size of the semiconductor device, it is positioned as a kind of semiconductor package that seals the semiconductor device. When the size is such that a plurality of semiconductor devices are mounted, electronic components are mounted. High-density mounting of the semiconductor device on the substrate is realized.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0023]
First, FIG. 1 is a diagram schematically illustrating a process flow of flip chip connection which is a reference example of the present invention. In the figure, the process proceeds in the order of (a), (b), and (c). FIG. 2 is a continuation diagram of FIG. 1 and schematically illustrates a process flow of flip chip connection which is a reference example of the present invention. In FIG. 2, the process proceeds in the order of (a), (b), and (c) following FIG. 1 (c).
[0024]
First, as shown in FIG. 1A, an insulating layer 13 including conductive particles 14 is formed on a substrate 11 provided with a pad 12. As such an insulating layer 13, either a film type or a paste type can be used. The pad 12 can be obtained, for example, by patterning a copper film, and has a thickness of several μm to several tens of μm and a diameter of about 100 μm, for example. The surface of the pad 12 may be plated with gold.
[0025]
Next, as shown in FIG. 2B, the semiconductor chip 15 on which the bump (projection electrode) 16 is formed is aligned with the pad 12 on the substrate 11, and a bonding head 17 with a heating / pressurizing mechanism is provided. Then, vacuum suction is performed and mounted on the substrate 11. Here, the diameter of the bump 16 is slightly smaller than the pad 12 on the substrate 11 side and is about several tens of μm, and the height of the bump 16 is, for example, several tens of μm.
[0026]
The substrate 11 may be made of a flexible material such as a polyimide film or a rigid material such as glass epoxy. A polyimide substrate having a thickness of about several tens of μm can be used, and a glass epoxy substrate having a thickness of about 1 mm can be used. In addition to the through-hole substrate, the substrate 11 may be a multilayer substrate such as a build-up substrate.
[0027]
The size of the substrate 11 may be comparable to the size of the semiconductor chip 15 or may be large enough to mount a plurality of semiconductor devices. When the semiconductor device is large enough to be mounted, high-density mounting of the semiconductor chip 15 on the substrate on which electronic components are mounted is realized.
[0028]
When the semiconductor chip 15 is vacuum-adsorbed by the bonding head 17 and mounted on the substrate 11, one of the conductive particles 14 is placed between the bump 16 and the pad 12 by applying a weight as shown in FIG. Fix the parts and establish the electrical connection between them. At the same time, auxiliary heating is performed, but the time is extremely short (for example, 5 seconds), and curing of the insulating layer 13 is not completed. As a result, the semiconductor chip 15 and the substrate 11 are temporarily connected. And it transfers to the next process.
[0029]
After the semiconductor chip 15 and the substrate 11 are temporarily connected, an insulating resin layer is formed so as to cover and seal from the semiconductor chip 15 to the surface of the substrate 11. For this reason, as shown in FIG. 2A, an upper mold 42 for introducing the insulating resin 43 is placed on the semiconductor chip 15 with a gap for introducing resin and removing air, and on the lower side of the substrate 11. Cover the lower mold 41. Then, the insulating resin 43 is introduced from one of the gaps.
[0030]
Such a method for forming an insulating resin layer is called transfer molding, but in order to introduce the insulating resin from the gap, it is usually necessary to press the resin continuously into the gap of the mold 42. An introduction path is provided integrally with the mold 42. There is a pot at the end of the introduction path, and a pellet (solid insulating resin) is put into the pot, and the pellet is pressurized in the pot by the plunger and pushed out to the introduction path.
[0031]
When the upper mold 42 is filled with the insulating resin 43, the insulating resin 43 is cured by applying heat or the like, and the insulating resin 43 is fixed as shown in FIG. Finally, as shown in FIG. 2C, the molds 41 and 42 are removed to obtain the substrate 11 on which the insulating resin layer is formed. Here, the height from the upper surface of the substrate 11 to the upper surface of the insulating resin 42 is, for example, several hundred μm. 2A and 2B, the insulating resin 43 is injected from the side surface of the semiconductor chip 15, but it goes without saying that it may be injected from the upper surface.
[0032]
The insulating resin layer can be formed by potting or printing in addition to such a transfer mold.
[0033]
In the case of potting and printing, the insulating resin layer is formed and then heated to be cured, and in addition, the insulating layer 13 is simultaneously heated by heat conduction to completely connect the substrate 11 and the semiconductor chip 15. .
[0034]
In the case of transfer molding, heat and pressure (for example, 180 ° C., 10 MPa) are applied when forming the insulating resin layer, and the insulating layer 13 is also cured. Thereby, the board | substrate 11 and the semiconductor chip 15 can be connected completely. Further, in this case, the connection between the substrate 11 and the semiconductor chip 15 is realized in which the certainty is increased by the amount of pressure applied in the case of potting and printing. The time for holding the pressure in the transfer mold is, for example, about 90 seconds. Accordingly, in this case, any material can be used as long as it is cured within 90 seconds as the material of the insulating layer 13.
[0035]
Next , an embodiment of the present invention will be described with reference to FIGS. FIG. 3 is a diagram schematically illustrating a process flow of flip chip connection according to the embodiment of the present invention. In the figure, the process proceeds in the order of (a), (b), and (c). FIG. 4 is a continuation diagram of FIG. 3 and is a diagram schematically illustrating a process flow of flip chip connection according to the embodiment of the present invention. In FIG. 4, the process proceeds in the order of (a), (b), and (c) following FIG. 3 (c), and the components already described are assigned the same numbers.
[0036]
First, as shown in FIG. 1A, an insulating layer 13 is formed on a substrate 11 provided with pads 12. Here, a low melting point metal layer 21 is formed on the upper surface side of the pad 12. Examples of the low melting point metal include tin (Sn) and tin-based alloys (Sn—Pb, Sn—Bi, Sn—Ag, Sn—In, etc.). Next, as shown in FIG. 4B, the semiconductor chip 15 on which the bumps 16 are formed is aligned with the pads 12 on the substrate 11 and is vacuum-adsorbed by a bonding head 17 having a heating / pressurizing mechanism. Mounted on the substrate 11.
[0037]
At this time, as shown in FIG. 6C, the bump 16 is brought into contact with the low melting point metal layer 21 on the upper surface side of the pad 12 by applying a weight. At this time, auxiliary heating is performed for a very short time (for example, 5 seconds), and the generation of the metal 22 of the low-melting-point metal layer 21 and the alloy 22 of the bump 16 at the joint portion is not yet complete. Get electrical connection. At this time, curing of the insulating layer 13 is not completed yet, and thus, the semiconductor chip 15 and the substrate 11 are temporarily connected.
[0038]
After the temporary connection between the semiconductor chip 15 and the substrate 11, a layer of insulating resin 43 is formed so as to cover and seal from the semiconductor chip 15 to the surface of the substrate 11, as shown in FIGS. Form.
[0039]
The formation of the insulating resin 43 is the same as in the reference example described above. However, if this is done by potting or printing for reference , the insulating resin 43 is formed and then heated to be cured and added. Thus, the insulating layer 13 is simultaneously heated by heat conduction, and an alloy 22 between the metal of the low melting point metal layer 21 and the bump 16 is sufficiently formed at the joint portion, so that the substrate 11 and the semiconductor chip 15 can be completely connected. .
[0040]
In the case of transfer molding, heat and pressure (for example, 180 ° C., 10 MPa) are applied when forming the layer of the insulating resin 43 to harden the insulating layer 13 and the alloy of the metal of the low melting point metal layer 21 and the bump 16. 22 is sufficiently generated at the joint. Thereby, the board | substrate 11 and the semiconductor chip 15 can be connected completely. The time for holding the pressure in the transfer mold is, for example, about 90 seconds. Accordingly, in this case, any material can be used as long as it is cured within 90 seconds as the material of the insulating layer 13.
[0041]
Next, FIG. 5 for different reference example as above, will be described with reference to FIG. 5, the a is a diagram schematically illustrating a process flow of the flip-chip connection is a different embodiment. In the figure, the process proceeds in the order of (a), (b), and (c). Figure 6 is a connection diagram of FIG. 5, the A is a diagram schematically illustrating a process flow of the flip-chip bonding is that different reference example. In FIG. 6, the process proceeds in the order of (a), (b), and (c) following FIG. 5 (c), and the same reference numerals are given to the components that have already been described.
[0042]
First, as shown in FIG. 1A, an insulating layer 13 is formed on a substrate 11 provided with pads 12. Next, as shown in FIG. 4B, the semiconductor chip 15 on which the bumps 16 are formed is aligned with the pads 12 on the substrate 11 and is vacuum-adsorbed by a bonding head 17 having a heating / pressurizing mechanism. Mounted on the substrate 11. The surface of the pad 12 may be plated with gold, tin or the like.
[0043]
At this time, as shown in FIG. 3C, the bump 16 is pressed against the upper surface of the pad 12 by applying a weight. At this time, although it is supplementarily heated, it is set to a very short time (eg, 5 seconds). Further, at this time, the curing of the insulating layer 13 is not completed, but the provisional connection between the semiconductor chip 15 and the substrate 11 is thereby established.
[0044]
After the temporary connection between the semiconductor chip 15 and the substrate 11, as shown in FIGS. 6A to 6C, a layer of insulating resin 43 is formed so as to cover and seal from the semiconductor chip 15 to the surface of the substrate 11. Form.
[0045]
The formation of the insulating resin 43 is the same as the reference example and embodiment already described above, but when this is performed by potting or printing, the insulating resin 43 is formed and then heated to be cured, In addition, the insulating layer 13 can also be heated simultaneously by heat conduction to completely connect the substrate 11 and the semiconductor chip 15.
[0046]
In the case of the transfer mold, heat and pressure (for example, 180 ° C., 10 MPa) are applied when forming the layer of the insulating resin 43, whereby the insulating layer 13 is cured and the substrate 11 and the semiconductor chip 15 are completely connected. Can be connected. The time for holding the pressure in the transfer mold is, for example, about 90 seconds. Accordingly, in this case, any material can be used as long as it is cured within 90 seconds as the material of the insulating layer 13.
[0047]
Further, in each of the above reference examples and embodiments, post-cure can be performed after completion of molding. The curing of the insulating layer 13 and the insulating resin 43 can be further advanced by post-cure, and a semiconductor device mounting body with higher reliability can be obtained. Post-curing means to leave at a high temperature after forming a layer of insulating resin 43. For example, it can be left at 180 ° C. for about 4 hours.
[0048]
【The invention's effect】
As described above in detail, according to the present invention , productivity can be improved in a semiconductor device mounting method and a semiconductor device mounting body manufacturing method .
[Brief description of the drawings]
FIG. 1 is a diagram schematically illustrating a process flow of flip chip connection which is a reference example of the present invention.
FIG. 2 is a continuation diagram of FIG. 1 and schematically illustrates a process flow of flip chip connection which is a reference example of the present invention.
FIG. 3 is a diagram schematically illustrating a process flow of flip chip connection according to an embodiment of the present invention.
FIG. 4 is a continuation diagram of FIG. 3, schematically illustrating a process flow of flip chip connection according to an embodiment of the present invention.
5 is a diagram schematically illustrating a process flow of the flip-chip connection is a different reference example described above.
[6] A connection diagram of FIG. 5, a diagram of the process flow of the flip-chip bonding will be explained schematically is that different reference example described above.
FIG. 7 is a diagram for explaining a process flow of conventional flip chip connection.
FIG. 8 is a diagram illustrating a conventional flip chip connection process flow different from the above.
[Explanation of symbols]
11 Substrate 12 Pad 13 Insulating layer 14 Conductive particle 15 Semiconductor chip 16 Bump 17 Bonding head 21 Low melting point metal layer 22 Alloy 41 Lower mold 42 Upper mold 43 Insulating resin

Claims (2)

Forming a first insulating resin layer on a substrate having a Pas head having an alloy layer containing tin layer or tin on the upper surface,
In the first the substrate having an insulating resin layer is formed of a step of Ru contacting the collision force electrode of the semiconductor device to the pad of the substrate by weight was added to the semiconductor device,
Using a transfer mold with heating and pressurization, a second insulating resin layer is formed and cured so as to cover the semiconductor device, and at the same time, the first insulating resin layer is cured by the heating and the tin layer. process and or that cause an alloy of the tin layer or the alloy layer and the protrusion electrode to the junction between the protruding electrode and the alloy layer
A method for mounting a semiconductor device, comprising: Forming a first insulating resin layer on a substrate having a Pas head having an alloy layer containing tin layer or tin on the upper surface,
In the first the substrate having an insulating resin layer is formed of a step of Ru contacting the collision force electrode of the semiconductor device to the pad of the substrate by weight was added to the semiconductor device,
Using a transfer mold with heating and pressurization, a second insulating resin layer is formed and cured so as to cover the semiconductor device, and at the same time, the first insulating resin layer is cured by the heating and the tin layer. or a method of manufacturing a semiconductor device mounting body and having a that causes an alloy of the tin layer or the alloy layer and the protrusion electrode to the junction between the protruding electrode and the alloy layer step.

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