JP3482840B2 - Method for manufacturing semiconductor device - Google Patents
Method for manufacturing semiconductor deviceInfo
- Publication number
- JP3482840B2 JP3482840B2 JP27139897A JP27139897A JP3482840B2 JP 3482840 B2 JP3482840 B2 JP 3482840B2 JP 27139897 A JP27139897 A JP 27139897A JP 27139897 A JP27139897 A JP 27139897A JP 3482840 B2 JP3482840 B2 JP 3482840B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- semiconductor element
- thermosetting resin
- wiring board
- protruding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Landscapes
- Wire Bonding (AREA)
Description
【0001】[0001]
【発明の属する技術分野】本発明は半導体素子あるいは
配線基板に突起電極を形成し、この突起電極を介して半
導体素子と配線基板とを接続するように構成される半導
体装置の製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device which is formed by forming a protruding electrode on a semiconductor element or a wiring board and connecting the semiconductor element and the wiring board via the protruding electrode. is there.
【0002】[0002]
【従来の技術】配線基板に多端子で狭ピッチの電極を有
する半導体素子を高密度に実装する手法としてフリップ
チップ法がよく用いられる。フリップチップ法として2
つの方法がある。2. Description of the Related Art The flip chip method is often used as a method for mounting a semiconductor element having a multi-terminal and a narrow pitch electrode on a wiring board at a high density. 2 as a flip chip method
There are two ways.
【0003】第一の方法はC4(Controlled
collapse chip connectio
n)でUnited States Patent 5
121190に記載されている。図10はC4による接
続を行う半導体装置の製造方法を示すための断面図であ
る。図において、101は半導体素子、101aは半導
体素子101の電極、103dは電極101aに形成さ
れたはんだの突起電極、102は熱硬化型の樹脂、10
6は配線基板、106aは配線基板106の電極であ
る。The first method is C4 (Controlled).
collapse chip connectio
n) in United States Patent 5
121190. FIG. 10 is a cross-sectional view showing a method of manufacturing a semiconductor device in which connection is made by C4. In the figure, 101 is a semiconductor element, 101a is an electrode of the semiconductor element 101, 103d is a solder bump electrode formed on the electrode 101a, 102 is a thermosetting resin, and 10
Reference numeral 6 is a wiring board, and 106a is an electrode of the wiring board 106.
【0004】図中(a)は半導体素子101のはんだの
突起電極103dと配線基板106の電極106aとを
位置合わせした状態、(b)は半導体素子101を配線
基板106に押しつけた状態ではんだの突起電極103
dを溶融・凝固させて半導体素子101と配線基板10
6とを接合した状態、(c)は半導体素子101と配線
基板106とを接合した後に、半導体素子101と配線
基板106との隙間に熱硬化型の樹脂102を充填した
状態を示す。In the figure, (a) shows a state in which the solder protruding electrode 103d of the semiconductor element 101 and the electrode 106a of the wiring board 106 are aligned, and (b) shows a state in which the semiconductor element 101 is pressed against the wiring board 106. Protruding electrode 103
The semiconductor element 101 and the wiring board 10 by melting and solidifying d
6A and 6B show a state where the semiconductor element 101 and the wiring board 106 are joined, and then a thermosetting resin 102 is filled in the gap between the semiconductor element 101 and the wiring board 106.
【0005】第二の方法は半導体素子の突起電極と配線
基板電極とを固相接合で接続する方法で、例えば、”超
音波併用熱圧着によるフリップチップボンディング”
(富岡他、3rd Symposium on Mic
rojoining andAssembly Tec
hnology in Electronics、Fe
b.6−7、1997、Yokohama、pp.9−
14、1997)に記載されている。The second method is a method of connecting the protruding electrode of the semiconductor element and the wiring board electrode by solid-state bonding. For example, "flip chip bonding by thermocompression bonding with ultrasonic wave".
(Tomioka et al., 3rd Symposium on Mic
rojoing and Assembly Tec
hology in Electronics, Fe
b. 6-7, 1997, Yokohama, pp. 9-
14, 1997).
【0006】図12は第二の方法による半導体装置の製
造方法を示す断面図である。図において、101は半導
体素子、101aは半導体素子101の電極、102は
熱硬化型の樹脂、103eは半導体素子101の電極1
01aに形成された金の突起電極、106は電極106
aを有する配線基板である。FIG. 12 is a sectional view showing a method of manufacturing a semiconductor device by the second method. In the figure, 101 is a semiconductor element, 101a is an electrode of the semiconductor element 101, 102 is a thermosetting resin, and 103e is an electrode 1 of the semiconductor element 101.
The gold protrusion electrode formed on the electrode 01a, 106 is the electrode 106
It is a wiring board having a.
【0007】図中、(a)は半導体素子101の突起電
極103eと配線基板106の電極106aとを位置合
わせした状態、(b)は半導体素子101を加熱した状
態で配線基板106に押しつけ、突起電極103eと電
極106aとを固相接合によって接合した状態、(c)
は突起電極103eと電極106aとを固相接合によっ
て接合した後に、半導体素子101と配線基板106と
の隙間に熱硬化型の樹脂102を充填した状態を示す。In the figure, (a) shows a state in which the protruding electrode 103e of the semiconductor element 101 and the electrode 106a of the wiring board 106 are aligned with each other, and (b) shows a state in which the semiconductor element 101 is heated and pressed against the wiring board 106 to project. A state where the electrode 103e and the electrode 106a are joined by solid-state joining, (c)
Shows a state in which the thermosetting resin 102 is filled in the gap between the semiconductor element 101 and the wiring substrate 106 after the protruding electrode 103e and the electrode 106a are joined by solid-phase joining.
【0008】第一の方法、第二の方法の何れにおいても
半導体素子101と配線基板106との隙間に樹脂を充
填するのは、半導体素子101と配線基板106との熱
膨張係数の違いより生じる熱応力により、突起電極また
は突起電極接合部が破断するのを防止するためである。In both of the first method and the second method, the resin is filled in the gap between the semiconductor element 101 and the wiring board 106 due to the difference in the coefficient of thermal expansion between the semiconductor element 101 and the wiring board 106. This is to prevent the protruding electrode or the protruding electrode joint portion from breaking due to thermal stress.
【0009】[0009]
【発明が解決しようとする課題】従来の半導体装置の製
造方法は上記のようになされているので、図10に示す
ような従来の半導体装置の製造方法(第1の方法)には
以下の問題があった。第一の方法では、接続時におい
て、図11に示すように突起電極が溶融した状態で半導
体素子を配線基板に押しつけるため、突起電極がつぶれ
て径が増大し、電極間隔が250μmより小さい半導体
素子では隣り合う突起電極同士が接触するショート不良
が発生する。また、半導体素子と配線基板との隙間が数
十μmと小さいため、樹脂の充填にかなりの時間を要
し、生産性が低下するとともに樹脂の充填部に気泡を巻
き込む問題があった。Since the conventional method of manufacturing a semiconductor device is performed as described above, the conventional semiconductor device manufacturing method (first method) as shown in FIG. 10 has the following problems. was there. In the first method, since the semiconductor element is pressed against the wiring substrate in the melted state of the protruding electrode at the time of connection as shown in FIG. 11, the protruding electrode is crushed to increase the diameter and the electrode interval is smaller than 250 μm. Then, a short circuit failure occurs in which the adjacent protruding electrodes contact each other. Further, since the gap between the semiconductor element and the wiring board is as small as several tens of μm, it takes a considerable amount of time to fill the resin, which lowers the productivity and entraps bubbles in the resin filled portion.
【0010】また、図12に示すような従来の半導体装
置の製造方法(第2の方法)では上記のショート不良の
問題は一応解決されているが、第一の方法と同様に半導
体素子と配線基板との隙間が小さいため、樹脂の充填で
生産性が低下する問題と樹脂の充填部に気泡を巻き込む
問題があった。In the conventional method of manufacturing a semiconductor device as shown in FIG. 12 (second method), the problem of short-circuit failure has been solved for the time being. Since the gap with the substrate is small, there is a problem that the productivity is reduced by filling the resin, and there is a problem that air bubbles are trapped in the resin filled portion.
【0011】この発明は上記のような問題を解決するた
めになされたもので、ショート不良がなく、生産性の良
好な半導体装置の製造方法を得ることを目的とする。The present invention has been made to solve the above problems, and an object of the present invention is to obtain a method of manufacturing a semiconductor device which is free from short circuit defects and has good productivity.
【0012】[0012]
【課題を解決するための手段】この発明にかかる半導体
装置の製造方法は、複数の電極を有する第1の電子部品
の前記電極も含めた前記第1の電子部品上に熱硬化型樹
脂を形成する工程と、前記熱硬化型樹脂上より電極部材
を押し付け、先端が前記熱硬化型樹脂より突出するよう
に前記第1の電子部品の電極上に前記電極部材からなる
突起電極を形成する工程と、前記第1の電子部品に形成
された突起電極と第2の電子部品の電極とが対向するよ
うに、前記第1の電子部品と前記第2の電子部品との位
置合わせをする工程と、加熱した状態で前記第1の電子
部品に形成された突起電極と前記第2の電子部品の電極
とを接合させると共に前記熱硬化型樹脂を硬化させる工
程とを含んでいる。In the method for manufacturing a semiconductor device according to the present invention, a thermosetting resin is formed on the first electronic component including the electrodes of the first electronic component having a plurality of electrodes. And a step of pressing an electrode member on the thermosetting resin and forming a protruding electrode made of the electrode member on the electrode of the first electronic component so that the tip of the electrode member protrudes from the thermosetting resin. A step of aligning the first electronic component and the second electronic component so that the protruding electrode formed on the first electronic component and the electrode of the second electronic component face each other, and a step of curing the thermosetting resin with bonding the heated state in the first electronic component which is formed in the protruding electrode and the second electronic component electrode.
【0013】[0013]
【0014】[0014]
【0015】また、第1の電子部品を加熱しながら前記
第1の電子部品上に熱硬化型樹脂を形成してもよい。[0015] Also, it is also possible to form a thermosetting resin on a first of said while heating the electronic component first electronic component.
【0016】[0016]
【0017】[0017]
実施の形態1.図1はこの実施の形態1による半導体装
置の製造方法を示す図である。図において1は半導体素
子、1aは半導体素子1上に設けられた電極、2は熱硬
化型の樹脂で、例えばエポキシ系の樹脂等を用いること
ができる。2aは熱硬化型の樹脂2が硬化した熱硬化型
の樹脂、3ははんだ材からなる金属ワイヤで、金属ワイ
ヤ3は鉛と錫の合金あるいは銀と錫の合金よりなるはん
だ材で構成される。3aは金属ワイヤ先端に形成された
金属ボール、3bは突起電極、4はキャピラリ、5は超
音波振動、6は配線基板、6aは配線基板6上に設けら
れた電極である。Embodiment 1. FIG. 1 is a diagram showing a method of manufacturing a semiconductor device according to the first embodiment. In the figure, 1 is a semiconductor element, 1a is an electrode provided on the semiconductor element 1, and 2 is a thermosetting resin, for example, an epoxy resin or the like can be used. Reference numeral 2a is a thermosetting resin obtained by curing a thermosetting resin 2. Reference numeral 3 is a metal wire made of a solder material. Metal wire 3 is made of a solder material made of an alloy of lead and tin or an alloy of silver and tin. . 3a is a metal ball formed at the tip of a metal wire, 3b is a protruding electrode, 4 is a capillary, 5 is ultrasonic vibration, 6 is a wiring substrate, and 6a is an electrode provided on the wiring substrate 6.
【0018】以下、図1(a)から図1(e)の順に半
導体装置を製造する方法を説明する。まず、電極1aを
有している半導体素子1上に熱硬化型の樹脂2を形成す
る。一方、金属ワイヤ3の先端に電極(図示していな
い)を近づけて電極、金属ワイヤ3間で放電をさせ、金
属ワイヤ3の先端を溶融・凝固させることにより、金属
ワイヤ3の先端に金属ボール3aを形成する。この金属
ボール3aの直径は金属ワイヤ3の線径、放電電流の大
きさ、放電時間により可変にできるがこの実施の形態で
は金属ボール3aの直径が熱硬化型の樹脂2の厚さより
も大きくなる条件で形成した。図1(a)は上記のよう
にして、半導体素子1上に熱硬化型の樹脂2が配置さ
れ、金属ワイヤ3の先端に金属ボール3aが形成された
状態を示した図である。Hereinafter, a method of manufacturing a semiconductor device will be described in the order of FIGS. 1 (a) to 1 (e). First, the thermosetting resin 2 is formed on the semiconductor element 1 having the electrode 1a. On the other hand, an electrode (not shown) is brought close to the tip of the metal wire 3 to cause an electric discharge between the electrode and the metal wire 3, and the tip of the metal wire 3 is melted and solidified. 3a is formed. The diameter of the metal ball 3a can be varied depending on the wire diameter of the metal wire 3, the magnitude of the discharge current, and the discharge time , but in this embodiment, the diameter of the metal ball 3a is larger than the thickness of the thermosetting resin 2. It was formed under the conditions. FIG. 1A is a diagram showing a state in which the thermosetting resin 2 is arranged on the semiconductor element 1 and the metal balls 3 a are formed at the tips of the metal wires 3 as described above.
【0019】次に、図1(a)に示した半導体素子1を
加熱した状態で金属ボール3aを半導体素子1上の電極
1aに押しつけ、キャピラリ4に超音波5を印加するこ
とによって金属ボール3aと電極1aとを接合させる。Next, while the semiconductor element 1 shown in FIG. 1 (a) is heated, the metal ball 3a is pressed against the electrode 1a on the semiconductor element 1 and ultrasonic waves 5 are applied to the capillary 4 so that the metal ball 3a is pressed. And the electrode 1a are joined.
【0020】このとき、金属ボール3aが塑性変形し
て、金属ボール3a、電極1a間に存在する熱硬化型の
樹脂2と金属ボール3a及び電極1a表面の酸化皮膜
(図示していない)が除去されることによって電極1a
と金属ボール3aとが接合される。なお、半導体素子1
を加熱し、キャピラリ4へ超音波5を印加することによ
り、金属ボール3aが変形しやすくなり、接合が容易に
なる。また、半導体素子1が加熱されることにより、熱
硬化型の樹脂2の粘度が熱により低下し、接合部からの
樹脂2の排除が容易となる。At this time, the metal ball 3a is plastically deformed, and the thermosetting resin 2 existing between the metal ball 3a and the electrode 1a, the metal ball 3a and the oxide film (not shown) on the surface of the electrode 1a are removed. Electrode 1a
And the metal ball 3a are joined. The semiconductor element 1
By heating and applying the ultrasonic wave 5 to the capillary 4, the metal balls 3a are easily deformed and the joining is facilitated. Further, by heating the semiconductor element 1, the viscosity of the thermosetting resin 2 is reduced by heat, and the resin 2 can be easily removed from the joint.
【0021】本実施の形態の場合、金属ボール3aを電
極1aに押しつける力を20〜200g、超音波の強さ
を0.15〜0.8wとし、また、エポキシ系の樹脂を
用いたため、半導体素子1を加熱する温度を120℃と
して実施した。この半導体素子1の加熱温度は熱硬化型
の樹脂によって変えてもよい。図1(b)は上記のよう
にして、半導体素子1上の電極1aに金属ボール3aを
接合させた状態を示した図である。In the case of the present embodiment, the force for pressing the metal ball 3a against the electrode 1a is 20 to 200 g, the ultrasonic wave intensity is 0.15 to 0.8 w, and the epoxy resin is used. The temperature for heating the element 1 was 120 ° C. The heating temperature of the semiconductor element 1 may be changed depending on the thermosetting resin. FIG. 1B is a diagram showing a state in which the metal ball 3a is bonded to the electrode 1a on the semiconductor element 1 as described above.
【0022】図1(b)に示したように、半導体素子1
上の電極1aと金属ボール3aとを接合した後、キャピ
ラリ4を上方に引き上げて金属ワイヤ3を切断し、突起
電極3bを形成する。このとき、金属ボール3a及び突
起電極3bが少なくとも半導体素子1上に形成された熱
硬化型の樹脂2よりも突出するように、金属ボール3a
と金属ワイヤ3との境界付近で金属ワイヤ3を切断す
る。As shown in FIG. 1B, the semiconductor device 1
After joining the upper electrode 1a and the metal ball 3a, the capillary 4 is pulled up to cut the metal wire 3 to form the protruding electrode 3b. At this time, the metal ball 3a and the protruding electrode 3b are projected at least above the thermosetting resin 2 formed on the semiconductor element 1.
The metal wire 3 is cut near the boundary between the metal wire 3 and the metal wire 3.
【0023】金属ボール3aの直径及び突起電極3bの
高さをいずれも少なくとも熱硬化型の樹脂2の厚さより
大きくすることで、突起電極形成時にキャピラリ4の先
端が熱硬化型の樹脂2に接触してキャピラリ4の先端に
樹脂2が付着することを妨げることができ、その結果、
金属ボール3aの形成が妨げられることなく安定的に連
続で突起電極3bを形成することが可能となる。By making both the diameter of the metal ball 3a and the height of the protruding electrode 3b at least larger than the thickness of the thermosetting resin 2, the tip of the capillary 4 contacts the thermosetting resin 2 when forming the protruding electrode. As a result, it is possible to prevent the resin 2 from adhering to the tip of the capillary 4, and as a result,
It is possible to stably and continuously form the protruding electrodes 3b without hindering the formation of the metal balls 3a.
【0024】本実施の形態の場合、120μmピッチの
電極間隔の半導体素子1に熱硬化型の樹脂2を厚さ30
μmで設置し、線径30μmの鉛と錫の合金からなるワ
イヤ3を用いて直径80μmの金属金属ボール(はんだ
ボール)3aを形成し、高さ55μmの突起電極3bを
形成した。図1(c)は上記のようにして、半導体素子
1上の電極1a上に突起電極3bを形成した状態を示し
た図である。In the case of the present embodiment, the thermosetting resin 2 is applied to the semiconductor element 1 having an electrode interval of 120 μm pitch to a thickness of 30.
The metal metal ball (solder ball) 3a having a diameter of 80 μm was formed by using the wire 3 having a wire diameter of 30 μm and made of an alloy of lead and tin, and the protruding electrode 3b having a height of 55 μm was formed. FIG. 1C is a diagram showing a state in which the protruding electrode 3b is formed on the electrode 1a on the semiconductor element 1 as described above.
【0025】図1(c)に示したように、半導体素子1
上の電極1aに突起電極3bを形成した後、この半導体
素子1上に電極1aに対応する電極6aを有している配
線基板6を、この半導体素子1上の電極1a(突起電極
3b)と配線基板6上の電極6aとが対応するように位
置合わせをする。As shown in FIG. 1C, the semiconductor device 1
After the formation of the protruding electrodes 3b to the electrodes 1a of the upper, the wiring substrate 6 having an electrode 6a corresponding to the electrode 1a on the semiconductor element 1, the electrode 1a on the semiconductor device 1 (protruding electrodes 3b) The electrodes 6a on the wiring board 6 are aligned so as to correspond to each other.
【0026】図1(d)は半導体素子1上の突起電極3
bと配線基板6の電極6aとを位置合わせした状態を示
した図である。本実施の形態は配線基板6にはアルミナ
基板を用いたが、他にガラスセラミックス等のセラミッ
クスやプリント基板等の樹脂基板を用いることも可能で
ある。FIG. 1D shows the protruding electrode 3 on the semiconductor element 1.
It is the figure which showed the state which aligned b and the electrode 6a of the wiring board 6. Although an alumina substrate is used as the wiring substrate 6 in the present embodiment, it is also possible to use ceramics such as glass ceramics or a resin substrate such as a printed circuit board instead.
【0027】次に、半導体素子1と配線基板6とを加熱
した状態で押しつけ、はんだ材からなる突起電極3bを
溶融させてこの突起電極3bを配線基板6の電極6aに
接合するとともに熱硬化型の樹脂2を硬化させて、半導
体素子1上の電極1aと配線基板6上の電極6aとの接
合及び半導体素子1と配線基板6との結合を行う。Next, the semiconductor element 1 and the wiring board 6 are pressed in a heated state to melt the protruding electrode 3b made of a solder material to bond the protruding electrode 3b to the electrode 6a of the wiring board 6 and thermosetting type. The resin 2 is cured to bond the electrode 1a on the semiconductor element 1 to the electrode 6a on the wiring board 6 and the semiconductor element 1 to the wiring board 6.
【0028】このとき、突起電極3bが熱硬化型の樹脂
2より突出するように形成されており、突起電極3bを
構成しているはんだ材の先端部が熱硬化型の樹脂2で覆
われていないため、この突起電極3bと電極6aとの接
続が容易に実施される。また、突起電極3bの周囲は熱
硬化型の樹脂2で満たされているため、突起電極3bが
溶融した状態で半導体素子1を配線基板6に押しつけて
も、突起電極3bの径の増大によって生じる隣り合う突
起電極同士の接触が妨げられ、ショート不良が生じな
い。At this time, the protruding electrode 3b is formed so as to protrude from the thermosetting resin 2, and the tip of the solder material constituting the protruding electrode 3b is covered with the thermosetting resin 2. Since it does not exist, the connection between the protruding electrode 3b and the electrode 6a is easily performed. Further, since the periphery of the bump electrode 3b is filled with the thermosetting resin 2, even if the semiconductor element 1 is pressed against the wiring board 6 in a molten state of the bump electrode 3b, the diameter of the bump electrode 3b increases. The contact between the adjacent protruding electrodes is prevented, and a short circuit failure does not occur.
【0029】接合時には、半導体素子1を配線基板6に
押しあてて、熱硬化型の樹脂2が半導体素子1と配線基
板6との隙間になじむまでは半導体素子1の温度を、熱
硬化型の樹脂2の粘度が最小となる温度に保持し、その
後半導体素子1の温度を接合温度に上昇させた。本実施
の形態では配線基板6の温度をエポキシ系の熱硬化型の
樹脂の粘度が最小となる120℃で行った。図1(e)
は上記のようにして、半導体素子1と配線基板6とを結
合させた状態を示した図である。At the time of bonding, the semiconductor element 1 is pressed against the wiring board 6, and the temperature of the semiconductor element 1 is kept at the temperature of the thermosetting resin until the thermosetting resin 2 fits into the gap between the semiconductor element 1 and the wiring board 6. The temperature of the resin 2 was maintained at a temperature at which the viscosity was minimum, and then the temperature of the semiconductor element 1 was raised to the bonding temperature. In the present embodiment, the temperature of the wiring board 6 is set to 120 ° C. at which the viscosity of the epoxy thermosetting resin is minimized. Figure 1 (e)
FIG. 6 is a diagram showing a state in which the semiconductor element 1 and the wiring board 6 are combined as described above.
【0030】本実施の形態では120μmピッチの電極
間隔の半導体素子をショート不良なしに配線基板に接合
して半導体装置を製造することができた。なお、熱硬化
型の樹脂2は突起電極3bと電極6aとを接合した状態
のまま半導体素子1の温度を上昇させて硬化させたが、
他に半導体素子1が接合された配線基板6をオーブン中
で加熱することによって熱硬化型の樹脂2を硬化させる
こともできる。In the present embodiment, the semiconductor device can be manufactured by bonding the semiconductor elements having the electrode interval of 120 μm pitch to the wiring board without a short circuit defect. Note that the thermosetting resin 2 was cured by raising the temperature of the semiconductor element 1 while the protruding electrode 3b and the electrode 6a were bonded.
Alternatively, the thermosetting resin 2 can be cured by heating the wiring substrate 6 to which the semiconductor element 1 is bonded in an oven.
【0031】半導体素子1と配線基板6とを接合する
時、接続界面に酸化膜が存在すると突起電極3bと電極
6aとの間の金属的な接触が阻害されて接続強度が低下
することもあるので、半導体素子1を配線基板6に押し
つけた際に、半導体素子1に超音波振動を印加して突起
電極3bおよび電極6aの表面の酸化膜を除去する方法
を用いてもよい。When the semiconductor element 1 and the wiring board 6 are joined, if an oxide film is present at the connection interface, the metallic contact between the protruding electrode 3b and the electrode 6a may be hindered and the connection strength may be reduced. Therefore, when the semiconductor element 1 is pressed against the wiring board 6, ultrasonic vibration may be applied to the semiconductor element 1 to remove the oxide film on the surfaces of the protruding electrodes 3b and the electrodes 6a.
【0032】本実施の形態では、半導体素子上の電極
(突起電極)と配線基板上の電極との接合と同時に半導
体素子と配線基板との隙間への熱硬化型の樹脂2の充填
が完了するため、従来方法のように半導体素子と配線基
板との接合後、樹脂を注入する必要がなく、生産性を著
しく向上することが可能となる。さらに、接合後に樹脂
を充填するのではなく、突起電極形成前に樹脂を形成さ
せているので、樹脂の充填部に気泡を巻き込むことがな
い。また、半導体素子上の電極(突起電極)と配線基板
上の電極との接合時には、突起電極間には樹脂が充填さ
れているので、接合時に隣り合う突起電極同士の接触を
防止することができる。In the present embodiment, filling of the thermosetting resin 2 into the gap between the semiconductor element and the wiring board is completed at the same time when the electrodes (projection electrodes) on the semiconductor element and the electrodes on the wiring board are joined. Therefore, unlike the conventional method, it is not necessary to inject the resin after joining the semiconductor element and the wiring board, and it is possible to significantly improve the productivity. Furthermore, since the resin is formed before the formation of the protruding electrodes, rather than being filled with the resin after joining, bubbles are not caught in the resin-filled portion. Further, when the electrodes (projection electrodes) on the semiconductor element and the electrodes on the wiring board are bonded, the resin is filled between the projection electrodes, so that it is possible to prevent contact between adjacent projection electrodes at the time of bonding. .
【0033】また、本実施の形態では、硬化型の樹脂を
形成した後に、この樹脂より突出する突起電極を形成す
るので、突起電極の高さを制御しやすく、また、樹脂よ
り突出する部位が汚れたりすることがなく、配線基板と
電極との接合を容易に行うことができる。Further, in the present embodiment, since the protruding electrode protruding from this resin is formed after the curable resin is formed, the height of the protruding electrode can be easily controlled and the portion protruding from the resin can be easily controlled. The wiring board and the electrode can be easily joined without getting dirty.
【0034】実施の形態2.図2はこの実施の形態2に
よる半導体装置の製造方法を示す図である。符号は実施
の形態1で説明したものと同様であるので説明は省略す
る。以下、図2(a)から図2(f)の順に半導体装置
を製造する方法を説明する。Embodiment 2. FIG. 2 is a diagram showing a method of manufacturing a semiconductor device according to the second embodiment. Since the reference numerals are the same as those described in the first embodiment, the description will be omitted. Hereinafter, a method of manufacturing a semiconductor device will be described in the order of FIGS. 2A to 2F.
【0035】まず、金属ワイヤ3の先端に電極(図示し
ていない)を近づけて電極、金属ワイヤ3間で放電をさ
せ、金属ワイヤ3の先端を溶融・凝固させることによ
り、金属ワイヤ3の先端に金属ボール3aを形成する。
この金属ボール3aの直径は金属ワイヤ3の線径、放電
電流の大きさ、放電時間により可変にできるがこの実施
の形態では金属ボール3aの直径が熱硬化型の樹脂2の
厚さよりも大きくなる条件で形成した。図2(a)は上
記のようにして、金属ワイヤ3の先端に金属ボール3a
が形成された状態を示した図である。First, an electrode (not shown) is brought close to the tip of the metal wire 3 to cause an electric discharge between the electrode and the metal wire 3, and the tip of the metal wire 3 is melted and solidified. A metal ball 3a is formed on.
The diameter of the metal ball 3a can be varied depending on the wire diameter of the metal wire 3, the magnitude of the discharge current, and the discharge time , but in this embodiment, the diameter of the metal ball 3a is larger than the thickness of the thermosetting resin 2. It was formed under the conditions. As shown in FIG. 2A, the metal ball 3a is attached to the tip of the metal wire 3 as described above.
It is the figure which showed the state in which was formed.
【0036】次に、図2(a)に示した半導体素子1を
加熱した状態で金属ボール3aを半導体素子1上の電極
1aに押しつけ、キャピラリ4に超音波5を印加するこ
とによって金属ボール3aと電極1aとを接合させる。Next, the metal ball 3a is pressed against the electrode 1a on the semiconductor element 1 while the semiconductor element 1 shown in FIG. 2 (a) is heated, and ultrasonic waves 5 are applied to the capillary 4 to make the metal ball 3a. And the electrode 1a are joined.
【0037】このとき、金属ボール3aが塑性変形し
て、電極1aと金属ボール3aとが接合される。なお、
半導体素子1を加熱し、キャピラリ4へ超音波5を印加
することにより、金属ボール3aが容易に変形し、接合
が容易になる。At this time, the metal ball 3a is plastically deformed and the electrode 1a and the metal ball 3a are joined. In addition,
By heating the semiconductor element 1 and applying the ultrasonic wave 5 to the capillary 4, the metal ball 3a is easily deformed and the bonding is facilitated.
【0038】本実施の形態の場合、金属ボール3aを電
極1aに押しつける力を20〜200g、超音波の強さ
を0.15〜0.8wとし、半導体素子1を加熱する温
度を120℃として実施した。図2(b)は上記のよう
にして、半導体素子1上の電極1aに金属ボール3aを
接合させた状態を示した図である。In this embodiment, the force for pressing the metal ball 3a against the electrode 1a is 20 to 200 g, the ultrasonic wave intensity is 0.15 to 0.8 w, and the temperature for heating the semiconductor element 1 is 120 ° C. Carried out. FIG. 2B is a diagram showing a state in which the metal ball 3a is bonded to the electrode 1a on the semiconductor element 1 as described above.
【0039】図1(b)に示したように、半導体素子1
上の電極1aと金属ボール3aとを接合した後、キャピ
ラリ4を上方に引き上げて金属ワイヤ3を切断し、突起
電極3bを形成する。このとき、金属ボール3a及び突
起電極3bが少なくとも所定の高さより高くなるよう
(後の工程で形成する半導体素子1上の熱硬化型の樹脂
2よりも突出するよう)に、金属ボール3aと金属ワイ
ヤ3との境界付近で金属ワイヤ3を切断する。As shown in FIG. 1B, the semiconductor device 1
After joining the upper electrode 1a and the metal ball 3a, the capillary 4 is pulled up to cut the metal wire 3 to form the protruding electrode 3b. At this time, the metal balls 3a and the metal balls 3a and the metal electrodes 3b are arranged so that the metal balls 3a and the protruding electrodes 3b are higher than at least a predetermined height (protruding from the thermosetting resin 2 on the semiconductor element 1 formed in a later step). The metal wire 3 is cut near the boundary with the wire 3.
【0040】本実施の形態の場合、120μmピッチの
電極間隔の半導体素子1に、線径30μmの鉛と錫の合
金からなるワイヤ3を用いて直径80μmの金属ボール
(はんだボール)3aを形成し、高さ55μmの突起電
極3bを形成した。図2(c)は上記のようにして、半
導体素子1上の電極1a上に突起電極3bを形成した状
態を示した図である。In the case of the present embodiment, a metal ball (solder ball) 3a having a diameter of 80 μm is formed on the semiconductor element 1 having an electrode interval of 120 μm pitch by using the wire 3 made of an alloy of lead and tin having a wire diameter of 30 μm. A protruding electrode 3b having a height of 55 μm was formed. FIG. 2C is a diagram showing a state in which the protruding electrode 3b is formed on the electrode 1a on the semiconductor element 1 as described above.
【0041】図2(c)に示したように、半導体素子1
上の電極1aに突起電極3bを形成した後、半導体素子
1上に熱硬化型の樹脂2を形成する。このとき、半導体
素子1上の電極1aに設けた突起電極3bが形成する熱
硬化型の樹脂2よりも突出するように熱硬化型の樹脂2
を形成する。本実施の形態の場合、熱硬化型の樹脂2を
厚さ30μmで設置した。図2(d)はこのようにし
て、半導体素子1上に熱硬化型の樹脂2を形成した状態
を示した図である。As shown in FIG. 2C, the semiconductor device 1
After forming the protruding electrode 3b on the upper electrode 1a, the thermosetting resin 2 is formed on the semiconductor element 1. At this time, the thermosetting resin 2 is projected so as to protrude from the thermosetting resin 2 formed by the protruding electrode 3b provided on the electrode 1a on the semiconductor element 1.
To form. In the case of the present embodiment, the thermosetting resin 2 is installed with a thickness of 30 μm. FIG. 2D is a diagram showing a state in which the thermosetting resin 2 is formed on the semiconductor element 1 in this way.
【0042】以下、実施の形態1の図1(d)、図1
(e)で説明したのと同様にして、図2(e)、図2
(f)に示すようにして、半導体素子1上の電極1a
(突起電極3a)と配電基板6上の電極6aとを接合さ
せる。なお、この実施の形態では、熱硬化型の樹脂2を
形成した後に、突起電極3bを形成するのではなく、突
起電極3bを形成した後に、熱硬化型の樹脂2を形成す
るようにしている。そのため、熱硬化型の樹脂2の形成
時に突起電極3bの表面が汚れる可能性があるので、半
導体素子1上の電極1a(突起電極3b)と配電基板6
上の電極6aとを接合させるときに、超音波5を印加す
ることによってこの突起電極3bの汚れを取り除き、突
起電極3bと配電基板6aとを接合させるようにする。1 (d) and 1 of the first embodiment.
2E and 2E in the same manner as described in FIG.
As shown in (f), the electrode 1a on the semiconductor element 1
The (protruding electrode 3a) and the electrode 6a on the power distribution substrate 6 are bonded. In this embodiment, the thermosetting resin 2 is not formed after the bump electrode 3b is formed, but the thermosetting resin 2 is formed after the projection electrode 3b is formed. . Therefore, the surface of the protruding electrode 3b may be contaminated when the thermosetting resin 2 is formed. Therefore, the electrode 1a (the protruding electrode 3b) on the semiconductor element 1 and the power distribution board 6 may be formed.
When the upper electrode 6a is joined, the ultrasonic wave 5 is applied to remove the dirt on the protruding electrode 3b so that the protruding electrode 3b and the power distribution substrate 6a are joined together.
【0043】なお、半導体素子1と配線基板6とを接合
する時、接続界面に酸化膜が存在すると突起電極3bと
電極6aとの間の金属的な接触が阻害されて接続強度が
低下するが、半導体素子1を配線基板6に押しつけた際
に、半導体素子1に超音波振動を印加して突起電極3b
および電極6aの表面の酸化膜を除去することによっ
て、高い接続強度で接合できた。When the semiconductor element 1 and the wiring board 6 are joined, if an oxide film is present at the connection interface, the metallic contact between the protruding electrode 3b and the electrode 6a is obstructed, and the connection strength is reduced. When the semiconductor element 1 is pressed against the wiring board 6, ultrasonic vibration is applied to the semiconductor element 1 to apply the protruding electrodes 3b.
And by removing the oxide film on the surface of the electrode 6a, it was possible to join with high connection strength.
【0044】本実施の形態では、半導体素子上の電極
(突起電極)と配線基板上の電極との接合と同時に半導
体素子と配線基板との隙間への熱硬化型の樹脂2の充填
が完了するため、従来方法のように半導体素子と配線基
板との接合後、樹脂を注入する必要がなく、生産性を著
しく向上することが可能となる。さらに、接合後に樹脂
を充填するのではなく、接合前に樹脂を形成させている
ので、樹脂の充填部に気泡を巻き込むことがない。ま
た、半導体素子上の電極(突起電極)と配線基板上の電
極との接合時には、突起電極間には樹脂が充填されてい
るので、接合時に隣り合う突起電極同士の接触が防止す
ることができる。In the present embodiment, filling of the thermosetting resin 2 into the gap between the semiconductor element and the wiring board is completed at the same time when the electrodes (projection electrodes) on the semiconductor element and the electrodes on the wiring board are joined. Therefore, unlike the conventional method, it is not necessary to inject the resin after joining the semiconductor element and the wiring board, and it is possible to significantly improve the productivity. Further, since the resin is formed before the joining instead of being filled with the resin after the joining, air bubbles are not caught in the resin filled portion. Further, when the electrodes (projection electrodes) on the semiconductor element and the electrodes on the wiring board are joined, the resin is filled between the projection electrodes, so that it is possible to prevent contact between adjacent projection electrodes at the time of joining. .
【0045】実施の形態3.図3はこの実施の形態3に
よる半導体装置の製造方法を示す図である。図におい
て、7ははんだ材で、このはんだ材7は実施の形態1の
図1で説明した突起電極3bを構成するはんだ材と同じ
組成をもつ鉛と錫からなる合金で構成されている。他の
符号は実施の形態1で説明したものと同様であるので説
明は省略する。Embodiment 3. FIG. 3 is a diagram showing a method of manufacturing a semiconductor device according to the third embodiment. In the figure, 7 is a solder material, and this solder material 7 is composed of an alloy of lead and tin having the same composition as the solder material forming the protruding electrodes 3b described in FIG. 1 of the first embodiment. The other reference numerals are the same as those described in the first embodiment, and the description thereof will be omitted.
【0046】図3(a)は半導体素子1上に熱硬化型の
樹脂2を配置した状態を示す図で、金属ワイヤ3の先端
には熱硬化型の樹脂2の厚さよりも直径の大きい金属ボ
ール3aが形成されている。FIG. 3A is a view showing a state in which the thermosetting resin 2 is arranged on the semiconductor element 1. The tip of the metal wire 3 is a metal having a diameter larger than the thickness of the thermosetting resin 2. A ball 3a is formed.
【0047】図3(b)は半導体素子1を加熱した状態
で金属ボール3aを半導体素子1上の電極1aに押しつ
け、キャピラリ4に超音波5を印加することによって金
属ボール3aと電極1aとを接合した状態を示す図で、
半導体素子1を加熱することにより、熱硬化型の樹脂2
の粘度を低下させるとともに金属ボール3aの変形を促
進し、金属ボール3aと電極1aとの接合を容易にして
いる。In FIG. 3B, the metal ball 3a is pressed against the electrode 1a on the semiconductor element 1 in a state where the semiconductor element 1 is heated, and ultrasonic waves 5 are applied to the capillary 4, so that the metal ball 3a and the electrode 1a are separated from each other. In the figure showing the joined state,
By heating the semiconductor element 1, a thermosetting resin 2
The viscosity of the metal ball 3a is reduced and the deformation of the metal ball 3a is promoted to facilitate the joining of the metal ball 3a and the electrode 1a.
【0048】図3(c)は金属ボール3aと電極1aと
を接合した後、キャピラリ4を上方に引き上げて金属ボ
ール3aと金属ワイヤ3との境界付近で金属ワイヤ3を
切断し、突起電極3bを形成した状態を示す図で、金属
ボール3aの直径および突起電極3bの高さをいずれも
少なくとも熱硬化型の樹脂2の厚さより大きくすること
で突起電極形成時にキャピラリ4の先端が樹脂2に接触
し、キャピラリ4の先端に熱硬化型の樹脂2が付着する
ことで金属ボール3aの形成が妨げられることなく安定
的に連続で突起電極3bを形成することが可能となって
いる。以上、図3(a)から図3(c)に示した工程
は、実施の形態の図1(a)から図1(c)の状態を形
成するのと同様にして形成される。In FIG. 3 (c), after bonding the metal ball 3a and the electrode 1a, the capillary 4 is pulled up to cut the metal wire 3 near the boundary between the metal ball 3a and the metal wire 3, and the protruding electrode 3b. In the figure showing the state in which the tips of the capillaries 4 are formed on the resin 2 at the time of forming the protruding electrodes by making the diameter of the metal balls 3a and the height of the protruding electrodes 3b at least larger than the thickness of the thermosetting resin 2. Since the thermosetting resin 2 adheres to the tips of the capillaries 4 in contact with each other, it is possible to stably and continuously form the protruding electrodes 3b without hindering the formation of the metal balls 3a. As described above, the steps shown in FIGS. 3A to 3C are formed in the same manner as the steps shown in FIGS. 1A to 1C of the embodiment.
【0049】図3(c)に示したように、半導体素子1
上の電極1aに突起電極3bを形成した後、この半導体
素子1上に電極1aに対応する電極6aを有している配
線基板6とが、この半導体素子1上の電極1a(突起電
極3b)と配線基板6上の電極6aとが対応するように
位置合わせをする。なお、この配線基板6の電極6a上
には、はんだ材7が設けられているものとする。As shown in FIG. 3C, the semiconductor device 1
After the protruding electrode 3b is formed on the upper electrode 1a, the wiring board 6 having the electrode 6a corresponding to the electrode 1a on the semiconductor element 1 becomes the electrode 1a (the protruding electrode 3b) on the semiconductor element 1. The electrodes 6a on the wiring board 6 are aligned with each other. It is assumed that the solder material 7 is provided on the electrodes 6a of the wiring board 6.
【0050】図3(d)は上記のようにして、半導体素
子1上の突起電極3bと電極6a上にはんだ材7が供給
された配線基板6の電極6aとを位置合わせした状態を
示した図である。FIG. 3D shows a state in which the protruding electrode 3b on the semiconductor element 1 and the electrode 6a of the wiring substrate 6 to which the solder material 7 is supplied on the electrode 6a are aligned as described above. It is a figure.
【0051】次に、半導体素子1と配線基板6とを加熱
した状態で押しあて、突起電極3b及びはんだ材7を溶
融させて半導体素子1と配線基板6とを結合させるとと
もに熱硬化型の樹脂2を硬化させる。このとき、配電基
板6の電極6a上にはんだ材7が設けられているので、
電極6a上に設けられたはんだ材7の厚みが突起電極3
bの高さばらつき及び基板のうねりや凹凸による高さば
らつきを吸収し、突起電極3bが電極6aに接触できな
いために生じるオープン不良を防止することができる。Next, the semiconductor element 1 and the wiring board 6 are pressed in a heated state to melt the protruding electrodes 3b and the solder material 7 to bond the semiconductor element 1 and the wiring board 6, and at the same time, a thermosetting resin. Cure 2 At this time, since the solder material 7 is provided on the electrode 6a of the power distribution board 6,
The thickness of the solder material 7 provided on the electrode 6a is equal to that of the protruding electrode 3
It is possible to absorb the height variation of b and the height variation due to the waviness and the unevenness of the substrate, and prevent the open defect caused by the protrusion electrode 3b not being able to contact the electrode 6a.
【0052】本実施の形態では、はんだ材を鉛と錫から
なる合金で構成させているが、これは特に限定するもの
ではなく、錫、インジウムあるいは鉛−インジウム、鉛
−錫−インジウム、銀−錫、金−錫の合金を用いること
ができる。In the present embodiment, the solder material is made of an alloy of lead and tin, but this is not particularly limited, and tin, indium or lead-indium, lead-tin-indium, silver- Tin and gold-tin alloys can be used.
【0053】また、突起電極3bを構成するはんだ材と
はんだ材7とが異なる場合、必ずしも突起電極3bを構
成するはんだ材とはんだ材7の両方を溶融させる必要は
なく、融点の低いはんだ材だけを溶融させても接合は可
能である。When the solder material forming the protruding electrode 3b and the solder material 7 are different, it is not always necessary to melt both the solder material forming the protruding electrode 3b and the solder material 7, and only the solder material having a low melting point is required. It is possible to bond even if melted.
【0054】なお、接合時には半導体素子1を配線基板
6に押しあてて、熱硬化型の樹脂2が半導体素子1と配
線基板6との隙間になじむまでは半導体素子1の温度
は、熱硬化型の樹脂2の粘度が最小となる温度に保持
し、その後半導体素子1の温度を接合温度まで上昇させ
た。本実施の形態では配線基板6の温度をエポキシ系の
熱硬化型の樹脂2の粘度が最小となる120℃で行っ
た。図3(e)は上記のようにして、半導体素子1と配
線基板6とを結合させた状態を示した図である。During the bonding, the temperature of the semiconductor element 1 is kept at the thermosetting type until the semiconductor element 1 is pressed against the wiring board 6 and the thermosetting resin 2 fits in the gap between the semiconductor element 1 and the wiring board 6. The temperature of the resin 2 was kept at the minimum temperature, and then the temperature of the semiconductor element 1 was raised to the bonding temperature. In this embodiment, the temperature of the wiring board 6 is set to 120 ° C. at which the viscosity of the epoxy thermosetting resin 2 is minimized. Figure 3 (e) is as described above, it is a diagram showing a state of being bonded to the semiconductor element 1 and the wiring board 6.
【0055】熱硬化型の樹脂2は突起電極3bと電極6
aとを接合した状態のまま半導体素子1の温度を上昇さ
せて硬化させたが、他に半導体素子1が接合された配線
基板6をオーブン中で加熱することによって熱硬化型の
樹脂2を硬化させることもできる。The thermosetting resin 2 is composed of the protruding electrode 3b and the electrode 6.
The temperature of the semiconductor element 1 was increased and cured while the semiconductor element 1 and a were bonded together, but the wiring board 6 to which the semiconductor element 1 was bonded was heated in an oven to cure the thermosetting resin 2. You can also let it.
【0056】また、半導体素子1と配線基板6とを接合
するとき、接続界面に酸化膜が存在すると、突起電極3
bと電極6aとの間の金属的な接触が阻害されて接続強
度が低下するが、半導体素子1を配線基板6に押しつけ
た際に、半導体素子1に超音波振動5を印加して突起電
極3bおよびはんだ材7の表面の酸化膜を除去する方法
を用いてもよい。Further, when the semiconductor element 1 and the wiring board 6 are joined, if the oxide film exists at the connection interface, the protruding electrode 3
Although the metallic contact between the electrode b and the electrode 6a is hindered and the connection strength is reduced, the ultrasonic vibration 5 is applied to the semiconductor element 1 when the semiconductor element 1 is pressed against the wiring board 6, and the protruding electrode 3b and the method of removing the oxide film on the surface of the solder material 7 may be used.
【0057】本実施の形態では、半導体素子上の電極
(突起電極)と配線基板上の電極との接合と同時に半導
体素子と配線基板との隙間への熱硬化型の樹脂2の充填
が完了するため、従来方法のように半導体素子と配線基
板との接合後、樹脂を注入する必要がなく、また、樹脂
の充填部に気泡を巻き込むことがなく、生産性を著しく
向上することが可能となる。また、半導体素子上の電極
(突起電極)と配線基板上の電極との接合時には、突起
電極間には樹脂が充填されているので、接合時に隣り合
う突起電極同士の接触を防止することができる。In the present embodiment, filling of the thermosetting resin 2 into the gap between the semiconductor element and the wiring board is completed at the same time when the electrodes (projection electrodes) on the semiconductor element and the electrodes on the wiring board are joined. Therefore, unlike the conventional method, it is not necessary to inject the resin after joining the semiconductor element and the wiring board, and it is possible to significantly improve the productivity without entrapping air bubbles in the resin-filled portion. . Further, when the electrodes (projection electrodes) on the semiconductor element and the electrodes on the wiring board are bonded, the resin is filled between the projection electrodes, so that it is possible to prevent contact between adjacent projection electrodes at the time of bonding. .
【0058】また、本実施の形態では、配線基板の電極
上にはんだ材を設けているので、半導体素子上の電極
(突起電極)と配線基板上の電極とを接合させるとき
に、はんだ材の厚みが突起電極の高さばらつき及び基板
のうねりや凹凸による高さばらつきを吸収し、そのた
め、突起電極が配線基板の電極に接触できないために生
じるオープン不良を防止することができる。Further, in this embodiment, since the solder material is provided on the electrodes of the wiring board, when the electrodes (projection electrodes) on the semiconductor element and the electrodes on the wiring board are joined, the solder material The thickness absorbs the height variation of the protruding electrode and the height variation due to the undulations and irregularities of the substrate, and therefore it is possible to prevent the open defect that occurs because the protruding electrode cannot contact the electrode of the wiring substrate.
【0059】実施の形態4.図4はこの実施の形態4に
よる半導体装置の製造方法を示す図である。図中の符号
は実施の形態1で説明したものと同様であるので説明は
省略する。実施の形態1では、半導体素子上の電極に突
起電極を形成し、この突起電極と配線基板上の電極とを
接合させているが、本実施の形態では、配線基板上の電
極に突起電極を形成し、この突起電極と半導体素子上の
電極とを接合させるようにしている。Fourth Embodiment FIG. 4 is a diagram showing a method of manufacturing a semiconductor device according to the fourth embodiment. Since the reference numerals in the figure are the same as those described in the first embodiment, the description thereof will be omitted. In the first embodiment, the protruding electrode is formed on the electrode on the semiconductor element, and the protruding electrode and the electrode on the wiring board are joined together. However, in the present embodiment, the protruding electrode is formed on the electrode on the wiring board. The bump electrodes are formed and the electrodes on the semiconductor element are bonded to each other.
【0060】図4(a)は配線基板6上に熱硬化型の樹
脂2を配置し、金属ワイヤ3の先端に熱硬化型の樹脂2
の厚さよりも直径の大きい金属ボール3aを形成した状
態を示す図である。本実施の形態では配線基板6にはア
ルミナ基板を用いたが、他にガラスセラミックス等のセ
ラミックスやプリント基板等の樹脂基板を用いることも
できる。In FIG. 4A, the thermosetting resin 2 is arranged on the wiring board 6, and the thermosetting resin 2 is attached to the tip of the metal wire 3.
It is a figure which shows the state which formed the metal ball 3a whose diameter is larger than the thickness of. Although an alumina substrate is used as the wiring substrate 6 in the present embodiment, other ceramics such as glass ceramics or a resin substrate such as a printed circuit board may be used.
【0061】図4(b)は配線基板6を加熱した状態で
金属ボール3aを配線基板6上の電極6aに押しつけ、
キャピラリ4に超音波5を印加することによって金属ボ
ール3aと電極6aとを接合した状態を示す図である。
配線基板6を加熱することにより熱硬化型の樹脂2の粘
度を低下させるとともに金属ボール3aが変形しやすく
なり、金属ボール3aと電極6aとの接合が容易にな
る。In FIG. 4B, the metal balls 3a are pressed against the electrodes 6a on the wiring board 6 while the wiring board 6 is being heated.
It is a figure which shows the state which joined the metal ball 3a and the electrode 6a by applying the ultrasonic wave 5 to the capillary 4.
By heating the wiring substrate 6, the viscosity of the thermosetting resin 2 is reduced, the metal balls 3a are easily deformed, and the metal balls 3a and the electrodes 6a are easily joined.
【0062】図4(c)は金属ボール3aと電極6aと
を接合した後、キャピラリ4を上方に引き上げて金属ボ
ール3aと金属ワイヤ3との境界付近で金属ワイヤ3を
切断し、突起電極3bを形成した状態を示す図である。
金属ボール3aの直径及び突起電極3bの高さをいずれ
も少なくとも熱硬化型の樹脂2の厚さより大きくするこ
とで、突起電極形成時にキャピラリ4の先端が樹脂2に
接触し、先端に熱硬化型の樹脂2が付着するのを防止で
きる。その結果、金属ボール3aの形成が妨げられるこ
となく安定的に連続で突起電極3bを形成することが可
能となる。In FIG. 4C, after the metal ball 3a and the electrode 6a are joined, the capillary 4 is pulled up to cut the metal wire 3 near the boundary between the metal ball 3a and the metal wire 3 and the protruding electrode 3b. It is a figure which shows the state which formed.
By making both the diameter of the metal ball 3a and the height of the protruding electrode 3b at least larger than the thickness of the thermosetting resin 2, the tip of the capillary 4 comes into contact with the resin 2 when the protruding electrode is formed, and the tip is thermoset. The resin 2 can be prevented from adhering. As a result, it becomes possible to stably and continuously form the protruding electrodes 3b without hindering the formation of the metal balls 3a.
【0063】図4(d)は半導体素子1上の電極1aと
配線基板6上の突起電極3bとを位置合わせした状態を
示す図である。FIG. 4D is a view showing a state in which the electrode 1a on the semiconductor element 1 and the protruding electrode 3b on the wiring board 6 are aligned with each other.
【0064】図4(e)は半導体素子1と配線基板6と
を加熱した状態で押しつけ、はんだ材からなる突起電極
3bを溶融させて半導体素子1の電極1aに接合させる
とともに熱硬化型の樹脂2を硬化させて硬化した熱硬化
型の樹脂2aにした状態を示す図である。突起電極3b
の先端部が熱硬化型の樹脂2で覆われていないため、電
極1aとの接続が容易に実施される。また、突起電極3
bの周囲は熱硬化型の樹脂2で満たされているため、接
合中に溶融した突起電極同士の接触が妨げられ、ショー
ト不良が生じない。In FIG. 4 (e), the semiconductor element 1 and the wiring board 6 are pressed in a heated state to melt the protruding electrodes 3b made of a solder material to be bonded to the electrodes 1a of the semiconductor element 1 and a thermosetting resin. It is a figure which shows the state which hardened 2 and was made into the thermosetting type resin 2a hardened. Protruding electrode 3b
Since the tip portion of is not covered with the thermosetting resin 2, the connection with the electrode 1a is easily performed. In addition, the protruding electrode 3
Since the periphery of b is filled with the thermosetting resin 2, the contact between the protruding electrodes melted during the joining is prevented, and a short circuit failure does not occur.
【0065】なお、接合時には半導体素子1を配線基板
6に押しあてて、熱硬化型の樹脂2が半導体素子1と配
線基板6との隙間になじむまでは半導体素子1の温度
は、熱硬化型の樹脂2の粘度が最小となる温度に保持
し、その後半導体素子1の温度を接合温度に上昇させ
た。At the time of joining, the temperature of the semiconductor element 1 is kept at the thermosetting type until the semiconductor element 1 is pressed against the wiring board 6 and the thermosetting type resin 2 fits into the gap between the semiconductor element 1 and the wiring board 6. The temperature of the resin 2 was maintained at a temperature at which the viscosity of the resin 2 was minimum, and then the temperature of the semiconductor element 1 was raised to the bonding temperature.
【0066】本実施の形態では、実施の形態1に対し
て、半導体素子1と配線基板6とを入れ替えた構造にな
っていることを除いては同様であるので、実施の形態1
で説明した工程と同様にして、図4(a)〜図4(e)
に示した工程を行い配線基板6上の電極6a(突起電
極)と半導体素子1上の電極1aとを接合させる。The present embodiment is the same as the first embodiment except that the semiconductor element 1 and the wiring board 6 are replaced with each other. Therefore, the first embodiment is the same as the first embodiment.
4 (a) to 4 (e) in the same manner as the process described in FIG.
The process shown in FIG. 3 is performed to bond the electrode 6a (projection electrode) on the wiring board 6 and the electrode 1a on the semiconductor element 1.
【0067】本実施の形態ではエポキシ系の熱硬化型の
樹脂を用いたため、粘度が最小となる120℃で行っ
た。また、本実施の形態では熱硬化型の樹脂2は突起電
極3bと電極1aとを接合した状態のまま半導体素子1
の温度を上昇させて硬化させたが、他に半導体素子1が
接合された配線基板6をオーブン中で加熱することによ
って熱硬化型の樹脂2を硬化させることもできる。In this embodiment, since an epoxy thermosetting resin is used, the temperature is 120 ° C., which minimizes the viscosity. In addition, in the present embodiment, the thermosetting resin 2 is used as the semiconductor element 1 while the protruding electrode 3b and the electrode 1a are bonded to each other.
However, the thermosetting resin 2 can be cured by heating the wiring substrate 6 to which the semiconductor element 1 is bonded in an oven.
【0068】なお、半導体素子1と配線基板6とを接合
するとき、接続界面に酸化膜が存在すると、突起電極3
bと電極6aとの間の金属的な接触が阻害されて接続強
度が低下するが、半導体素子1を配線基板6に押しつけ
た際に、半導体素子1に超音波振動5を印加して電極1
aおよび突起電極3bの表面の酸化膜を除去することに
よって、高い接続強度で接合できた。When the semiconductor element 1 and the wiring board 6 are joined, if the oxide film exists at the connection interface, the bump electrode 3
Although the metallic contact between b and the electrode 6a is hindered and the connection strength is reduced, when the semiconductor element 1 is pressed against the wiring board 6, ultrasonic vibration 5 is applied to the semiconductor element 1 to apply the electrode 1 to the electrode 1.
By removing the oxide film on the surfaces of a and the protruding electrode 3b, it was possible to join with high connection strength.
【0069】本実施の形態では、半導体素子上の電極と
配線基板上の電極(突起電極)との接合と同時に半導体
素子と配線基板との隙間への熱硬化型の樹脂の充填が完
了するため、従来方法のように半導体素子と配線基板と
の接合後、樹脂を注入する必要がなく、生産性を著しく
向上することが可能となる。さらに、接合後に樹脂を充
填するのではなく、突起電極形成前に樹脂を形成させて
いるので、樹脂の充填部に気泡を巻き込むことがない。
また、半導体素子上の電極と配線基板上の電極(突起電
極)との接合時には、突起電極間には樹脂が充填されて
いるので、接合時に隣り合う突起電極同士の接触を防止
することができる。In the present embodiment, the filling of the thermosetting resin into the gap between the semiconductor element and the wiring board is completed at the same time when the electrodes on the semiconductor element and the electrodes (projection electrodes) on the wiring board are joined. Since it is not necessary to inject resin after joining the semiconductor element and the wiring board as in the conventional method, it is possible to remarkably improve the productivity. Furthermore, since the resin is formed before the formation of the protruding electrodes, rather than being filled with the resin after joining, bubbles are not caught in the resin-filled portion.
Further, when the electrodes on the semiconductor element and the electrodes (projection electrodes) on the wiring board are bonded, resin is filled between the projection electrodes, so that it is possible to prevent contact between adjacent projection electrodes at the time of bonding. .
【0070】実施の形態5.図5はこの実施の形態5に
よる半導体装置の製造方法を示す図であり、図において
8は金、銀あるいは銅からなる金属ワイヤ、8aは金属
ワイヤ先端に形成された金属ボール、8bは突起電極、
その他の符号は実施の形態1と同様であるので説明は省
略する。Embodiment 5. 5A and 5B are views showing a method of manufacturing a semiconductor device according to the fifth embodiment, in which 8 is a metal wire made of gold, silver or copper, 8a is a metal ball formed at the tip of the metal wire, and 8b is a protruding electrode. ,
Since other reference numerals are the same as those in the first embodiment, the description thereof will be omitted.
【0071】図5(a)は半導体素子1上に熱硬化型の
樹脂2を配置した状態を示す図で、金属ワイヤ8の先端
には熱硬化型の樹脂2の厚さよりも直径の大きい金属ボ
ール8aが形成されている。FIG. 5A is a view showing a state in which the thermosetting resin 2 is arranged on the semiconductor element 1. The tip of the metal wire 8 has a diameter larger than that of the thermosetting resin 2. A ball 8a is formed.
【0072】図5(b)は半導体素子1を加熱した状態
で金属ボール8aを半導体素子1上の電極1aに押しつ
け、キャピラリ4に超音波5を印加することによって金
属ボール8aと電極1aとを接合した状態を示す図で、
半導体素子1を加熱することにより、熱硬化型の樹脂2
の粘度を低下させ、接合部からの樹脂2の排除が容易と
なる。なお、金属ボールを電極1aに押しつける力は2
0〜200gであり、超音波の強さは0.15〜0.8
wである。In FIG. 5B, the metal ball 8a is pressed against the electrode 1a on the semiconductor element 1 in a state where the semiconductor element 1 is heated, and an ultrasonic wave 5 is applied to the capillary 4 to separate the metal ball 8a and the electrode 1a. In the figure showing the joined state,
By heating the semiconductor element 1, a thermosetting resin 2
The viscosity of is reduced, and the resin 2 can be easily removed from the joint. The force for pressing the metal ball against the electrode 1a is 2
0-200g, ultrasonic intensity is 0.15-0.8
w.
【0073】図5(c)は金属ボール8aと電極1aと
を接合した後、キャピラリ4を上方に引き上げて金属ボ
ール8aと金属ワイヤ8との境界付近で金属ワイヤ8を
切断し、突起電極8bを形成した状態を示す図で、金属
ボール8aの直径及び突起電極8bの高さをいずれも少
なくとも熱硬化型の樹脂2の厚さより大きくすることで
突起電極形成時にキャピラリ4の先端が樹脂2に接触
し、先端に樹脂2が付着することが妨げられる。その結
果、金属ボール8aの形成を妨げることなく安定的に連
続で突起電極8bを形成することが可能となる。この実
施の形態では100μmピッチの電極間隔の半導体素子
に厚さ30μmの熱硬化型の樹脂を設置し、線径25μ
mの金ワイヤを用いて直径70μmの金属ボールを形成
し、高さ47μmの突起電極を形成した。In FIG. 5C, after bonding the metal ball 8a and the electrode 1a, the capillary 4 is pulled up to cut the metal wire 8 near the boundary between the metal ball 8a and the metal wire 8 and the protruding electrode 8b. In the figure showing the state in which the tips of the capillaries 4 are formed on the resin 2 at the time of forming the protruding electrodes by making the diameter of the metal balls 8a and the height of the protruding electrodes 8b at least larger than the thickness of the thermosetting resin 2. It makes contact and prevents the resin 2 from adhering to the tip. As a result, it becomes possible to stably and continuously form the protruding electrodes 8b without hindering the formation of the metal balls 8a. In this embodiment, a thermosetting resin having a thickness of 30 μm is installed on a semiconductor element having an electrode interval of 100 μm pitch and a wire diameter of 25 μm.
A metal ball having a diameter of 70 μm was formed by using a gold wire of m, and a protruding electrode having a height of 47 μm was formed.
【0074】図5(d)は半導体素子1上の電極1aに
形成された突起電極8bと配線基板6の電極6aとを位
置合わせした状態を示す図である。本実施の形態では配
線基板6にはアルミナ基板を用いたが、他にガラスセラ
ミックス等のセラミックスやプリント基板等の樹脂基板
を用いてもよい。以上、図5(a)〜図5(d)に示し
た工程は、実施の形態1の図1(a)〜図1(d)の状
態を形成するのと同様にして形成される。FIG. 5D is a view showing a state in which the protruding electrode 8b formed on the electrode 1a on the semiconductor element 1 and the electrode 6a of the wiring board 6 are aligned with each other. Although an alumina substrate is used as the wiring substrate 6 in the present embodiment, other ceramics such as glass ceramics or a resin substrate such as a printed circuit board may be used. As described above, the steps shown in FIGS. 5A to 5D are formed in the same manner as the state shown in FIGS. 1A to 1D of the first embodiment.
【0075】次に、半導体素子1と配線基板6とを加熱
した状態で押しつけて、突起電極8bと電極6aとを接
合するとともに熱硬化型の樹脂2を硬化させ、半導体素
子1上の電極1aと配線基板6上の電極6aとの結合及
び半導体素子1と配線基板6との結合を行う。Next, the semiconductor element 1 and the wiring board 6 are pressed in a heated state to bond the protruding electrode 8b and the electrode 6a together and to cure the thermosetting resin 2 to cure the electrode 1a on the semiconductor element 1. And the electrodes 6a on the wiring substrate 6 and the semiconductor element 1 and the wiring substrate 6 are coupled.
【0076】このとき、半導体素子1の電極1a上に設
けられた突起電極8b及び配線基板6上の電極6a表面
の酸化皮膜を除去して突起電極8bと電極6aとを固相
接合で接合する。固相接合は熱圧着でも達成できるが、
半導体素子1を配線基板6に押しつけた状態で半導体素
子1に超音波振動5を印加すれば、両電極間の酸化皮膜
の除去が容易になり、接合時間の短縮、接合温度・接合
荷重の低減が可能となる。図5(e)は上記のようにし
て、半導体素子1と配線基板6とを結合させた状態を示
した図である。At this time, the protruding electrode 8b provided on the electrode 1a of the semiconductor element 1 and the oxide film on the surface of the electrode 6a on the wiring substrate 6 are removed to bond the protruding electrode 8b and the electrode 6a by solid phase bonding. . Solid phase bonding can be achieved by thermocompression bonding,
If the ultrasonic vibration 5 is applied to the semiconductor element 1 while the semiconductor element 1 is pressed against the wiring board 6, the oxide film between both electrodes can be easily removed, and the joining time can be shortened and the joining temperature and the joining load can be reduced. Is possible. FIG. 5E is a diagram showing a state in which the semiconductor element 1 and the wiring board 6 are combined as described above.
【0077】本実施の形態では、突起電極1つあたりの
接合荷重を20〜200g、突起電極1つあたりの超音
波の強さを0.15〜0.8w、超音波未使用時の接合
温度を250〜400℃、超音波使用時の接合温度を1
00〜250℃とした。また、接合時には半導体素子1
を配線基板6に押しあてて、熱硬化型の樹脂2が半導体
素子1と配線基板6との隙間になじむまでは半導体素子
1の温度は、熱硬化型の樹脂2の粘度が最小となる温度
に保持し、その後半導体素子1の温度を接合温度に上昇
させた。In the present embodiment, the bonding load per protruding electrode is 20 to 200 g, the strength of ultrasonic waves per protruding electrode is 0.15 to 0.8 w, and the bonding temperature when ultrasonic waves are not used. 250-400 ℃, the bonding temperature when using ultrasonic wave is 1
The temperature was set to 00 to 250 ° C. Further, at the time of joining, the semiconductor element 1
Is pressed against the wiring board 6, and the thermosetting resin 2 is a semiconductor.
The temperature of the semiconductor element 1 was kept at a temperature at which the viscosity of the thermosetting resin 2 became the minimum until it fits in the gap between the element 1 and the wiring board 6, and then the temperature of the semiconductor element 1 was raised to the bonding temperature. .
【0078】本実施の形態ではエポキシ系の熱硬化型の
樹脂を用いたため、粘度が最小となる120℃で行っ
た。熱硬化型の樹脂2は突起電極8bと電極6aとを接
合した状態のまま半導体素子1の温度を上昇させて硬化
させたが、他に半導体素子1が接合された配線基板6を
オーブン中で加熱することによって熱硬化型の樹脂2を
硬化させることもできる。なお、本実施の形態では10
0μmピッチの微細電極間隔を有する半導体素子を配線
基板に接合することができた。In this embodiment, since an epoxy thermosetting resin is used, the temperature is set to 120 ° C. where the viscosity is minimized. The thermosetting resin 2 raised the temperature of the semiconductor element 1 and cured it while the protruding electrode 8b and the electrode 6a were still bonded, but the wiring board 6 to which the semiconductor element 1 was bonded was placed in an oven. The thermosetting resin 2 can be cured by heating. In this embodiment, 10
A semiconductor element having a fine electrode interval of 0 μm pitch could be bonded to the wiring board.
【0079】本実施の形態では、半導体素子上の電極
(突起電極)と配線基板上の電極との接合と同時に半導
体素子と配線基板との隙間への熱硬化型の樹脂2の充填
が完了するため、従来方法のように半導体素子と配線基
板との接合後、樹脂を注入する必要がなく、生産性を著
しく向上することが可能となる。さらに、接合後に樹脂
を充填するのではなく、突起電極形成前に樹脂を形成さ
せているので、樹脂の充填部に気泡を巻き込むことがな
い。In the present embodiment, filling of the thermosetting resin 2 into the gap between the semiconductor element and the wiring board is completed at the same time when the electrodes (projection electrodes) on the semiconductor element and the electrodes on the wiring board are joined. Therefore, unlike the conventional method, it is not necessary to inject the resin after joining the semiconductor element and the wiring board, and it is possible to significantly improve the productivity. Furthermore, since the resin is formed before the formation of the protruding electrodes, rather than being filled with the resin after joining, bubbles are not caught in the resin-filled portion.
【0080】実施の形態6.図6はこの実施の形態6に
よる半導体装置の製造方法を示す図である。図におい
て、7ははんだ材である。図中のその他の符号は実施の
形態5の図5と同様であるので説明は省略する。図6
(a)は半導体素子1上に熱硬化型の樹脂2を配置した
状態を示す図で、金属ワイヤ8の先端には熱硬化型の樹
脂2の厚さよりも直径の大きい金属ボール8aが形成さ
れている。Sixth Embodiment FIG. 6 is a diagram showing a method of manufacturing a semiconductor device according to the sixth embodiment. In the figure, 7 is a solder material. Other reference numerals in the figure are the same as those in FIG. 5 of the fifth embodiment, and therefore the description thereof is omitted. Figure 6
FIG. 3A is a diagram showing a state in which a thermosetting resin 2 is arranged on the semiconductor element 1. A metal ball 8a having a diameter larger than the thickness of the thermosetting resin 2 is formed at the tip of the metal wire 8. ing.
【0081】図6(b)は半導体素子1を加熱した状態
で金属ボール8aを半導体素子1上の電極1aに押しつ
け、キャピラリ4に超音波5を印加することによって金
属ボール8aと電極1aとを接合した状態を示す図で、
半導体素子1を加熱することにより、熱硬化型の樹脂2
の粘度を低下させ、接合部からの樹脂2の排除が容易と
なる。In FIG. 6B, the metal ball 8a is pressed against the electrode 1a on the semiconductor element 1 while the semiconductor element 1 is heated, and ultrasonic waves 5 are applied to the capillary 4, so that the metal ball 8a and the electrode 1a are separated from each other. In the figure showing the joined state,
By heating the semiconductor element 1, a thermosetting resin 2
The viscosity of is reduced, and the resin 2 can be easily removed from the joint.
【0082】図6(c)は金属ボール8aと電極1aと
を接合した後、キャピラリ4を上方に引き上げて金属ボ
ール8aと金属ワイヤ8との境界付近で金属ワイヤ8を
切断し、突起電極8bを形成した状態を示す図で、金属
ボール8aの直径及び突起電極8bの高さをいずれも少
なくとも熱硬化型の樹脂2の厚さより大きくすることで
突起電極形成時にキャピラリ4の先端が樹脂2に接触し
て先端に樹脂2が付着することを妨げることができる。
その結果、金属ボール8aの形成を妨げることなく安定
的に連続で突起電極8bを形成することが可能となる。In FIG. 6C, after the metal ball 8a and the electrode 1a are joined, the capillary 4 is pulled up to cut the metal wire 8 near the boundary between the metal ball 8a and the metal wire 8 and the protruding electrode 8b. In the figure showing the state in which the tips of the capillaries 4 are formed on the resin 2 at the time of forming the protruding electrodes by making the diameter of the metal balls 8a and the height of the protruding electrodes 8b at least larger than the thickness of the thermosetting resin 2. It is possible to prevent the resin 2 from contacting and adhering to the tip.
As a result, it becomes possible to stably and continuously form the protruding electrodes 8b without hindering the formation of the metal balls 8a.
【0083】図6(d)は半導体素子1上の突起電極8
bとはんだ材7が形成された配線基板6の電極6aとを
位置合わせした状態を示す図である。本実施の形態では
はんだ材7は銀と錫からなる合金としたが、他に錫、イ
ンジウムあるいは鉛−インジウム、鉛−錫−インジウ
ム、鉛−錫、金−錫の合金でもよい。FIG. 6D shows the protruding electrode 8 on the semiconductor element 1.
FIG. 6 is a diagram showing a state where b and the electrode 6a of the wiring substrate 6 on which the solder material 7 is formed are aligned. In the present embodiment, the solder material 7 is an alloy made of silver and tin, but it may be an alloy of tin, indium or lead-indium, lead-tin-indium, lead-tin, gold-tin.
【0084】図6(e)は半導体素子1と配線基板6と
を加熱した状態で押しつけて、突起電極8bと電極6a
とを接合するとともに熱硬化型の樹脂2を硬化させ熱硬
化型の樹脂2aにさせた状態を示す図である。はんだ材
7が設けられているので、はんだ材7の厚みにより、突
起電極8bの高さばらつき及び配線基板6の表面凹凸や
反りによる高さばらつきを吸収して突起電極8bが電極
6aに接触できないために発生するオープン不良を防止
できる効果がある。In FIG. 6 (e), the semiconductor element 1 and the wiring board 6 are pressed in a heated state, and the protruding electrode 8b and the electrode 6a are pressed.
It is a figure which shows the state which joined together with and hardened thermosetting type resin 2 to make thermosetting type resin 2a. Since the solder material 7 is provided, the thickness of the solder material 7 absorbs the height variation of the protruding electrode 8b and the height variation of the wiring substrate 6 due to the surface unevenness or warpage, and the protruding electrode 8b cannot contact the electrode 6a. This has the effect of preventing open defects that may occur.
【0085】なお、接合時に半導体素子1を配線基板6
に押しつけた状態で半導体素子1に超音波振動5を印加
すれば、両電極間の酸化皮膜の除去が容易になり、接合
時間の短縮、接合温度・接合荷重の低減が可能となる。
接合時には半導体素子1を配線基板6に押しあてて、熱
硬化型の樹脂2が半導体素子1と配線基板6との隙間に
なじむまでは半導体素子1の温度は、熱硬化型の樹脂2
の粘度が最小となる温度に保持し、その後半導体素子1
の温度を接合温度に上昇させた。The semiconductor element 1 is connected to the wiring board 6 at the time of bonding.
If the ultrasonic vibration 5 is applied to the semiconductor element 1 in a state of being pressed against, the oxide film between both electrodes can be easily removed, and the joining time can be shortened and the joining temperature and the joining load can be reduced.
At the time of bonding, the semiconductor element 1 is pressed against the wiring board 6, and the temperature of the semiconductor element 1 is kept at the temperature of the thermosetting resin 2 until the thermosetting resin 2 fits into the gap between the semiconductor element 1 and the wiring board 6.
The temperature is kept at a temperature at which the viscosity of the
Was raised to the junction temperature.
【0086】本実施の形態ではエポキシ系の熱硬化型の
樹脂を用いたため、粘度が最小となる120℃で行っ
た。熱硬化型の樹脂2は突起電極3bと電極6aとを接
合した状態のまま半導体素子1の温度を上昇させて硬化
させたが、他に半導体素子1が接合された配線基板6を
オーブン中で加熱することによって熱硬化型の樹脂2を
硬化させることもできる。In this embodiment, since an epoxy thermosetting resin is used, the process is performed at 120 ° C. where the viscosity is the minimum. The thermosetting resin 2 raised the temperature of the semiconductor element 1 and cured it while the protruding electrode 3b and the electrode 6a were still bonded, but the wiring substrate 6 to which the semiconductor element 1 was bonded was also placed in an oven. The thermosetting resin 2 can be cured by heating.
【0087】本実施の形態では、接合と同時に半導体素
子1と配線基板6との隙間への熱硬化型の樹脂2の充填
が完了するため、従来方法のように半導体素子1と配線
基板6との接合後、樹脂を注入する必要がなく生産性を
著しく向上することが可能となる。In the present embodiment, the filling of the thermosetting resin 2 into the gap between the semiconductor element 1 and the wiring board 6 is completed at the same time as the bonding, so that the semiconductor element 1 and the wiring board 6 are connected to each other as in the conventional method. After joining, it is not necessary to inject a resin, and the productivity can be remarkably improved.
【0088】また、半導体素子1と配線基板6との接合
において、はんだ材7を溶融させたところ、突起電極8
bの周囲に溶融したはんだ材7と突起電極を形成する金
との合金よりなるフィレットが形成され、接合強度が増
加した。In addition, when the solder material 7 was melted in joining the semiconductor element 1 and the wiring board 6, the protruding electrode 8
A fillet made of an alloy of the molten solder material 7 and gold forming the protruding electrode was formed around b, and the bonding strength was increased.
【0089】実施の形態7.図7はこの実施の形態7に
よる半導体装置の製造方法を示す図である。図中の符号
は実施の形態5の図5と同様であるので説明は省略す
る。実施の形態5では、半導体素子上の電極に突起電極
を形成し、この突起電極と配線基板上の電極とを接合さ
せているが、本実施の形態では、配線基板上の電極に突
起電極を形成し、この突起電極と半導体素子上の電極と
を接合させるようにしている。Seventh Embodiment FIG. 7 is a diagram showing a method of manufacturing a semiconductor device according to the seventh embodiment. Since the reference numerals in the figure are the same as those in FIG. 5 of the fifth embodiment, the description thereof will be omitted. In the fifth embodiment, the protruding electrode is formed on the electrode on the semiconductor element, and the protruding electrode and the electrode on the wiring board are joined together. However, in the present embodiment, the protruding electrode is formed on the electrode on the wiring board. The bump electrodes are formed and the electrodes on the semiconductor element are bonded to each other.
【0090】図7(a)は配線基板6上に熱硬化型の樹
脂2を配置し、金属ワイヤ8の先端に熱硬化型の樹脂2
の厚さよりも直径の大きい金属ボール8aを形成した状
態を示す図である。In FIG. 7A, the thermosetting resin 2 is arranged on the wiring board 6, and the thermosetting resin 2 is attached to the tip of the metal wire 8.
It is a figure which shows the state which formed the metal ball 8a whose diameter is larger than the thickness of.
【0091】図7(b)は配線基板6を加熱した状態で
金属ボール8aを配線基板6上の電極6aに押しつけ、
キャピラリ4に超音波5を印加することによって金属ボ
ール8aと電極6aとを接合した状態を示す図である。
また、熱硬化型の樹脂2の粘度を低下させ、接合部から
の樹脂2の排除が容易となるために配線基板6を加熱し
た。金属ボールを電極6aに押しつける力は20〜20
0gであり、超音波の強さは0.15〜0.8wであ
る。In FIG. 7B, the metal balls 8a are pressed against the electrodes 6a on the wiring board 6 while the wiring board 6 is heated,
It is a figure which shows the state which joined the metal ball 8a and the electrode 6a by applying the ultrasonic wave 5 to the capillary 4.
In addition, the wiring board 6 was heated in order to reduce the viscosity of the thermosetting resin 2 and facilitate the removal of the resin 2 from the joint. The force of pressing the metal ball against the electrode 6a is 20 to 20.
The ultrasonic wave intensity is 0.15 to 0.8 w.
【0092】図7(c)は金属ボール8aと電極6aと
を接合した後、キャピラリ4を上方に引き上げて金属ボ
ール8aと金属ワイヤ8との境界付近で金属ワイヤ8を
切断し、突起電極8bを形成した状態を示す図である。
金属ボール8aの直径及び突起電極8bの高さをいずれ
も少なくとも熱硬化型の樹脂2の厚さより大きくするこ
とで、突起電極形成時にキャピラリ4の先端が樹脂2に
接触し、先端に樹脂2が付着するのを防止できる。その
結果、金属ボール8aの形成を妨げることなく安定的に
連続で突起電極8bを形成することが可能となる。In FIG. 7C, after the metal ball 8a and the electrode 6a are joined, the capillary 4 is pulled up to cut the metal wire 8 near the boundary between the metal ball 8a and the metal wire 8, and the protruding electrode 8b. It is a figure which shows the state which formed.
By making both the diameter of the metal ball 8a and the height of the protruding electrode 8b at least larger than the thickness of the thermosetting resin 2, the tip of the capillary 4 comes into contact with the resin 2 when the protruding electrode is formed, and the resin 2 is attached to the tip. It can prevent the adhesion. As a result, it becomes possible to stably and continuously form the protruding electrodes 8b without hindering the formation of the metal balls 8a.
【0093】図7(d)は配線基板6上の電極6aに形
成された突起電極8bと半導体素子1上の電極1aとを
位置合わせした状態を示す図である。FIG. 7D is a view showing a state in which the protruding electrode 8b formed on the electrode 6a on the wiring substrate 6 and the electrode 1a on the semiconductor element 1 are aligned with each other.
【0094】図7(e)は半導体素子1と配線基板6と
を加熱した状態で押しつけ、突起電極8bと電極1aと
を熱圧着で固相接合されるとともに熱硬化型の樹脂2が
硬化して硬化した熱硬化型の樹脂2aになった状態を示
す図である。電極1aと突起電極8bとは熱圧着でも接
合できるが、半導体素子1を配線基板6に押しつけた状
態で半導体素子1に超音波振動を印加すれば、両電極間
の酸化皮膜の除去が容易になり、接合時間の短縮、接合
温度・接合荷重の低減が可能となる。In FIG. 7E, the semiconductor element 1 and the wiring board 6 are pressed in a heated state, the protruding electrode 8b and the electrode 1a are solid-phase bonded by thermocompression bonding, and the thermosetting resin 2 is cured. It is a figure which shows the state which became the thermosetting resin 2a hardened | cured. The electrode 1a and the protruding electrode 8b can be joined by thermocompression bonding, but if ultrasonic vibration is applied to the semiconductor element 1 while the semiconductor element 1 is pressed against the wiring board 6, the oxide film between the electrodes can be easily removed. Therefore, it becomes possible to shorten the joining time and the joining temperature and the joining load.
【0095】本実施の形態では、突起電極1つあたりの
接合荷重を20〜200g、突起電極1つあたりの超音
波の強さを0.15〜0.8w、超音波未使用時での接
合温度を250〜400℃、超音波使用時での接合温度
を100〜250℃とした。なお、接合時には半導体素
子1を配線基板6に押しあてて、熱硬化型の樹脂2が半
導体素子1と配線基板6との隙間になじむまでは半導体
素子1の温度は、熱硬化型の樹脂2の粘度が最小となる
温度に保持し、その後半導体素子1の温度を接合温度に
上昇させて接合を行った。In this embodiment, the bonding load per protruding electrode is 20 to 200 g, the ultrasonic intensity per protruding electrode is 0.15 to 0.8 w, and the bonding is performed when the ultrasonic wave is not used. The temperature was 250 to 400 ° C., and the bonding temperature when using ultrasonic waves was 100 to 250 ° C. Incidentally, at the time of bonding by pressing the semiconductor element 1 on the wiring board 6, the temperature of the semiconductor element 1 is to fit in the gap of the resin 2 of thermosetting type semiconductor element 1 and the wiring board 6, the thermosetting resin 2 The temperature of the semiconductor element 1 was maintained at a temperature at which the viscosity was minimum, and then the temperature of the semiconductor element 1 was raised to the bonding temperature for bonding.
【0096】本実施の形態ではエポキシ系の熱硬化型の
樹脂を用いたため、粘度が最小となる120℃で行っ
た。熱硬化型の樹脂2は突起電極8bと電極6aとを接
合した状態のまま半導体素子1の温度を上昇させて硬化
させたが、他に半導体素子1が接合された配線基板6を
オーブン中で加熱することによって熱硬化型の樹脂2を
硬化させることもできる。In this embodiment, since the epoxy type thermosetting resin is used, the process is performed at 120 ° C. where the viscosity is minimum. The thermosetting resin 2 raised the temperature of the semiconductor element 1 and cured it while the protruding electrode 8b and the electrode 6a were still bonded, but the wiring board 6 to which the semiconductor element 1 was bonded was placed in an oven. The thermosetting resin 2 can be cured by heating.
【0097】本実施の形態では、接合と同時に半導体素
子1と配線基板6との隙間への熱硬化型の樹脂2の充填
が完了するため、従来方法のように半導体素子1と配線
基板6との接合後、樹脂を注入する必要がなく生産性を
著しく向上することが可能となる。In the present embodiment, the filling of the thermosetting resin 2 into the gap between the semiconductor element 1 and the wiring board 6 is completed at the same time as the joining, so that the semiconductor element 1 and the wiring board 6 are connected to each other as in the conventional method. After joining, it is not necessary to inject a resin, and the productivity can be remarkably improved.
【0098】なお、本実施の形態1から6において、突
起電極を形成する工程が終了した後、突起電極を平板に
押しつけて突起電極の先端部を変形させてあらかじめ各
突起電極を所定の高さでそろえておいてもよい。In the first to sixth embodiments, after the step of forming the protruding electrodes is completed, the protruding electrodes are pressed against the flat plate to deform the tips of the protruding electrodes so that each protruding electrode has a predetermined height in advance. You can also arrange them.
【0099】実施の形態8.図8はこの実施の形態8に
よる半導体装置の製造方法を示す図であり、図において
9は金、銀、銅あるいは鉛−錫、銀−錫の合金よりなる
金属ワイヤ、9aは金属ワイヤ9の先端に形成された金
属ボール、9bは金、銀、銅あるいは鉛−錫、銀−錫の
合金からなるワイヤ材を用いて形成した突起電極、10
は平板、11は異方性導電フィルム(ACF)、11a
は硬化したACFであり、その他の符号は実施の形態1
の図1と同様であるので説明は省略する。Eighth Embodiment FIG. 8 is a diagram showing a method of manufacturing a semiconductor device according to the eighth embodiment, in which 9 is a metal wire made of gold, silver, copper or a lead-tin or silver-tin alloy, and 9a is a metal wire 9. A metal ball formed on the tip, 9b is a protruding electrode formed by using a wire material made of gold, silver, copper or a lead-tin or silver-tin alloy, 10
Is a flat plate, 11 is an anisotropic conductive film (ACF), 11a
Is a cured ACF, and other reference numerals are the same as those in the first embodiment.
Since it is the same as that of FIG.
【0100】図8(a)は半導体素子1上に熱硬化型の
樹脂2を配置し、金属ワイヤ9の先端に熱硬化型の樹脂
2の厚さよりも直径の大きい金属ボール9aを形成した
状態を示す図である。FIG. 8A shows a state in which a thermosetting resin 2 is arranged on the semiconductor element 1 and a metal ball 9a having a diameter larger than the thickness of the thermosetting resin 2 is formed at the tip of the metal wire 9. FIG.
【0101】図8(b)は半導体素子1を加熱した状態
で金属ボール9aを半導体素子1上の電極1aに押しつ
け、キャピラリ4に超音波5を印加することによって金
属ボール9aと電極1aとを接合した状態を示す図で、
熱硬化型の樹脂2の粘度を低下させ、接合部からの樹脂
2の排除が容易となるために半導体素子1を加熱した。In FIG. 8B, the metal ball 9a is pressed against the electrode 1a on the semiconductor element 1 while the semiconductor element 1 is heated, and an ultrasonic wave 5 is applied to the capillary 4, so that the metal ball 9a and the electrode 1a are separated from each other. In the figure showing the joined state,
The semiconductor element 1 was heated in order to reduce the viscosity of the thermosetting resin 2 and facilitate the removal of the resin 2 from the joint.
【0102】図8(c)は金属ボール9aと電極1aと
を接合した後、キャピラリ4を上方に引き上げて金属ボ
ール9aと金属ワイヤ9との境界付近で金属ワイヤ9を
切断し、突起電極9bを形成した状態を示す図で、金属
ボール9aの直径及び突起電極9bの高さをいずれも少
なくとも熱硬化型の樹脂2の厚さより大きくすることで
突起電極形成時にキャピラリ4の先端が樹脂2に接触し
て先端に樹脂2が付着することを防ぐことができる。そ
の結果、金属ボール9aの形成を妨げることなく安定的
に連続で突起電極9bを形成することが可能となる。In FIG. 8C, after the metal ball 9a and the electrode 1a are joined, the capillary 4 is pulled up to cut the metal wire 9 near the boundary between the metal ball 9a and the metal wire 9, and the protruding electrode 9b. In the figure showing the state in which the tips of the capillaries 4 are formed on the resin 2 at the time of forming the protruding electrodes by making the diameter of the metal balls 9a and the height of the protruding electrodes 9b at least larger than the thickness of the thermosetting resin 2. It is possible to prevent the resin 2 from adhering to the tip due to contact. As a result, it becomes possible to stably and continuously form the protruding electrodes 9b without hindering the formation of the metal balls 9a.
【0103】以上、図8(a)〜図8(c)に示したよ
うに、実施の形態1で説明したのと同様にして、半導体
素子1の電極1a上に突起電極9bを形成する。As described above, as shown in FIGS. 8A to 8C, the protruding electrode 9b is formed on the electrode 1a of the semiconductor element 1 in the same manner as described in the first embodiment.
【0104】図8(c)に示したように、半導体素子1
の電極1a上に突起電極9bを形成した後、この突起電
極9bの先端部を平板10で加圧する。このように突起
電極9bの先端部を平板10で加圧することにより、突
起電極9bの先端部に平坦な面が形成されると同時に複
数の突起電極9bの高さを均一にそろえることができ
る。図8(d)は、上記のようにして突起電極9bの先
端を平板10で加圧することにより突起電極9bの先端
に平坦な面を形成すると同時に高さを均一にそろえた状
態を示す図である。As shown in FIG. 8C, the semiconductor device 1
After the protruding electrode 9b is formed on the electrode 1a, the tip of the protruding electrode 9b is pressed by the flat plate 10. By pressing the tip of the protruding electrode 9b with the flat plate 10 in this manner, a flat surface is formed on the tip of the protruding electrode 9b, and at the same time, the heights of the plurality of protruding electrodes 9b can be made uniform. FIG. 8D is a view showing a state where the tip of the protruding electrode 9b is pressed by the flat plate 10 as described above to form a flat surface on the tip of the protruding electrode 9b and at the same time the heights thereof are evenly aligned. is there.
【0105】次に、配線基板6上に少なくとも電極6a
全てが覆われるようにACFを形成し、半導体素子1の
電極1a上に設けられた突起電極9bと配線基板6上の
電極6aとが対向するように位置合わせをする。図8
(e)は、上記のようにして半導体素子1の電極1a
(突起電極9b)と配線基板6上の電極6aとを位置合
わせした状態を示す図である。Next, at least the electrode 6a is formed on the wiring board 6.
The ACF is formed so as to cover everything, and the alignment is performed so that the protruding electrode 9b provided on the electrode 1a of the semiconductor element 1 and the electrode 6a on the wiring board 6 face each other. Figure 8
(E) is the electrode 1a of the semiconductor element 1 as described above
It is a figure which shows the state which aligned the (protrusion electrode 9b) and the electrode 6a on the wiring board 6.
【0106】位置合わせ後、半導体素子1と配線基板6
とを加熱した状態で押しつけ、突起電極9bと電極6a
とを電気的に接続させるとともに、さらに加熱を続けて
熱硬化型の樹脂2及びACF11をそれぞれ硬化させ
る。このとき、半導体素子1の電極1a上に設けられた
突起電極9bの先端部が平坦な面をし、突起電極9bの
高さがそろえられているので、ACFを介して配線基板
6上の電極6aと適切な電気的接続がなされる。図8
(f)は上記のようにして突起電極9bと電極6aとを
電気的に接続した後、熱硬化型の樹脂2及びACF11
をそれぞれ硬化させた状態を示す図である。After alignment, the semiconductor element 1 and the wiring board 6
And are pressed in a heated state, and the protruding electrode 9b and the electrode 6a
Are electrically connected to each other, and heating is further continued to cure the thermosetting resin 2 and the ACF 11 respectively. At this time, since the tip end portion of the bump electrode 9b provided on the electrode 1a of the semiconductor element 1 has a flat surface and the heights of the bump electrodes 9b are aligned, the electrodes on the wiring substrate 6 are interposed via the ACF. A proper electrical connection is made with 6a. Figure 8
(F) shows the thermosetting resin 2 and the ACF 11 after electrically connecting the protruding electrode 9b and the electrode 6a as described above.
It is a figure which shows the state which each was hardened.
【0107】本実施の形態では、突起電極を平板で変形
させる際、熱硬化型の樹脂があるため、突起電極の横方
向の変形が防止されて各突起電極間の距離が小さい場合
にもショート不良が生じない効果がある。In this embodiment, since the thermosetting resin is used when the protruding electrodes are deformed by a flat plate, the protruding electrodes are prevented from being deformed in the lateral direction and short-circuiting occurs even if the distance between the protruding electrodes is small. It has the effect of not causing defects.
【0108】実施の形態9.図9はこの発明の実施の形
態9による半導体装置の製造方法を示す図であり、図中
の符号は実施の形態8の図8と同様であるので説明は省
略する。実施の形態8では、半導体素子上の電極に突起
電極を形成し、この突起電極と配線基板上の電極とを接
合させているが、本実施の形態では、配線基板上の電極
に突起電極を形成し、この突起電極と半導体素子上の電
極とを接合させるようにしている。Ninth Embodiment FIG. 9 is a diagram showing a method of manufacturing a semiconductor device according to a ninth embodiment of the present invention, and the reference numerals in the figure are the same as those in FIG. 8 of the eighth embodiment, and therefore the description thereof will be omitted. In the eighth embodiment, the protruding electrode is formed on the electrode on the semiconductor element and the protruding electrode and the electrode on the wiring board are joined together. However, in the present embodiment, the protruding electrode is formed on the electrode on the wiring board. The bump electrodes are formed and the electrodes on the semiconductor element are bonded to each other.
【0109】図9(a)は配線基板6上に熱硬化型の樹
脂2を配置し、金属ワイヤ9の先端に熱硬化型の樹脂2
の厚さよりも直径の大きい金属ボール9aを形成した状
態を示す図である。In FIG. 9A, the thermosetting resin 2 is arranged on the wiring board 6, and the thermosetting resin 2 is attached to the tip of the metal wire 9.
It is a figure which shows the state which formed the metal ball 9a whose diameter is larger than the thickness of.
【0110】図9(b)は配線基板6を加熱した状態で
金属ボール9aを配線基板6上の電極6aに押しつけ、
キャピラリ4に超音波5を印加することによって金属ボ
ール9aと電極6aとを接合した状態を示す図で、熱硬
化型の樹脂2の粘度を低下させ、接合部からの樹脂2の
排除が容易となるために配線基板6を加熱した。In FIG. 9B, the metal balls 9a are pressed against the electrodes 6a on the wiring board 6 while the wiring board 6 is heated.
FIG. 3 is a diagram showing a state in which the metal ball 9a and the electrode 6a are joined by applying an ultrasonic wave 5 to the capillary 4, and the viscosity of the thermosetting resin 2 is reduced, so that the resin 2 can be easily removed from the joined portion. Therefore, the wiring board 6 was heated.
【0111】図9(c)は金属ボール9aと電極6aと
を接合した後、キャピラリ4を上方に引き上げて金属ボ
ール9aと金属ワイヤ9との境界付近で金属ワイヤ9を
切断し、突起電極9bを形成した状態を示す図で、金属
ボール9aの直径及び突起電極9bの高さをいずれも少
なくとも熱硬化型の樹脂2の厚さより大きくすることで
突起電極形成時にキャピラリ4の先端が樹脂2に接触し
て先端に樹脂2が付着することを防ぐことができる。そ
の結果、金属ボール9aの形成を妨げることなく安定的
に連続で突起電極9bを形成することが可能となる。In FIG. 9C, after the metal ball 9a and the electrode 6a are joined, the capillary 4 is pulled up to cut the metal wire 9 near the boundary between the metal ball 9a and the metal wire 9, and the protruding electrode 9b. In the figure showing the state in which the tips of the capillaries 4 are formed on the resin 2 at the time of forming the protruding electrodes by making the diameter of the metal balls 9a and the height of the protruding electrodes 9b at least larger than the thickness of the thermosetting resin 2. It is possible to prevent the resin 2 from adhering to the tip due to contact. As a result, it becomes possible to stably and continuously form the protruding electrodes 9b without hindering the formation of the metal balls 9a.
【0112】図9(d)は配線基板6上の電極6aに形
成した突起電極3cの先端を平板10で加圧することに
よって突起電極9bの先端に平坦な面を形成すると同時
に高さを均一にそろえた状態を示す図である。FIG. 9D shows that the tip of the protruding electrode 3c formed on the electrode 6a on the wiring board 6 is pressed by the flat plate 10 to form a flat surface on the tip of the protruding electrode 9b and at the same time make the height uniform. It is a figure which shows the aligned state.
【0113】図9(e)は半導体素子1に少なくとも電
極1a全てが覆われるようにACFを設置し、配線基板
6上の突起電極9bと電極1aとを位置合わせした状態
を示す図である。FIG. 9E is a diagram showing a state in which the ACF is installed on the semiconductor element 1 so that at least all the electrodes 1a are covered, and the protruding electrodes 9b on the wiring substrate 6 and the electrodes 1a are aligned with each other.
【0114】図9(f)は半導体素子1と配線基板6と
を加熱した状態で押しつけ、突起電極9bと電極1aと
が電気的に接続されるとともに、さらに加熱を続けて熱
硬化型の樹脂2及びACF11をそれぞれ硬化させ熱硬
化型の樹脂2a及びACF11aにさせた状態を示す図
である。突起電極9bを平板10で変形させる際には、
熱硬化型の樹脂2があるため、突起電極9bの横方向の
変形が防止されて各突起電極9b間の距離が小さい場合
にもショート不良が生じない効果がある。In FIG. 9 (f), the semiconductor element 1 and the wiring board 6 are pressed in a heated state, the protruding electrodes 9b and the electrodes 1a are electrically connected, and further heating is continued to form a thermosetting resin. It is a figure which shows the state which hardened | cured 2 and ACF11, respectively, and was made into thermosetting type resin 2a and ACF11a. When deforming the protruding electrode 9b with the flat plate 10,
Since the thermosetting resin 2 is provided, the deformation of the protruding electrodes 9b in the lateral direction is prevented, and even if the distance between the protruding electrodes 9b is small, there is an effect that a short circuit defect does not occur.
【0115】本実施の形態では、実施の形態8と半導体
素子1と配線基板6とを入れ替えた構造をしていること
を除いては同様であるので、実施の形態8で説明した工
程と同様にして、図9(a)〜図9(f)に示した工程
を行い配線基板6上の電極6a(突起電極)と半導体素
子1上の電極1aとを接合させる。The present embodiment is the same as the eighth embodiment except that the semiconductor element 1 and the wiring board 6 are replaced with each other. Therefore, the same steps as those described in the eighth embodiment are performed. a manner, FIG. 9 (a) ~ 9 and is bonded to the electrodes 1a of the semiconductor element 1 electrode 6a on the wiring board 6 performs the process shown in (f) (protruding electrodes).
【0116】本発明の実施の形態5または6において、
突起電極を平板で変形させる前にあらかじめ熱硬化型の
樹脂を硬化させた状態にしておくと、突起電極の横方向
の変形をさらに低減させることが可能となる。例えば、
熱硬化型の樹脂を設けないでφ25μmの金ワイヤを用
いて直径70μm、高さ47μmの突起電極を半導体素
子1上に160個形成し、平板で荷重15kgで突起電
極を変形させた場合、突起電極の先端にφ58μm程度
の平坦部が形成され、直径は83μmと13μm広が
り、高さは35μmとなる。In the fifth or sixth embodiment of the present invention,
If the thermosetting resin is cured in advance before the protruding electrode is deformed by the flat plate, the lateral deformation of the protruding electrode can be further reduced. For example,
When 160 protruding electrodes having a diameter of 70 μm and a height of 47 μm are formed on the semiconductor element 1 by using a gold wire of φ25 μm without providing a thermosetting resin, and the protruding electrodes are deformed by a flat plate with a load of 15 kg, A flat portion having a diameter of about 58 μm is formed at the tip of the electrode, the diameter is expanded to 83 μm and 13 μm, and the height is 35 μm.
【0117】それに対して、本実施の形態のように突起
電極形成前に厚さ30μmの熱硬化型の樹脂を設置し、
突起電極形成前に120℃、3分で加熱して30%程度
硬化させた場合は突起電極の直径77μm、高さ38μ
mとなり、さらに突起電極形成前に250℃、7分で加
熱し、100%反応させ完全に硬化した熱硬化型の樹脂
にしておいた場合は直径72μm、高さが39μmとな
り、突起電極の直径の広がりを防ぐことができ、ショー
ト不良を防止することが可能となる。On the other hand, as in the present embodiment, a thermosetting resin having a thickness of 30 μm is installed before forming the protruding electrodes,
When the projection electrode is heated at 120 ° C. for 3 minutes and hardened by about 30%, the projection electrode has a diameter of 77 μm and a height of 38 μ.
m, and when the thermosetting resin is heated at 250 ° C. for 7 minutes and completely cured by 100% reaction before forming the bump electrode, the diameter is 72 μm and the height is 39 μm. Can be prevented and short-circuit defects can be prevented.
【0118】本発明の実施の形態1〜7において、熱硬
化型の樹脂は液状のものを用いたが、半硬化状態のBス
テージ状態のフィルムを用いてもよい。熱硬化型の樹脂
が樹脂フィルム状態であれば、半導体素子あるいは配線
基板上への配置時の取り扱いが容易で生産性が向上す
る。また、Bステージ状態のフィルムは所定の温度に加
熱すると一時的に液状となり、さらに高温に加熱すると
急速に硬化が進むという特性を有するため、前記の液状
の樹脂と同様の効果が得られるだけでなく、硬化完了時
間が5秒程度と液状樹脂に比べ短かくすることができ、
生産性がさらに向上する効果がある。In the first to seventh embodiments of the present invention, the thermosetting resin is liquid, but a semi-cured B stage film may be used. When the thermosetting resin is in the form of a resin film, it is easy to handle when it is placed on a semiconductor element or a wiring board, and the productivity is improved. In addition, since the film in the B-stage state has a characteristic that it temporarily becomes liquid when heated to a predetermined temperature, and further rapidly cures when heated to a higher temperature, the same effect as that of the liquid resin can be obtained. The curing completion time is about 5 seconds, which is shorter than that of liquid resin.
This has the effect of further improving productivity.
【0119】[0119]
【発明の効果】この発明にかかる半導体装置の製造方法
は、複数の電極を有する第1の電子部品の前記電極も含
めた前記第1の電子部品上に熱硬化型樹脂を形成する工
程と、前記熱硬化型樹脂上より電極部材を押し付け、先
端が前記熱硬化型樹脂より突出するように前記第1の電
子部品の電極上に前記電極部材からなる突起電極を形成
する工程と、前記第1の電子部品に形成された突起電極
と第2の電子部品の電極とが対向するように、前記第1
の電子部品と前記第2の電子部品との位置合わせをする
工程と、加熱した状態で前記第1の電子部品に形成され
た突起電極と前記第2の電子部品の電極とを接合させる
と共に前記熱硬化型樹脂を硬化させる工程とを含んでい
るので、第1の電子部品の突起電極と第2の電子部品の
電極との接合と同時に第1の電子部品と第2の電子部品
間の隙間への熱硬化型樹脂の充填が完了するため、第1
の電子部品と第2の電子部品の結合後に、樹脂を注入す
る必要がなく、生産性を著しく向上させることができ
る。さらに、接合後に樹脂を充填するのではなく、接合
前に樹脂が形成されているので、樹脂の充填部に気泡を
巻き込むことがない。The method of manufacturing a semiconductor device according to the present invention comprises a step of forming a thermosetting resin on the first electronic component including the electrodes of the first electronic component having a plurality of electrodes, A step of pressing an electrode member on the thermosetting resin to form a protruding electrode made of the electrode member on the electrode of the first electronic component so that a tip of the electrode member protrudes from the thermosetting resin; The first electronic component so that the protruding electrode formed on the electronic component and the electrode of the second electronic component face each other.
Wherein between the step of positioning the electronic component and the second electronic component, dissipate bonding the first said electronic component which is formed on the protrusion electrodes of the second electronic component electrode in a state of heated Since the step of curing the thermosetting resin is included, the gap between the first electronic component and the second electronic component is formed at the same time when the protruding electrode of the first electronic component and the electrode of the second electronic component are joined. Since the filling of the thermosetting resin into the
It is not necessary to inject a resin after the electronic component and the second electronic component are bonded to each other, and the productivity can be remarkably improved. Further, since the resin is formed before the joining, rather than being filled with the resin after the joining, air bubbles are not caught in the filled portion of the resin.
【0120】[0120]
【0121】[0121]
【0122】[0122]
【0123】[0123]
【0124】[0124]
【0125】[0125]
【0126】また、第1の電子部品を加熱しながら前記
第1の電子部品上に熱硬化型樹脂を形成する場合には、
熱硬化型樹脂の粘土を低下させることができ、接合部か
らの熱硬化型樹脂の排除が容易になる。 Also, while heating the first electronic component,
When the thermosetting resin is formed on the first electronic component,
It can lower the clay of thermosetting resin,
It becomes easy to remove the thermosetting resin.
【0127】[0127]
【0128】[0128]
【0129】[0129]
【0130】[0130]
【図1】 本発明の実施の形態1の半導体装置の製造方
法を示す図である。FIG. 1 is a diagram showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention.
【図2】 本発明の実施の形態2の半導体装置の製造方
法を示す図である。FIG. 2 is a diagram showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention.
【図3】 本発明の実施の形態3の半導体装置の製造方
法を示す図である。FIG. 3 is a diagram showing a method for manufacturing a semiconductor device according to a third embodiment of the present invention.
【図4】 本発明の実施の形態4の半導体装置の製造方
法を示す図である。FIG. 4 is a diagram showing a method for manufacturing a semiconductor device according to a fourth embodiment of the present invention.
【図5】 本発明の実施の形態5の半導体装置の製造方
法を示す図である。FIG. 5 is a diagram showing a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention.
【図6】 本発明の実施の形態6の半導体装置の製造方
法を示す図である。FIG. 6 is a diagram showing a method for manufacturing a semiconductor device according to a sixth embodiment of the present invention.
【図7】 本発明の実施の形態7の半導体装置の製造方
法を示す図である。FIG. 7 is a diagram showing a method for manufacturing a semiconductor device according to a seventh embodiment of the present invention.
【図8】 本発明の実施の形態8の半導体装置の製造方
法を示す図である。FIG. 8 is a diagram showing a method for manufacturing a semiconductor device according to an eighth embodiment of the present invention.
【図9】 本発明の実施の形態9の半導体装置の製造方
法を示す図である。FIG. 9 is a diagram showing a method for manufacturing a semiconductor device according to a ninth embodiment of the present invention.
【図10】 従来の半導体装置の製造方法を示す図であ
る。FIG. 10 is a diagram showing a conventional method for manufacturing a semiconductor device.
【図11】 従来の半導体装置の製造方法における問題
点を示す図である。FIG. 11 is a diagram showing a problem in a conventional method of manufacturing a semiconductor device.
【図12】 従来の半導体装置の製造方法を示す図であ
る。FIG. 12 is a diagram showing a conventional method for manufacturing a semiconductor device.
1 半導体素子 1a 電極
2 熱硬化型の樹脂 2a 硬化した熱
硬化型の樹脂
3 金属ワイヤ 3a 金属ボール
3b 突起電極 4 キャピラリ
5 超音波振動 6 配線基板
6a 配線基板の電極 7 はんだ材
8 金属ワイヤ 8a 金属ボール
8b 突起電極 9 金属ワイヤ
9a 金属ボール 9b 突起電極
10 平板 11 ACF
11a 硬化したACF1 Semiconductor Element 1a Electrode 2 Thermosetting Resin 2a Cured Thermosetting Resin 3 Metal Wire 3a Metal Ball 3b Projection Electrode 4 Capillary 5 Ultrasonic Vibration 6 Wiring Board 6a Wiring Board Electrode 7 Solder Material 8 Metal Wire 8a Metal Ball 8b Projection electrode 9 Metal wire 9a Metal ball 9b Projection electrode 10 Flat plate 11 ACF 11a Hardened ACF
───────────────────────────────────────────────────── フロントページの続き (72)発明者 北村 洋一 東京都千代田区丸の内二丁目2番3号 三菱電機株式会社内 (56)参考文献 特開 平11−97467(JP,A) 特開 平4−345041(JP,A) 特開 平9−172038(JP,A) 特開 平9−181119(JP,A) 特開 平9−8045(JP,A) 特開 平5−315405(JP,A) 特開 平9−252024(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 21/60 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Yoichi Kitamura 2-3-3 Marunouchi, Chiyoda-ku, Tokyo Mitsubishi Electric Corporation (56) References JP-A-11-97467 (JP, A) JP-A-4 -345041 (JP, A) JP-A-9-172038 (JP, A) JP-A-9-181119 (JP, A) JP-A-9-8045 (JP, A) JP-A-5-315405 (JP, A) ) JP-A-9-252024 (JP, A) (58) Fields investigated (Int.Cl. 7 , DB name) H01L 21/60
Claims (2)
記電極も含めた前記第1の電子部品上に熱硬化型樹脂を
形成する工程と、前記熱硬化型樹脂上より電極部材を押
し付け、先端が前記熱硬化型樹脂より突出するように前
記第1の電子部品の電極上に前記電極部材からなる突起
電極を形成する工程と、前記第1の電子部品に形成され
た突起電極と第2の電子部品の電極とが対向するよう
に、前記第1の電子部品と前記第2の電子部品との位置
合わせをする工程と、加熱した状態で前記第1の電子部
品に形成された突起電極と前記第2の電子部品の電極と
を接合させると共に前記熱硬化型樹脂を硬化させる工程
とを含んでいることを特徴とする半導体装置の製造方
法。1. A step of forming a thermosetting resin on the first electronic component including the electrodes of a first electronic component having a plurality of electrodes, and pressing an electrode member on the thermosetting resin. A step of forming a protruding electrode made of the electrode member on the electrode of the first electronic component so that a tip of the protruding electrode protrudes from the thermosetting resin; and a protruding electrode formed on the first electronic component and as the second electronic component electrode are opposed, said a step of aligning the first electronic component and the second electronic component, which is formed on the first electronic component in a heated state projections And a step of bonding the electrode and the electrode of the second electronic component and curing the thermosetting resin.
の電子部品上に熱硬化型樹脂を形成することを特徴とす
る請求項1記載の半導体装置の製造方法。2. The first electronic component is heated while heating the first electronic component.
The thermosetting resin is formed on the electronic components of
The method for manufacturing a semiconductor device according to claim 1, wherein
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27139897A JP3482840B2 (en) | 1997-10-03 | 1997-10-03 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27139897A JP3482840B2 (en) | 1997-10-03 | 1997-10-03 | Method for manufacturing semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH11111755A JPH11111755A (en) | 1999-04-23 |
JP3482840B2 true JP3482840B2 (en) | 2004-01-06 |
Family
ID=17499513
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JP27139897A Expired - Fee Related JP3482840B2 (en) | 1997-10-03 | 1997-10-03 | Method for manufacturing semiconductor device |
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JP (1) | JP3482840B2 (en) |
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US6838316B2 (en) | 2002-03-06 | 2005-01-04 | Kabushiki Kaisha Toshiba | Semiconductor device manufacturing method using ultrasonic flip chip bonding technique |
JP4709563B2 (en) * | 2005-03-31 | 2011-06-22 | 株式会社東芝 | Manufacturing method of semiconductor device |
JP2007012890A (en) * | 2005-06-30 | 2007-01-18 | Shinko Electric Ind Co Ltd | Semiconductor element, its mounting method, and semiconductor device |
JP5222459B2 (en) * | 2005-10-18 | 2013-06-26 | 新光電気工業株式会社 | Semiconductor chip manufacturing method, multichip package |
JP2009147231A (en) * | 2007-12-17 | 2009-07-02 | Hitachi Chem Co Ltd | Packaging method, semiconductor chip, and semiconductor wafer |
US7951648B2 (en) * | 2008-07-01 | 2011-05-31 | International Business Machines Corporation | Chip-level underfill method of manufacture |
-
1997
- 1997-10-03 JP JP27139897A patent/JP3482840B2/en not_active Expired - Fee Related
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