JP4082995B2 - Wiring board manufacturing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a wiring board in which a buildup layer is formed only on the upper surface (one side) of a core substrate.
[0002]
[Prior art]
As a method for manufacturing a wiring board in which a buildup layer is formed only above the surface of the core substrate, for example, a method disclosed in Patent Document 1 is disclosed.
In addition, the following has been proposed as a method for efficiently manufacturing the above wiring board with a flat buildup layer.
That is, two core substrates on which a wiring layer having a predetermined pattern is previously formed on the front surface and the back surface are overlapped, and a copper foil with an insulating resin is stacked on the outer surface and pressed to form a stacked body. A build-up wiring layer having a resin insulating layer and a wiring layer is formed on both surfaces (surfaces). Thereafter, the laminated core substrates are separated from each other to simultaneously manufacture two multilayer printed circuit boards composed of single-sided build-up wiring boards.
[0003]
[Patent Document 1]
Japanese Patent Laid-Open No. 11-204940 (FIG. 1)
[0004]
[Problems to be Solved by the Invention]
However, in the manufacturing method described above, two core substrates are stacked and the respective wiring layers themselves are brought into contact with each other and stacked, so that the wiring layers may be damaged. In addition, after forming the build-up wiring layer, in the individual core substrate from which the laminate is separated, on the front surface (back surface) of the core substrate opposite to the build-up wiring layer, a solder resist is further formed on the original wiring layer. There is a problem that productivity is lowered because a process of further forming openings for forming layers and lands is required.
The present invention solves the problems in the conventional techniques described above, and provides a method of manufacturing a wiring board that can form a flat buildup layer on the surface (one side) of a core board and can be manufactured with high productivity. The issue is to provide.
[0005]
[Means for Solving the Problems]
In order to solve the above problems, the present invention provides a pair of cores in a state in which a prepreg and a metal foil, which will later become solder resist layers, are attached to the back surfaces of a pair of core substrates in which wiring layers are previously formed on the front and back surfaces. The idea is that the substrates are stacked and a build-up layer is formed on each surface.
That is, the method for manufacturing a wiring board according to the present invention (Claim 1) includes a step of forming a prepreg and a metal foil below the back surface of the core substrate having wiring layers on the front surface and the back surface, and the prepreg and the metal foil. Forming a build-up layer including a plurality of insulating layers and a plurality of wiring layers above the surfaces of the pair of core substrates in a state where the formed pair of core substrates are laminated in contact with the respective metal foils; And, after separating the pair of core substrates on which the build-up layer is formed, forming an opening that exposes the wiring layer formed on the back surface of the core substrate in the prepreg in the individual core substrate, It is characterized by that.
[0006]
According to this, since the wiring layer formed on the back surface of each core substrate can be protected by the prepreg and the metal foils formed on the pair of core substrates are in surface contact, the pair of core substrates are laminated along the thickness direction. However, there is no risk of bonding to each other. For this reason, a flat buildup layer can be reliably formed above the surface of each core substrate, and after that, the pair of stacked core substrates can be easily separated.
Moreover, since the prepreg formed on the back surface of each separated core substrate can be used as the solder resist layer on the back surface side, by exposing the wiring layer formed on the back surface of the core substrate, the back surface side of the wiring substrate Since the connection terminal can be easily formed, it is possible to contribute to increasing the productivity of the wiring board.
[0007]
The core substrate includes a multilayer substrate having a plurality of insulating layers and a wiring layer disposed between them, in addition to a single insulating layer made of resin or ceramic. The prepreg includes a thermosetting resin having adhesiveness, elasticity (flexibility), and insulation. Furthermore, the metal foil includes aluminum foil in addition to copper foil.
In other words, the method of manufacturing a wiring board according to the present invention has a wiring layer on each of the front surface and the back surface, and penetrates between the front surface and the back surface and electrically connects the wiring layer on the front surface and the wiring layer on the back surface. A step of forming a prepreg and a metal foil under the back surface of the core substrate having a conductor, and a pair of core substrates on which the prepreg and the metal foil are formed, in a state where the respective metal foils are in surface contact and laminated, Forming a buildup layer including a plurality of insulating layers and a plurality of wiring layers above the surfaces of the pair of core substrates, and separating the pair of core substrates on which the buildup layers are formed, and then separating individual cores. Forming an opening that exposes the wiring layer formed on the back surface of the core substrate in the prepreg of the substrate.
[0008]
Further, in the present invention, the pair of core substrates are panels each having a plurality of product areas that become core substrates along the planar direction, and the prepreg and the metal foil are formed across the plurality of product areas. Also included is a method of manufacturing a wiring board (claim 2). According to this, in a multi-panel that includes a plurality of core substrates along vertical and horizontal plane directions, a prepreg and a metal foil are formed on the entire plurality of product areas to be the core substrate on the back surface of the panel. Is done. For this reason, the productivity of the wiring board can be further increased.
[0009]
Further, in the present invention, the step of forming an opening in the prepreg is performed by performing laser processing along the thickness direction of the prepreg from which the metal foil has been removed or the metal foil and the prepreg. A method for manufacturing a wiring board (claim 3) is also included. According to this, by carrying out laser processing only on the prepreg, or at an arbitrary position on the metal foil and prepreg, the wiring layer on the back surface of the core substrate can be easily exposed in a desired area, and the motherboard on which the wiring substrate itself is mounted. The connection terminal with the printed circuit board can be formed with high accuracy and efficiency.
[0010]
The present invention also includes a method of manufacturing a wiring board (claim 4), wherein the area of the metal foil remaining after the step of forming the opening in the prepreg is 60% or more of the original area. According to this, since 60% or more of the original metal foil remains on the back surface side of the core substrate, even after the buildup layer is formed above the surface of the core substrate, the wiring substrate is built up by the metal foil. It is possible to prevent deformation in a form of warping to the layer side, that is, a shape in which the vicinity of the center of the buildup layer is recessed. As a result, since the flatness of the build-up layer can be kept better, the reliability of the wiring board can be improved.
In addition, the remaining metal foil can improve water resistance and moisture resistance on the second main surface side of the wiring board, and can also shield high frequency noise emitted from the periphery.
In addition, when the area of the remaining metal foil is less than 60% of the original, there is a risk that the above-described effect of preventing warpage is insufficient, so this range is excluded, and the preferred residual area (ratio) of the metal foil Is 80% or more of the original.
[0011]
Furthermore, the present invention further includes a step of connecting a conductor pin or a solder ball to the wiring layer on the back surface of the core substrate exposed on the bottom surface of the opening after the step of forming the opening in the prepreg. It is also possible to include a method for manufacturing the substrate. In this case, a pin grid array (PGA) type or ball grid array (BGA) type wiring board can be easily formed. The conductor pin includes a pin made of a copper alloy or an iron alloy (for example, Kovar).
In the present invention, after the step of forming the opening in the prepreg, a conductor layer straddling the opening and under the back surface of the prepreg is formed, and the conductor layer is formed in the vicinity of the opening by photolithography. It is also possible to include a method of manufacturing a wiring board formed as a land. In this case, a land grid array (LGA) type wiring board can be easily formed.
[0012]
Furthermore, in the present invention, when the conductor layer is formed, the cross-section is substantially hat-shaped across the inner and bottom surfaces of the opening formed in advance in the prepreg and under the back surface of the prepreg adjacent to the opening. It is also possible to include a method of manufacturing a wiring board that forms a metal plating layer. In this case, since a low melting point alloy such as solder can be easily joined to the metal plating layer, a conductor pin or a solder ball is joined via the solder or the like so as to be freely connected to a mother boat or the like. Is possible. The metal plating layer includes a two-layer plating layer formed in the order of Ni plating and Au plating, for example.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
In the following, preferred embodiments of the present invention will be described with reference to the drawings.
FIG. 1A shows a cross section of the core substrate 2. The core substrate 2 is a single insulating layer made of glass-epoxy resin having a thickness of about 800 μm, and copper foils 10 a and 11 a having a thickness of about 16 μm are bonded in advance to the front surface 2 a and the back surface 2 b.
A predetermined position of the core substrate 2 is irradiated with a laser or drilled with a small diameter drill. As a result, as shown in FIG. 1B, a plurality of through-holes 5 penetrating between the front surface 2a and the back surface 2b of the core substrate 2 and having an inner diameter of about 100 μm are formed.
[0014]
Next, electroless copper plating and electrolytic copper plating are performed on the entire surface of the core substrate 2 having the plurality of through holes 5. A plating catalyst containing Pd is previously applied to the inner wall of each through hole 5. Further, the perforation of the through hole 5 and the copper plating may be performed in a state of a panel (multiple substrate) including a plurality of core substrates 2 (product units). As a result, as shown in FIG. 1C, through-hole conductors 6 having a thickness of about 30 μm are formed along the inner wall surface of each through-hole 5. Copper foils 10a and 11a are thick copper plating layers 10b and 11b (thickness is the same as copper foils 10a and 11a for convenience).
[0015]
Next, as shown in FIG. 1D, a filling resin 7 made of an epoxy resin containing an inorganic filler such as a silica filler is filled inside each through-hole conductor 6. Instead of the filling resin 7, a conductive resin containing a large amount of metal powder or a non-conductive resin containing metal powder may be used. Further, on the copper plating layers 10b and 11b on the front surface 2a and the back surface 2b, the entire surface is subjected to copper plating, and the surface of the filling resin 7 is subjected to lid plating.
Then, after an etching resist (not shown) having a predetermined pattern is formed on the copper plating layers 10b and 11b by a known photolithography technique, the copper plating layers 10b and 11b exposed from the gaps between the etching resist patterns are formed. Etching (known subtractive method).
[0016]
As a result, as shown in FIG. 2A, wiring layers 10 and 11 are formed on the front surface 2a and the back surface 2b of the core substrate 2 in accordance with the resist pattern. The wiring layers 10 and 11 have a thickness of about 15 μm, and these wiring layers 10 and 11 are electrically connected to each other through the through-hole conductor 7.
Next, as shown in FIG. 2B, a prepreg 12 and a copper foil (metal foil) 14 are formed under the back surface 2 b of the core substrate 2 and the wiring layer 11. The prepreg 12 is made of a thermosetting resin (for example, epoxy, bismaleimide / triazine, phenol, polyimide, polyester, etc.) having a thickness of several tens of μm and having adhesiveness, elasticity, and insulation. Further, the thickness of the copper foil 14 is about 20 μm.
[0017]
In addition, the process of forming the said copper foil 14 etc. straddles the several product area used as each core board | substrate 2 in the back surface side of the panel for multi-pieces which has many several core board | substrates 2 along a plane direction. The prepreg 12 and the copper foil 14 may be formed sequentially.
Next, as shown in FIG. 2 (C), a pair of core substrates 2 and 2 on which the prepreg 12 and the copper foil 14 are formed on the back surface 2b side are laminated in a state where the copper foils 14 are in surface contact with each other; Fix it. At this time, the pair of laminated core substrates 2 may be slightly pressed along their thickness directions.
[0018]
Next, as shown in FIG. 3A, the insulating layers 16 and 22 and the wiring layers 20 and 26 are alternately stacked above the surface 2a of any of the stacked core substrates 2 and the wiring layer 10. The up layer BU is formed. The insulating layer 16 and the like are made of an epoxy resin having a thickness of about 30 μm including an inorganic filler such as a silica filler. The wiring layer 20 and the like are made of a copper plating layer having a thickness of about 15 μm. Furthermore, via conductors (filled vias) 18 and 24 that connect the wiring layers 10, 20, and 26 are formed in the insulating layers 16 and 22. The build-up layer BU is formed by a known build-up process (semi-additive method, full additive method, subtractive method, formation of an insulating layer by laminating a film-like resin material, photolithography technique, etc.).
Further, the build-up layer BU is also formed above the surface 2a of the remaining core substrate 2 in the same manner as described above.
[0019]
Next, a solder resist layer (insulating layer) 28 having a thickness of about 25 μm is formed on the insulating layer 22 and the wiring layer 26 in each core substrate 2.
As shown in FIG. 3A, a plurality of solder bumps (IC connection terminals) 30 protruding higher than the first main surface 29 are formed at appropriate positions on the wiring layer 26. The solder bump 30 is made of a low melting point alloy such as Sn—Ag, Pb—Sn, Sn—Ag—Cu, Sn—Cu, Sn—Zn, etc. (Sn—Ag in this embodiment). They are individually connected to connection terminals such as an IC chip (not shown) mounted on the main surface 29. In addition, the plurality of solder bumps 30 and connection terminals such as IC chips are embedded and protected by an underfill material. The other core substrate 2 is subjected to the same process as described above. Further, the above build-up process and the like may be performed in the state of the panel.
[0020]
Further, as shown in FIG. 3 (B), the core substrate 2 on which the build-up layer BU is formed in surface contact with the copper foils 14 and 14 is separated individually. This separation process can be performed very easily because the copper foils 14 have high releasability. Further, the wiring layer 11 on the back surface 2b of the core substrate 2 is protected by the prepreg 12 with the original pattern in both the laminating process and the build-up process. Further, the prepreg 12 forms a solder resist layer on the back surface 2 b side of the core substrate 2.
The solder bump 30 may be formed after the above-described separation step.
[0021]
In the subsequent steps, a wiring board having a different form is obtained depending on the applied steps.
For example, as shown in FIG. 4A, after the copper foil 14 is removed by known etching, a laser is irradiated along a vertical direction in the drawing to a predetermined position in the exposed prepreg 12. As a result, an opening 13 is formed through which the wiring layer 11 formed on the back surface 2b of the core substrate 2 is exposed. The wiring 11c exposed on the bottom surface of the opening 13 is coated with Ni and Au plating (not shown) on its surface, and serves as a connection terminal (land) for connection to a printed board such as a motherboard. Thereby, the wiring board 1 as shown in FIG. 4A is obtained.
As shown in the center of FIG. 4A, a conductor pin p made of, for example, Kovar is connected to the wiring 11c through solder h. As the laser, a carbon dioxide laser, a YAG laser, an excimer laser, or the like is used.
[0022]
Further, as shown in FIG. 4B, an opening through which the wiring layer 11 is exposed by irradiating a predetermined position in the copper foil 14 and the prepreg 12 with a laser along the vertical direction in the figure. 13 may be formed. The wiring 11c exposed on the bottom surface of the opening 13 is covered with Ni and Au plating, and becomes a connection terminal (land) similar to the above. As a result, a wiring board 1a as shown in FIG. 4B is obtained.
[0023]
Note that any one of the lasers described above is used as the laser, but the copper foil 14 and the prepreg 12 make adjustments such as changing the output. Further, the copper foil 14 remaining after the opening 13 is formed is at least 60% or more, preferably 80% or more of the area in the original plan view. Thereby, the deformation | transformation which the whole wiring board 1a warps to the buildup layer BU side can be prevented, and since the flatness of the buildup layer BU can be kept still more favorable, the reliability of the said wiring board 1a can be improved. Moreover, the remaining copper foil 14 can improve water resistance and the like on the second main surface (back surface 2b) side of the wiring board 1a, and can also shield high-frequency noise generated from peripheral devices and the like.
[0024]
Further, as shown in FIG. 5A, after forming an etching resist (not shown) having a predetermined pattern on the lower side of the copper foil 14, the copper foil 14 exposed from between the resist is formed into the above pattern. The copper foil 14a having a predetermined pattern is formed by removing it by etching. Next, as shown in FIG. 5B, an opening 13 reaching the wiring layer 11 formed on the back surface 2b of the core substrate 2 through the gap between the copper foils 14a is formed by the laser irradiation. Next, as shown in FIG. 5 (C), a substantially hat-shaped metal plating layer 15 made of Ni plating and Au plating is formed on the inner surface of the opening 13 and the surrounding copper foil 14a. A brazing material 17 made of solder or the like is formed. As a result, a wiring board 1b shown in FIG. 5C is obtained.
The brazing material 17 is connected to a solder ball (not shown), the conductor pin p, or the like, or directly connected to a connection terminal on the mother board side.
[0025]
According to the method for manufacturing a wiring board of the present invention described above, the wiring layer 11 formed on the back surface 2b of each core board 2 can be protected by the prepreg 12, and the copper foils 14 formed on the pair of core boards 2 can be connected to each other. Because of the surface contact, these core substrates 2 are not bonded to each other even if they are laminated along the thickness direction. As a result, the flat buildup layer BU can be reliably formed above the surface 2a of each core substrate 2, and the pair of core substrates 2 can be easily separated thereafter. Moreover, the prepreg 12 formed on the back surface 2b of each separated core substrate 2 can be used as a solder resist layer on the back surface 2b side. As a result, by exposing the wiring layer 11 formed on the back surface 2b of the core substrate 2, the connection terminals (wiring) 11c on the back surface 2b side of the wiring substrates 1, 1a, 1b can be easily formed. Productivity can also be increased.
[0026]
FIG. 6 relates to a method of manufacturing a wiring board 1c having a different form. In the following description, the same reference numerals are used for portions and elements that are common to the above-described embodiments.
FIG. 6A shows a state in which a core substrate K of a pair of multilayer substrates is stacked and fixed. As shown in FIG. 6A, the core substrate K includes an insulating layer 2, wiring layers 8 and 9 formed on the front surface 2a and the back surface 2b, and insulating layers 3 and 4 formed thereon. A multilayer substrate. The insulating layer 2 is made of a glass cloth or glass fiber-containing epoxy resin having a substantially square shape in plan view and a thickness of less than 500 μm. The wiring layers 8 and 9 are copper plating layers having a thickness of about 15 μm, and the insulating layers 3 and 4 are made of epoxy resin having a thickness of several tens of μm including an inorganic filler such as a glass filler. The total thickness of the core substrate K is about 600 to 800 μm.
[0027]
The core substrate K is formed by forming copper foils formed in advance on the front surface 2a and the back surface 2b of the insulating layer 2 into wiring layers 8 and 9 having a predetermined pattern by a photolithography technique and etching, and pressing a resin film thereon to insulate the insulating layer It is obtained by forming 3 and 4.
As shown in FIG. 6 (A), a plurality of through holes 5, through hole conductors 6 and filling resin 7 are formed between the front surface 3a and the back surface 4a of the core substrate K by the method described above. Each through-hole conductor 6 is connected to the wiring layers 8 and 9 in the middle thereof. In addition, the wiring layers 10 and 11 having a predetermined pattern are formed on the front surface 3a and the back surface 4a of the core substrate K by copper plating, photolithography technique, and etching, which are electrically connected to each other through the through-hole conductors 6. To do.
[0028]
As shown in FIG. 6A, a pair of core substrates K, K on which a prepreg 12 and a copper foil 14 are formed adjacent to the back surface 4a and the wiring layer 11 are in surface contact with each other. Laminate and fix with. In this laminated state, the build-up layer BU, the solder resist layer 28, and the solder bumps 30 are formed in the same manner as described above above the surface 3a of any core substrate K in the same manner as described above. Similarly, the build-up layer BU and the like are formed on the other core substrate.
Next, as shown in FIG. 6B, after the copper foil 14 is removed by etching in the individually separated core substrate K, the exposed prepreg 12 is irradiated with the same laser as described above, and the opening 13 is formed. Form. The wiring 11c exposed on the bottom surface of the opening 13 is covered with Ni and Au plating to serve as a connection terminal (land) for connection to a printed board such as a motherboard.
Thereby, a wiring substrate 1c as shown in FIG. 6B is obtained.
[0029]
Also in the manufacturing method of the wiring board 1c as described above, since the flat buildup layer BU can be formed and the prepreg 12 can be used as the solder resist layer, the number of manufacturing steps can be reduced. Moreover, since the wiring layers 8 and 9 are provided in the core substrate K, it is easy to cope with higher wiring density.
The conductor 11 may be connected to the wiring 11c via solder or a solder ball may be connected to the wiring 11c. Alternatively, as shown in FIG. 4B, the opening 13 and the wiring 11c may be formed leaving 60% or more of the copper foil 14. Furthermore, as shown in FIGS. 5A to 5C, a predetermined pattern of copper foil 14a, opening 13, metal plating layer 15, and brazing material 17 may be formed.
[0030]
The present invention is not limited to the embodiment described above.
As the metal foil, a pure aluminum-based aluminum foil may be used.
In addition, the material of the insulating layer 2 of the core substrate 2 or the core substrate K includes the glass-epoxy resin composite material, bismaleimide / triazine (BT) resin, epoxy resin, similar heat resistance, mechanical strength, A glass fiber-resin composite material that is a composite material of a glass woven fabric having flexibility and processability, or a glass fiber such as a glass woven fabric and a resin such as an epoxy resin, a polyimide resin, or a BT resin. It may be used. Alternatively, a composite material of an organic fiber such as a polyimide fiber and a resin, or a resin-resin composite material obtained by impregnating a resin such as an epoxy resin with a three-dimensional network structure fluorine resin such as PTFE having continuous pores is used. It is also possible.
[0031]
Alternatively, the material of the core substrate 2 or the insulating layers 2 to 4 of the core substrate K can be ceramic. Such ceramics include alumina, silicic acid, glass ceramic, aluminum nitride, and the like, and low-temperature fired ceramics that can be fired at a relatively low temperature of about 1000 ° C. or lower can also be used. Through holes 5 are punched in the core substrate 2 and the core substrate K made of ceramic by punching or laser processing, and an insulating layer 16 made of a resin film is laminated on the surfaces 2a and 3a. The buildup layer BU is formed by the buildup process described above.
In the case of the core substrate K, three green sheets made of the ceramic are prepared, and a predetermined pattern of wiring is formed on at least one of the front and back surfaces of these green sheets with metallized ink made of W, Mo, Cu, or the like. After forming the layers, these green sheets are laminated and fired. For the metallization, materials such as Ag, Au, Ag—Pt, and Ag—Pd may be used.
[0032]
Furthermore, the material of the insulating layers 16 and 22 has a polyimide resin, a BT resin, a PPE resin, or continuous pores having the same heat resistance and pattern formability in addition to the epoxy resin as a main component. A resin-resin composite material in which a fluororesin having a three-dimensional network structure such as PTFE is impregnated with a resin such as an epoxy resin can also be used. The insulating layer can be formed by a method of applying a liquid resin with a roll coater in addition to a method of thermocompression bonding an insulating resin film. In addition, the composition of the glass cloth or glass filler mixed in the insulating layer may be any of E glass, D glass, Q glass, S glass, or a combination of two or more of these.
[0033]
Further, the material such as the wiring layer 10 and the through-hole conductor 6 may be made of Ag, Ni, Ni—Au, etc. in addition to the Cu (copper), or without using a plating layer of these metals, You may form by the method of apply | coating a conductive resin.
Further, the via conductor may be an inverted conical conformal via conductor that is not completely filled with the conductor, instead of the filled via conductor 18 or the like. Alternatively, a staggered configuration in which the via conductors are stacked while shifting the axial center may be used, or a wiring layer extending in the plane direction may be interposed in the middle.
[0034]
【The invention's effect】
According to the method for manufacturing a wiring board of the present invention described above (Claim 1), the wiring layer formed on the back surface of the core board can be protected by the prepreg, and the metal foils formed on the pair of core boards are in surface contact with each other. Therefore, even if they are laminated along the thickness direction, they are not bonded to each other. As a result, a flat build-up layer BU can be reliably formed above the surface of each core substrate, and each core substrate can be easily separated thereafter. Moreover, since the prepreg formed on the back surface of the separated core substrate can be used as a solder resist layer, connecting terminals (wiring) on the back surface side of the wiring substrate can be easily made by exposing the wiring layer formed on the back surface of the core substrate. Therefore, it is possible to increase the productivity of the wiring board.
[0035]
According to the method for manufacturing a wiring board according to claim 2, in a multi-piece panel having a plurality of core substrates, a prepreg and a metal foil are formed over the entire plurality of product areas to be the core substrate on the back surface of the panel. Therefore, the productivity of the wiring board can be further increased.
Furthermore, according to the method of manufacturing a wiring board according to claim 3, the wiring layer on the back surface of the core substrate is easily exposed in a desired area by laser processing only on the prepreg, or on both the metal foil and the prepreg, and the wiring A connection terminal with a mother board or the like on which the substrate itself is mounted can be formed with high accuracy and efficiency.
[0036]
According to the method for manufacturing a wiring board of claim 4, even after the buildup layer is formed on the core substrate, the remaining metal foil can prevent the wiring board from being warped toward the buildup layer. As a result, since the flatness of the build-up layer can be kept better, the reliability of the wiring board can be improved. In addition, the remaining metal foil can improve water resistance and moisture resistance on the second main surface (back surface of the core substrate) side of the wiring board, and can also shield high-frequency noise emitted from the periphery.
[Brief description of the drawings]
1A to 1D are schematic views showing each step in the production method of the present invention.
FIGS. 2A to 2C are schematic views showing each step in the production method of the present invention following FIG. 1D.
FIGS. 3A and 3B are schematic views showing each step in the production method of the present invention following FIG. 2C.
4A and 4B are cross-sectional views showing each wiring board obtained by the manufacturing method of the present invention.
5A to 5C are cross-sectional views showing each step in the manufacturing method continued from FIG. 3B or a wiring board obtained by the steps.
6A and 6B are cross-sectional views showing a manufacturing process of a wiring board of a different form or a wiring board obtained by the manufacturing process.
[Explanation of symbols]
1,1a ~ 1c ……………… Wiring board
2, K ………………………… Core substrate
2a, 3a ………………… Surface
2b, 4a ………………… Back side
10, 11, 20, 26 ... wiring layer
12 ………………………… Prepreg
13 ………………………… Opening
14 ………………………… Copper foil (metal foil)
16, 22 ... Insulating layer

Claims (4)

Forming a prepreg and a metal foil below the back surface of the core substrate each having a wiring layer on the front surface and the back surface;
Build-up including a plurality of insulating layers and a plurality of wiring layers above the surface of the pair of core substrates in a state where the pair of core substrates on which the prepreg and the metal foil are formed are stacked in contact with the respective metal foils. Forming each layer;
Separating the pair of core substrates on which the build-up layer is formed, and forming an opening that exposes the wiring layer formed on the back surface of the core substrate in the prepreg in the individual core substrate. A method for manufacturing a wiring board. The pair of core substrates are panels each having a plurality of product areas that become core substrates following the planar direction, and the prepreg and metal foil are formed across the plurality of product areas.
The method for manufacturing a wiring board according to claim 1. The step of forming the opening in the prepreg is performed by performing laser processing along the thickness direction of the prepreg from which the metal foil has been removed, or the metal foil and the prepreg.
The method for manufacturing a wiring board according to claim 1, wherein: The area of the metal foil remaining after the step of forming the opening in the prepreg is 60% or more of the original area.
The method for manufacturing a wiring board according to claim 3.

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