JP3909509B2 - Serial interface circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a serial interface circuit, and more particularly to a serial interface circuit suitable for a digital circuit equipped with a plurality of devices having a three-wire serial interface.
[0002]
[Prior art]
One of data input methods such as ROM, RAM, D / A converter and A / D converter is a three-wire serial interface. FIG. 3 is an explanatory diagram thereof. Serial data input line 302 for input data DI to device 301, data shift clock line 303 for clock SK for taking in the input data, and load for load signal LD for determining shift data A line 304 is provided. The input data DI is sequentially taken into the shift register in the device bit by bit by the clock SK, and when the load signal LD is given to the device (when the device is selected), the input data is determined and the inside of the device 301 Is processed. If there is output data DO, it is output from the output line 305. Hereinafter, the load signal is referred to as a strobe signal (STB).
[0003]
In a digital circuit equipped with a plurality of devices having such a three-wire serial interface, as shown in FIG. 4, in order to perform input control to each device 402 to 404, the controller 401 controls each device. Three signal lines (for data, clock, and strobe) are arranged. In the case of a device that does not have input data and operates as an output device, as shown in FIG. 5, a data shift clock line for shifting output data DO and serially outputting it for each device 502 to 504, as shown in FIG. 5. In the case of ROM, RAM, etc., an address line is also required.
[0004]
Some serial devices are of the three-wire type as in FIG. 3, but the most significant bit of the internal register for setting the input data DI is output to the output line DO. In this case, as shown in FIG. 6, the control unit 601 and the devices 602 to 605 are connected. For example, in order to provide input data to the device 605, the devices 602 to 604 are sequentially used as shift registers. Data is input by giving a strobe signal when the data has just entered the device 605 via.
[0005]
[Problems to be solved by the invention]
When a 3-wire or 4-wire interface is configured with each device as shown in FIG. 4 or FIG. 5, 3n or 4n signal lines or control lines are required when the number of devices is n. Becomes more complicated and increases man-hours. In addition, if the devices are cascade-connected as shown in FIG. 6, the number of signal lines can be reduced, but there is a problem that it takes time to input data depending on the device. In the case of this cascade connection, if the timings of the shift clock and the strobe signal do not match, malfunction may occur in many devices.
[0006]
It is an object of the present invention to provide a serial interface circuit capable of controlling many serial devices without increasing the number of signal lines and without causing an increase in data transmission time or malfunction.
[0007]
[Means for Solving the Problems]
The present invention includes a controlled device selection means for selecting one controlled device in response to an input device selection signal;
Gate means for outputting a data strobe signal inputted only to the controlled device selected by the means;
Serially transmitting the device selection signal to the controlled device selection means;
A first signal line for serially transmitting input data to the controlled device;
A second signal line for transmitting a selection shift clock to the controlled device selection means;
A third signal line for transmitting a selection strobe signal to the controlled device selection means;
A fourth signal line for transmitting a data shift clock to each of the controlled devices;
A fifth signal line for transmitting a data strobe signal to each of the gate means;
Sending the controlled device selection signal to the controlled device selection means via the first signal line and simultaneously sending the selection shift clock to the controlled device selection means via the second signal line. Then, by sending the selection strobe signal to the controlled device selection means via the third signal line, the controlled device selection signal is controlled to be set to the controlled device selection signal. First control means;
After the controlled device selection signal is set to the controlled device selection means by this means, the input data is transmitted via the first signal line, and at the same time, the data shift via the fourth signal line is performed. The input data to the controlled device selected by the controlled device selecting means by sending the data strobe signal to each of the gate means via the fifth signal line. Second control means for controlling so that is set;
A serial interface circuit characterized by comprising:
[0008]
The present invention further includes controlled device selection means for selecting one controlled device according to the input device selection signal;
Data output device selection means for outputting only output data from the controlled device selected by this means as read data;
A first signal line for serially transmitting the device selection signal to the controlled device selection means;
A second signal line for transmitting a selection shift clock to the controlled device selection means;
A third signal line for transmitting a selection strobe signal to the controlled device selection means;
Sending the controlled device selection signal to the controlled device selection means via the first signal line and simultaneously sending the selection shift clock to the controlled device selection means via the second signal line. Then, by sending the selection strobe signal to the controlled device selection means via the third signal line, the controlled device selection signal is controlled to be set to the controlled device selection signal. First control means;
Second control means for reading the read data output from the data output device selection means after the controlled device selection signal is set in the controlled device selection means by this means;
A fourth signal line for transmitting read data from the data output device selection means to the means;
A serial interface circuit characterized by comprising:
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail. FIG. 1 shows an example of the configuration of a serial interface according to the present invention. Signal lines for controlling controlled devices 102, 103,... Are used for determining controlled devices and controlling the controlled devices. The signal line 110 through which the data S_DAT flows, the signal line 111 through which the data shift clock D_CLK for controlling the controlled device flows, and the signal line through which the strobe signal D_STB for determining the data shift for controlling the controlled device flows 112, a signal line 113 through which a data shift clock A_CLK for controlling the controlled device selection unit flows, a control line 114 through which a strobe signal A_STB for determining data shift for controlling the controlled device selection unit, Data R_DAT from the control device is transmitted to the control unit 101 115 is provided Route. The control unit 101 is a sequencer, state machine, or other logic circuit configured with a microcomputer or a logic gate, and controls the controlled unit 120.
[0010]
The controlled unit 120 is configured by a microcomputer, a logic gate, a switch, or the like in addition to the controlled devices 102, 103... And which of the controlled devices 102, 103. , 114 is determined by the controlled device selection unit 122 determined according to the signal of 114, a microcomputer, a logic gate, or a switch, and the data taken out from the device determined by the controlled device selection unit 122 to the control line 115 The output device selection unit 121 and a logic gate or a switch are provided for each controlled device 102, 103..., And the strobe signal of the control line 112 is sent to the controlled device determined by the controlled device selection unit 122. Selectors 123, 124,... There.
[0011]
FIG. 2 is a block diagram showing a configuration example of the controlled device selection unit 122 and selectors 123, 124..., And the controlled device selection unit 122 is a shift configured by connecting eight D flip-flops 201 to 208 in tandem. It consists of registers and D flip-flops 211 to 218 that take out their Q outputs, and each of the selectors 123 to 126 is an AND gate. In this configuration example, one of four serial device inputs and four serial device outputs can be selected. In this configuration, when the input 8-bit serial data S_DAT is set in the D flip-flops 201 to 208 by the shift clock A_CLK, the 8-bit data is taken into the D flip-flops 211 to 218 by the strobe signal A_STB. It is. Here, if the input data S_DAT is data in which only one of the 8 bits is “1” and the others are “0”, if the “1” is, for example, the D flip-flop 211, the strobe signal D_STB is “1”. When it becomes “,” only the output of the selector 123 is outputted as “1”, and the controlled device 102 is selected. When one of the D flip-flops 215 to 218 is “1”, output data is taken out as data R_DAT_L from the data output device selection unit 121 or the corresponding device accordingly.
[0012]
FIG. 7 is a timing chart showing the operation of the interface circuit shown in FIGS. The control unit 101 first sends a selection signal A_DAT for determining a controlled device to the control line 110 as the data S_DAT in FIGS. 1 and 2, and at the same time, sends a shift clock A_CLK to the signal line 113. To do. As a result, the selection signal A_DAT is written to the D flip-flops 201 to 208 constituting the shift register of FIG. Next, when the control unit 101 sends the strobe signal A_STB to the signal line 114, the Q outputs of the D flip-flops 201 to 208 are set to the D flip-flops 211 to 218, respectively. Only one of these is set to “1” and the other is set to “0”.
[0013]
At the time of data input to the controlled device, the control unit 101 sends the input data D_DAT as data S_DAT to the signal line 110 following the above-described controlled device selection operation, and at the same time, the shift clock D_CLK is synchronized with this. Send to signal line 111. Thereby, the input data D_DAT is set in the shift register inside each controlled device 102, 103. When this setting is completed and the control unit 101 outputs the strobe signal D_STB_1 as the strobe signal D_STB to the signal line 112, “1” is input from the selection unit 122 only to the selector corresponding to the selected controlled device. The strobe signal D_STB_1 is input to the controlled device, and the input data is actually taken into the device. However, this operation is a case where the controlled device is of a type in which input data is once set in a shift register and is taken in by a subsequent strobe signal. However, some devices are called chip strobes. In this case, if the strobe signal is at a low level during the input of the input data D_DAT, the data is taken in. In the case of this type of device, the control unit 101 outputs the strobe signal D_STB_2 in FIG.
[0014]
When data is read from the controlled device, only one of the outputs from the controlled device selection unit 122 to the data output device selection unit 121 (outputs of the D flip-flops 215 to 218 in FIG. 2) is “1”. Therefore, the data output device selection unit 121 selects the output of the corresponding device based on this information and sends it to the signal line 115 as read data R_DAT.
[0015]
According to the above configuration, if there are six signal lines in total, the input / output interface can be realized regardless of the number of controlled devices, the number of control lines can be greatly reduced, and the data input / output can be reduced. There is no particular increase in time. In particular, in the case of a digital circuit having no output, only five control lines are required. In the above description, the controlled device selection unit 122 is a serial / parallel conversion circuit as shown in FIG. 2, but this may be a decoder type or other circuits. Choose the timing.
[0016]
【The invention's effect】
According to the present invention, when only n devices adopting a 3-wire serial interface are controlled at the same time, five control lines and one data output from the controlled device are used to cascade. It is possible to provide a 6-wire serial interface that can shorten the transmission time compared to the connection time. Further, since the number of clocks for data transmission is reduced as compared with the case of cascade connection, malfunction can be reduced.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration example of an interface circuit according to the present invention.
FIG. 2 is a block diagram illustrating a configuration example of a controlled device selection unit.
FIG. 3 is an explanatory diagram of a three-wire serial interface device.
FIG. 4 is an explanatory diagram of an input interface when a plurality of 3-wire serial interface devices are mounted.
FIG. 5 is an explanatory diagram of an output interface when a plurality of 3-wire serial interface devices are mounted.
FIG. 6 is an explanatory diagram of an input interface by tandem connection of a 3-wire serial interface device.
7 is a time chart showing the operation of the interface circuit of FIG. 1. FIG.
[Explanation of symbols]
101 Control Units 102 and 103 Controlled Devices 110 to 115 Signal Line 121 Data Output Device Selection Unit 122 Controlled Device Selection Units 123 and 124 Selector

Claims (2)

Controlled device selection means for selecting one controlled device according to the input device selection signal;
Gate means for outputting a data strobe signal inputted only to the controlled device selected by the means;
A first signal line for serially transmitting the device selection signal to the controlled device selection means and serially transmitting input data to the controlled device;
A second signal line for transmitting a selection shift clock to the controlled device selection means;
A third signal line for transmitting a selection strobe signal to the controlled device selection means;
A fourth signal line for transmitting a data shift clock to each of the controlled devices;
A fifth signal line for transmitting a data strobe signal to each of the gate means;
Sending the controlled device selection signal to the controlled device selection means via the first signal line and simultaneously sending the selection shift clock to the controlled device selection means via the second signal line. Then, by sending the selection strobe signal to the controlled device selection means via the third signal line, the controlled device selection signal is controlled to be set to the controlled device selection signal. First control means;
After the controlled device selection signal is set to the controlled device selection means by this means, the input data is transmitted via the first signal line, and at the same time, the data shift via the fourth signal line is performed. The input data to the controlled device selected by the controlled device selecting means by sending the data strobe signal to each of the gate means via the fifth signal line. Second control means for controlling so that is set;
A serial interface circuit comprising: Controlled device selection means for selecting one controlled device according to the input device selection signal;
Data output device selection means for outputting only output data from the controlled device selected by this means as read data;
A first signal line for serially transmitting the device selection signal to the controlled device selection means;
A second signal line for transmitting a selection shift clock to the controlled device selection means;
A third signal line for transmitting a selection strobe signal to the controlled device selection means;
Sending the controlled device selection signal to the controlled device selection means via the first signal line and simultaneously sending the selection shift clock to the controlled device selection means via the second signal line. Then, by sending the selection strobe signal to the controlled device selection means via the third signal line, the controlled device selection signal is controlled to be set to the controlled device selection signal. First control means;
Second control means for reading the read data output from the data output device selection means after the controlled device selection signal is set in the controlled device selection means by this means;
A fourth signal line for transmitting read data from the data output device selection means to the means;
A serial interface circuit comprising:

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