JP3634709B2 - Semiconductor module - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a circuit device and a mounting substrate, and more particularly to a thin circuit device and a mounting substrate that do not require a support substrate.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, a circuit device set in an electronic device is employed in a mobile phone, a portable computer, and the like, and thus, a reduction in size, thickness, and weight are required.
[0003]
For example, a semiconductor device as an example of a circuit device will be described. As a general semiconductor device, there is a package type semiconductor device sealed by a conventional transfer mold. The semiconductor device 1 is mounted on a printed circuit board PS as shown in FIG.
[0004]
In the package type semiconductor device 1, the periphery of the semiconductor chip 2 is covered with a resin layer 3, and lead terminals 4 for external connection are led out from the sides of the resin layer 3.
[0005]
However, the package type semiconductor device 1 has lead terminals 4 protruding from the resin layer 3 and has a large overall size, which does not satisfy the miniaturization, thickness reduction, and weight reduction.
[0006]
Therefore, various companies have competed to develop various structures to achieve miniaturization, thinning, and weight reduction, and recently called CSP (chip size package), wafer scale CSP equivalent to chip size, or chip size A slightly larger CSP has been developed.
[0007]
FIG. 27 shows a CSP 6 that employs a glass epoxy substrate 5 as a support substrate and is slightly larger than the chip size. Here, description will be made assuming that the transistor chip T is mounted on the glass epoxy substrate 5.
[0008]
A first electrode 7, a second electrode 8 and a die pad 9 are formed on the surface of the glass epoxy substrate 5, and a first back electrode 10 and a second back electrode 11 are formed on the back surface. The first electrode 7 and the first back electrode 10 are electrically connected to the second electrode 8 and the second back electrode 11 through the through hole TH. Further, the bare transistor chip T is fixed to the die pad 9, the emitter electrode of the transistor and the first electrode 7 are connected via the fine metal wire 12, and the base electrode of the transistor and the second electrode 8 are connected to the fine metal wire 12. Connected through. Further, a resin layer 13 is provided on the glass epoxy substrate 5 so as to cover the transistor chip T.
[0009]
The CSP 6 employs the glass epoxy substrate 5, but unlike the wafer scale CSP, the extending structure from the chip T to the backside electrodes 10 and 11 for external connection is simple, and has an advantage that it can be manufactured at low cost.
[0010]
The CSP 6 is mounted on the printed circuit board PS as shown in FIG. The printed circuit board PS is provided with electrodes and wirings constituting an electric circuit, and the CSP 6, the package type semiconductor device 1, the chip resistor CR, the chip capacitor CC, and the like are electrically connected and fixed.
[0011]
And the circuit comprised with this printed circuit board module is attached in various sets.
[0012]
Next, a method for manufacturing the CSP 6 will be described with reference to FIGS. In FIG. 29, reference is made to a flow diagram entitled the central glass epoxy / flexible substrate.
[0013]
First, a glass epoxy substrate 5 is prepared as a base material (support substrate), and Cu foils 20 and 21 are pressure-bonded to both surfaces via an insulating adhesive. (See FIG. 28A above)
Subsequently, the Cu foils 20, 21 corresponding to the first electrode 7, the second electrode 8, the die pad 9, the first back electrode 10 and the second back electrode 11 are coated with an etching resistant resist 22, The Cu foils 20 and 21 are patterned by etching. The patterning may be performed separately for the front and back sides (see FIG. 28B above).
Subsequently, after removing the resist, a hole for the through hole TH is formed in the glass epoxy substrate 5 using a drill or a laser, and the hole is plated to form the through hole TH. The first electrode 7 and the first back electrode 10, and the second electrode 8 and the second back electrode 11 are electrically connected by the through hole TH. (See FIG. 28C above)
Further, although omitted in the drawing, the first electrode 7 and the second electrode 8 that become bonding posts are plated with Ni, and the die pad 9 that becomes a die bonding post is plated with Au, and the transistor chip T is die bonded. To do.
[0014]
Finally, the emitter electrode of the transistor chip T and the first electrode 7, the base electrode of the transistor chip T and the second electrode 8 are connected via the metal thin wire 12 and covered with the resin layer 13. (See FIG. 28D above)
If necessary, it is diced and separated as individual electric elements. In FIG. 28, only one transistor chip T is provided on the glass epoxy substrate 5, but actually, a large number of transistor chips T are provided in a matrix. Therefore, it is finally separated by a dicing device.
[0015]
With the above manufacturing method, a CSP type electric element employing the support substrate 5 is completed. This manufacturing method is the same even if a flexible sheet is adopted as the support substrate.
[0016]
On the other hand, a manufacturing method employing a ceramic substrate is shown in the flow on the left side of FIG. After preparing the ceramic substrate as the support substrate, through holes are formed, and then the front and back electrodes are printed and sintered using a conductive paste. After that, it is the same as the manufacturing method of FIG. 28 until the resin layer of the pre-manufacturing method is coated. There is a problem that can not be molded. Therefore, the potting resin is potted and cured, and then polishing for flattening the sealing resin is performed, and finally, the dicing apparatus is used for individual separation.
[0017]
[Problems to be solved by the invention]
In FIG. 27, the transistor chip T, the connecting means 7 to 12 and the resin layer 13 are necessary components for electrical connection with the outside and protection of the transistor. It has been difficult to provide a circuit element that can be made thinner, thinner and lighter.
[0018]
Moreover, the glass epoxy board | substrate 5 used as a support substrate is an essentially unnecessary thing as mentioned above. However, since the electrodes are bonded together in the manufacturing method, it is adopted as a support substrate, and the glass epoxy substrate 5 cannot be eliminated. For this reason, the use of the glass epoxy substrate 5 increases the cost. Further, since the glass epoxy substrate 5 is thick, it becomes thick as a circuit element, and there is a limit to miniaturization, thickness reduction, and weight reduction.
[0019]
Furthermore, a glass epoxy substrate or a ceramic substrate always requires a through-hole forming process for connecting electrodes on both sides, and there is a problem that the manufacturing process becomes long.
[0020]
Further, as shown in FIG. 26, when the CSP 6 is mounted on the printed circuit board PS, the thickness of the printed circuit board PS and the thickness of the supporting board of the CSP 6 are added together, and the printed circuit board module becomes thick. Furthermore, if the circuit element 1 and the chip capacitor CC are mounted on the back surface of the printed circuit board PS, the thicknesses of the mounted circuit elements are added together, resulting in a thicker printed circuit board module. Therefore, there is a problem that the set (electronic device) on which the printed circuit board module is mounted is increased in size.
[0021]
[Means for Solving the Problems]
The present invention has been made in view of the many problems described above. First, a plurality of conductive paths electrically separated by separation grooves, a circuit element fixed on the desired conductive path, and the circuit element And an insulating resin which is filled in the separation groove between the conductive paths and exposes and integrally supports the back surface of the conductive path, and an external circuit element fixed to the back surface of the conductive path. It will be solved.
[0022]
Secondly, a plurality of conductive paths electrically separated by the separation groove, a circuit element fixed on the desired conductive path, and connection means for connecting the electrode of the circuit element and the other conductive path An insulating resin which covers the circuit element and is filled in the separation groove between the conductive paths and which is integrally supported by exposing a back surface of the conductive path, and an external circuit element fixed to the back surface of the conductive path To solve the problem.
[0023]
Third, a plurality of conductive paths electrically separated by the separation groove, a plurality of circuit elements fixed on the desired conductive path, and a desired electrode of the circuit element and another conductive path are connected. A connecting means for covering the circuit element and an insulating resin that is filled in the separation groove between the conductive paths and that is integrally supported by exposing a back surface of the conductive path, and is fixed to the back surface of the conductive path This is solved by providing an external circuit element.
[0024]
Since the circuit elements excluding the external parts can minimize the number of constituent elements and the conductive path is exposed on the back surface, a circuit device to which functions are further added by the external parts can be realized.
[0025]
Fourthly, the circuit element is solved by being composed of one or both of a semiconductor bare chip, a chip circuit component, a package type semiconductor device, and a CSP.
[0026]
Fifth, the connection means is constituted by a bonding fine wire or a brazing material.
[0027]
Sixth, the problem is solved by substantially flattening the back surface of the conductive path and the back surface of the insulating resin filled between the separation grooves.
[0028]
Since the same surface is formed by the conductive path and the insulating resin, the mounted external circuit element can be shifted without hitting the side surface of the conductive path. In particular, when this circuit device is used as a mounting board, it is possible to reposition external circuit elements that are mounted so as to be displaced in the horizontal direction. In addition, if the brazing material is melted after mounting the external circuit element, the external circuit element that has been mounted shifted tries to return itself to the upper part of the conductive path by the surface tension of the melted brazing material. Relocation by itself is made.
[0029]
Seventh, the conductive path is solved by being used as an electrode, a bonding pad, a die pad, a wiring or a connector.
[0030]
Eighth, a plurality of conductive paths electrically separated by the separation grooves, a desired circuit element fixed to the back surface of the conductive path, and the separation grooves between the conductive paths are filled and covered with the circuit elements. And a mounting substrate embedded with the circuit element made of an insulating resin that exposes and integrally supports the surface of the conductive path, and includes an external circuit element fixed to the surface of the conductive path. It will be solved by.
[0031]
With this configuration, it can be utilized as a function-embedded mounting board in which circuit elements are embedded. For example, a standard circuit is built in a mounting board, and a user can mount an external component for adding a user-specific function on the mounting board.
[0032]
Ninthly, the problem is solved by making the surface of the conductive path and the surface of the insulating resin filled between the separation grooves substantially flat.
[0033]
As described above, the external parts can be easily displaced, and the position adjustment can be easily realized.
[0034]
Tenth, the problem is solved by making the surface of the conductive path a bonding pad or an external connection pad.
[0035]
Eleventh, the melting point of the brazing material used in the mounting substrate is solved by being higher than the melting point of the brazing material used on the surface of the conductive path.
[0036]
Even when the external component is realized by a brazing material, the brazing material in the mounting board does not melt, and the circuit in the mounting board does not become defective.
[0037]
DETAILED DESCRIPTION OF THE INVENTION
First embodiment for explaining a circuit device
First, the structure of the circuit device of the present invention will be described with reference to FIG.
[0038]
In FIG. 1A, a conductive path 51 is embedded in an insulating resin 50, circuit elements 52A and 52B are fixed on the conductive path 51, and a circuit device 53 is formed by supporting the conductive path 51 with the insulating resin 50. Further, the external component 1 is mounted on the back surface. Here, the number of circuit elements may be one, or a plurality of circuit elements may be mounted. The plurality of circuit elements may constitute one IC circuit including a wiring that is one of the conductive paths.
[0039]
This structure includes three circuit elements indicated by reference numerals 52A and 52B, a plurality of conductive paths indicated by reference numerals 51A, 51B, and 51C, and an insulating resin 50 that embeds the circuit elements 52A and 52B and the conductive paths 51A, 51B, and 51C. A separation groove 54 filled with the insulating resin 50 is provided between the conductive paths 51. The conductive path 51 is supported by the insulating resin 50.
[0040]
As the insulating resin, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide resin or polyphenylene sulfide can be used. As the insulating resin, any resin can be adopted as long as it is a resin that can be hardened using a mold, a resin that can be coated by dipping or coating. As the conductive path 51, a conductive foil mainly made of Cu, a conductive foil mainly made of Al, or a conductive foil made of an alloy such as Fe-Ni can be used. Of course, other conductive materials are possible, and a conductive material that can be etched and a conductive material that evaporates with a laser are particularly preferable.
[0041]
Further, the connection means of the circuit element 52 includes a thin metal wire 55A, a conductive ball made of a brazing material, a flat conductive ball, a brazing material 55B such as solder, a conductive paste 55C such as an Ag paste, a conductive coating, or an anisotropic conductive resin. There is. These connection means are selected according to the type of the circuit element 52 and the mounting form of the circuit element 52. For example, in the case of a bare semiconductor element, a thin metal wire is selected as the connection between the electrode on the surface of the semiconductor element and the conductive path 51, and in the case of CSP, a solder ball or a solder bump is selected. For the chip resistor and the chip capacitor, the solder 55B is selected. Further, there is no problem even if a packaged circuit element, for example, BGA or the like is mounted on the conductive path 51, and when this is adopted, solder is selected as the connecting means.
[0042]
Further, for the adhesion between the circuit element and the conductive path 51A, an insulating adhesive is selected if an electrical connection is not required, and a conductive film is employed if an electrical connection is required. Here, at least one conductive film is sufficient.
[0043]
Possible materials for the conductive coating are Ag, Au, Pt, Pd, etc., and are coated by deposition under low vacuum or high vacuum such as vapor deposition, sputtering, CVD, or plating, sintering of conductive paste, or the like. .
[0044]
For example, Ag adheres to Au and also to a brazing material. Therefore, if the back surface of the chip is covered with an Au film, the chip can be thermocompression bonded by directly coating the conductive film 51A with the Ag film or the Au film, and the chip can be fixed via a brazing material such as solder. Here, the conductive film may be formed on the uppermost layer of the conductive film laminated in a plurality of layers. For example, on a Cu conductive path 51A, two layers of Ni film and Au film are sequentially deposited, three layers of Ni film, Cu film and solder film are sequentially deposited, Ag film, A Ni film can be formed by sequentially coating two layers. In addition, there are many types of these conductive films and laminated structures, but they are omitted here.
[0045]
In this circuit device, since the conductive path 51 is supported by the insulating resin 50 that is a sealing resin, a support substrate is not required, and the conductive path 51, the circuit element 52, and the insulating resin 50 are included. This configuration is a feature of the present invention. As described in the section of the prior art, since the conductive path of the conventional circuit device is supported by the support substrate or supported by the lead frame, a configuration that may be unnecessary is added. However, since this circuit device is composed of the minimum necessary components and does not require a support substrate, it is characterized by being thin and inexpensive.
[0046]
In addition to the above-described configuration, the insulating resin 50 that covers the circuit element 52 and is filled in the separation groove 54 between the conductive paths 51 and is integrally supported is provided.
[0047]
Further, between the conductive paths 51 becomes a separation groove 54, and the insulating resin 50 is filled therein, thereby providing an advantage that insulation between the conductive paths 51 can be achieved.
[0048]
In addition, the insulating resin 50 that covers the circuit element 52 and is filled in the separation groove 54 between the conductive paths 51 and that supports only the back surface of the conductive path 51 is exposed.
[0049]
The point that the back surface of the conductive path is exposed is one of the features of the present invention. The back surface of the conductive path can be used for connection to the outside, and the through hole TH having the conventional structure as shown in FIG. 24 can be made unnecessary.
[0050]
In addition, when the circuit element is directly fixed to the conductive path 51 via a conductive film such as brazing material, Au, Ag, etc., the back surface of the conductive path 51 is exposed, so that heat generated from the circuit element 52A is transferred to the conductive path. 51A can be discharged to the outside. In particular, it is effective for a semiconductor chip that can improve characteristics such as an increase in driving current by heat radiation. Moreover, since the back surface of the conductive path is exposed, it can be used as an external connection electrode. For example, an external lead EL1, a flexible sheet with a thin film lead, a connector, or the like can be mounted on the back surface of the conductive path 51B. Alternatively, the conductive path 51B can be used as a male connector and can be inserted into a female connector attached to the mounting board.
[0051]
In the circuit device, the surface of the separation groove 54 and the surface of the conductive path 51 are substantially coincident. This structure is a feature of the present invention. As shown in FIG. 27, since the back electrodes 10 and 11 are not provided with a step, the external circuit element 1 can be moved horizontally as it is. In particular, if the circuit device 53 is a certain size such as a printed circuit board, an external circuit element can be mounted on the conductive path 51. This is like a printed circuit board in which an IC circuit is embedded.
On the other hand, another external connection structure will be described with reference to FIG. 1B. 1B is substantially the same as FIG. 1A, and the external connection electrode EL2 is exposed from the insulating resin 50. FIG. According to this structure, connection to the outside is possible via the surface of the conductive path 51B. For example, it can be electrically connected to a mounting substrate to which the circuit device is attached via a fine metal wire or a brazing material, and an external lead can also be connected.
Second embodiment for explaining a circuit device
Next, the circuit device 56 shown in FIG. 8A will be described.
[0052]
In this structure, a conductive film 57 is formed on the surface of the conductive path 51, and the other structure is substantially the same as the structure in FIG. 1A. Therefore, the conductive film 57 will be described.
[0053]
The first feature is that a conductive film 57 is provided to prevent warping of the conductive path and the circuit device.
[0054]
Generally, the circuit device itself is warped or the conductive path is curved or peeled off due to the difference in thermal expansion coefficient between the insulating resin and the conductive path material (hereinafter referred to as the first material). Further, since the thermal conductivity of the conductive path 51 is superior to that of the insulating resin, the conductive path 51 first rises in temperature and expands. Therefore, by covering the second material having a smaller thermal expansion coefficient than that of the first material, warping and peeling of the conductive path and warping of the circuit device can be prevented. In particular, when Cu is employed as the first material, Au, Ni, Pt, or the like is preferable as the second material. The expansion coefficient of Cu is 16.7 × 10 −6 (minus the sixth power of 10), Au is 14 × 10 −6, Ni is 12.8 × 10 −6, and Pt is 8.9 × 10 6 -6.
[0055]
The second feature is that the anchor effect is provided by the second material. Since the eaves 58 are formed of the second material, and the eaves 58 attached to the conductive path 51 are embedded in the insulating resin 50, an anchor effect is generated, and the conductive path 51 can be prevented from coming off. . In particular, when an IC circuit is formed in an insulating resin, a thin and bent wiring is provided. However, since the eaves are also provided in this wiring, it is possible to prevent the wiring from coming off.
[0056]
Similarly to FIG. 1A, since the back surface of the conductive path is exposed, it can be used as an external connection electrode. For example, an external lead EL1, a flexible sheet for a connector, a connector, or the like can be mounted. Further, the conductive path 51B can be inserted into the female connector as it is.
[0057]
On the other hand, FIG. 8B illustrates another external connection structure. FIG. 8B is substantially the same as FIG. 1B, and is different only in that the eaves 58 are formed. The effect of the eaves is the same as in FIG. According to this structure, the external connection electrode EL <b> 2 is exposed from the insulating resin 50. Depending on this structure, connection to the outside is possible via the surface of the conductive path 51B. For example, it can be electrically connected to the mounting substrate via a fine metal wire or a brazing material, and an external lead can also be connected.
The circuit device in which the transistor chip 52A and the passive element 52B are mounted has been described as the circuit device. However, the present invention is a circuit device in which one semiconductor chip is sealed, as shown in FIG. The circuit device in which the face-down type element is mounted or a circuit device in which passive elements such as a chip resistor and a chip capacitor are sealed as shown in FIG. Furthermore, an IC circuit may be configured by a plurality of circuit elements, wirings that electrically connect these circuit elements, and the like.
[0058]
Although the package type semiconductor device 1 is attached as an external circuit element, other semiconductor devices, circuit elements (electrical components) such as a chip capacitor, chip resistor, CSP, and BGA can be mounted. The number is limited by the size of the circuit device, but at least one is mounted.
1st Embodiment explaining the manufacturing method of a circuit device
Next, a method for manufacturing the circuit device 53 will be described with reference to FIGS.
[0059]
First, as shown in FIG. 2, a sheet-like conductive foil 60 is prepared. The conductive foil 60 is selected in consideration of the adhesiveness, bonding property, and plating property of the brazing material. Examples of the material include a conductive foil mainly made of Cu and a conductive foil mainly made of Al. Or the conductive foil etc. which consist of alloys, such as Fe-Ni, are employ | adopted.
[0060]
The thickness of the conductive foil is preferably about 10 μm to 300 μm in consideration of the later etching, and here, a copper foil of 70 μm (2 ounces) is employed. However, it is basically good if it is 300 μm or more and 10 μm or less. As will be described later, it is only necessary that the separation groove 61 shallower than the thickness of the conductive foil 60 can be formed.
[0061]
In addition, the sheet-like conductive foil 60 is prepared by being wound in a roll shape with a predetermined width, and this may be conveyed to each step described later, or a conductive foil cut into a predetermined size is prepared, You may convey to each process mentioned later.
Subsequently, there is a step of removing the conductive foil 60 excluding at least the region to be the conductive path 51 thinner than the thickness of the conductive foil 60. There is a step of covering the insulating groove 50 and the conductive foil 60 formed by this removal step with the insulating resin 50.
[0062]
First, a photoresist (etching-resistant mask) PR is formed on the Cu foil 60, and the photoresist PR is patterned so that the conductive foil 60 excluding the region to be the conductive path 51 is exposed (see FIG. 3 above). Then, etching may be performed through the photoresist PR (see FIG. 4 above).
[0063]
The depth of the separation groove 61 formed by etching is, for example, 50 μm, and its side surface is a rough surface, so that the adhesion between the insulating resin 50 and the conductive path is improved.
[0064]
The side wall of the separation groove 61 is schematically illustrated as a straight line, but has a different structure depending on the removal method. This removal process can employ wet etching, dry etching, laser evaporation, and dicing. In the case of wet etching, ferric chloride or cupric chloride is mainly used as the etchant, and the conductive foil is dipped in the etchant or showered with the etchant. Since wet etching is generally non-anisotropic, the side surface has a curved structure.
[0065]
In the case of dry etching, etching can be performed anisotropically or non-anisotropically. At present, it is said that Cu cannot be removed by reactive ion etching, but it can be removed by sputtering. Etching can be anisotropic or non-anisotropic depending on sputtering conditions. Therefore, a fine pattern conductive path can be realized.
[0066]
Further, in the laser, the separation groove can be formed by direct laser light irradiation. In this case, the side surface of the separation groove 61 is formed to be straight.
[0067]
In dicing, it is impossible to form a complicated bent pattern, but it is possible to form a lattice-like separation groove.
[0068]
In FIG. 3, instead of the photoresist, a conductive film resistant to the etching solution may be selectively coated. If the conductive film is selectively deposited on the conductive path, this conductive film becomes an etching protective film, and the separation groove can be etched without employing a resist. Possible materials for the conductive film are, for example, Ag, Au, Pt, Pd, and the like. In addition, these corrosion-resistant conductive films have the feature that they can be used as they are as die pads and bonding pads.
[0069]
For example, the Ag coating adheres to Au and also to the brazing material. Therefore, if the Au coating is coated on the back surface of the chip, the chip can be thermocompression bonded to the Ag coating on the conductive path 51 as it is, and the chip can be fixed via a brazing material such as solder. Further, since an Au fine wire can be adhered to the Ag conductive film, wire bonding is also possible. Accordingly, there is an advantage that these conductive films can be used as they are as die pads and bonding pads.
[0070]
Subsequently, as shown in FIG. 5, there is a step of electrically connecting the circuit element 52 to the conductive foil 60 in which the separation groove 61 is formed and mounting it.
[0071]
The circuit element 52 is a semiconductor element such as a transistor, a diode or an IC chip, or a passive element such as a chip capacitor or a chip resistor. Although the thickness is increased, face-down semiconductor elements such as CSP and BGA can also be mounted.
[0072]
Here, the bare transistor chip 52A is die-bonded to the conductive path 51A, and the emitter electrode and the conductive path 51B, and the base electrode and the conductive path 51B are connected via the thin metal wire 55A. Examples of the method include ball bonding by thermocompression bonding and wedge bonding by ultrasonic waves. Reference numeral 52B denotes a chip capacitor or a passive element, which is fixed with a brazing material such as solder or a conductive paste 55B.
[0073]
Further, as shown in FIG. 6, there is a step of attaching an insulating resin 50 to the conductive foil 60 and the separation groove 61. This can be realized by transfer molding, injection molding, dipping or coating. As the resin material, a thermosetting resin such as an epoxy resin can be realized by transfer molding, and a thermoplastic resin such as polyimide resin or polyphenylene sulfide can be realized by injection molding.
[0074]
In the present embodiment, the thickness of the insulating resin coated on the surface of the conductive foil 60 is adjusted so as to cover about 100 μm from the top of the circuit element. This thickness can be increased or decreased in consideration of strength.
[0075]
The feature of this step is that the conductive foil 60 that becomes the conductive path 51 becomes the support substrate until the insulating resin 50 is coated. Conventionally, as shown in FIG. 28, the conductive paths 7 to 11 are formed by using the support substrate 5 that is not originally required, but in the present invention, the conductive foil 60 that becomes the support substrate is necessary as an electrode material. Material. Therefore, there is a merit that the work can be performed with the constituent materials omitted as much as possible, and the cost can be reduced.
[0076]
Further, since the separation groove 61 is formed shallower than the thickness of the conductive foil, the conductive foil 60 is not individually separated as the conductive path 51. Therefore, the sheet-like conductive foil 60 can be handled as a unit, and when the insulating resin is molded, it has a feature that it is very easy to carry to the mold and mount to the mold.
[0077]
Subsequently, there is a step of chemically and / or physically removing the back surface of the conductive foil 60 and separating it as the conductive path 51. Here, this removal step is performed by polishing, grinding, etching, laser metal evaporation, or the like.
[0078]
In the experiment, the entire surface is cut by about 30 μm by a polishing apparatus or a grinding apparatus, and the insulating resin 50 is exposed from the separation groove 61. This exposed surface is indicated by a dotted line in FIG. As a result, the conductive path 51 having a thickness of about 40 μm is separated. Alternatively, wet etching may be performed on the entire surface of the conductive foil 60 until the insulating resin 50 is exposed, and then the entire surface may be shaved by a polishing or grinding apparatus to expose the insulating resin 50 from the back surface.
[0079]
As a result, the surface of the conductive path 51 is exposed to the insulating resin 50. As a result, the separation groove 61 is processed to become the separation groove 54 of FIG. (See Figure 6 above)
Finally, if necessary, a conductive material such as solder is applied to the exposed conductive path 51, and the circuit device 53 is inverted and the external circuit element 1 is mounted as shown in FIG. Since the circuit device 53 is substantially flat, it can be mounted on a component mounting device such as a chip mounter. It can also be flowed to a solder reflow device. Further, when fixing the external circuit element via the brazing material, it is necessary to increase the melting point of the brazing material provided in the insulating resin 50. By doing so, for example, in the solder reflow process, the brazing material 55B is not melted, and disconnection or the like can be prevented.
[0080]
When a conductive film is applied to the back surface of the conductive path 51, a conductive film may be formed in advance on the back surface of the conductive foil in FIG. In this case, a portion corresponding to the conductive path may be selectively attached. The deposition method is, for example, plating. The conductive film is preferably made of a material that is resistant to etching. In this case, the conductive path 51 can be separated only by etching without polishing.
[0081]
In this manufacturing method, only one set of transistor and chip resistor is mounted in the insulating resin 50, but this may be arranged in a matrix form as a unit, or either one of the circuit elements may be mounted. It may be arranged in a matrix as one unit. Furthermore, an IC circuit composed of a plurality of circuit elements may be arranged in a matrix as a unit. In this case, it separates with a dicing apparatus so that it may mention later.
[0082]
With the above manufacturing method, the flat circuit device 56 in which the conductive path 51 is embedded in the insulating resin 50 and the back surface of the insulating resin 50 and the back surface of the conductive path 51 coincide can be realized.
[0083]
The feature of this manufacturing method is that the insulating path 50 can be used as a support substrate to separate the conductive path 51. The insulating resin 50 is a material necessary as a material for embedding the conductive path 51, and does not require an unnecessary support substrate 5 unlike the conventional manufacturing method of FIG. Therefore, it has the characteristics that it can be manufactured with a minimum amount of material and cost can be reduced.
[0084]
The thickness of the insulating resin from the surface of the conductive path 51 can be adjusted when the insulating resin is attached in the previous step. Therefore, although it varies depending on the circuit element to be mounted, the thickness of the circuit device 56 has a feature that it can be made thicker or thinner. Here, a circuit device is obtained in which a 40 μm conductive path 51 and circuit elements are embedded in an insulating resin 50 having a thickness of 400 μm. (See Figure 1 above)
Second embodiment for explaining a method of manufacturing a circuit device
Next, a method of manufacturing the circuit device 56 having the eaves 58 will be described with reference to FIGS. In addition, since it is substantially the same as 1st Embodiment except the 2nd material 70 used as eaves being adhere | attached, detailed description is abbreviate | omitted.
[0085]
First, as shown in FIG. 9, a conductive foil 60 in which a second material 70 having a low etching rate is coated on a conductive foil 60 made of a first material is prepared.
[0086]
For example, it is preferable to deposit Ni on a Cu foil because Cu and Ni can be etched at once with ferric chloride or cupric chloride, and Ni is formed into eaves 58 due to the difference in etching rate. . The thick solid line is the conductive film 70 made of Ni, and the film thickness is preferably about 1 to 10 μm. Further, the thicker the Ni film, the easier the eaves 58 are formed.
[0087]
The second material may be coated with a material that can be selectively etched with the first material. In this case, first, the film 58 made of the second material is patterned so as to cover the formation region of the conductive path 51, and the conductive film made of the first material is etched using this film as a mask, so that the eaves 58 can be formed. It is. As the second material, Al, Ag, Au, or the like can be considered.
[0088]
Subsequently, there is a step of removing the conductive foil 60 excluding at least the region to be the conductive path 51 thinner than the thickness of the conductive foil 60.
[0089]
As shown in FIG. 10, a photoresist PR is formed on the Ni 70, and the photoresist PR is patterned so that the Ni 70 excluding the region to be the conductive path 51 is exposed, and is etched through the photoresist as shown in FIG. That's fine.
[0090]
As described above, when etching is performed using an etchant such as ferric chloride or cupric chloride, the etching rate of Ni 70 is smaller than the etching rate of Cu 60, and thus eaves 58 appears as etching progresses.
[0091]
The step of mounting the circuit element 52 on the conductive foil 60 in which the separation groove 61 is formed (FIG. 12), the conductive foil 60 and the separation groove 61 are covered with an insulating resin 50, and the back surface of the conductive foil 60 is chemically treated. The process of separating as the conductive path 51 (FIG. 13), the process of forming a conductive film on the back surface of the conductive path and inverting the circuit device 56 (FIG. 14), and the external circuit element 1 Since the process from mounting to completion (FIG. 8) is the same as that of the pre-manufacturing method, its description is omitted.
Third embodiment for explaining a method of manufacturing a circuit element
Subsequently, a manufacturing method in which a plurality of circuit elements are arranged in a matrix as a unit and individually separated after sealing to form discrete elements and IC elements will be described with reference to FIGS. Since this manufacturing method is almost the same as that of the first embodiment, the same parts will be described briefly.
[0092]
First, as shown in FIG. 15, a sheet-like conductive foil 60 is prepared.
[0093]
In addition, the sheet-like conductive foil 60 is prepared by being wound in a roll shape with a predetermined width, and this may be conveyed to each step described later, or a conductive foil cut into a predetermined size is prepared, You may convey to each process mentioned later.
[0094]
Subsequently, there is a step of removing the conductive foil 60 excluding at least the region to be the conductive path 51 thinner than the thickness of the conductive foil 60.
[0095]
First, as shown in FIG. 16, a photoresist PR is formed on the Cu foil 60, and the photoresist PR is patterned so that the conductive foil 60 excluding the region that becomes the conductive path 51 is exposed. Then, as shown in FIG. 17, etching may be performed through the photoresist PR.
[0096]
The depth of the separation groove 61 formed by etching is, for example, 50 μm, and its side surface is a rough surface, so that the adhesiveness with the insulating resin 50 is improved.
[0097]
Further, the side walls of the separation groove 61 are schematically illustrated as straight, but have different structures depending on the removal method. This removal process can employ wet etching, dry etching, laser evaporation, and dicing. (For details, refer to the first embodiment)
In FIG. 16, instead of the photoresist PR, a conductive film resistant to the etching solution may be selectively coated. If the conductive film is selectively deposited on the conductive path, this conductive film becomes an etching protective film, and the separation groove can be etched without employing a resist.
[0098]
Subsequently, as shown in FIG. 18, there is a step of mounting the circuit element 52 by electrically connecting it to the conductive foil 60 in which the separation groove 61 is formed.
[0099]
The circuit element 52 is a semiconductor element such as a transistor, a diode or an IC chip, or a passive element such as a chip capacitor or a chip resistor. Although the thickness is increased, face-down semiconductor elements such as CSP and BGA can also be mounted.
[0100]
In the figure, a bare transistor chip 52A is die-bonded to a conductive path 51A, an emitter electrode and a conductive path 51B, a base electrode and a conductive path 51B are connected via a thin metal wire 55A, and a chip capacitor 52B is connected via solder. ing.
[0101]
Furthermore, as shown in FIG. 19, there is a step of attaching an insulating resin 50 to the conductive foil 60 and the separation groove 61. This can be realized by transfer molding, injection molding, or dipping.
[0102]
In the present embodiment, the thickness of the insulating resin coated on the surface of the conductive foil 60 is adjusted so as to cover about 100 μm from the top of the circuit element. This thickness can be increased or decreased in consideration of strength.
[0103]
The feature of this step is that when the insulating resin 50 is coated, the conductive foil 60 that becomes the conductive path 51 becomes a support substrate. Conventionally, as shown in FIG. 28, the conductive paths 7 to 11 are formed by using the support substrate 5 that is not originally required, but in the present invention, the conductive foil 60 that becomes the support substrate is necessary as an electrode material. Material. Therefore, there is a merit that the work can be performed with the constituent materials omitted as much as possible, and the cost can be reduced.
[0104]
Further, since the separation groove 61 is formed shallower than the thickness of the conductive foil, the conductive foil 60 is not individually separated as the conductive path 51. Therefore, the sheet-like conductive foil 60 can be handled as a unit, and when the insulating resin is molded, it has a feature that it is very easy to carry to the mold and mount to the mold.
[0105]
Subsequently, there is a step of chemically and / or physically removing the back surface of the conductive foil 60 and separating it as the conductive path 51. Here, the removing step is performed by polishing, grinding, etching, metal evaporation of laser, or the like.
[0106]
In the experiment, the entire surface is shaved by about 30 μm with a polishing apparatus or a grinding apparatus to expose the insulating resin 50. This exposed surface is indicated by a dotted line in FIG. As a result, the conductive path 51 having a thickness of about 40 μm is separated. Alternatively, wet etching may be performed on the entire surface of the conductive foil 60 until the insulating resin 50 is exposed, and then the entire surface may be shaved by a polishing or grinding apparatus to expose the insulating resin 50.
[0107]
As a result, the surface of the conductive path 51 is exposed to the insulating resin 50.
[0108]
Further, as shown in FIG. 20, a conductive material such as solder is applied to the exposed conductive path 51.
[0109]
Further, as shown in FIG. 21, there is a step of separating each circuit element.
[0110]
The separation line is indicated by an arrow, and can be realized by dicing, cutting, pressing, chocolate breaking, or the like. In addition, when employ | adopting a chocolate break, what is necessary is just to form a protrusion part in a metal mold | die so that a groove | channel may enter a separation line when coat | covering insulating resin.
[0111]
In particular, dicing is frequently used in ordinary semiconductor device manufacturing methods, and is suitable because it can be separated into a very small size.
[0112]
Then, the circuit device completed in FIG. 21 is inverted, and external circuit elements are mounted and completed.
On the right side of FIG. 29, a flow summarizing the present invention is shown. A circuit device can be realized by nine processes including preparation of Cu foil, plating of Ag or Ni, half etching, die bonding, wire bonding, transfer molding, rear surface Cu foil removal, rear surface treatment of the conductive path, and dicing. Moreover, all processes can be performed in-house without supplying a support substrate from the manufacturer.
The embodiment which explains the kind of circuit device, and these mounting methods.
[0113]
FIG. 22 shows a circuit device 81 on which a face-down type circuit element 80 is mounted. As the circuit element 80, a bare semiconductor chip, a CSP or BGA whose surface is sealed, and the like are applicable. FIG. 23 shows a circuit device 83 on which a passive element 82 such as a chip resistor or a chip resistor is mounted. Since these are thin because they do not require a support substrate and are sealed with an insulating resin, they have excellent environmental resistance.
[0114]
FIG. 24 illustrates a real layer structure. The circuit devices 53, 81, and 83 of the present invention described so far are mounted on a conductive path 85 formed on a mounting board 84 such as a printed board, a metal board, or a ceramic board.
[0115]
In particular, since the conductive path 51A to which the back surface of the semiconductor chip 52 is fixed is thermally coupled to the conductive path 85 of the mounting substrate 84, heat can be radiated through the conductive path 85. Further, when a metal substrate is employed as the mounting substrate 84, the temperature of the semiconductor chip 52 can be further lowered by helping the high thermal conductivity of the metal substrate. Therefore, the driving capability of the semiconductor chip can be improved.
[0116]
For example, power MOS, IGBT, SIT, a transistor for driving a large current, an IC (MOS type, BIP type, Bi-CMOS type) memory element for driving a large current are suitable.
[0117]
As the metal substrate, an Al substrate, a Cu substrate, or an Fe substrate is preferable, and an insulating resin and / or an oxide film or the like is formed in consideration of a short circuit with the conductive path 85.
[0118]
FIG. 25 shows the circuit device 91 of the present invention mounted thereon, and the circuit device 91 of the present invention and the passive element 92 mounted thereon. Since the exposed surface of the conductive path is flat between the mounting substrate 90 and the circuit device 91, the insulating resin 93 is coated to prevent a short circuit. This insulating resin 93 is exposed only at the connection portion, similar to the solder resist employed in the printed circuit board. According to this structure, a mounting board module in which circuit elements are embedded without using a printed board is possible.
[0119]
Further, the merit of the circuit device will be described with reference to FIG. In the conventional mounting method, the semiconductor manufacturer forms a package type semiconductor device and flip chip, and the set manufacturer mounts the semiconductor device supplied from the semiconductor manufacturer and the passive elements supplied from the component manufacturer on the printed circuit board. However, this was incorporated into a set as an electronic device. However, since this circuit device can employ itself as a mounting substrate, a semiconductor manufacturer can supply it to a set manufacturer as a mounting substrate module. Therefore, the set manufacturer can omit the element mounting on the printed circuit board.
[0120]
【The invention's effect】
As is apparent from the above description, the present invention is a circuit device that is configured with the minimum necessary amount of circuit elements, conductive paths, and insulating resin, and that does not waste resources. Therefore, it is possible to realize a circuit device in which there are no extra components until completion and the cost can be significantly reduced. Further, by selecting the coating thickness of the insulating resin and the thickness of the conductive foil, it is possible to realize a circuit device that is extremely reduced in size, thickness, and weight.
[0121]
Further, since only the back surface of the conductive path is exposed from the insulating resin, an external circuit element can be mounted, and the overall circuit function can be further enhanced. Further, the front or back surface of the conductive path can be immediately used as an external connection electrode, and there is an advantage that the back surface electrode and the through hole having the conventional structure as shown in FIG. 27 can be eliminated.
[0122]
In addition, since the back surface of the conductive path is exposed, heat generated from the circuit element can be transferred to the outside through the conductive path. In particular, the power element can be mounted by this heat radiation.
[0123]
In addition, the circuit device has a structure in which the surface of the separation groove and the surface of the conductive path have a flat surface that is substantially the same, and when the narrow pitch QFP is mounted, the circuit device itself can be moved horizontally as it is. Deviation correction is extremely easy.
[0124]
In addition, since the second material is formed on the front side of the conductive path, it is possible to suppress warping of the mounting substrate, particularly warpage or peeling of the elongated wiring due to a difference in thermal expansion coefficient.
[0125]
Further, by forming a film made of the second material on the surface of the conductive path, an eaves attached to the conductive path can be formed. Therefore, an anchor effect can be generated, and the warpage and disconnection of the conductive path can be prevented.
[0126]
In the method of manufacturing a circuit device according to the present invention, the conductive foil itself, which is a material of the conductive path, functions as a support substrate, and the conductive foil is used until the separation groove is formed, the circuit element is mounted, or the insulating resin is applied. When the whole is supported, and when the conductive foil is separated as each conductive path, or when an external circuit element is mounted, an insulating resin is used as a support substrate. Therefore, the circuit element, conductive foil, and insulating resin can be manufactured with the minimum necessary. As described in the conventional example, a support substrate is not necessary in constructing a circuit device originally, and the cost can be reduced. In addition, because the support substrate is not required, the conductive path is embedded in the insulating resin, and the thickness of the insulating resin and conductive foil can be adjusted, it is possible to form a very thin circuit device. There is also.
[0127]
Further, as apparent from FIG. 29, the through-hole forming process, the conductor printing process (in the case of a ceramic substrate), etc. can be omitted, so that the manufacturing process can be greatly shortened and the entire process can be made in-house. Also, a frame mold is not required at all, and this is a manufacturing method with extremely short delivery time.
[0128]
Next, the conductive path can be handled without separation until the process of removing it thinner than the thickness of the conductive foil (for example, half-etching), so in the subsequent circuit element mounting process and insulating resin coating process It also has a feature that improves the performance.
[0129]
Further, since the same surface is formed by the conductive path and the insulating resin, the mounted external circuit element can be shifted without hitting the side of the conductive path on the back surface of the circuit device. In particular, it is possible to reposition external circuit elements that are mounted so as to be displaced in the horizontal direction. In addition, if the brazing material is melted after mounting the external circuit element, the external circuit element that is mounted with a deviation tries to return to the upper part of the conductive path by the surface tension of the melted brazing material, and the external circuit element Relocation by itself becomes possible.
[0130]
Furthermore, since the semiconductor device itself can be employed as a mounting substrate, a semiconductor manufacturer can supply the printed circuit board module as a printed circuit board module to the set manufacturer, and the set manufacturer can omit element mounting on the printed circuit board.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a circuit device of the present invention.
FIG. 2 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 3 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 4 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 5 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 6 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 7 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 8 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 9 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 10 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 11 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 12 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 13 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 14 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 15 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 16 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 17 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 18 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 19 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 20 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 21 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.
FIG. 22 is a diagram illustrating a circuit device of the present invention.
FIG. 23 is a diagram illustrating a circuit device of the present invention.
FIG. 24 is a diagram for explaining a circuit device mounting method according to the present invention;
FIG. 25 is a diagram illustrating a circuit device mounting method according to the present invention.
FIG. 26 is a diagram illustrating a mounting structure of a conventional circuit device.
FIG. 27 is a diagram illustrating a conventional circuit device.
FIG. 28 is a diagram illustrating a conventional method of manufacturing a circuit device.
FIG. 29 is a diagram illustrating a conventional method of manufacturing a circuit device according to the present invention.
FIG. 30 is a diagram for explaining a conventional method up to set assembly and a method of the present invention.
[Explanation of symbols]
1 External circuit elements
50 Insulating resin
51 Conductive path
52 Circuit elements
53 Circuit equipment
54 Separation groove
58 Eaves

Claims (13)

  A plurality of conductive paths;
  A semiconductor element and a passive element electrically connected to each other by the conductive path;
  An insulating resin that exposes the back surface of the conductive path and seals the semiconductor element, the passive element, and the conductive path;
  An external circuit element electrically connected to the back surface of the conductive path;
A semiconductor module comprising:   The semiconductor module according to claim 1, wherein the semiconductor element or the passive element and the external circuit element are electrically connected through the conductive path.   2. The semiconductor module according to claim 1, wherein the semiconductor element is a transistor, a diode, or an IC chip.   The semiconductor module according to claim 1, wherein the passive element is a chip resistor or a chip capacitor.   A package type semiconductor device or CSP is electrically connected to the conductive path,
  2. The semiconductor module according to claim 1, wherein the package type semiconductor device or the CSP is sealed with the insulating resin.   The semiconductor module according to claim 1, wherein the conductive paths are separated from each other by a separation groove.   The semiconductor module according to claim 1, wherein a side surface of the conductive path has a curved surface.   2. The semiconductor module according to claim 1, wherein a package type semiconductor device, a semiconductor device, a chip capacitor, a chip resistor, CSP or BGA is adopted as the external circuit element.   2. The semiconductor module according to claim 1, wherein the external circuit element is fixed to the back surface of the conductive path via a brazing material.   The semiconductor module according to claim 1, wherein the external circuit element is an external lead, a flexible sheet, or a connector.   The semiconductor module according to claim 1, wherein the conductive path is made of any one of copper, aluminum, and iron-nickel.   The semiconductor module according to claim 1, wherein a conductive film made of a metal material different from the conductive path is provided on a surface of the conductive path.   The semiconductor module according to claim 1, wherein the conductive path is an electrode, a bonding pad, a die pad, or a wiring that electrically connects them.

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